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Add new model: rts5249

PATCH New [email protected] 2 participants 5 messages Apr 11, 2013 – Apr 19, 2013

Subsystems (2)
MMC, SD and SDIO Multifunction devices (MFD)
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[email protected]

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#0 lore raw

PATCH v2 1/1 Add new model: rts5249

From: Wei WANG <[email protected]>

v2:
1. Modify copyright notice
2. Add macro definitions for phy registers
3. Replace mdelay with msleep

Wei WANG (1):
mfd:rtsx: Support RTS5249

 drivers/mfd/Makefile         |    2 +-
 drivers/mfd/rts5249.c        |  241 ++++++++++++++++++++++++++++++++++++++++++
 drivers/mfd/rtsx_pcr.c       |    5 +
 drivers/mfd/rtsx_pcr.h       |    1 +
 include/linux/mfd/rtsx_pci.h |   36 +++++++
 5 files changed, 284 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mfd/rts5249.c
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH v2 1/1 mfd:rtsx: Support RTS5249

From: Wei WANG <[email protected]>

Support new model: RTS5249

Signed-off-by Wei WANG <[email protected]>
---
 drivers/mfd/Makefile         |    2 +-
 drivers/mfd/rts5249.c        |  241 ++++++++++++++++++++++++++++++++++++++++++
 drivers/mfd/rtsx_pcr.c       |    5 +
 drivers/mfd/rtsx_pcr.h       |    1 +
 include/linux/mfd/rtsx_pci.h |   36 +++++++
 5 files changed, 284 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mfd/rts5249.c
drivers/mfd/Makefile +1 -1
index b90409c..f61ac02 100644
@@ -9,7 +9,7 @@ obj-$(CONFIG_MFD_88PM805)	+= 88pm805.o 88pm80x.o
 obj-$(CONFIG_MFD_SM501)		+= sm501.o
 obj-$(CONFIG_MFD_ASIC3)		+= asic3.o tmio_core.o
 
-rtsx_pci-objs			:= rtsx_pcr.o rts5209.o rts5229.o rtl8411.o rts5227.o
+rtsx_pci-objs			:= rtsx_pcr.o rts5209.o rts5229.o rtl8411.o rts5227.o rts5249.o
 obj-$(CONFIG_MFD_RTSX_PCI)	+= rtsx_pci.o
 
 obj-$(CONFIG_HTC_EGPIO)		+= htc-egpio.o
drivers/mfd/rts5249.c new file +241 -0

241 lines not on this page · raw message

drivers/mfd/rtsx_pcr.c +5 -0
index 2f12cc1..62b0e12 100644
@@ -56,6 +56,7 @@ static DEFINE_PCI_DEVICE_TABLE(rtsx_pci_ids) = {
 	{ PCI_DEVICE(0x10EC, 0x5229), PCI_CLASS_OTHERS << 16, 0xFF0000 },
 	{ PCI_DEVICE(0x10EC, 0x5289), PCI_CLASS_OTHERS << 16, 0xFF0000 },
 	{ PCI_DEVICE(0x10EC, 0x5227), PCI_CLASS_OTHERS << 16, 0xFF0000 },
+	{ PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 },
 	{ 0, }
 };
 

@@ -1033,6 +1034,10 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr)
 	case 0x5227:
 		rts5227_init_params(pcr);
 		break;
+
+	case 0x5249:
+		rts5249_init_params(pcr);
+		break;
 	}
 
 	dev_dbg(&(pcr->pci->dev), "PID: 0x%04x, IC version: 0x%02x\n",
drivers/mfd/rtsx_pcr.h +1 -0
index 2b3ab8a..55fcfc2 100644
@@ -32,5 +32,6 @@ void rts5209_init_params(struct rtsx_pcr *pcr);
 void rts5229_init_params(struct rtsx_pcr *pcr);
 void rtl8411_init_params(struct rtsx_pcr *pcr);
 void rts5227_init_params(struct rtsx_pcr *pcr);
+void rts5249_init_params(struct rtsx_pcr *pcr);
 
 #endif
include/linux/mfd/rtsx_pci.h +36 -0
index 26ea7f1..86bc635 100644
@@ -500,6 +500,8 @@
 #define BPP_POWER_15_PERCENT_ON		0x08
 #define BPP_POWER_ON			0x00
 #define BPP_POWER_MASK			0x0F
+#define SD_VCC_PARTIAL_POWER_ON		0x02
+#define SD_VCC_POWER_ON			0x00
 
 /* PWR_GATE_CTRL */
 #define PWR_GATE_EN			0x01

@@ -689,6 +691,40 @@
 #define IMAGE_FLAG_ADDR0		0xCE80
 #define IMAGE_FLAG_ADDR1		0xCE81
 
+/* Phy register */
+#define PHY_PCR				0x00
+#define PHY_RCR0			0x01
+#define PHY_RCR1			0x02
+#define PHY_RCR2			0x03
+#define PHY_RTCR			0x04
+#define PHY_RDR				0x05
+#define PHY_TCR0			0x06
+#define PHY_TCR1			0x07
+#define PHY_TUNE			0x08
+#define PHY_IMR				0x09
+#define PHY_BPCR			0x0A
+#define PHY_BIST			0x0B
+#define PHY_RAW_L			0x0C
+#define PHY_RAW_H			0x0D
+#define PHY_RAW_DATA			0x0E
+#define PHY_HOST_CLK_CTRL		0x0F
+#define PHY_DMR				0x10
+#define PHY_BACR			0x11
+#define PHY_IER				0x12
+#define PHY_BCSR			0x13
+#define PHY_BPR				0x14
+#define PHY_BPNR2			0x15
+#define PHY_BPNR			0x16
+#define PHY_BRNR2			0x17
+#define PHY_BENR			0x18
+#define PHY_REG_REV			0x19
+#define PHY_FLD0			0x1A
+#define PHY_FLD1			0x1B
+#define PHY_FLD2			0x1C
+#define PHY_FLD3			0x1D
+#define PHY_FLD4			0x1E
+#define PHY_DUM_REG			0x1F
+
 #define rtsx_pci_init_cmd(pcr)		((pcr)->ci = 0)
 
 struct rtsx_pcr;
Signature · 1 line
1.7.9.5
#2 lore raw

Re: [PATCH v2] mfd:rtsx: Support RTS5249

Hi Wei,

Quoted 3 lines · On Thu, Apr 11, 2013 at 10:43:40AM +0800, [email protected] wrote:

From: Wei WANG <[email protected]>

Support new model: RTS5249

Could you please provide me with a more detailled changelog (What's so different with this model that the current driver does not support ?) before I apply it ?

Cheers,
Samuel.

Signature · 2 lines
Intel Open Source Technology Centre
http://oss.intel.com/
author
#3 lore raw

Re: [PATCH v2] mfd:rtsx: Support RTS5249

Quoted 5 lines · Samuel Ortiz

Hi Wei,

Quoted 2 lines · On Thu, Apr 11, 2013 at 10:43:40AM +0800, [email protected] wrote:

From: Wei WANG <[email protected]>

Quoted 8 lines
Quoted 1 line

Support new model: RTS5249

Could you please provide me with a more detailled changelog (What's so different with this model that the current driver does not support ?) before I apply it ?

Cheers,
Samuel.

The difference is minor except that RTS5249 supports SD UHS-II interface.

In order to support SD UHS-II，the definitions of some internal registers of RTS5249 have to be modified and are different from its predecessors. So we need this patch to ensure RTS5249 can work, even SD/MMC stack doesn't support UHS-II interface.

#4 lore raw

Re: [PATCH v2] mfd:rtsx: Support RTS5249

Hi Wei,

Quoted 15 lines · wwang
Quoted 5 lines · Samuel Ortiz

Hi Wei,

Quoted 2 lines · On Thu, Apr 11, 2013 at 10:43:40AM +0800, [email protected] wrote:

From: Wei WANG <[email protected]>

Quoted 8 lines
Quoted 1 line

Support new model: RTS5249

Could you please provide me with a more detailled changelog (What's so different with this model that the current driver does not support ?) before I apply it ?

Cheers,
Samuel.

Quoted 6 lines

The difference is minor except that RTS5249 supports SD UHS-II interface.

In order to support SD UHS-II，the definitions of some internal registers of RTS5249 have to be modified and are different from its predecessors. So we need this patch to ensure RTS5249 can work, even SD/MMC stack doesn't support UHS-II interface.

Patch applied and pushed now, thanks.

Cheers,
Samuel.

Signature · 2 lines
Intel Open Source Technology Centre
http://oss.intel.com/