ARM: bcm2835: override the HW UART periphid
Subsystems (3)
PATCH 1/1 ARM: bcm2835: override the HW UART periphid
From: Jongsung Kim <[email protected]>
Stephen Warren reported the recent commit 78506f2 (add support for extended FIFO-size of PL011-r1p5) breaks the serial port on the BCM2835 ARM SoC.
A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs. The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for this compatibility issue, this patch overrides the HW UART periphid register values with the actually compatible UART periphid 0x00241011 (r1p3 or r1p4).
---
This is a fix for v3.10-rc*.
arch/arm/boot/dts/bcm2835.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/bcm2835.dtsi +1 -0
@@ -44,6 +44,7 @@ reg = <0x7e201000 0x1000>; interrupts = <2 25>; clock-frequency = <3000000>; + arm,primecell-periphid = <0x00241011>; }; gpio: gpio {
Signature · 1 line
1.7.10.4
Olof Johansson
AppliedPATCH 1/1 ARM: bcm2835: override the HW UART periphid
Quoted 13 lines · Stephen Warren
From: Jongsung Kim <[email protected]>
Stephen Warren reported the recent commit 78506f2 (add support for extended FIFO-size of PL011-r1p5) breaks the serial port on the BCM2835 ARM SoC.
A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs. The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for this compatibility issue, this patch overrides the HW UART periphid register values with the actually compatible UART periphid
0x00241011(r1p3 or r1p4).
Quoted 5 lines
Reported-by Stephen Warren <[email protected]>Signed-off-by Jongsung Kim <[email protected]>Signed-off-by Stephen Warren <[email protected]>---
This is a fix for v3.10-rc*.
Applied.
-Olof