Add cros-ec protocol driver and enable it in smdk5250

This patch series adds the drivers for the cros-ec protocol that is used to communicate with the Chrome OS Embedded Controller (EC). The series also enables its use in Google Snow which is based on smdk5250.

The last patch in this series depends on the patch in the MMC series that brings in exynos5-dt.c:
http://patchwork.ozlabs.org/patch/240084.
-----

Changes in v5:
- Change ec-interrupt gpio pin from 174 to 782. This has to be changed again after the GPIO pin numbering patches
(http://patchwork.ozlabs.org/patch/233417) are in.
- Add exynos: tag wherever applicable.
- Add/change dependency description.

Changes in v4:
- Removed unrelated exynos-spi.txt.
- Moved cros-ec-keyb.txt to the cros-ec-keyb patch.
- Removed old code and comment.

Changes in v3:
- Rearranged #include directives in alphabetical order.
- Removed outdated TODO and irrelevant bug reference in comments.

Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
- Added gpio node to exynos5250.dtsi.
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

Hung-ying Tyan (7):
cros: add cros_ec driver
cros: add I2C support for cros_ec
cros: exynos: add SPI support for cros_ec
cros: add LPC support for cros_ec
cros: adds cros_ec keyboard driver
cros: exynos: add cros-ec device nodes to exynos5250-snow.dts
cros: exynos: enable cros-ec for smdk5250

 README                                          |    5 +
 arch/arm/dts/exynos5250.dtsi                    |    3 +
 board/samsung/dts/exynos5250-snow.dts           |   81 ++
 board/samsung/smdk5250/exynos5-dt.c             |   45 +
 doc/device-tree-bindings/input/cros-ec-keyb.txt |   79 ++
 doc/device-tree-bindings/misc/cros-ec.txt       |   38 +
 drivers/input/Makefile                          |    1 +
 drivers/input/cros_ec_keyb.c                    |  261 ++++
 drivers/misc/Makefile                           |    4 +
 drivers/misc/cros_ec.c                          | 1304 ++++++++++++++++++++
 drivers/misc/cros_ec_i2c.c                      |  199 ++++
 drivers/misc/cros_ec_lpc.c                      |  283 +++++
 drivers/misc/cros_ec_spi.c                      |  161 +++
 drivers/spi/exynos_spi.c                        |   22 +
 include/configs/exynos5250-dt.h                 |   10 +-
 include/cros_ec.h                               |  449 +++++++
 include/cros_ec_message.h                       |   44 +
 include/ec_commands.h                           | 1440 +++++++++++++++++++++++
 include/fdtdec.h                                |    2 +
 include/spi.h                                   |   16 +
 lib/fdtdec.c                                    |    2 +
 21 files changed, 4448 insertions(+), 1 deletion(-)
 create mode 100644 doc/device-tree-bindings/input/cros-ec-keyb.txt
 create mode 100644 doc/device-tree-bindings/misc/cros-ec.txt
 create mode 100644 drivers/input/cros_ec_keyb.c
 create mode 100644 drivers/misc/cros_ec.c
 create mode 100644 drivers/misc/cros_ec_i2c.c
 create mode 100644 drivers/misc/cros_ec_lpc.c
 create mode 100644 drivers/misc/cros_ec_spi.c
 create mode 100644 include/cros_ec.h
 create mode 100644 include/cros_ec_message.h
 create mode 100644 include/ec_commands.h

1.8.2.1

This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller.

---
Changes in v5: None
Changes in v4:
- Removed unrelated exynos-spi.txt.
- Moved cros-ec-keyb.txt to the cros-ec-keyb patch.

Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 doc/device-tree-bindings/misc/cros-ec.txt |   38 +
 drivers/misc/Makefile                     |    1 +
 drivers/misc/cros_ec.c                    | 1304 ++++++++++++++++++++++++++
 include/cros_ec.h                         |  449 +++++++++
 include/cros_ec_message.h                 |   44 +
 include/ec_commands.h                     | 1440 +++++++++++++++++++++++++++++
 include/fdtdec.h                          |    1 +
 lib/fdtdec.c                              |    1 +
 8 files changed, 3278 insertions(+)
 create mode 100644 doc/device-tree-bindings/misc/cros-ec.txt
 create mode 100644 drivers/misc/cros_ec.c
 create mode 100644 include/cros_ec.h
 create mode 100644 include/cros_ec_message.h
 create mode 100644 include/ec_commands.h

new file mode 100644
index 0000000..07ea7cd
@@ -0,0 +1,38 @@
+Chrome OS CROS_EC Binding
+======================
+
+The device tree node which describes the operation of the CROS_EC interface
+is as follows:
+
+Required properties :
+- compatible = "google,cros-ec"
+
+Optional properties :
+- spi-max-frequency : Sets the maximum frequency (in Hz) for SPI bus
+   operation
+- i2c-max-frequency : Sets the maximum frequency (in Hz) for I2C bus
+   operation
+- ec-interrupt : Selects the EC interrupt, defined as a GPIO according
+   to the platform
+- optimise-flash-write : Boolean property - if present then flash blocks
+   containing all 0xff will not be written, since we assume that the EC
+   uses that pattern for erased blocks
+
+The CROS_EC node should appear as a subnode of the interrupt that connects it
+to the EC (e.g. i2c, spi, lpc). The reg property (as usual) will indicate
+the unit address on that bus.
+
+
+Example
+=======
+
+	spi at 131b0000 {
+		cros-ec at 0 {
+			reg = <0>;
+			compatible = "google,cros-ec";
+			spi-max-frequency = <5000000>;
+			ec-interrupt = <&gpio 174 1>;
+			optimise-flash-write;
+			status = "disabled";
+		};
+	};

index 8cdc3b6..33fe822 100644
@@ -30,6 +30,7 @@ COBJS-$(CONFIG_DS4510)  += ds4510.o
 COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
+COBJS-$(CONFIG_CROS_EC) += cros_ec.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o

index 42e9048..ca7cd04 100644

index 49bec81..21ed4f1 100644

1.8.2.1

Part of the diff is not shown here. View the raw message.

Tested on snow:

This patch adds I2C support for carrying out the cros_ec protocol.

---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added Commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile      |   1 +
 drivers/misc/cros_ec_i2c.c | 199 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 200 insertions(+)
 create mode 100644 drivers/misc/cros_ec_i2c.c

index 33fe822..9363ef9 100644
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o

1.8.2.1

Tested on snow:

This patch adds SPI support for carrying out the cros_ec protocol.

---
Changes in v5:
- Add exynos: tag as the patch includes changes in exynos_spi.c.

Changes in v4:
- Removed old code and comment.

Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile      |   1 +
 drivers/misc/cros_ec_spi.c | 161 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/spi/exynos_spi.c   |  22 +++++++
 include/spi.h              |  16 +++++
 4 files changed, 200 insertions(+)
 create mode 100644 drivers/misc/cros_ec_spi.c

index 9363ef9..18209ec 100644
@@ -32,6 +32,7 @@ COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
+COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o

index 607e1cd..4e4214f 100644
@@ -416,6 +416,28 @@ static int process_nodes(const void *blob, int node_list[], int count)
 }
 #endif
 
+/**
+ * Set up a new SPI slave for an fdt node
+ *
+ * @param blob		Device tree blob
+ * @param node		SPI peripheral node to use
+ * @return 0 if ok, -1 on error
+ */
+struct spi_slave *spi_setup_slave_fdt(const void *blob, int node,
+		unsigned int cs, unsigned int max_hz, unsigned int mode)
+{
+	struct spi_bus *bus;
+	unsigned int i;
+
+	for (i = 0, bus = spi_bus; i < bus_count; i++, bus++) {
+		if (bus->node == node)
+			return spi_setup_slave(i, cs, max_hz, mode);
+	}
+
+	debug("%s: Failed to find bus node %d\n", __func__, node);
+	return NULL;
+}
+
 /* Sadly there is no error return from this function */
 void spi_init(void)
 {

index 3fe2e1e..4cf16f9 100644
@@ -242,4 +242,20 @@ static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
 	return ret < 0 ? ret : din[1];
 }
 
+/**
+ * Set up a SPI slave for a particular device tree node
+ *
+ * This calls spi_setup_slave() with the correct bus number. Call
+ * spi_free_slave() to free it later.
+ *
+ * @param blob		Device tree blob
+ * @param node		SPI peripheral node to use
+ * @param cs		Chip select to use
+ * @param max_hz	Maximum SCK rate in Hz (0 for default)
+ * @param mode		Clock polarity, clock phase and other parameters
+ * @return pointer to new spi_slave structure
+ */
+struct spi_slave *spi_setup_slave_fdt(const void *blob, int node,
+		unsigned int cs, unsigned int max_hz, unsigned int mode);
+
 #endif	/* _SPI_H_ */

1.8.2.1

I haven't tested this as I don't have a SPI interface close enough to upstream, but it looks good. We can adjust later as needed.

This patch adds LPC support for carrying out the cros_ec protocol.

---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile      |   1 +
 drivers/misc/cros_ec_lpc.c | 283 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 284 insertions(+)
 create mode 100644 drivers/misc/cros_ec_lpc.c

index 18209ec..3553ff6 100644
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o

1.8.2.1

Tested on Chromebook Pixel. I need to send a few patches to enable it, but will do so. Still, this driver works correctly.

This patch adds the driver for keyboard that's controlled by ChromeOS EC.

---
Changes in v5: None
Changes in v4:
- Added cros-ec-keyb.txt.

Changes in v3:
- Rearranged #include directives in alphabetical order.
- Removed outdated TODO and irrelevant bug reference in comments.

Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 README                                          |   5 +
 doc/device-tree-bindings/input/cros-ec-keyb.txt |  79 +++++++
 drivers/input/Makefile                          |   1 +
 drivers/input/cros_ec_keyb.c                    | 261 ++++++++++++++++++++++++
 include/fdtdec.h                                |   1 +
 lib/fdtdec.c                                    |   1 +
 6 files changed, 348 insertions(+)
 create mode 100644 doc/device-tree-bindings/input/cros-ec-keyb.txt
 create mode 100644 drivers/input/cros_ec_keyb.c

index 0d37d56..55a9e35 100644
@@ -1412,6 +1412,11 @@ CBFS (Coreboot Filesystem) support
 		Export function i8042_kbd_init, i8042_tstc and i8042_getc
 		for cfb_console. Supports cursor blinking.
 
+		CONFIG_CROS_EC_KEYB
+		Enables a Chrome OS keyboard using the CROS_EC interface.
+		This uses CROS_EC to communicate with a second microcontroller
+		which provides key scans on request.
+
 - Video support:
 		CONFIG_VIDEO
 

index 0805e86..4331190 100644
@@ -27,6 +27,7 @@ LIB	:= $(obj)libinput.o
 
 COBJS-$(CONFIG_I8042_KBD) += i8042.o
 COBJS-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
+COBJS-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o
 ifdef CONFIG_PS2KBD
 COBJS-y += keyboard.o pc_keyb.o
 COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o

index ca7cd04..5dc6b2c 100644
@@ -85,6 +85,7 @@ enum fdt_compat_id {
 	COMPAT_WOLFSON_WM8994_CODEC,	/* Wolfson WM8994 Sound Codec */
 	COMPAT_SAMSUNG_EXYNOS_SPI,	/* Exynos SPI */
 	COMPAT_GOOGLE_CROS_EC,		/* Google CROS_EC Protocol */
+	COMPAT_GOOGLE_CROS_EC_KEYB,	/* Google CROS_EC Keyboard */
 	COMPAT_SAMSUNG_EXYNOS_EHCI,	/* Exynos EHCI controller */
 	COMPAT_SAMSUNG_EXYNOS_USB_PHY,	/* Exynos phy controller for usb2.0 */
 	COMPAT_SAMSUNG_EXYNOS_TMU,	/* Exynos TMU */

index 21ed4f1..0105a06 100644
@@ -58,6 +58,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
 	COMPAT(SAMSUNG_EXYNOS_SPI, "samsung,exynos-spi"),
 	COMPAT(GOOGLE_CROS_EC, "google,cros-ec"),
+	COMPAT(GOOGLE_CROS_EC_KEYB, "google,cros-ec-keyb"),
 	COMPAT(SAMSUNG_EXYNOS_EHCI, "samsung,exynos-ehci"),
 	COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
 	COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),

1.8.2.1

This patch adds cros-ec related device nodes to exynos5250-snow.dts. It also adds a gpio node to exynos5250.dtsi.

---
Changes in v5:
- Change ec-interrupt gpio pin from 174 to 782. This has to be changed again after the GPIO pin numbering patches
(http://patchwork.ozlabs.org/patch/233417) are in.

Changes in v4:
- Added commit message.

Changes in v3: None
Changes in v2:
- Added gpio node to exynos5250.dtsi.
- Dropped the period from commit subject.

 arch/arm/dts/exynos5250.dtsi          |  3 ++
 board/samsung/dts/exynos5250-snow.dts | 81 +++++++++++++++++++++++++++++++++++
 2 files changed, 84 insertions(+)

index 9c4e686..2d6dfff 100644
@@ -201,4 +201,7 @@
 		reg = <0x12230000 0x1000>;
 		interrupts = <0 78 0>;
 	};
+
+	gpio: gpio {
+	};
 };

1.8.2.1

This patch initiates cros-ec in board_init() to enable it for smdk5250.

This patch depends on the patch in the MMC series that brings in exynos5-dt.c. Refer to http://patchwork.ozlabs.org/patch/240084.

---
Changes in v5:
- Add exynos: tag.
- Add dependency description.

Changes in v4: None
Changes in v3: None
Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
- Added commit message.
- Dropped the period from commit subject.

 board/samsung/smdk5250/exynos5-dt.c | 45 +++++++++++++++++++++++++++++++++++++
 include/configs/exynos5250-dt.h     | 10 ++++++++-
 2 files changed, 54 insertions(+), 1 deletion(-)

index b01fe72..8be3192 100644
@@ -21,6 +21,7 @@
  */
 
 #include <common.h>
+#include <cros_ec.h>
 #include <fdtdec.h>
 #include <asm/io.h>
 #include <errno.h>

@@ -39,6 +40,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct local_info {
+	struct cros_ec_dev *cros_ec_dev;	/* Pointer to cros_ec device */
+	int cros_ec_err;			/* Error for cros_ec, 0 if ok */
+};
+
+static struct local_info local;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
 int board_usb_vbus_init(void)
 {

@@ -55,12 +63,30 @@ int board_usb_vbus_init(void)
 }
 #endif
 
+struct cros_ec_dev *board_get_cros_ec_dev(void)
+{
+	return local.cros_ec_dev;
+}
+
+static int board_init_cros_ec_devices(const void *blob)
+{
+	local.cros_ec_err = cros_ec_init(blob, &local.cros_ec_dev);
+	if (local.cros_ec_err)
+		return -1;  /* Will report in board_late_init() */
+
+	return 0;
+}
+
 int board_init(void)
 {
 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
 #ifdef CONFIG_EXYNOS_SPI
 	spi_init();
 #endif
+
+	if (board_init_cros_ec_devices(gd->fdt_blob))
+		return -1;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
 	board_usb_vbus_init();
 #endif

@@ -337,3 +363,22 @@ int board_early_init_f(void)
 	return err;
 }
 #endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+	stdio_print_current_devices();
+
+	if (local.cros_ec_err) {
+		/* Force console on */
+		gd->flags &= ~GD_FLG_SILENT;
+
+		printf("cros-ec communications failure %d\n",
+		       local.cros_ec_err);
+		puts("\nPlease reset with Power+Refresh\n\n");
+		panic("Cannot init cros-ec device");
+		return -1;
+	}
+	return 0;
+}
+#endif

index 97c8825..289db00 100644
@@ -82,11 +82,19 @@
 #define CONFIG_BAUDRATE			115200
 #define EXYNOS5_DEFAULT_UART_OFFSET	0x010000
 
+/* Enable keyboard */
+#define CONFIG_CROS_EC		/* CROS_EC protocol */
+#define CONFIG_CROS_EC_SPI		/* Support CROS_EC over SPI */
+#define CONFIG_CROS_EC_I2C		/* Support CROS_EC over I2C */
+#define CONFIG_CROS_EC_KEYB	/* CROS_EC keyboard input */
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_KEYBOARD
+
 /* Console configuration */
 #define CONFIG_CONSOLE_MUX
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define EXYNOS_DEVICE_SETTINGS \
-		"stdin=serial\0" \
+		"stdin=serial,cros-ec-keyb\0" \
 		"stdout=serial,lcd\0" \
 		"stderr=serial,lcd\0"
 

1.8.2.1

Sorry for very late reply.
You are enabling this feature on smdk5250, but adding the configuration in exynos5250-dt.h, though exynos5250-dt.h is seems to common.
Though this patch is merged but isnt it possible to submit a patch to add configuration macros to smdk5250.h rather than exynos5250-dt.h. Or shall i submit the patch for doing so.

with warm regards,
Chander Kashyap

[resent from correct address]

Hi Chander,

We had this discuss on the list a month or two back. The idea with exynos5250-dt.h is that it supports all Exynos5250 boards, and only the device tree needs to be changes to select the particular features required for each board. It allows us to check, by building one board config, that all those boards build correctly. Then we can boot that image on smdk5250 or any other board, only changing the device tree. It is a good 'general' target for people starting a new port.

But some will want to have their own board config to reduce the size of the image (removing features they know they don't need).

We talked about creating something like exynos5250-dt-common to hold options that are common to all boards, so that those boards don't need to include exynos5250-dt.h. Things like cros_ec could be then be omitted from exynos5250-dt-common.

Regards,
Simon

And that patch is part 6 of 9 in a big series that needs to come in via u-boot-samsung. Minkyu, where's all that at? Thanks!

Tom
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Dear Tom Rini,

patches are in my queue.
I will review soon.

Thanks,
Minkyu Kang.

As all pre-reqs are now in u-boot/master, applied to u-boot/master, thanks for your patience!

Tom
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