irqchip: gic: fix boot for chained gics
Subsystems (2)
PATCH 1/1 irqchip: gic: fix boot for chained gics
As of c0114709ed: "irqchip: gic: Perform the gic_secondary_init() call via CPU notifier", booting on a platform with chained gics (e.g. Realview EB ARM11MPCore) will result in the gic_cpu_notifier being registered twice, corrupting the cpu notifier list and rendering the platform unbootable.
This patch ensures that we only register the notifier for the first gic, allowing platforms with chained gics to boot. At the same time we limit the pointlessly duplicated calls to set_smp_cross_call and set_handle_irq to the first gic registered.
--- drivers/irqchip/irq-gic.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
drivers/irqchip/irq-gic.c +5 -4
@@ -808,12 +808,13 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,if (WARN_ON (!gic->domain))return ; +if (gic_nr ==0 ) {#ifdef CONFIG_SMP -set_smp_cross_call (gic_raise_softirq); -register_cpu_notifier (&gic_cpu_notifier); +set_smp_cross_call (gic_raise_softirq); +register_cpu_notifier (&gic_cpu_notifier);#endif - -set_handle_irq (gic_handle_irq); +set_handle_irq (gic_handle_irq); + } gic_chip.flags |= gic_arch_extn.flags;gic_dist_init (gic);
Signature · 1 line
1.8.1.1
PATCH 1/1 irqchip: gic: fix boot for chained gics
Quoted 6 lines · Mark Rutland
As of
c0114709ed: "irqchip: gic: Perform thegic_secondary_init()call via CPU notifier", booting on a platform with chained gics (e.g. Realview EB ARM11MPCore) will result in thegic_cpu_notifierbeing registered twice, corrupting the cpu notifier list and rendering the platform unbootable.
Quoted 8 lines
This patch ensures that we only register the notifier for the first gic, allowing platforms with chained gics to boot. At the same time we limit the pointlessly duplicated calls to
set_smp_cross_callandset_handle_irqto the first gic registered.Signed-off-by Mark Rutland <[email protected]>Cc Catalin Marinas <[email protected]>Cc Thomas Gleixner <[email protected]>
PATCH 1/1 irqchip: gic: fix boot for chained gics
In reply to Mark RutlandQuoted 5 lines · Mark Rutland
As of
c0114709ed: "irqchip: gic: Perform thegic_secondary_init()call via CPU notifier", booting on a platform with chained gics (e.g. Realview EB ARM11MPCore) will result in thegic_cpu_notifierbeing registered twice, corrupting the cpu notifier list and rendering the platform unbootable.
Hi Mark,
This patch is still not in the mainline. I am unable to boot my Realview EB ARM11MPCore without this patch.
Regards,
Sudeep
Quoted 36 lines
This patch ensures that we only register the notifier for the first gic, allowing platforms with chained gics to boot. At the same time we limit the pointlessly duplicated calls to
set_smp_cross_callandset_handle_irqto the first gic registered.Signed-off-by Mark Rutland <[email protected]>Cc Catalin Marinas <[email protected]>Cc Thomas Gleixner <[email protected]>--- drivers/irqchip/irq-gic.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)drivers/irqchip/irq-gic.c +5
-4@@ -808,12 +808,13 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,if (WARN_ON (!gic->domain))return ; +if (gic_nr ==0 ) {#ifdef CONFIG_SMP -set_smp_cross_call (gic_raise_softirq); -register_cpu_notifier (&gic_cpu_notifier); +set_smp_cross_call (gic_raise_softirq); +register_cpu_notifier (&gic_cpu_notifier);#endif - -set_handle_irq (gic_handle_irq); +set_handle_irq (gic_handle_irq); + } gic_chip.flags |= gic_arch_extn.flags;gic_dist_init (gic);