Renesas ARM-based SoC updates for v3.11 #2
Subsystems (5)
cover Renesas ARM-based SoC updates for v3.11 #2
Hi Olof, Hi Arnd,
this pull-request is based on renesas-soc-for-v3.11 which you have previously pulled.
This pull may cause various conflicts though I believe all of them are not difficult to resolve. The renesas-next-20130613 tag in my tree illustrates how I have handled the conflicts with both changes already in arm-soc and changes I intend to send pull requests for in the near future.
The following changes since commit 413bfd0e67894c930242482cd15ac09a800e2ab8:
ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate (2013-06-07 14:24:52 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc2-for-v3.11
for you to fetch changes up to 018222f5d32bc5ca9fd830aebfeed10f1be96c93:
ARM: shmobile: r8a7790: add clock definitions and aliases for MMCIF and SDHI (2013-06-12 21:07:38 +0900)
----------------------------------------------------------------
Second Round of Renesas ARM-based SoC updates for v3.11
* Ether device name updates for r8a7778 and r8a7779 Sergei Shtylyov
* Extended clock and driver coverage for r8a7778 by Goda-san and Morimoto-san
* Extended clock and coverage for r8a73a4 and r8a7790 by Guennadi Liakhovetski
* HSCIF support for r8a7790 by Ulrich Hecht
----------------------------------------------------------------
Guennadi Liakhovetski (2):
ARM: shmobile: r8a73a4: add clock definitions and aliases for MMCIF and SDHI
ARM: shmobile: r8a7790: add clock definitions and aliases for MMCIF and SDHI
Kuninori Morimoto (6):
ARM: shmobile: r8a7778: add support I2C clock
ARM: shmobile: r8a7778: add support HSPI clock
ARM: shmobile: r8a7778: add support MMC clock
ARM: shmobile: r8a7778: add support I2C driver
ARM: shmobile: r8a7778: add support HSPI driver
ARM: shmobile: r8a7778: add support MMC driver
Sergei Shtylyov (2):
ARM: shmobile: r8a7779: fix Ether device name
ARM: shmobile: r8a7778: fix Ether device name
Ulrich Hecht (1):
ARM: shmobile: r8a7790: HSCIF support
arch/arm/mach-shmobile/clock-r8a73a4.c | 22 +++++++--- arch/arm/mach-shmobile/clock-r8a7778.c | 23 +++++++++- arch/arm/mach-shmobile/clock-r8a7790.c | 31 ++++++++++--- arch/arm/mach-shmobile/include/mach/r8a7778.h | 5 +++ arch/arm/mach-shmobile/setup-r8a7778.c | 63 ++++++++++++++++++++++++++- arch/arm/mach-shmobile/setup-r8a7779.c | 2 +- 6 files changed, 131 insertions(+), 15 deletions(-)
PATCH 1/11 ARM: shmobile: r8a7779: fix Ether device name
From: Sergei Shtylyov <[email protected]>
While recasting commit dace48d04dee46a3409d5e13cd98031522e46377 (ARM: shmobile:
R8A7779: add Ether support), I made a typo in the platform device's name: used underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name straight to that one.
Signed-off-by Sergei Shtylyov <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/setup-r8a7779.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-shmobile/setup-r8a7779.c +1 -1
@@ -443,7 +443,7 @@ void __init r8a7779_add_standard_devices(void)void __init r8a7779_add_ether_device (struct sh_eth_plat_data *pdata) { -platform_device_register_resndata (&platform_bus,"sh_eth" ,-1 , +platform_device_register_resndata (&platform_bus,"r8a777x-ether" ,-1 , ether_resources,ARRAY_SIZE (ether_resources), pdata,sizeof (*pdata));
Signature · 1 line
1.8.2.1
PATCH 2/11 ARM: shmobile: r8a7778: fix Ether device name
In reply to Simon HormanFrom: Sergei Shtylyov <[email protected]>
While recasting commit 524219146a89aee5366326c225ccd71231419d89 (ARM: shmobile:
R8A7778: add Ether support), I made a typo in the platform device's name: used underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name straight to that one.
Signed-off-by Sergei Shtylyov <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/setup-r8a7778.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-shmobile/setup-r8a7778.c +1 -1
@@ -96,7 +96,7 @@ static struct resource ether_resources[] = {void __init r8a7778_add_ether_device (struct sh_eth_plat_data *pdata) { -platform_device_register_resndata (&platform_bus,"sh_eth" ,-1 , +platform_device_register_resndata (&platform_bus,"r8a777x-ether" ,-1 , ether_resources,ARRAY_SIZE (ether_resources), pdata,sizeof (*pdata));
Signature · 1 line
1.8.2.1
PATCH 3/11 ARM: shmobile: r8a7790: HSCIF support
In reply to Simon HormanFrom: Ulrich Hecht <[email protected]>
Adds support for HSCIF0 and HSCIF1 on the r8a7790.
Signed-off-by Ulrich Hecht <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/clock-r8a7790.c | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/mach-shmobile/clock-r8a7790.c +5 -0
@@ -181,6 +181,7 @@ static struct clk div6_clks[DIV6_NR] = {/* MSTP */ enum {MSTP721 ,MSTP720 , +MSTP717 ,MSTP716 ,MSTP304 ,MSTP216 ,MSTP207 ,MSTP206 ,MSTP204 ,MSTP203 ,MSTP202 ,MSTP_NR
@@ -196,6 +197,8 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ + [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ + [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */ };static struct clk_lookup lookups[] = {
@@ -249,6 +252,8 @@ static struct clk_lookup lookups[] = {CLKDEV_DEV_ID ("sh-sci.5" , &mstp_clks[MSTP202 ]),CLKDEV_DEV_ID ("sh-sci.6" , &mstp_clks[MSTP721 ]),CLKDEV_DEV_ID ("sh-sci.7" , &mstp_clks[MSTP720 ]), +CLKDEV_DEV_ID ("sh-sci.8" , &mstp_clks[MSTP717 ]), + CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]), };#define R8A7790_CLOCK_ROOT (e, m, p0, p1, p30, p31) \
Signature · 1 line
1.8.2.1
PATCH 4/11 ARM: shmobile: r8a7778: add support I2C clock
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
This patch adds r8a7778 I2C clock support.
It also adds peripheral_clk which is requiested
from i2c-rcar driver
Signed-off-by Yusuke Goda <[email protected]>
Signed-off-by Kuninori Morimoto <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/clock-r8a7778.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
arch/arm/mach-shmobile/clock-r8a7778.c +13 -1
@@ -105,7 +105,8 @@ static struct clk *main_clks[] = {enum {MSTP323 ,MSTP322 ,MSTP321 ,MSTP114 , -MSTP026 ,MSTP025 ,MSTP024 ,MSTP023 ,MSTP022 ,MSTP021 , +MSTP030 , +MSTP029 ,MSTP028 ,MSTP027 ,MSTP026 ,MSTP025 ,MSTP024 ,MSTP023 ,MSTP022 ,MSTP021 ,MSTP016 ,MSTP015 ,MSTP_NR };
@@ -114,6 +115,10 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */ [MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */ [MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */ + [MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */ + [MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */ + [MSTP028] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 28, 0), /* I2C2 */ + [MSTP027] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 27, 0), /* I2C3 */ [MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */ [MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */ [MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */
@@ -125,11 +130,18 @@ static struct clk mstp_clks[MSTP_NR] = { };static struct clk_lookup lookups[] = { +/* main */ +CLKDEV_CON_ID ("peripheral_clk" , &p_clk), +/* MSTP32 clocks */ CLKDEV_DEV_ID ("sh_mobile_sdhi.0" , &mstp_clks[MSTP323 ]),/* SDHI0 */ CLKDEV_DEV_ID ("sh_mobile_sdhi.1" , &mstp_clks[MSTP322 ]),/* SDHI1 */ CLKDEV_DEV_ID ("sh_mobile_sdhi.2" , &mstp_clks[MSTP321 ]),/* SDHI2 */ CLKDEV_DEV_ID ("sh-eth" , &mstp_clks[MSTP114 ]),/* Ether */ +CLKDEV_DEV_ID ("i2c-rcar.0" , &mstp_clks[MSTP030 ]),/* I2C0 */ +CLKDEV_DEV_ID ("i2c-rcar.1" , &mstp_clks[MSTP029 ]),/* I2C1 */ +CLKDEV_DEV_ID ("i2c-rcar.2" , &mstp_clks[MSTP028 ]),/* I2C2 */ +CLKDEV_DEV_ID ("i2c-rcar.3" , &mstp_clks[MSTP027 ]),/* I2C3 */ CLKDEV_DEV_ID ("sh-sci.0" , &mstp_clks[MSTP026 ]),/* SCIF0 */ CLKDEV_DEV_ID ("sh-sci.1" , &mstp_clks[MSTP025 ]),/* SCIF1 */ CLKDEV_DEV_ID ("sh-sci.2" , &mstp_clks[MSTP024 ]),/* SCIF2 */
Signature · 1 line
1.8.2.1
PATCH 5/11 ARM: shmobile: r8a7778: add support HSPI clock
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
This patch adds r8a7778 HSPI clock support.
It also adds shyway_clk which is requiested
from sh-hspi driver
Signed-off-by Yusuke Goda <[email protected]>
Signed-off-by Kuninori Morimoto <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/clock-r8a7778.c | 6 ++++++ 1 file changed, 6 insertions(+)
arch/arm/mach-shmobile/clock-r8a7778.c +6 -0
@@ -108,6 +108,7 @@ enum {MSTP030 ,MSTP029 ,MSTP028 ,MSTP027 ,MSTP026 ,MSTP025 ,MSTP024 ,MSTP023 ,MSTP022 ,MSTP021 ,MSTP016 ,MSTP015 , +MSTP007 , MSTP_NR }; static struct clk mstp_clks[MSTP_NR] = {
@@ -127,10 +128,12 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */ [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */ [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */ + [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */ };static struct clk_lookup lookups[] = {/* main */ +CLKDEV_CON_ID ("shyway_clk" , &s_clk),CLKDEV_CON_ID ("peripheral_clk" , &p_clk),/* MSTP32 clocks */
@@ -150,6 +153,9 @@ static struct clk_lookup lookups[] = {CLKDEV_DEV_ID ("sh-sci.5" , &mstp_clks[MSTP021 ]),/* SCIF6 */ CLKDEV_DEV_ID ("sh_tmu.0" , &mstp_clks[MSTP016 ]),/* TMU00 */ CLKDEV_DEV_ID ("sh_tmu.1" , &mstp_clks[MSTP015 ]),/* TMU01 */ +CLKDEV_DEV_ID ("sh-hspi.0" , &mstp_clks[MSTP007 ]),/* HSPI0 */ +CLKDEV_DEV_ID ("sh-hspi.1" , &mstp_clks[MSTP007 ]),/* HSPI1 */ + CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */ };void __init r8a7778_clock_init (void )
Signature · 1 line
1.8.2.1
PATCH 5/11 ARM: shmobile: r8a7778: add MSTP clock assignments to DT
Assigns clocks to i2c*, tmu*, scif*, mmcif, sdhi*, and hspi*.
Signed-off-by Ulrich Hecht <[email protected]>
--- arch/arm/boot/dts/r8a7778.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
arch/arm/boot/dts/r8a7778.dtsi +27 -0
@@ -133,6 +133,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc70000 0x1000>; interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C0>; status = "disabled"; };
@@ -142,6 +143,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc71000 0x1000>; interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C1>; status = "disabled"; };
@@ -151,6 +153,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc72000 0x1000>; interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C2>; status = "disabled"; };
@@ -160,6 +163,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc73000 0x1000>; interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C3>; status = "disabled"; };
@@ -169,6 +173,8 @@ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, <0 33 IRQ_TYPE_LEVEL_HIGH>, <0 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_TMU0>; + clock-names = "fck"; #renesas,channels = <3>;
@@ -181,6 +187,7 @@ interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>, <0 37 IRQ_TYPE_LEVEL_HIGH>, <0 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_TMU1>; #renesas,channels = <3>;
@@ -193,6 +200,7 @@ interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>, <0 41 IRQ_TYPE_LEVEL_HIGH>, <0 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_TMU2>; #renesas,channels = <3>;
@@ -203,6 +211,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF0>; + clock-names = "sci_ick"; status = "disabled"; };
@@ -210,6 +220,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF1>; + clock-names = "sci_ick"; status = "disabled"; };
@@ -217,6 +229,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF2>; + clock-names = "sci_ick"; status = "disabled"; };
@@ -224,6 +238,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF3>; + clock-names = "sci_ick"; status = "disabled"; };
@@ -231,6 +247,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF4>; + clock-names = "sci_ick"; status = "disabled"; };
@@ -238,6 +256,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF5>; + clock-names = "sci_ick"; status = "disabled"; };
@@ -245,6 +265,7 @@ compatible = "renesas,sh-mmcif"; reg = <0xffe4e000 0x100>; interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_MMC>; status = "disabled"; };
@@ -252,6 +273,7 @@ compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4c000 0x100>; interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_SDHI0>; status = "disabled"; };
@@ -259,6 +281,7 @@ compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4d000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_SDHI1>; status = "disabled"; };
@@ -266,6 +289,7 @@ compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4f000 0x100>; interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_SDHI2>; status = "disabled"; };
@@ -273,6 +297,7 @@ compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc7000 0x18>; interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_HSPI>; #address-cells = <1>; #size-cells = <0>; status = "disabled";
@@ -282,6 +307,7 @@ compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc8000 0x18>; interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_HSPI>; #address-cells = <1>; #size-cells = <0>; status = "disabled";
@@ -291,6 +317,7 @@ compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc6000 0x18>; interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_HSPI>; #address-cells = <1>; #size-cells = <0>; status = "disabled";
Signature · 1 line
2.2.2
Re: [PATCH 05/11] ARM: shmobile: r8a7778: add MSTP clock assignments to DT
In reply to Simon HormanHi Ulrich,
Thank you for the patch.
Quoted 53 lines · On Wednesday 21 January 2015 17:20:56 Ulrich Hecht wrote:
Assigns clocks to i2c*, tmu*, scif*, mmcif, sdhi*, and hspi*.
Signed-off-by Ulrich Hecht <[email protected]>--- arch/arm/boot/dts/r8a7778.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)arch/arm/boot/dts/r8a7778.dtsi +6
-0@@ -133,6 +133,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc70000 0x1000>; interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C0>; status = "disabled"; };@@ -142,6 +143,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc71000 0x1000>; interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C1>; status = "disabled"; };@@ -151,6 +153,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc72000 0x1000>; interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C2>; status = "disabled"; };@@ -160,6 +163,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc73000 0x1000>; interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C3>; status = "disabled"; };@@ -169,6 +173,8 @@ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, <0 33 IRQ_TYPE_LEVEL_HIGH>, <0 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_TMU0>; + clock-names = "fck"; #renesas,channels = <3>;
arch/arm/boot/dts/r8a7778.dtsi line 190
Quoted 4 lines
arch/arm/boot/dts/r8a7778.dtsi +1
-0@@ -181,6 +187,7 @@ interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>, <0 37 IRQ_TYPE_LEVEL_HIGH>, <0 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_TMU1>;
You should add clock-names = "fck"; here.
arch/arm/boot/dts/r8a7778.dtsi line 203
Quoted 7 lines
arch/arm/boot/dts/r8a7778.dtsi +1
-0#renesas,channels = <3>;@@ -193,6 +200,7 @@ interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>, <0 41 IRQ_TYPE_LEVEL_HIGH>, <0 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_TMU2>;
And here too.
Quoted 89 lines
arch/arm/boot/dts/r8a7778.dtsi +16
-0#renesas,channels = <3>;@@ -203,6 +211,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF0>; + clock-names = "sci_ick"; status = "disabled"; };@@ -210,6 +220,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF1>; + clock-names = "sci_ick"; status = "disabled"; };@@ -217,6 +229,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF2>; + clock-names = "sci_ick"; status = "disabled"; };@@ -224,6 +238,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF3>; + clock-names = "sci_ick"; status = "disabled"; };@@ -231,6 +247,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF4>; + clock-names = "sci_ick"; status = "disabled"; };@@ -238,6 +256,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF5>; + clock-names = "sci_ick"; status = "disabled"; };@@ -245,6 +265,7 @@ compatible = "renesas,sh-mmcif"; reg = <0xffe4e000 0x100>; interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_MMC>; status = "disabled"; };@@ -252,6 +273,7 @@ compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4c000 0x100>; interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_SDHI0>; status = "disabled"; };@@ -259,6 +281,7 @@ compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4d000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_SDHI1>; status = "disabled"; };@@ -266,6 +289,7 @@ compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4f000 0x100>; interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_SDHI2>; status = "disabled"; };
arch/arm/boot/dts/r8a7778.dtsi line 300
Quoted 4 lines
arch/arm/boot/dts/r8a7778.dtsi +1
-0@@ -273,6 +297,7 @@ compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc7000 0x18>; interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_HSPI>;
HSPI is an mstp0 clock.
arch/arm/boot/dts/r8a7778.dtsi line 310
Quoted 8 lines
arch/arm/boot/dts/r8a7778.dtsi +1
-0#address-cells = <1>; #size-cells = <0>; status = "disabled";@@ -282,6 +307,7 @@ compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc8000 0x18>; interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_HSPI>;
Same here.
arch/arm/boot/dts/r8a7778.dtsi line 320
Quoted 8 lines
arch/arm/boot/dts/r8a7778.dtsi +1
-0#address-cells = <1>; #size-cells = <0>; status = "disabled";@@ -291,6 +317,7 @@ compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc6000 0x18>; interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_HSPI>;
And here.
Quoted 3 lines
arch/arm/boot/dts/r8a7778.dtsi +0
-0#address-cells = <1>; #size-cells = <0>; status = "disabled";
Signature · 3 lines
Regards, Laurent Pinchart
PATCH 6/11 ARM: shmobile: r8a7778: add support MMC clock
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
This patch adds r8a7778 MMC clock support.
Signed-off-by Yusuke Goda <[email protected]>
Signed-off-by Kuninori Morimoto <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/clock-r8a7778.c | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/mach-shmobile/clock-r8a7778.c +3 -0
@@ -103,6 +103,7 @@ static struct clk *main_clks[] = { };enum { +MSTP331 ,MSTP323 ,MSTP322 ,MSTP321 ,MSTP114 ,MSTP030 ,
@@ -112,6 +113,7 @@ enum { MSTP_NR };static struct clk mstp_clks[MSTP_NR ] = { + [MSTP331 ] =SH_CLK_MSTP32 (&s4_clk,MSTPCR3 ,31 ,0 ),/* MMC */ [MSTP323 ] =SH_CLK_MSTP32 (&p_clk,MSTPCR3 ,23 ,0 ),/* SDHI0 */ [MSTP322 ] =SH_CLK_MSTP32 (&p_clk,MSTPCR3 ,22 ,0 ),/* SDHI1 */ [MSTP321 ] =SH_CLK_MSTP32 (&p_clk,MSTPCR3 ,21 ,0 ),/* SDHI2 */
@@ -137,6 +139,7 @@ static struct clk_lookup lookups[] = {CLKDEV_CON_ID ("peripheral_clk" , &p_clk),/* MSTP32 clocks */ +CLKDEV_DEV_ID ("sh_mmcif" , &mstp_clks[MSTP331 ]),/* MMC */ CLKDEV_DEV_ID ("sh_mobile_sdhi.0" , &mstp_clks[MSTP323 ]),/* SDHI0 */ CLKDEV_DEV_ID ("sh_mobile_sdhi.1" , &mstp_clks[MSTP322 ]),/* SDHI1 */ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
Signature · 1 line
1.8.2.1
PATCH 7/11 ARM: shmobile: r8a7778: add support I2C driver
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
Add a platform device for the r8a7778 I2C.
Signed-off-by Yusuke Goda <[email protected]>
Signed-off-by Kuninori Morimoto <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/include/mach/r8a7778.h | 2 ++ arch/arm/mach-shmobile/setup-r8a7778.c | 25 +++++++++++++++++++++++++ 2 files changed, 27 insertions(+)
arch/arm/mach-shmobile/include/mach/r8a7778.h +2 -0
@@ -24,6 +24,8 @@extern void r8a7778_add_standard_devices (void );extern void r8a7778_add_standard_devices_dt (void );extern void r8a7778_add_ether_device (struct sh_eth_plat_data *pdata); +extern void r8a7778_add_i2c_device (int id); +extern void r8a7778_init_delay (void );extern void r8a7778_init_irq (void );extern void r8a7778_init_irq_dt (void );
arch/arm/mach-shmobile/setup-r8a7778.c +25 -0
@@ -126,6 +126,31 @@ void __init r8a7778_sdhi_init(int id, info, sizeof(*info)); } +/* I2C */ +static struct resource i2c_resources[]__initdata = { +/* I2C0 */ +DEFINE_RES_MEM (0xffc70000 ,0x1000 ), +DEFINE_RES_IRQ (gic_iid (0x63 )), +/* I2C1 */ +DEFINE_RES_MEM (0xffc71000 ,0x1000 ), +DEFINE_RES_IRQ (gic_iid (0x6e )), +/* I2C2 */ +DEFINE_RES_MEM (0xffc72000 ,0x1000 ), +DEFINE_RES_IRQ (gic_iid (0x6c )), +/* I2C3 */ +DEFINE_RES_MEM (0xffc73000 ,0x1000 ), +DEFINE_RES_IRQ (gic_iid (0x6d )), +}; + +void __init r8a7778_add_i2c_device (int id) +{ +BUG_ON (id <0 || id >3 ); + +platform_device_register_simple ( +"i2c-rcar" , id, + i2c_resources + (2 * id),2 ); +} +void __init r8a7778_add_standard_devices (void ) {int i;
Signature · 1 line
1.8.2.1
PATCH 8/11 ARM: shmobile: r8a7778: add support HSPI driver
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
Add a platform device for the r8a7778 HSPI.
Signed-off-by Yusuke Goda <[email protected]>
Signed-off-by Kuninori Morimoto <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/include/mach/r8a7778.h | 1 + arch/arm/mach-shmobile/setup-r8a7778.c | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+)
arch/arm/mach-shmobile/include/mach/r8a7778.h +1 -0
@@ -25,6 +25,7 @@ extern void r8a7778_add_standard_devices(void);extern void r8a7778_add_standard_devices_dt (void );extern void r8a7778_add_ether_device (struct sh_eth_plat_data *pdata);extern void r8a7778_add_i2c_device (int id); +extern void r8a7778_add_hspi_device (int id);extern void r8a7778_init_delay (void );extern void r8a7778_init_irq (void );
arch/arm/mach-shmobile/setup-r8a7778.c +23 -0
@@ -151,6 +151,29 @@ void __init r8a7778_add_i2c_device(int id) i2c_resources + (2 * id), 2); } +/* HSPI */ +static struct resource hspi_resources[]__initdata = { +/* HSPI0 */ +DEFINE_RES_MEM (0xfffc7000 ,0x18 ), +DEFINE_RES_IRQ (gic_iid (0x5f )), +/* HSPI1 */ +DEFINE_RES_MEM (0xfffc8000 ,0x18 ), +DEFINE_RES_IRQ (gic_iid (0x74 )), +/* HSPI2 */ +DEFINE_RES_MEM (0xfffc6000 ,0x18 ), +DEFINE_RES_IRQ (gic_iid (0x75 )), +}; + +void __init r8a7778_add_hspi_device (int id) +{ +BUG_ON (id <0 || id >2 ); + +platform_device_register_simple ( +"sh-hspi" , id, + hspi_resources + (2 * id),2 ); +} + +void __init r8a7778_add_standard_devices (void ) {int i;
Signature · 1 line
1.8.2.1
PATCH 9/11 ARM: shmobile: r8a7778: add support MMC driver
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
Add a platform device for the r8a7778 MMC.
Signed-off-by Yusuke Goda <[email protected]>
Signed-off-by Kuninori Morimoto <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/include/mach/r8a7778.h | 2 ++ arch/arm/mach-shmobile/setup-r8a7778.c | 13 +++++++++++++ 2 files changed, 15 insertions(+)
arch/arm/mach-shmobile/include/mach/r8a7778.h +2 -0
@@ -18,6 +18,7 @@#ifndef __ASM_R8A7778_H__#define __ASM_R8A7778_H__ +#include <linux/mmc/sh_mmcif.h> #include <linux/mmc/sh_mobile_sdhi.h> #include <linux/sh_eth.h>
@@ -26,6 +27,7 @@ extern void r8a7778_add_standard_devices_dt(void);extern void r8a7778_add_ether_device (struct sh_eth_plat_data *pdata);extern void r8a7778_add_i2c_device (int id);extern void r8a7778_add_hspi_device (int id); +extern void r8a7778_add_mmc_device (struct sh_mmcif_plat_data *info);extern void r8a7778_init_delay (void );extern void r8a7778_init_irq (void );
arch/arm/mach-shmobile/setup-r8a7778.c +13 -0
@@ -173,6 +173,19 @@ void __init r8a7778_add_hspi_device(int id) hspi_resources + (2 * id), 2); } +/* MMC */ +static struct resource mmc_resources[]__initdata = { +DEFINE_RES_MEM (0xffe4e000 ,0x100 ), +DEFINE_RES_IRQ (gic_iid (0x5d )), +}; + +void __init r8a7778_add_mmc_device (struct sh_mmcif_plat_data *info) +{ +platform_device_register_resndata ( + &platform_bus,"sh_mmcif" ,-1 , + mmc_resources,ARRAY_SIZE (mmc_resources), + info,sizeof (*info)); +}void __init r8a7778_add_standard_devices (void ) {
Signature · 1 line
1.8.2.1
PATCH 10/11 ARM: shmobile: r8a73a4: add clock definitions and aliases for MMCIF and SDHI
In reply to Simon HormanFrom: Guennadi Liakhovetski <[email protected]>
Add MSTP clock definitions and fix aliases for the two MMCIF and three SDHI interfaces on r8a73a4 (APE6).
Signed-off-by Guennadi Liakhovetski <[email protected]>
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/clock-r8a73a4.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-)
arch/arm/mach-shmobile/clock-r8a73a4.c +17 -5
@@ -29,6 +29,7 @@#define CPG_LEN 0x270#define SMSTPCR2 0xe6150138 +#define SMSTPCR3 0xe615013c#define SMSTPCR5 0xe6150144#define FRQCRA 0xE6150000
@@ -348,6 +349,7 @@ static struct clk div6_clks[DIV6_NR] = {/* MSTP */ enum {MSTP217 ,MSTP216 ,MSTP207 ,MSTP206 ,MSTP204 ,MSTP203 , +MSTP315 ,MSTP314 ,MSTP313 ,MSTP312 ,MSTP305 ,MSTP522 ,MSTP_NR };
@@ -359,6 +361,11 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */ [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */ [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */ + [MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */ + [MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */ + [MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */ + [MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */ + [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */ [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */ };
@@ -381,11 +388,6 @@ static struct clk_lookup lookups[] = {/* DIV6 */ CLKDEV_CON_ID ("zb" , &div6_clks[DIV6_ZB ]), -CLKDEV_CON_ID ("sdhi0" , &div6_clks[DIV6_SDHI0 ]), -CLKDEV_CON_ID ("sdhi1" , &div6_clks[DIV6_SDHI1 ]), -CLKDEV_CON_ID ("sdhi2" , &div6_clks[DIV6_SDHI2 ]), -CLKDEV_CON_ID ("mmc0" , &div6_clks[DIV6_MMC0 ]), -CLKDEV_CON_ID ("mmc1" , &div6_clks[DIV6_MMC1 ]),CLKDEV_CON_ID ("vck1" , &div6_clks[DIV6_VCK1 ]),CLKDEV_CON_ID ("vck2" , &div6_clks[DIV6_VCK2 ]), CLKDEV_CON_ID("vck3", &div6_clks[DIV6_VCK3]),
@@ -406,6 +408,16 @@ static struct clk_lookup lookups[] = {CLKDEV_DEV_ID ("sh-sci.4" , &mstp_clks[MSTP216 ]),CLKDEV_DEV_ID ("sh-sci.5" , &mstp_clks[MSTP217 ]),CLKDEV_DEV_ID ("rcar_thermal" , &mstp_clks[MSTP522 ]), +CLKDEV_DEV_ID ("sh_mmcif.1" , &mstp_clks[MSTP305 ]), +CLKDEV_DEV_ID ("ee220000.mmcif" , &mstp_clks[MSTP305 ]), +CLKDEV_DEV_ID ("sh_mobile_sdhi.2" , &mstp_clks[MSTP312 ]), +CLKDEV_DEV_ID ("ee140000.sdhi" , &mstp_clks[MSTP312 ]), +CLKDEV_DEV_ID ("sh_mobile_sdhi.1" , &mstp_clks[MSTP313 ]), +CLKDEV_DEV_ID ("ee120000.sdhi" , &mstp_clks[MSTP313 ]), +CLKDEV_DEV_ID ("sh_mobile_sdhi.0" , &mstp_clks[MSTP314 ]), +CLKDEV_DEV_ID ("ee100000.sdhi" , &mstp_clks[MSTP314 ]), +CLKDEV_DEV_ID ("sh_mmcif.0" , &mstp_clks[MSTP315 ]), +CLKDEV_DEV_ID ("ee200000.mmcif" , &mstp_clks[MSTP315 ]),/* for DT */ CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
Signature · 1 line
1.8.2.1
PATCH 11/11 ARM: shmobile: r8a7790: add clock definitions and aliases for MMCIF and SDHI
In reply to Simon HormanFrom: Guennadi Liakhovetski <[email protected]>
Add MSTP clock definitions and fix aliases for the two MMCIF and four SDHI interfaces on r8a7790 (H2).
Signed-off-by Guennadi Liakhovetski <[email protected]>
[horms+renesas at verge.net.au: applied manually]
Signed-off-by Simon Horman <[email protected]>
--- arch/arm/mach-shmobile/clock-r8a7790.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-)
arch/arm/mach-shmobile/clock-r8a7790.c +19 -7
@@ -182,7 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {enum {MSTP721 ,MSTP720 ,MSTP717 ,MSTP716 , -MSTP304 , +MSTP315 ,MSTP314 ,MSTP313 ,MSTP312 ,MSTP311 ,MSTP305 ,MSTP304 ,MSTP216 ,MSTP207 ,MSTP206 ,MSTP204 ,MSTP203 ,MSTP202 ,MSTP_NR };
@@ -190,6 +190,12 @@ enum {static struct clk mstp_clks[MSTP_NR ] = { [MSTP721 ] =SH_CLK_MSTP32 (&p_clk,SMSTPCR7 ,21 ,0 ),/* SCIF0 */ [MSTP720 ] =SH_CLK_MSTP32 (&p_clk,SMSTPCR7 ,20 ,0 ),/* SCIF1 */ + [MSTP315 ] =SH_CLK_MSTP32 (&div6_clks[DIV6_MMC0 ],SMSTPCR3 ,15 ,0 ),/* MMC0 */ + [MSTP314 ] =SH_CLK_MSTP32 (&div4_clks[DIV4_SD0 ],SMSTPCR3 ,14 ,0 ),/* SDHI0 */ + [MSTP313 ] =SH_CLK_MSTP32 (&div4_clks[DIV4_SD1 ],SMSTPCR3 ,13 ,0 ),/* SDHI1 */ + [MSTP312 ] =SH_CLK_MSTP32 (&div6_clks[DIV6_SD2 ],SMSTPCR3 ,12 ,0 ),/* SDHI2 */ + [MSTP311 ] =SH_CLK_MSTP32 (&div6_clks[DIV6_SD3 ],SMSTPCR3 ,11 ,0 ),/* SDHI3 */ + [MSTP305 ] =SH_CLK_MSTP32 (&div6_clks[DIV6_MMC1 ],SMSTPCR3 ,5 ,0 ),/* MMC1 */ [MSTP304 ] =SH_CLK_MSTP32 (&cp_clk,SMSTPCR3 ,4 ,0 ),/* TPU0 */ [MSTP216 ] =SH_CLK_MSTP32 (&mp_clk,SMSTPCR2 ,16 ,0 ),/* SCIFB2 */ [MSTP207 ] =SH_CLK_MSTP32 (&mp_clk,SMSTPCR2 ,7 ,0 ),/* SCIFB1 */
@@ -232,14 +238,8 @@ static struct clk_lookup lookups[] = {/* DIV4 */ CLKDEV_CON_ID ("sdh" , &div4_clks[DIV4_SDH ]), -CLKDEV_CON_ID ("sd0" , &div4_clks[DIV4_SD0 ]), -CLKDEV_CON_ID ("sd1" , &div4_clks[DIV4_SD1 ]),/* DIV6 */ -CLKDEV_CON_ID ("sd2" , &div6_clks[DIV6_SD2 ]), -CLKDEV_CON_ID ("sd3" , &div6_clks[DIV6_SD3 ]), -CLKDEV_CON_ID ("mmc0" , &div6_clks[DIV6_MMC0 ]), -CLKDEV_CON_ID ("mmc1" , &div6_clks[DIV6_MMC1 ]),CLKDEV_CON_ID ("ssp" , &div6_clks[DIV6_SSP ]), CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]),
@@ -254,6 +254,18 @@ static struct clk_lookup lookups[] = {CLKDEV_DEV_ID ("sh-sci.7" , &mstp_clks[MSTP720 ]),CLKDEV_DEV_ID ("sh-sci.8" , &mstp_clks[MSTP717 ]),CLKDEV_DEV_ID ("sh-sci.9" , &mstp_clks[MSTP716 ]), +CLKDEV_DEV_ID ("ee200000.mmcif" , &mstp_clks[MSTP315 ]), +CLKDEV_DEV_ID ("sh_mmcif.0" , &mstp_clks[MSTP315 ]), +CLKDEV_DEV_ID ("ee100000.sdhi" , &mstp_clks[MSTP314 ]), +CLKDEV_DEV_ID ("sh_mobile_sdhi.0" , &mstp_clks[MSTP314 ]), +CLKDEV_DEV_ID ("ee120000.sdhi" , &mstp_clks[MSTP313 ]), +CLKDEV_DEV_ID ("sh_mobile_sdhi.1" , &mstp_clks[MSTP313 ]), +CLKDEV_DEV_ID ("ee140000.sdhi" , &mstp_clks[MSTP312 ]), +CLKDEV_DEV_ID ("sh_mobile_sdhi.2" , &mstp_clks[MSTP312 ]), +CLKDEV_DEV_ID ("ee160000.sdhi" , &mstp_clks[MSTP311 ]), +CLKDEV_DEV_ID ("sh_mobile_sdhi.3" , &mstp_clks[MSTP311 ]), +CLKDEV_DEV_ID ("ee220000.mmcif" , &mstp_clks[MSTP305 ]), + CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), };#define R8A7790_CLOCK_ROOT (e, m, p0, p1, p30, p31) \
Signature · 1 line
1.8.2.1
cover Renesas ARM-based SoC updates for v3.11 #2
In reply to Simon HormanQuoted 10 lines · Simon Horman
Hi Olof, Hi Arnd,
this pull-request is based on renesas-soc-for-v3.11 which you have previously pulled.
This pull may cause various conflicts though I believe all of them are not difficult to resolve. The renesas-next-20130613 tag in my tree illustrates how I have handled the conflicts with both changes already in arm-soc and changes I intend to send pull requests for in the near future.
Quoted 7 lines
The following changes since commit
413bfd0e67894c930242482cd15ac09a800e2ab8:ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate (2013-06-07 14:24:52 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.gittags/renesas-soc2-for-v3.11
Thanks, pulled. Looked like all add/add conflicts. Those clock ID enums, and their sort of random line wrapping, is odd though. I'm sure it corresponds to some hardware docs but it seems completely random for someone reading the code.
-Olof