irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Subsystems (3)
PATCH v4 1/1 irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Most Renesas irqpin controllers have 4-bit sense fields, however, some have different widths. This patch adds a DT binding to optionally specify such non-standard values.
---
v4: as suggested by Arnd, add a description for #interrupt-cells
.../interrupt-controller/renesas,intc-irqpin.txt | 14 ++++++++++++++ drivers/irqchip/irq-renesas-intc-irqpin.c | 4 ++++ 2 files changed, 18 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt new file +14 -0
@@ -0,0 +1,14 @@ +DT bindings for the R-/SH-Mobile irqpin controller + +Required properties: + +- compatible: has to be "renesas,intc-irqpin" +- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in + interrupts.txt in this directory + +Optional properties: + +- any properties, listed in interrupts.txt, and any standard resource allocation + properties +- sense-bitfield-width: width of a single sense bitfield in the SENSE register, + if different from the default 4 bits
drivers/irqchip/irq-renesas-intc-irqpin.c +4 -0
@@ -18,6 +18,7 @@*/ #include <linux/init.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/interrupt.h>
@@ -349,6 +350,9 @@ static int intc_irqpin_probe(struct platform_device *pdev)/* deal with driver instance configuration */ if (pdata)memcpy (&p->config, pdata,sizeof (*pdata)); +else +of_property_read_u32 (pdev->dev.of_node,"sense-bitfield-width" , + &p->config.sense_bitfield_width);if (!p->config.sense_bitfield_width) p->config.sense_bitfield_width =4 ;/* default to 4 bits */
Signature · 1 line
1.7.2.5
PATCH v4 1/1 irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Quoted 5 lines · Guennadi Liakhovetski
Most Renesas irqpin controllers have 4-bit sense fields, however, some have different widths. This patch adds a DT binding to optionally specify such non-standard values.
Signed-off-by Guennadi Liakhovetski <[email protected]>
Arnd, are you happy with this version?
Quoted 54 lines
---
v4: as suggested by Arnd, add a description for #interrupt-cells
.../interrupt-controller/renesas,intc-irqpin.txt | 14 ++++++++++++++ drivers/irqchip/irq-renesas-intc-irqpin.c | 4 ++++ 2 files changed, 18 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txtDocumentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt new file +14
-0@@ -0,0 +1,14 @@ +DT bindings for the R-/SH-Mobile irqpin controller + +Required properties: + +- compatible: has to be "renesas,intc-irqpin" +- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in + interrupts.txt in this directory + +Optional properties: + +- any properties, listed in interrupts.txt, and any standard resource allocation + properties +- sense-bitfield-width: width of a single sense bitfield in the SENSE register, + if different from the default 4 bitsdrivers/irqchip/irq-renesas-intc-irqpin.c +4
-0@@ -18,6 +18,7 @@*/ #include <linux/init.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/interrupt.h> @@ -349,6 +350,9 @@ static int intc_irqpin_probe(struct platform_device *pdev)/* deal with driver instance configuration */ if (pdata)memcpy (&p->config, pdata,sizeof (*pdata)); +else +of_property_read_u32 (pdev->dev.of_node,"sense-bitfield-width" , + &p->config.sense_bitfield_width);if (!p->config.sense_bitfield_width) p->config.sense_bitfield_width =4 ;/* default to 4 bits */ Signature · 1 line
1.7.2.5
PATCH v4 1/1 irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
In reply to Guennadi LiakhovetskiQuoted 5 lines · Guennadi Liakhovetski
Most Renesas irqpin controllers have 4-bit sense fields, however, some have different widths. This patch adds a DT binding to optionally specify such non-standard values.
Signed-off-by Guennadi Liakhovetski <[email protected]>
PATCH v4 1/1 irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Quoted 8 lines · Arnd Bergmann
Quoted 5 lines · Guennadi Liakhovetski
Most Renesas irqpin controllers have 4-bit sense fields, however, some have different widths. This patch adds a DT binding to optionally specify such non-standard values.
Signed-off-by Guennadi Liakhovetski <[email protected]>Acked-by Arnd Bergmann <[email protected]>
Thanks, I have queued this up in the dt branch.