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ARM: Add minimal support for TI Keystone SOCs

PATCH New Santosh Shilimkar 3 participants 12 messages Jun 12, 2013 – Jun 17, 2013

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v2 cover ARM: Add minimal support for TI Keystone SOCs

Olof, Arnd,

Here is the refreshed v2 version of the Keystone SOC support series after fixing all the discussed comments. I also posted multi_v7_defconfig bits in a seperate patch which lets Keystone boot with it. Its a very small and indepedent series, so if you are happy with this version, I would like to get it queued for upcoming 3.11 merge window.

Series adds minimal support to Texas Instruments Keystone 2 based SOCs. Basic SOC code and simple dt file describing SOC which is enough to get the device booting till shell against mainline v3.10-rcx release.

Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications.

The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems.

The patchset is available on my git tree and details are end of the email [1]

The Keystone Linux port has been used internal and externally for quite some time and its based on slightly older kernels. I need to specially mention about Cyril Chemparathy who was integral part of many of the development for Keystone linux port along with Murali, Vitaly and rest of the team. We would like to take all the internal linux keystone work to mainline and this is the first step to get that process started.

There is public documentation available for these SOCs. Here is one of the link [2]

Santosh Shilimkar (3):
ARM: dts: keystone: Add minimal Keystone SOC device tree data
ARM: keystone: Add minimal TI Keystone platform support
ARM: keystone: Enable SMP support on Keystone machines

Cc Grant Likely <[email protected]>
Cc Olof Johansson <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org
 .../devicetree/bindings/arm/keystone/keystone.txt  |   10 ++
 arch/arm/Kconfig                                   |    3 +
 arch/arm/Kconfig.debug                             |   16 ++
 arch/arm/Makefile                                  |    1 +
 arch/arm/boot/dts/keystone.dts                     |  109 ++++++++++++++
 arch/arm/configs/keystone_defconfig                |  157 ++++++++++++++++++++
 arch/arm/include/debug/keystone.S                  |   43 ++++++
 arch/arm/mach-keystone/Kconfig                     |   15 ++
 arch/arm/mach-keystone/Makefile                    |    2 +
 arch/arm/mach-keystone/Makefile.boot               |    1 +
 arch/arm/mach-keystone/keystone.c                  |   77 ++++++++++
 arch/arm/mach-keystone/keystone.h                  |   17 +++
 arch/arm/mach-keystone/platsmp.c                   |   52 +++++++
 13 files changed, 503 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/keystone/keystone.txt
 create mode 100644 arch/arm/boot/dts/keystone.dts
 create mode 100644 arch/arm/configs/keystone_defconfig
 create mode 100644 arch/arm/include/debug/keystone.S
 create mode 100644 arch/arm/mach-keystone/Kconfig
 create mode 100644 arch/arm/mach-keystone/Makefile
 create mode 100644 arch/arm/mach-keystone/Makefile.boot
 create mode 100644 arch/arm/mach-keystone/keystone.c
 create mode 100644 arch/arm/mach-keystone/keystone.h
 create mode 100644 arch/arm/mach-keystone/platsmp.c

Regards,
Santosh

[1] Git tree details
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
keystone/dt
keystone/soc
keystone/master --> 'soc + dt'

[2] Device specs
http://www.ti.com/product/tci6636k2h

Signature · 1 line
1.7.9.5
#1 lore raw

PATCH v2 1/3 ARM: dts: keystone: Add minimal Keystone SOC device tree data

Add minimal device tree data for Keystone2 based SOCs. Patch contains mainly ARM related SOC data and nothing about EVM specific yet.

Cc Grant Likely <[email protected]>
Cc Olof Johansson <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org
---
 .../devicetree/bindings/arm/keystone/keystone.txt  |   10 ++
 arch/arm/boot/dts/keystone.dts                     |  109 ++++++++++++++++++++
 2 files changed, 119 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/keystone/keystone.txt
 create mode 100644 arch/arm/boot/dts/keystone.dts
Documentation/devicetree/bindings/arm/keystone/keystone.txt new file +10 -0
new file mode 100644
index 0000000..231e031
@@ -0,0 +1,10 @@
+TI Kesytone Platforms Device Tree Bindings
+-----------------------------------------------
+
+Boards with Keystone2 based devices (TCI66xxK2H) SOC shall have the
+following properties.
+
+Required properties:
+ - compatible: All TI specific devices present in Keystone SOC should be in
+   the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550
+   type UART should use the specified compatible for those devices.
arch/arm/boot/dts/keystone.dts new file +109 -0

109 lines not on this page · raw message

Signature · 1 line
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#2 lore raw

PATCH v2 1/3 ARM: dts: keystone: Add minimal Keystone SOC device tree data

Hi,

Sorry for the somewhat delayed review of this. I've got some nitpicks below, they should be easy to fix and respin.

Since they are just nits, feel free to add:

when corrected.

arch/arm/boot/dts/keystone.dts

Quoted 38 lines · Santosh Shilimkar

Add minimal device tree data for Keystone2 based SOCs. Patch contains mainly ARM related SOC data and nothing about EVM specific yet.

Cc Grant Likely <[email protected]>
Cc Olof Johansson <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org
---
 .../devicetree/bindings/arm/keystone/keystone.txt  |   10 ++
 arch/arm/boot/dts/keystone.dts                     |  109 ++++++++++++++++++++
 2 files changed, 119 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/keystone/keystone.txt
 create mode 100644 arch/arm/boot/dts/keystone.dts
Documentation/devicetree/bindings/arm/keystone/keystone.txt new file +10 -0
new file mode 100644
index 0000000..231e031
@@ -0,0 +1,10 @@
+TI Kesytone Platforms Device Tree Bindings
+-----------------------------------------------
+
+Boards with Keystone2 based devices (TCI66xxK2H) SOC shall have the
+following properties.
+
+Required properties:
+ - compatible: All TI specific devices present in Keystone SOC should be in
+   the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550
+   type UART should use the specified compatible for those devices.
arch/arm/boot/dts/keystone.dts new file +0 -0
new file mode 100644
index 0000000..588a0a3

You'll want to move some of this to a dtsi once you have more than one board though -- that's fine, no need to do it prematurely.

Quoted 47 lines
arch/arm/boot/dts/keystone.dts new file +46 -0
@@ -0,0 +1,109 @@
+/*
+ * Copyright 2013 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+	model = "Texas Instruments Keystone 2 SoC";
+	compatible =  "ti,keystone-evm";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&gic>;
+
+	aliases {
+		serial0	= &uart0;
+	};
+
+	memory {
+		reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		interrupt-parent = <&gic>;
+
+		cpu at 0 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu at 1 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <1>;
+		};
+
+		cpu at 2 {
+			compatible = "arm,cortex-a15";

arch/arm/boot/dts/keystone.dts line 56

Quoted 10 lines
arch/arm/boot/dts/keystone.dts new file +10 -0
+			device_type = "cpu";
+			reg = <2>;
+		};
+
+		cpu at 3 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <3>;
+		};
+	};

You will probably want a PMU device node real soon if anyone is doing performance work. :-)

arch/arm/boot/dts/keystone.dts line 58

Quoted 2 lines
arch/arm/boot/dts/keystone.dts new file +2 -0
+
+	gic:	interrupt-controller at 02560000 {

No need for unit address unless there will be more than one interrupt-controller at this level.

Quoted 15 lines
arch/arm/boot/dts/keystone.dts new file +15 -0
+		compatible = "arm,cortex-a15-gic";
+		#interrupt-cells = <3>;
+		#size-cells = <0>;
+		#address-cells = <1>;
+		interrupt-controller;
+		reg = <0x0 0x02561000 0x0 0x1000>,
+		      <0x0 0x02562000 0x0 0x2000>;
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 13 0xf08>,
+			     <1 14 0xf08>,
+			     <1 11 0xf08>,
+			     <1 10 0x308>;

arch/arm/boot/dts/keystone.dts line 83

Quoted 10 lines
arch/arm/boot/dts/keystone.dts new file +10 -0
+	};
+
+	soc {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "ti,keystone","simple-bus";
+		interrupt-parent = <&gic>;
+		ranges = <0x0 0x0 0x0 0xc0000000>;
+
+		rstctrl:rstctrl at 23100e8 {

rstctrl: reset-controller { ...

would be a more convenient name of the device. And no need for an unit address unless there's more than one node with the same name.

arch/arm/boot/dts/keystone.dts line 95

Quoted 12 lines
arch/arm/boot/dts/keystone.dts new file +12 -0
+			compatible = "ti,keystone-reset";
+			reg = <0x023100e8 4>;	/* pll reset control reg */
+		};
+
+		uart0:	serial at 02530c00 {
+			compatible	= "ns16550a";
+			current-speed	= <115200>;
+			reg-shift	= <2>;
+			reg-io-width	= <4>;
+			reg		= <0x02530c00 0x100>;
+			clock-frequency	= <133120000>;
+			interrupts	= <0 277 0xf01>;

The tabbing here is nice, but it's not in line with the rest of the device tree here. Switch over one or the other for consistency.

Quoted 14 lines
arch/arm/boot/dts/keystone.dts new file +14 -0
+		};
+
+		uart1:	serial at 02531000 {
+			compatible	= "ns16550a";
+			current-speed	= <115200>;
+			reg-shift	= <2>;
+			reg-io-width	= <4>;
+			reg		= <0x02531000 0x100>;
+			clock-frequency	= <133120000>;
+			interrupts	= <0 280 0xf01>;
+		};
+
+	};
+};
#3 lore raw

PATCH v2 1/3 ARM: dts: keystone: Add minimal Keystone SOC device tree data

Quoted 11 lines · Olof Johansson

Hi,

Sorry for the somewhat delayed review of this. I've got some nitpicks below, they should be easy to fix and respin.

Since they are just nits, feel free to add:

when corrected.

Thanks Olof.
For record, updated patch below with your ack added.

Regards,
Santosh

Quoted 1 line

From 35cdbdca30652c615340373bef6e708a74e67c8b Mon Sep 17 00:00:00 2001

From: Santosh Shilimkar <[email protected]>
Date: Mon, 10 Jun 2013 11:33:31 -0400
Subject: [PATCH 1/3] ARM: dts: keystone: Add minimal Keystone SOC device tree
data

Add minimal device tree data for Keystone2 based SOCs. Patch contains mainly ARM related SOC data and nothing about EVM specific yet.

Cc Grant Likely <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org
---
 .../devicetree/bindings/arm/keystone/keystone.txt  |   10 ++
 arch/arm/boot/dts/keystone.dts                     |  117 ++++++++++++++++++++
 2 files changed, 127 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/keystone/keystone.txt
 create mode 100644 arch/arm/boot/dts/keystone.dts
Documentation/devicetree/bindings/arm/keystone/keystone.txt new file +10 -0
new file mode 100644
index 0000000..231e031
@@ -0,0 +1,10 @@
+TI Kesytone Platforms Device Tree Bindings
+-----------------------------------------------
+
+Boards with Keystone2 based devices (TCI66xxK2H) SOC shall have the
+following properties.
+
+Required properties:
+ - compatible: All TI specific devices present in Keystone SOC should be in
+   the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550
+   type UART should use the specified compatible for those devices.
arch/arm/boot/dts/keystone.dts new file +117 -0

117 lines not on this page · raw message

Signature · 1 line
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#4 lore raw

PATCH v2 2/3 ARM: keystone: Add minimal TI Keystone platform support

In reply to Santosh Shilimkar

Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM.

The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems.

Cc Olof Johansson <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org
---
 arch/arm/Kconfig                     |    3 +
 arch/arm/Kconfig.debug               |   16 ++++
 arch/arm/Makefile                    |    1 +
 arch/arm/configs/keystone_defconfig  |  157 ++++++++++++++++++++++++++++++++++
 arch/arm/include/debug/keystone.S    |   43 ++++++++++
 arch/arm/mach-keystone/Kconfig       |   14 +++
 arch/arm/mach-keystone/Makefile      |    1 +
 arch/arm/mach-keystone/Makefile.boot |    1 +
 arch/arm/mach-keystone/keystone.c    |   73 ++++++++++++++++
 9 files changed, 309 insertions(+)
 create mode 100644 arch/arm/configs/keystone_defconfig
 create mode 100644 arch/arm/include/debug/keystone.S
 create mode 100644 arch/arm/mach-keystone/Kconfig
 create mode 100644 arch/arm/mach-keystone/Makefile
 create mode 100644 arch/arm/mach-keystone/Makefile.boot
 create mode 100644 arch/arm/mach-keystone/keystone.c
arch/arm/Kconfig +3 -0
index 49d993c..37fe64c 100644
@@ -948,6 +948,8 @@ source "arch/arm/mach-iop13xx/Kconfig"
 
 source "arch/arm/mach-ixp4xx/Kconfig"
 
+source "arch/arm/mach-keystone/Kconfig"
+
 source "arch/arm/mach-kirkwood/Kconfig"
 
 source "arch/arm/mach-ks8695/Kconfig"
@@ -1564,6 +1566,7 @@ config ARCH_NR_GPIO
 	default 352 if ARCH_VT8500
 	default 288 if ARCH_SUNXI
 	default 264 if MACH_H4700
+	default 512 if ARCH_KEYSTONE
 	default 0
 	help
 	  Maximum number of GPIOs in the system.
arch/arm/Kconfig.debug +16 -0
index 1d41908..62e7f95 100644
@@ -251,6 +251,20 @@ choice
 		  Say Y here if you want kernel low-level debugging support
 		  on i.MX6Q/DL.
 
+	config DEBUG_KEYSTONE_UART0
+		bool "Kernel low-level debugging on KEYSTONE2 using UART0"
+		depends on ARCH_KEYSTONE
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to UART0 serial port on KEYSTONE2 devices.
+
+	config DEBUG_KEYSTONE_UART1
+		bool "Kernel low-level debugging on KEYSTONE2 using UART1"
+		depends on ARCH_KEYSTONE
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to UART1 serial port on KEYSTONE2 devices.
+
 	config DEBUG_MMP_UART2
 		bool "Kernel low-level debugging message via MMP UART2"
 		depends on ARCH_MMP
@@ -632,6 +646,8 @@ config DEBUG_LL_INCLUDE
 				 DEBUG_IMX51_UART || \
 				 DEBUG_IMX53_UART ||\
 				 DEBUG_IMX6Q_UART
+	default "debug/keystone.S" if DEBUG_KEYSTONE_UART0 || \
+				      DEBUG_KEYSTONE_UART1
 	default "debug/mvebu.S" if DEBUG_MVEBU_UART
 	default "debug/mxs.S" if DEBUG_IMX23_UART || DEBUG_IMX28_UART
 	default "debug/nomadik.S" if DEBUG_NOMADIK_UART
arch/arm/Makefile +1 -0
index 1ba358b..a1c9a78 100644
@@ -194,6 +194,7 @@ machine-$(CONFIG_PLAT_SPEAR)		+= spear
 machine-$(CONFIG_ARCH_VIRT)		+= virt
 machine-$(CONFIG_ARCH_ZYNQ)		+= zynq
 machine-$(CONFIG_ARCH_SUNXI)		+= sunxi
+machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
arch/arm/configs/keystone_defconfig new file +157 -0

157 lines not on this page · raw message

arch/arm/include/debug/keystone.S new file +43 -0

43 lines not on this page · raw message

arch/arm/mach-keystone/Kconfig new file +14 -0
new file mode 100644
index 0000000..aebe8cd
@@ -0,0 +1,14 @@
+config ARCH_KEYSTONE
+	bool "Texas Instruments Keystone Devices"
+	depends on ARCH_MULTI_V7
+	select CPU_V7
+	select ARM_GIC
+	select HAVE_ARM_ARCH_TIMER
+	select CLKSRC_MMIO
+	select GENERIC_CLOCKEVENTS
+	select HAVE_SCHED_CLOCK
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_ERRATA_798181
+	help
+	  Support for boards based on the Texas Instruments Keystone family of
+	  SoCs.
arch/arm/mach-keystone/Makefile new file +1 -0
new file mode 100644
index 0000000..d4671d5
@@ -0,0 +1 @@
+obj-y					:= keystone.o
arch/arm/mach-keystone/Makefile.boot new file +1 -0
new file mode 100644
index 0000000..f3835c4
@@ -0,0 +1 @@
+zreladdr-y	:= 0x80008000
arch/arm/mach-keystone/keystone.c new file +73 -0

73 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#5 lore raw

PATCH v2 2/3 ARM: keystone: Add minimal TI Keystone platform support

Hi,

More little nits below.

Quoted 50 lines · Santosh Shilimkar

Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM.

The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems.

Cc Olof Johansson <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org
---
 arch/arm/Kconfig                     |    3 +
 arch/arm/Kconfig.debug               |   16 ++++
 arch/arm/Makefile                    |    1 +
 arch/arm/configs/keystone_defconfig  |  157 ++++++++++++++++++++++++++++++++++
 arch/arm/include/debug/keystone.S    |   43 ++++++++++
 arch/arm/mach-keystone/Kconfig       |   14 +++
 arch/arm/mach-keystone/Makefile      |    1 +
 arch/arm/mach-keystone/Makefile.boot |    1 +
 arch/arm/mach-keystone/keystone.c    |   73 ++++++++++++++++
 9 files changed, 309 insertions(+)
 create mode 100644 arch/arm/configs/keystone_defconfig
 create mode 100644 arch/arm/include/debug/keystone.S
 create mode 100644 arch/arm/mach-keystone/Kconfig
 create mode 100644 arch/arm/mach-keystone/Makefile
 create mode 100644 arch/arm/mach-keystone/Makefile.boot
 create mode 100644 arch/arm/mach-keystone/keystone.c
arch/arm/Kconfig +2 -0
index 49d993c..37fe64c 100644
@@ -948,6 +948,8 @@ source "arch/arm/mach-iop13xx/Kconfig"
 
 source "arch/arm/mach-ixp4xx/Kconfig"
 
+source "arch/arm/mach-keystone/Kconfig"
+
 source "arch/arm/mach-kirkwood/Kconfig"
 
 source "arch/arm/mach-ks8695/Kconfig"

arch/arm/Kconfig config ARCH_NR_GPIO · line 1569

Quoted 4 lines
arch/arm/Kconfig +1 -0
@@ -1564,6 +1566,7 @@ config ARCH_NR_GPIO
 	default 352 if ARCH_VT8500
 	default 288 if ARCH_SUNXI
 	default 264 if MACH_H4700
+	default 512 if ARCH_KEYSTONE

These are ordered in falling order, so please insert higher.

Quoted 218 lines
arch/arm/Kconfig +0 -0
 	default 0
 	help
 	  Maximum number of GPIOs in the system.
arch/arm/Kconfig.debug +16 -0
index 1d41908..62e7f95 100644
@@ -251,6 +251,20 @@ choice
 		  Say Y here if you want kernel low-level debugging support
 		  on i.MX6Q/DL.
 
+	config DEBUG_KEYSTONE_UART0
+		bool "Kernel low-level debugging on KEYSTONE2 using UART0"
+		depends on ARCH_KEYSTONE
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to UART0 serial port on KEYSTONE2 devices.
+
+	config DEBUG_KEYSTONE_UART1
+		bool "Kernel low-level debugging on KEYSTONE2 using UART1"
+		depends on ARCH_KEYSTONE
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to UART1 serial port on KEYSTONE2 devices.
+
 	config DEBUG_MMP_UART2
 		bool "Kernel low-level debugging message via MMP UART2"
 		depends on ARCH_MMP
@@ -632,6 +646,8 @@ config DEBUG_LL_INCLUDE
 				 DEBUG_IMX51_UART || \
 				 DEBUG_IMX53_UART ||\
 				 DEBUG_IMX6Q_UART
+	default "debug/keystone.S" if DEBUG_KEYSTONE_UART0 || \
+				      DEBUG_KEYSTONE_UART1
 	default "debug/mvebu.S" if DEBUG_MVEBU_UART
 	default "debug/mxs.S" if DEBUG_IMX23_UART || DEBUG_IMX28_UART
 	default "debug/nomadik.S" if DEBUG_NOMADIK_UART
arch/arm/Makefile +1 -0
index 1ba358b..a1c9a78 100644
@@ -194,6 +194,7 @@ machine-$(CONFIG_PLAT_SPEAR)		+= spear
 machine-$(CONFIG_ARCH_VIRT)		+= virt
 machine-$(CONFIG_ARCH_ZYNQ)		+= zynq
 machine-$(CONFIG_ARCH_SUNXI)		+= sunxi
+machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
arch/arm/configs/keystone_defconfig new file +157 -0
new file mode 100644
index 0000000..62e968c
@@ -0,0 +1,157 @@
+# CONFIG_SWAP is not set
+CONFIG_POSIX_MQUEUE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_BASE_FULL is not set
+CONFIG_EMBEDDED=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_ARM_LPAE=y
+CONFIG_SMP=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_SUSPEND is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_UNIX_DIAG=y
+CONFIG_XFRM_USER=y
+CONFIG_XFRM_SUB_POLICY=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_NET_IPIP=y
+CONFIG_NET_IPGRE_DEMUX=y
+CONFIG_NET_IPGRE=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_INET_AH=y
+CONFIG_INET_IPCOMP=y
+CONFIG_IPV6=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_IPV6_MROUTE=y
+CONFIG_IPV6_PIMSM_V2=y
+CONFIG_NETFILTER=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_CPU=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_TARGET_ULOG=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_TARGET_CLUSTERIP=y
+CONFIG_IP_NF_TARGET_ECN=y
+CONFIG_IP_NF_TARGET_TTL=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP_SCTP=y
+CONFIG_VLAN_8021Q=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_CMA=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_PLATRAM=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_UBI=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_EEPROM_AT24=y
+CONFIG_NETDEVICES=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_SPI=y
+CONFIG_SPI_SPIDEV=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_USB_SUPPORT is not set
+CONFIG_DMADEVICES=y
+CONFIG_COMMON_CLK_DEBUG=y
+CONFIG_MEMORY=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+CONFIG_UBIFS_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_USER=y
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_XCBC=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
arch/arm/include/debug/keystone.S new file +0 -0
new file mode 100644
index 0000000..9c75a4c

arch/arm/include/debug/keystone.S line 5

Quoted 5 lines
arch/arm/include/debug/keystone.S new file +5 -0
@@ -0,0 +1,43 @@
+/*
+ * Early serial debug output macro for Keystone SOCs
+ *
+ * Copyright 2013 Texas Instruments, Inc.
+ *	Santosh Shilimkar ,santosh.shilimkar at ti.com>

Typo?

Quoted 103 lines
arch/arm/include/debug/keystone.S new file +38 -0
+ *
+ * Based on RMKs low level debug code.
+ *  Copyright (C) 1994-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/serial_reg.h>
+
+#define UART_SHIFT 2
+#if defined(CONFIG_DEBUG_KEYSTONE_UART0)
+#define UART_PHYS		0x02530c00
+#define UART_VIRT		0xfeb30c00
+#elif defined(CONFIG_DEBUG_KEYSTONE_UART1)
+#define UART_PHYS		0x02531000
+#define UART_VIRT		0xfeb31000
+#endif
+
+	.macro	addruart, rp, rv, tmp
+	ldr	\rv, =UART_VIRT			@ physical base address
+	ldr	\rp, =UART_PHYS			@ virtual base address
+	.endm
+
+	.macro	senduart,rd,rx
+	str	\rd, [\rx, #UART_TX << UART_SHIFT]
+	.endm
+
+	.macro	busyuart,rd,rx
+1002:	ldr	\rd, [\rx, #UART_LSR << UART_SHIFT]
+	and	\rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
+	teq	\rd, #UART_LSR_TEMT | UART_LSR_THRE
+	bne	1002b
+	.endm
+
+	.macro	waituart,rd,rx
+	.endm
arch/arm/mach-keystone/Kconfig new file +14 -0
new file mode 100644
index 0000000..aebe8cd
@@ -0,0 +1,14 @@
+config ARCH_KEYSTONE
+	bool "Texas Instruments Keystone Devices"
+	depends on ARCH_MULTI_V7
+	select CPU_V7
+	select ARM_GIC
+	select HAVE_ARM_ARCH_TIMER
+	select CLKSRC_MMIO
+	select GENERIC_CLOCKEVENTS
+	select HAVE_SCHED_CLOCK
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_ERRATA_798181
+	help
+	  Support for boards based on the Texas Instruments Keystone family of
+	  SoCs.
arch/arm/mach-keystone/Makefile new file +1 -0
new file mode 100644
index 0000000..d4671d5
@@ -0,0 +1 @@
+obj-y					:= keystone.o
arch/arm/mach-keystone/Makefile.boot new file +1 -0
new file mode 100644
index 0000000..f3835c4
@@ -0,0 +1 @@
+zreladdr-y	:= 0x80008000
arch/arm/mach-keystone/keystone.c new file +25 -0
new file mode 100644
index 0000000..c4912c4
@@ -0,0 +1,73 @@
+/*
+ * Keystone2 based boards and SOC related code.
+ *
+ * Copyright 2013 Texas Instruments, Inc.
+ *	Cyril Chemparathy <[email protected]>
+ *	Santosh Shilimkar <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+
+#include <asm/setup.h>
+#include <asm/mach/map.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+#define PLL_RESET_WRITE_KEY_MASK		0xffff0000
+#define PLL_RESET_WRITE_KEY			0x5a69
+#define PLL_RESET				BIT(16)

arch/arm/mach-keystone/keystone.c line 35

Quoted 10 lines
arch/arm/mach-keystone/keystone.c new file +10 -0
+
+static void __iomem *keystone_rstctrl;
+
+static void __init keystone_init(void)
+{
+	struct device_node *node;
+
+	node = of_find_compatible_node(NULL, NULL, "ti,keystone-reset");
+	if (WARN_ON(!node)) {
+		pr_warn("ti, keystone-reset node undefined\n");

ti,keystone-reset (no space). Also, you probably want to continue populate other devices so you have a chance to get up to prompt to debug your issue; it's not like panicking will be able to reset anyway.

arch/arm/mach-keystone/keystone.c line 41

Quoted 6 lines
arch/arm/mach-keystone/keystone.c new file +6 -0
+		return;
+	}
+
+	keystone_rstctrl = of_iomap(node, 0);
+	if (WARN_ON(!keystone_rstctrl)) {
+		pr_warn("ti, keystone-reset iomap error\n");

again ti,keystone-reset and the return

Quoted 5 lines
arch/arm/mach-keystone/keystone.c new file +5 -0
+		return;
+	}
+
+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}

arch/arm/mach-keystone/keystone.c line 56

Quoted 10 lines
arch/arm/mach-keystone/keystone.c new file +10 -0
+
+static const char *keystone_match[] __initconst = {
+	"ti,keystone-evm",
+	NULL,
+};
+
+void keystone_restart(char mode, const char *cmd)
+{
+	u32 val;
+

It makes sense to do some sanity check of keystone_rstctrl here and warn and spin (or similar) in case it's not configured, since the configuration can fail above.

Quoted 17 lines
arch/arm/mach-keystone/keystone.c new file +17 -0
+	/* Enable write access to RSTCTRL */
+	val = readl(keystone_rstctrl);
+	val &= PLL_RESET_WRITE_KEY_MASK;
+	val |= PLL_RESET_WRITE_KEY;
+	writel(val, keystone_rstctrl);
+
+	/* Reset the SOC */
+	val = readl(keystone_rstctrl);
+	val &= ~PLL_RESET;
+	writel(val, keystone_rstctrl);
+}
+
+DT_MACHINE_START(KEYSTONE, "Keystone")
+	.init_machine	= keystone_init,
+	.dt_compat	= keystone_match,
+	.restart	= keystone_restart,
+MACHINE_END
#6 lore raw

PATCH v2 2/3 ARM: keystone: Add minimal TI Keystone platform support

Quoted 4 lines · Olof Johansson

Hi,

More little nits below.

Thanks. Updated patch below for record.

Regards,
Santosh

Quoted 1 line

From f55f7a197b4aa62329ef6d7ea2391f4b447786cb Mon Sep 17 00:00:00 2001

From: Santosh Shilimkar <[email protected]>
Date: Mon, 10 Jun 2013 11:27:13 -0400
Subject: [PATCH 2/3] ARM: keystone: Add minimal TI Keystone platform support

Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM.

The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems.

Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org
---
 arch/arm/Kconfig                     |    3 +
 arch/arm/Kconfig.debug               |   16 ++++
 arch/arm/Makefile                    |    1 +
 arch/arm/configs/keystone_defconfig  |  157 ++++++++++++++++++++++++++++++++++
 arch/arm/include/debug/keystone.S    |   43 ++++++++++
 arch/arm/mach-keystone/Kconfig       |   14 +++
 arch/arm/mach-keystone/Makefile      |    1 +
 arch/arm/mach-keystone/Makefile.boot |    1 +
 arch/arm/mach-keystone/keystone.c    |   71 +++++++++++++++
 9 files changed, 307 insertions(+)
 create mode 100644 arch/arm/configs/keystone_defconfig
 create mode 100644 arch/arm/include/debug/keystone.S
 create mode 100644 arch/arm/mach-keystone/Kconfig
 create mode 100644 arch/arm/mach-keystone/Makefile
 create mode 100644 arch/arm/mach-keystone/Makefile.boot
 create mode 100644 arch/arm/mach-keystone/keystone.c
arch/arm/Kconfig +3 -0
index 49d993c..62cd2fac 100644
@@ -948,6 +948,8 @@ source "arch/arm/mach-iop13xx/Kconfig"
 
 source "arch/arm/mach-ixp4xx/Kconfig"
 
+source "arch/arm/mach-keystone/Kconfig"
+
 source "arch/arm/mach-kirkwood/Kconfig"
 
 source "arch/arm/mach-ks8695/Kconfig"
@@ -1560,6 +1562,7 @@ config ARCH_NR_GPIO
 	int
 	default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
 	default 512 if SOC_OMAP5
+	default 512 if ARCH_KEYSTONE
 	default 392 if ARCH_U8500
 	default 352 if ARCH_VT8500
 	default 288 if ARCH_SUNXI
arch/arm/Kconfig.debug +16 -0
index 1d41908..62e7f95 100644
@@ -251,6 +251,20 @@ choice
 		  Say Y here if you want kernel low-level debugging support
 		  on i.MX6Q/DL.
 
+	config DEBUG_KEYSTONE_UART0
+		bool "Kernel low-level debugging on KEYSTONE2 using UART0"
+		depends on ARCH_KEYSTONE
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to UART0 serial port on KEYSTONE2 devices.
+
+	config DEBUG_KEYSTONE_UART1
+		bool "Kernel low-level debugging on KEYSTONE2 using UART1"
+		depends on ARCH_KEYSTONE
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to UART1 serial port on KEYSTONE2 devices.
+
 	config DEBUG_MMP_UART2
 		bool "Kernel low-level debugging message via MMP UART2"
 		depends on ARCH_MMP
@@ -632,6 +646,8 @@ config DEBUG_LL_INCLUDE
 				 DEBUG_IMX51_UART || \
 				 DEBUG_IMX53_UART ||\
 				 DEBUG_IMX6Q_UART
+	default "debug/keystone.S" if DEBUG_KEYSTONE_UART0 || \
+				      DEBUG_KEYSTONE_UART1
 	default "debug/mvebu.S" if DEBUG_MVEBU_UART
 	default "debug/mxs.S" if DEBUG_IMX23_UART || DEBUG_IMX28_UART
 	default "debug/nomadik.S" if DEBUG_NOMADIK_UART
arch/arm/Makefile +1 -0
index 1ba358b..a1c9a78 100644
@@ -194,6 +194,7 @@ machine-$(CONFIG_PLAT_SPEAR)		+= spear
 machine-$(CONFIG_ARCH_VIRT)		+= virt
 machine-$(CONFIG_ARCH_ZYNQ)		+= zynq
 machine-$(CONFIG_ARCH_SUNXI)		+= sunxi
+machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
arch/arm/configs/keystone_defconfig new file +157 -0

157 lines not on this page · raw message

arch/arm/include/debug/keystone.S new file +43 -0

43 lines not on this page · raw message

arch/arm/mach-keystone/Kconfig new file +14 -0
new file mode 100644
index 0000000..aebe8cd
@@ -0,0 +1,14 @@
+config ARCH_KEYSTONE
+	bool "Texas Instruments Keystone Devices"
+	depends on ARCH_MULTI_V7
+	select CPU_V7
+	select ARM_GIC
+	select HAVE_ARM_ARCH_TIMER
+	select CLKSRC_MMIO
+	select GENERIC_CLOCKEVENTS
+	select HAVE_SCHED_CLOCK
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_ERRATA_798181
+	help
+	  Support for boards based on the Texas Instruments Keystone family of
+	  SoCs.
arch/arm/mach-keystone/Makefile new file +1 -0
new file mode 100644
index 0000000..d4671d5
@@ -0,0 +1 @@
+obj-y					:= keystone.o
arch/arm/mach-keystone/Makefile.boot new file +1 -0
new file mode 100644
index 0000000..f3835c4
@@ -0,0 +1 @@
+zreladdr-y	:= 0x80008000
arch/arm/mach-keystone/keystone.c new file +71 -0

71 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#7 lore raw

PATCH v2 3/3 ARM: keystone: Enable SMP support on Keystone machines

In reply to Santosh Shilimkar

Add basic SMP support for Keystone machines. This does not include support for CPU hotplug for now.

Cc Olof Johansson <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org
---
 arch/arm/mach-keystone/Kconfig    |    1 +
 arch/arm/mach-keystone/Makefile   |    1 +
 arch/arm/mach-keystone/keystone.c |    4 +++
 arch/arm/mach-keystone/keystone.h |   17 ++++++++++++
 arch/arm/mach-keystone/platsmp.c  |   52 +++++++++++++++++++++++++++++++++++++
 5 files changed, 75 insertions(+)
 create mode 100644 arch/arm/mach-keystone/keystone.h
 create mode 100644 arch/arm/mach-keystone/platsmp.c
arch/arm/mach-keystone/Kconfig +1 -0
index aebe8cd..2dbd4ce 100644
@@ -4,6 +4,7 @@ config ARCH_KEYSTONE
 	select CPU_V7
 	select ARM_GIC
 	select HAVE_ARM_ARCH_TIMER
+	select HAVE_SMP
 	select CLKSRC_MMIO
 	select GENERIC_CLOCKEVENTS
 	select HAVE_SCHED_CLOCK
arch/arm/mach-keystone/Makefile +1 -0
index d4671d5..3f6b8ab 100644
@@ -1 +1,2 @@
 obj-y					:= keystone.o
+obj-$(CONFIG_SMP)			+= platsmp.o
arch/arm/mach-keystone/keystone.c +4 -0
index c4912c4..da54d15 100644
@@ -19,6 +19,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
+#include <asm/smp_plat.h>
+
+#include "keystone.h"
 
 #define PLL_RESET_WRITE_KEY_MASK		0xffff0000
 #define PLL_RESET_WRITE_KEY			0x5a69
@@ -67,6 +70,7 @@ void keystone_restart(char mode, const char *cmd)
 }
 
 DT_MACHINE_START(KEYSTONE, "Keystone")
+	.smp		= smp_ops(keystone_smp_ops),
 	.init_machine	= keystone_init,
 	.dt_compat	= keystone_match,
 	.restart	= keystone_restart,
arch/arm/mach-keystone/keystone.h new file +17 -0
new file mode 100644
index 0000000..43a1b47
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2013 Texas Instruments, Inc.
+ *	Cyril Chemparathy <[email protected]>
+ *	Santosh Shilimkar <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#ifndef __KEYSTONE_H__
+#define __KEYSTONE_H__
+
+extern struct smp_operations keystone_smp_ops;
+extern void secondary_startup(void);
+
+#endif /* __KEYSTONE_H__ */
arch/arm/mach-keystone/platsmp.c new file +52 -0

52 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#8 lore raw

PATCH v2 3/3 ARM: keystone: Enable SMP support on Keystone machines

Quoted 18 lines · Santosh Shilimkar

Add basic SMP support for Keystone machines. This does not include support for CPU hotplug for now.

Cc Olof Johansson <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org
---
 arch/arm/mach-keystone/Kconfig    |    1 +
 arch/arm/mach-keystone/Makefile   |    1 +
 arch/arm/mach-keystone/keystone.c |    4 +++
 arch/arm/mach-keystone/keystone.h |   17 ++++++++++++
 arch/arm/mach-keystone/platsmp.c  |   52 +++++++++++++++++++++++++++++++++++++
 5 files changed, 75 insertions(+)
 create mode 100644 arch/arm/mach-keystone/keystone.h
 create mode 100644 arch/arm/mach-keystone/platsmp.c

[...]

Quoted 33 lines
arch/arm/mach-keystone/platsmp.c new file +27 -0
new file mode 100644
index 0000000..630ab3b
@@ -0,0 +1,52 @@
+/*
+ * Keystone SOC SMP platform code
+ *
+ * Copyright 2013 Texas Instruments, Inc.
+ *	Cyril Chemparathy <[email protected]>
+ *	Santosh Shilimkar <[email protected]>
+ *
+ * Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/smp.h>
+#include <linux/io.h>
+
+#include <asm/smp_plat.h>
+#include <asm/prom.h>
+
+#include "keystone.h"
+
+static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu,
+						struct task_struct *idle)
+{
+	unsigned long start = virt_to_phys(&secondary_startup);

arch/arm/mach-keystone/platsmp.c line 37

Quoted 10 lines
arch/arm/mach-keystone/platsmp.c new file +10 -0
+	int error;
+
+	pr_debug("keystone-smp: booting cpu %d, vector %08lx\n",
+		 cpu, start);
+
+	asm volatile (
+		"mov    r0, #0\n"	/* power on cmd	*/
+		"mov    r1, %1\n"	/* cpu		*/
+		"mov    r2, %2\n"	/* start	*/
+		".inst  0xe1600070\n"	/* smc #0	*/

In arch/arm/asm/opcodes-sec.h we have an __SMC() macro you could use here that'll use the correct opcode for arm or thumb kernels.

Thanks,
Mark.

#9 lore raw

PATCH v2 3/3 ARM: keystone: Enable SMP support on Keystone machines

Marc,

Quoted 10 lines · Mark Rutland
Quoted 9 lines · Santosh Shilimkar

Add basic SMP support for Keystone machines. This does not include support for CPU hotplug for now.

Cc Olof Johansson <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org

---

[..]

Quoted 9 lines
Quoted 9 lines
arch/arm/mach-keystone/platsmp.c new file +9 -0
+static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu,
+						struct task_struct *idle)
+{
+	unsigned long start = virt_to_phys(&secondary_startup);
+	int error;
+
+	pr_debug("keystone-smp: booting cpu %d, vector %08lx\n",
+		 cpu, start);
+
Quoted 9 lines

arch/arm/mach-keystone/platsmp.c line 37

Quoted 5 lines
arch/arm/mach-keystone/platsmp.c new file +5 -0
+	asm volatile (
+		"mov    r0, #0\n"	/* power on cmd	*/
+		"mov    r1, %1\n"	/* cpu		*/
+		"mov    r2, %2\n"	/* start	*/
+		".inst  0xe1600070\n"	/* smc #0	*/

In arch/arm/asm/opcodes-sec.h we have an __SMC() macro you could use here that'll use the correct opcode for arm or thumb kernels.

Thanks for the suggestion though I am going to leave above as is now. I need to move this code to asm file when I add remainder of the monitor API support. Also inserting the macro in between means, I need to break down the asm into two blocks which I want to avoid for now.

Regards,
Santosh

#11 lore raw

PATCH v2 3/3 ARM: keystone: Enable SMP support on Keystone machines

Quoted 4 lines · Olof Johansson
Quoted 3 lines · Santosh Shilimkar

Add basic SMP support for Keystone machines. This does not include support for CPU hotplug for now.

Quoted 8 lines
Quoted 5 lines
Cc Olof Johansson <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc arm at kernel.org

Thanks !!

Regards,
Santosh