Thirty eight patches big Exynos cleanup

---
 arch/arm/Kconfig             | 1 +
 arch/arm/mach-exynos/Kconfig | 2 --
 2 files changed, 1 insertion(+), 2 deletions(-)

arch/arm/Kconfig +1 -0

index 0574901..a29fc7e 100644
@@ -796,6 +796,7 @@ config ARCH_EXYNOS
 	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_MEMORY_H
+	select USE_OF
 	help
 	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)

arch/arm/mach-exynos/Kconfig +0 -2

index e101b14..0d93ebe 100644
@@ -101,7 +101,6 @@ config MACH_EXYNOS4_DT
 	select CPU_EXYNOS4210
 	select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
 	select S5P_DEV_MFC
-	select USE_OF
 	help
 	  Machine support for Samsung Exynos4 machine with device tree enabled.
 	  Select this if a fdt blob is available for the Exynos4 SoC based board.

@@ -115,7 +114,6 @@ config MACH_EXYNOS5_DT
 	select ARM_AMBA
 	select CLKSRC_OF
 	select USB_ARCH_HAS_XHCI
-	select USE_OF
 	help
 	  Machine support for Samsung EXYNOS5 machine with device tree enabled.
 	  Select this if a fdt blob is available for the EXYNOS5 SoC based board.

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #2 lore raw

PATCH v2 3/38 ARM: SAMSUNG: Introduce SAMSUNG_ATAGS Kconfig entry

This patch adds a Kconfig entry that enables compilation of legacy support code required for Samsung platforms that require ATAGS based boot.

This allows to bypass compilation of this code when platforms without ATAGS support are selected.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/Kconfig               |  6 ++++++
 arch/arm/plat-samsung/Kconfig  | 26 +++++++++++++++++++++-----
 arch/arm/plat-samsung/Makefile |  6 +++---
 3 files changed, 30 insertions(+), 8 deletions(-)

arch/arm/Kconfig +6 -0

index a29fc7e..ae7247d 100644
@@ -702,6 +702,7 @@ config ARCH_S3C24XX
 	select MULTI_IRQ_HANDLER
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_IO_H
+	select SAMSUNG_ATAGS
 	help
 	  Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 	  and S3C2450 SoCs based systems, such as the Simtec Electronics BAST

@@ -726,6 +727,7 @@ config ARCH_S3C64XX
 	select PLAT_SAMSUNG
 	select S3C_DEV_NAND
 	select S3C_GPIO_TRACK
+	select SAMSUNG_ATAGS
 	select SAMSUNG_CLKSRC
 	select SAMSUNG_GPIOLIB_4BIT
 	select SAMSUNG_IRQ_VIC_TIMER

@@ -744,6 +746,7 @@ config ARCH_S5P64X0
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
+	select SAMSUNG_ATAGS
 	help
 	  Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 	  SMDK6450.

@@ -760,6 +763,7 @@ config ARCH_S5PC100
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
+	select SAMSUNG_ATAGS
 	help
 	  Samsung S5PC100 series based systems

@@ -778,6 +782,7 @@ config ARCH_S5PV210
 	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_MEMORY_H
+	select SAMSUNG_ATAGS
 	help
 	  Samsung S5PV210/S5PC110 series based systems

@@ -796,6 +801,7 @@ config ARCH_EXYNOS
 	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_MEMORY_H
+	select SAMSUNG_ATAGS
 	select USE_OF
 	help
 	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)

arch/arm/plat-samsung/Kconfig +21 -5

index f8ed2de..c0f0542 100644
@@ -60,6 +60,20 @@ config S3C_LOWLEVEL_UART_PORT
 	  this configuration should be between zero and two. The port
 	  must have been initialised by the boot-loader before use.
 
+config SAMSUNG_ATAGS
+	def_bool n
+	depends on !ARCH_MULTIPLATFORM
+	depends on ATAGS
+	help
+	   This option enables ATAGS based boot support code for
+	   Samsung platforms, including static platform devices, legacy
+	   clock, timer and interrupt initialization, etc.
+
+	   Platforms that support only DT based boot need not to select
+	   this option.
+
+if SAMSUNG_ATAGS
+
 # timer options
 
 config SAMSUNG_HRT

@@ -367,11 +381,6 @@ config S5P_DEV_JPEG
 	help
 	  Compile in platform device definitions for JPEG codec
 
-config S5P_DEV_MFC
-	bool
-	help
-	  Compile in setup memory (init) code for MFC
-
 config S5P_DEV_ONENAND
 	bool
 	help

@@ -412,6 +421,8 @@ config S3C_DMA
 	help
 	  Internal configuration for S3C DMA core
 
+endif
+
 config SAMSUNG_DMADEV
 	bool
 	select ARM_AMBA

@@ -421,6 +432,11 @@ config SAMSUNG_DMADEV
 	help
 	  Use DMA device engine for PL330 DMAC.
 
+config S5P_DEV_MFC
+	bool
+	help
+	  Compile in setup memory (init) code for MFC
+
 comment "Power management"
 
 config SAMSUNG_PM_DEBUG

arch/arm/plat-samsung/Makefile +3 -3

index a23c460..b549ea9 100644
@@ -31,10 +31,10 @@ obj-$(CONFIG_S3C_ADC)	+= adc.o
 
 # devices
 
-obj-y				+= platformdata.o
+obj-$(CONFIG_SAMSUNG_ATAGS)	+= platformdata.o
 
-obj-y				+= devs.o
-obj-y				+= dev-uart.o
+obj-$(CONFIG_SAMSUNG_ATAGS)	+= devs.o
+obj-$(CONFIG_SAMSUNG_ATAGS)	+= dev-uart.o
 obj-$(CONFIG_S5P_DEV_MFC)	+= s5p-dev-mfc.o
 obj-$(CONFIG_S5P_DEV_UART)	+= s5p-dev-uart.o

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #3 lore raw

PATCH v2 4/38 ARM: EXYNOS: common: Remove legacy PMU initialization code

This patch removes legacy PMU initialization code that was used to set up PMU when booting with ATAGS, which is not supported any more.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c | 27 ---------------------------
 1 file changed, 27 deletions(-)

arch/arm/mach-exynos/common.c +0 ~~-27~~

index 98343577..cb07f4a 100644
@@ -922,30 +922,3 @@ static int __init exynos_init_irq_eint(void)
 	return 0;
 }
 arch_initcall(exynos_init_irq_eint);
-
-static struct resource exynos4_pmu_resource[] = {
-	DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU),
-	DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU1),
-#if defined(CONFIG_SOC_EXYNOS4412)
-	DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU2),
-	DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU3),
-#endif
-};
-
-static struct platform_device exynos4_device_pmu = {
-	.name		= "arm-pmu",
-	.num_resources	= ARRAY_SIZE(exynos4_pmu_resource),
-	.resource	= exynos4_pmu_resource,
-};
-
-static int __init exynos_armpmu_init(void)
-{
-	if (!of_have_populated_dt()) {
-		if (soc_is_exynos4210() || soc_is_exynos4212())
-			exynos4_device_pmu.num_resources = 2;
-		platform_device_register(&exynos4_device_pmu);
-	}
-
-	return 0;
-}
-arch_initcall(exynos_armpmu_init);

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #4 lore raw

PATCH v2 5/38 ARM: EXYNOS: common: Remove legacy EINT initialization code

This patch removes legacy EINT initialization code that was used to handle external interrupts when booting with ATAGS, which is not supported any more.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c | 307 ------------------------------------------
 1 file changed, 307 deletions(-)

arch/arm/mach-exynos/common.c +0 ~~-307~~

index cb07f4a..488d9bd 100644
@@ -615,310 +615,3 @@ static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 
 	s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
 }
-
-static void __iomem *exynos_eint_base;
-
-static DEFINE_SPINLOCK(eint_lock);
-
-static unsigned int eint0_15_data[16];
-
-static inline int exynos4_irq_to_gpio(unsigned int irq)
-{
-	if (irq < IRQ_EINT(0))
-		return -EINVAL;
-
-	irq -= IRQ_EINT(0);
-	if (irq < 8)
-		return EXYNOS4_GPX0(irq);
-
-	irq -= 8;
-	if (irq < 8)
-		return EXYNOS4_GPX1(irq);
-
-	irq -= 8;
-	if (irq < 8)
-		return EXYNOS4_GPX2(irq);
-
-	irq -= 8;
-	if (irq < 8)
-		return EXYNOS4_GPX3(irq);
-
-	return -EINVAL;
-}
-
-static inline int exynos5_irq_to_gpio(unsigned int irq)
-{
-	if (irq < IRQ_EINT(0))
-		return -EINVAL;
-
-	irq -= IRQ_EINT(0);
-	if (irq < 8)
-		return EXYNOS5_GPX0(irq);
-
-	irq -= 8;
-	if (irq < 8)
-		return EXYNOS5_GPX1(irq);
-
-	irq -= 8;
-	if (irq < 8)
-		return EXYNOS5_GPX2(irq);
-
-	irq -= 8;
-	if (irq < 8)
-		return EXYNOS5_GPX3(irq);
-
-	return -EINVAL;
-}
-
-static unsigned int exynos4_eint0_15_src_int[16] = {
-	EXYNOS4_IRQ_EINT0,
-	EXYNOS4_IRQ_EINT1,
-	EXYNOS4_IRQ_EINT2,
-	EXYNOS4_IRQ_EINT3,
-	EXYNOS4_IRQ_EINT4,
-	EXYNOS4_IRQ_EINT5,
-	EXYNOS4_IRQ_EINT6,
-	EXYNOS4_IRQ_EINT7,
-	EXYNOS4_IRQ_EINT8,
-	EXYNOS4_IRQ_EINT9,
-	EXYNOS4_IRQ_EINT10,
-	EXYNOS4_IRQ_EINT11,
-	EXYNOS4_IRQ_EINT12,
-	EXYNOS4_IRQ_EINT13,
-	EXYNOS4_IRQ_EINT14,
-	EXYNOS4_IRQ_EINT15,
-};
-
-static unsigned int exynos5_eint0_15_src_int[16] = {
-	EXYNOS5_IRQ_EINT0,
-	EXYNOS5_IRQ_EINT1,
-	EXYNOS5_IRQ_EINT2,
-	EXYNOS5_IRQ_EINT3,
-	EXYNOS5_IRQ_EINT4,
-	EXYNOS5_IRQ_EINT5,
-	EXYNOS5_IRQ_EINT6,
-	EXYNOS5_IRQ_EINT7,
-	EXYNOS5_IRQ_EINT8,
-	EXYNOS5_IRQ_EINT9,
-	EXYNOS5_IRQ_EINT10,
-	EXYNOS5_IRQ_EINT11,
-	EXYNOS5_IRQ_EINT12,
-	EXYNOS5_IRQ_EINT13,
-	EXYNOS5_IRQ_EINT14,
-	EXYNOS5_IRQ_EINT15,
-};
-static inline void exynos_irq_eint_mask(struct irq_data *data)
-{
-	u32 mask;
-
-	spin_lock(&eint_lock);
-	mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq));
-	mask |= EINT_OFFSET_BIT(data->irq);
-	__raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq));
-	spin_unlock(&eint_lock);
-}
-
-static void exynos_irq_eint_unmask(struct irq_data *data)
-{
-	u32 mask;
-
-	spin_lock(&eint_lock);
-	mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq));
-	mask &= ~(EINT_OFFSET_BIT(data->irq));
-	__raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq));
-	spin_unlock(&eint_lock);
-}
-
-static inline void exynos_irq_eint_ack(struct irq_data *data)
-{
-	__raw_writel(EINT_OFFSET_BIT(data->irq),
-		     EINT_PEND(exynos_eint_base, data->irq));
-}
-
-static void exynos_irq_eint_maskack(struct irq_data *data)
-{
-	exynos_irq_eint_mask(data);
-	exynos_irq_eint_ack(data);
-}
-
-static int exynos_irq_eint_set_type(struct irq_data *data, unsigned int type)
-{
-	int offs = EINT_OFFSET(data->irq);
-	int shift;
-	u32 ctrl, mask;
-	u32 newvalue = 0;
-
-	switch (type) {
-	case IRQ_TYPE_EDGE_RISING:
-		newvalue = S5P_IRQ_TYPE_EDGE_RISING;
-		break;
-
-	case IRQ_TYPE_EDGE_FALLING:
-		newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
-		break;
-
-	case IRQ_TYPE_EDGE_BOTH:
-		newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
-		break;
-
-	case IRQ_TYPE_LEVEL_LOW:
-		newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
-		break;
-
-	case IRQ_TYPE_LEVEL_HIGH:
-		newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
-		break;
-
-	default:
-		printk(KERN_ERR "No such irq type %d", type);
-		return -EINVAL;
-	}
-
-	shift = (offs & 0x7) * 4;
-	mask = 0x7 << shift;
-
-	spin_lock(&eint_lock);
-	ctrl = __raw_readl(EINT_CON(exynos_eint_base, data->irq));
-	ctrl &= ~mask;
-	ctrl |= newvalue << shift;
-	__raw_writel(ctrl, EINT_CON(exynos_eint_base, data->irq));
-	spin_unlock(&eint_lock);
-
-	if (soc_is_exynos5250())
-		s3c_gpio_cfgpin(exynos5_irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf));
-	else
-		s3c_gpio_cfgpin(exynos4_irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf));
-
-	return 0;
-}
-
-static struct irq_chip exynos_irq_eint = {
-	.name		= "exynos-eint",
-	.irq_mask	= exynos_irq_eint_mask,
-	.irq_unmask	= exynos_irq_eint_unmask,
-	.irq_mask_ack	= exynos_irq_eint_maskack,
-	.irq_ack	= exynos_irq_eint_ack,
-	.irq_set_type	= exynos_irq_eint_set_type,
-#ifdef CONFIG_PM
-	.irq_set_wake	= s3c_irqext_wake,
-#endif
-};
-
-/*
- * exynos4_irq_demux_eint
- *
- * This function demuxes the IRQ from from EINTs 16 to 31.
- * It is designed to be inlined into the specific handler
- * s5p_irq_demux_eintX_Y.
- *
- * Each EINT pend/mask registers handle eight of them.
- */
-static inline void exynos_irq_demux_eint(unsigned int start)
-{
-	unsigned int irq;
-
-	u32 status = __raw_readl(EINT_PEND(exynos_eint_base, start));
-	u32 mask = __raw_readl(EINT_MASK(exynos_eint_base, start));
-
-	status &= ~mask;
-	status &= 0xff;
-
-	while (status) {
-		irq = fls(status) - 1;
-		generic_handle_irq(irq + start);
-		status &= ~(1 << irq);
-	}
-}
-
-static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
-{
-	struct irq_chip *chip = irq_get_chip(irq);
-	chained_irq_enter(chip, desc);
-	exynos_irq_demux_eint(IRQ_EINT(16));
-	exynos_irq_demux_eint(IRQ_EINT(24));
-	chained_irq_exit(chip, desc);
-}
-
-static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
-{
-	u32 *irq_data = irq_get_handler_data(irq);
-	struct irq_chip *chip = irq_get_chip(irq);
-
-	chained_irq_enter(chip, desc);
-	generic_handle_irq(*irq_data);
-	chained_irq_exit(chip, desc);
-}
-
-static int __init exynos_init_irq_eint(void)
-{
-	int irq;
-
-#ifdef CONFIG_PINCTRL_SAMSUNG
-	/*
-	 * The Samsung pinctrl driver provides an integrated gpio/pinmux/pinconf
-	 * functionality along with support for external gpio and wakeup
-	 * interrupts. If the samsung pinctrl driver is enabled and includes
-	 * the wakeup interrupt support, then the setting up external wakeup
-	 * interrupts here can be skipped. This check here is temporary to
-	 * allow exynos4 platforms that do not use Samsung pinctrl driver to
-	 * co-exist with platforms that do. When all of the Samsung Exynos4
-	 * platforms switch over to using the pinctrl driver, the wakeup
-	 * interrupt support code here can be completely removed.
-	 */
-	static const struct of_device_id exynos_pinctrl_ids[] = {
-		{ .compatible = "samsung,exynos4210-pinctrl", },
-		{ .compatible = "samsung,exynos4x12-pinctrl", },
-		{ .compatible = "samsung,exynos5250-pinctrl", },
-	};
-	struct device_node *pctrl_np, *wkup_np;
-	const char *wkup_compat = "samsung,exynos4210-wakeup-eint";
-
-	for_each_matching_node(pctrl_np, exynos_pinctrl_ids) {
-		if (of_device_is_available(pctrl_np)) {
-			wkup_np = of_find_compatible_node(pctrl_np, NULL,
-							wkup_compat);
-			if (wkup_np)
-				return -ENODEV;
-		}
-	}
-#endif
-	if (soc_is_exynos5440())
-		return 0;
-
-	if (soc_is_exynos5250())
-		exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);
-	else
-		exynos_eint_base = ioremap(EXYNOS4_PA_GPIO2, SZ_4K);
-
-	if (exynos_eint_base == NULL) {
-		pr_err("unable to ioremap for EINT base address\n");
-		return -ENOMEM;
-	}
-
-	for (irq = 0 ; irq <= 31 ; irq++) {
-		irq_set_chip_and_handler(IRQ_EINT(irq), &exynos_irq_eint,
-					 handle_level_irq);
-		set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
-	}
-
-	irq_set_chained_handler(EXYNOS_IRQ_EINT16_31, exynos_irq_demux_eint16_31);
-
-	for (irq = 0 ; irq <= 15 ; irq++) {
-		eint0_15_data[irq] = IRQ_EINT(irq);
-
-		if (soc_is_exynos5250()) {
-			irq_set_handler_data(exynos5_eint0_15_src_int[irq],
-					     &eint0_15_data[irq]);
-			irq_set_chained_handler(exynos5_eint0_15_src_int[irq],
-						exynos_irq_eint0_15);
-		} else {
-			irq_set_handler_data(exynos4_eint0_15_src_int[irq],
-					     &eint0_15_data[irq]);
-			irq_set_chained_handler(exynos4_eint0_15_src_int[irq],
-						exynos_irq_eint0_15);
-		}
-	}
-
-	return 0;
-}
-arch_initcall(exynos_init_irq_eint);

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #5 lore raw

PATCH v2 6/38 ARM: EXYNOS: common: Remove legacy UART initialization code

This patch removes legacy UART initialization code that was used to set up UART platform devices when booting with ATAGS, which is not supported on Exynos any more.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c | 17 -----------------
 arch/arm/plat-samsung/init.c  |  8 +++++---
 2 files changed, 5 insertions(+), 20 deletions(-)

arch/arm/mach-exynos/common.c +0 ~~-17~~

index 488d9bd..598e4b8 100644
@@ -69,7 +69,6 @@ static const char name_exynos5440[] = "EXYNOS5440";
 static void exynos4_map_io(void);
 static void exynos5_map_io(void);
 static void exynos5440_map_io(void);
-static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 static int exynos_init(void);
 
 unsigned long xxti_f = 0, xusbxti_f = 0;

@@ -79,21 +78,18 @@ static struct cpu_table cpu_ids[] __initdata = {
 		.idcode		= EXYNOS4210_CPU_ID,
 		.idmask		= EXYNOS4_CPU_MASK,
 		.map_io		= exynos4_map_io,
-		.init_uarts	= exynos4_init_uarts,
 		.init		= exynos_init,
 		.name		= name_exynos4210,
 	}, {
 		.idcode		= EXYNOS4212_CPU_ID,
 		.idmask		= EXYNOS4_CPU_MASK,
 		.map_io		= exynos4_map_io,
-		.init_uarts	= exynos4_init_uarts,
 		.init		= exynos_init,
 		.name		= name_exynos4212,
 	}, {
 		.idcode		= EXYNOS4412_CPU_ID,
 		.idmask		= EXYNOS4_CPU_MASK,
 		.map_io		= exynos4_map_io,
-		.init_uarts	= exynos4_init_uarts,
 		.init		= exynos_init,
 		.name		= name_exynos4412,
 	}, {

@@ -602,16 +598,3 @@ static int __init exynos_init(void)
 
 	return device_register(&exynos4_dev);
 }
-
-/* uart registration process */
-
-static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-	struct s3c2410_uartcfg *tcfg = cfg;
-	u32 ucnt;
-
-	for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
-		tcfg->has_fracval = 1;
-
-	s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
-}

arch/arm/plat-samsung/init.c +5 -3

index 79d10fc..3e5c461 100644
@@ -87,7 +87,7 @@ void __init s3c24xx_init_clocks(int xtal)
 }
 
 /* uart management */
-
+#if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
 static int nr_uarts __initdata = 0;
 
 static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];

@@ -134,11 +134,12 @@ void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 	if (cpu == NULL)
 		return;
 
-	if (cpu->init_uarts == NULL) {
+	if (cpu->init_uarts == NULL && IS_ENABLED(CONFIG_SAMSUNG_ATAGS)) {
 		printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n");
 	} else
 		(cpu->init_uarts)(cfg, no);
 }
+#endif
 
 static int __init s3c_arch_init(void)
 {

@@ -152,8 +153,9 @@ static int __init s3c_arch_init(void)
 	ret = (cpu->init)();
 	if (ret != 0)
 		return ret;
-
+#if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
 	ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts);
+#endif
 	return ret;
 }

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #6 lore raw

PATCH v2 7/38 ARM: EXYNOS: Remove legacy dev- and setup- files

This patch removes now unused files containing old device and GPIO setup code that was needed for ATAGS based boot, which is not supported on Exynos any more.

The only exception is setup-i2c0.c that will be removed later, since it has dependencies in plat-samsung/ directory.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/Makefile           |   3 -
 arch/arm/mach-exynos/dev-audio.c        | 254 --------------------------------
 arch/arm/mach-exynos/dev-uart.c         |  55 -------
 arch/arm/mach-exynos/setup-fimc.c       |  44 ------
 arch/arm/mach-exynos/setup-fimd0.c      |  43 ------
 arch/arm/mach-exynos/setup-i2c0.c       |  10 --
 arch/arm/mach-exynos/setup-i2c1.c       |  23 ---
 arch/arm/mach-exynos/setup-i2c2.c       |  23 ---
 arch/arm/mach-exynos/setup-i2c3.c       |  23 ---
 arch/arm/mach-exynos/setup-i2c4.c       |  23 ---
 arch/arm/mach-exynos/setup-i2c5.c       |  23 ---
 arch/arm/mach-exynos/setup-i2c6.c       |  23 ---
 arch/arm/mach-exynos/setup-i2c7.c       |  23 ---
 arch/arm/mach-exynos/setup-keypad.c     |  36 -----
 arch/arm/mach-exynos/setup-sdhci-gpio.c | 152 -------------------
 arch/arm/mach-exynos/setup-spi.c        |  45 ------
 arch/arm/mach-exynos/setup-usb-phy.c    | 223 ----------------------------
 17 files changed, 1026 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/dev-audio.c
 delete mode 100644 arch/arm/mach-exynos/dev-uart.c
 delete mode 100644 arch/arm/mach-exynos/setup-fimc.c
 delete mode 100644 arch/arm/mach-exynos/setup-fimd0.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c1.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c2.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c3.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c4.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c5.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c6.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c7.c
 delete mode 100644 arch/arm/mach-exynos/setup-keypad.c
 delete mode 100644 arch/arm/mach-exynos/setup-sdhci-gpio.c
 delete mode 100644 arch/arm/mach-exynos/setup-spi.c
 delete mode 100644 arch/arm/mach-exynos/setup-usb-phy.c

arch/arm/mach-exynos/Makefile +0 -3

index 9811f87..5fc6cfd 100644
@@ -37,7 +37,4 @@ obj-$(CONFIG_MACH_EXYNOS5_DT)		+= mach-exynos5-dt.o
 
 # device support
 
-obj-y					+= dev-uart.o
-obj-$(CONFIG_ARCH_EXYNOS4)		+= dev-audio.o
-
 obj-$(CONFIG_ARCH_EXYNOS)		+= setup-i2c0.o

arch/arm/mach-exynos/dev-audio.c deleted +0 ~~-254~~

254 lines not on this page · raw message

arch/arm/mach-exynos/dev-uart.c deleted +0 ~~-55~~

55 lines not on this page · raw message

arch/arm/mach-exynos/setup-fimc.c deleted +0 ~~-44~~

44 lines not on this page · raw message

arch/arm/mach-exynos/setup-fimd0.c deleted +0 ~~-43~~

43 lines not on this page · raw message

arch/arm/mach-exynos/setup-i2c0.c +0 ~~-10~~

index e2d9dfb..ede6ceb 100644
@@ -13,17 +13,7 @@
 
 struct platform_device; /* don't need the contents */
 
-#include <linux/gpio.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/gpio-cfg.h>
-#include <plat/cpu.h>
-
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
 {
-	if (soc_is_exynos5250() || soc_is_exynos5440())
-		/* will be implemented with gpio function */
-		return;
 
-	s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2,
-			      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
 }

arch/arm/mach-exynos/setup-i2c1.c deleted +0 ~~-23~~

deleted file mode 100644
index 8d2279c..0000000
@@ -1,23 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/setup-i2c1.c
- *
- * Copyright (C) 2010 Samsung Electronics Co., Ltd.
- *
- * I2C1 GPIO configuration.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-struct platform_device; /* don't need the contents */
-
-#include <linux/gpio.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/gpio-cfg.h>
-
-void s3c_i2c1_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(EXYNOS4_GPD1(2), 2,
-			      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-}

arch/arm/mach-exynos/setup-i2c2.c deleted +0 ~~-23~~

deleted file mode 100644
index 0ed62fc..0000000
@@ -1,23 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/setup-i2c2.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *
- * I2C2 GPIO configuration.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-struct platform_device; /* don't need the contents */
-
-#include <linux/gpio.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/gpio-cfg.h>
-
-void s3c_i2c2_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(EXYNOS4_GPA0(6), 2,
-			      S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
-}

arch/arm/mach-exynos/setup-i2c3.c deleted +0 ~~-23~~

deleted file mode 100644
index 7787fd2..0000000
@@ -1,23 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/setup-i2c3.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *
- * I2C3 GPIO configuration.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-struct platform_device; /* don't need the contents */
-
-#include <linux/gpio.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/gpio-cfg.h>
-
-void s3c_i2c3_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(EXYNOS4_GPA1(2), 2,
-			      S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
-}

arch/arm/mach-exynos/setup-i2c4.c deleted +0 ~~-23~~

deleted file mode 100644
index edc847f..0000000
@@ -1,23 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/setup-i2c4.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *
- * I2C4 GPIO configuration.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-struct platform_device; /* don't need the contents */
-
-#include <linux/gpio.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/gpio-cfg.h>
-
-void s3c_i2c4_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2,
-			      S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
-}

arch/arm/mach-exynos/setup-i2c5.c deleted +0 ~~-23~~

deleted file mode 100644
index d88af7f..0000000
@@ -1,23 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/setup-i2c5.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *
- * I2C5 GPIO configuration.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-struct platform_device; /* don't need the contents */
-
-#include <linux/gpio.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/gpio-cfg.h>
-
-void s3c_i2c5_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2,
-			      S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
-}

arch/arm/mach-exynos/setup-i2c6.c deleted +0 ~~-23~~

deleted file mode 100644
index c590286..0000000
@@ -1,23 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/setup-i2c6.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *
- * I2C6 GPIO configuration.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-struct platform_device; /* don't need the contents */
-
-#include <linux/gpio.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/gpio-cfg.h>
-
-void s3c_i2c6_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2,
-			      S3C_GPIO_SFN(4), S3C_GPIO_PULL_UP);
-}

arch/arm/mach-exynos/setup-i2c7.c deleted +0 ~~-23~~

deleted file mode 100644
index 1bba755..0000000
@@ -1,23 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/setup-i2c7.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *
- * I2C7 GPIO configuration.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-struct platform_device; /* don't need the contents */
-
-#include <linux/gpio.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/gpio-cfg.h>
-
-void s3c_i2c7_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(EXYNOS4_GPD0(2), 2,
-			      S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
-}

arch/arm/mach-exynos/setup-keypad.c deleted +0 ~~-36~~

deleted file mode 100644
index 7862bfb..0000000
@@ -1,36 +0,0 @@
-/* linux/arch/arm/mach-exynos4/setup-keypad.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * GPIO configuration for Exynos4 KeyPad device
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/gpio.h>
-#include <plat/gpio-cfg.h>
-
-void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
-{
-	/* Keypads can be of various combinations, Just making sure */
-
-	if (rows > 8) {
-		/* Set all the necessary GPX2 pins: KP_ROW[0~7] */
-		s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3),
-					S3C_GPIO_PULL_UP);
-
-		/* Set all the necessary GPX3 pins: KP_ROW[8~] */
-		s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8),
-					 S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
-	} else {
-		/* Set all the necessary GPX2 pins: KP_ROW[x] */
-		s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3),
-					S3C_GPIO_PULL_UP);
-	}
-
-	/* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */
-	s3c_gpio_cfgrange_nopull(EXYNOS4_GPX1(0), cols, S3C_GPIO_SFN(3));
-}

arch/arm/mach-exynos/setup-sdhci-gpio.c deleted +0 ~~-152~~

152 lines not on this page · raw message

arch/arm/mach-exynos/setup-spi.c deleted +0 ~~-45~~

45 lines not on this page · raw message

arch/arm/mach-exynos/setup-usb-phy.c deleted +0 ~~-223~~

223 lines not on this page · raw message

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #7 lore raw

PATCH v2 8/38 ARM: EXYNOS: common: Remove legacy interrupt initialization code

This patch removes legacy IRQ initialization code that was used to set up interrupt handling when booting with ATAGS, which is not supported any more.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c | 30 +-----------------------------
 1 file changed, 1 insertion(+), 29 deletions(-)

arch/arm/mach-exynos/common.c +1 ~~-29~~

index 598e4b8..9626ce4 100644
@@ -41,7 +41,6 @@
 #include <mach/regs-irq.h>
 #include <mach/regs-pmu.h>
 #include <mach/regs-gpio.h>
-#include <mach/irqs.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>

@@ -486,41 +485,14 @@ void __init exynos_init_time(void)
 	}
 }
 
-static unsigned int max_combiner_nr(void)
-{
-	if (soc_is_exynos5250())
-		return EXYNOS5_MAX_COMBINER_NR;
-	else if (soc_is_exynos4412())
-		return EXYNOS4412_MAX_COMBINER_NR;
-	else if (soc_is_exynos4212())
-		return EXYNOS4212_MAX_COMBINER_NR;
-	else
-		return EXYNOS4210_MAX_COMBINER_NR;
-}
-
-
 void __init exynos4_init_irq(void)
 {
-	unsigned int gic_bank_offset;
-
-	gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
-
-	if (!of_have_populated_dt())
-		gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
-	else
-		irqchip_init();
-
-	if (!of_have_populated_dt())
-		combiner_init(S5P_VA_COMBINER_BASE, NULL,
-			      max_combiner_nr(), COMBINER_IRQ(0, 0));
-
-	gic_arch_extn.irq_set_wake = s3c_irq_wake;
+	irqchip_init();
 }
 
 void __init exynos5_init_irq(void)
 {
 	irqchip_init();
-	gic_arch_extn.irq_set_wake = s3c_irq_wake;
 }
 
 struct bus_type exynos_subsys = {

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #8 lore raw

PATCH v2 9/38 ARM: EXYNOS: common: Remove legacy timer initialization code

This patch removes legacy timer initialization code that was used to set up system timers when booting with ATAGS, which is not supported on Exynos any more.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c | 39 ++-------------------------------------
 1 file changed, 2 insertions(+), 37 deletions(-)

arch/arm/mach-exynos/common.c +2 ~~-37~~

index 9626ce4..b1d0afa 100644
@@ -299,13 +299,6 @@ static struct map_desc exynos5440_iodesc0[] __initdata = {
 	},
 };
 
-static struct samsung_pwm_variant exynos4_pwm_variant = {
-	.bits		= 32,
-	.div_base	= 0,
-	.has_tint_cstat	= true,
-	.tclk_mask	= 0,
-};
-
 void exynos4_restart(char mode, const char *cmd)
 {
 	__raw_writel(0x1, S5P_SWRESET);

@@ -451,38 +444,10 @@ static void __init exynos5440_map_io(void)
 	iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
 }
 
-void __init exynos_set_timer_source(u8 channels)
-{
-	exynos4_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
-	exynos4_pwm_variant.output_mask &= ~channels;
-}
-
 void __init exynos_init_time(void)
 {
-	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
-		EXYNOS4_IRQ_TIMER0_VIC, EXYNOS4_IRQ_TIMER1_VIC,
-		EXYNOS4_IRQ_TIMER2_VIC, EXYNOS4_IRQ_TIMER3_VIC,
-		EXYNOS4_IRQ_TIMER4_VIC,
-	};
-
-	if (of_have_populated_dt()) {
-		of_clk_init(NULL);
-		clocksource_of_init();
-	} else {
-		/* todo: remove after migrating legacy E4 platforms to dt */
-#ifdef CONFIG_ARCH_EXYNOS4
-		exynos4_clk_init(NULL, !soc_is_exynos4210(), S5P_VA_CMU, readl(S5P_VA_CHIPID + 8) & 1);
-		exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f);
-#endif
-#ifdef CONFIG_CLKSRC_SAMSUNG_PWM
-		if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
-			samsung_pwm_clocksource_init(S3C_VA_TIMER,
-					timer_irqs, &exynos4_pwm_variant);
-		else
-#endif
-			mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0,
-					EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1);
-	}
+	of_clk_init(NULL);
+	clocksource_of_init();
 }
 
 void __init exynos4_init_irq(void)

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #9 lore raw

PATCH v2 10/38 ARM: EXYNOS: common: Remove platform device initialization

This patch removes legacy platform device initialization code that was used to set names and other parameters of static platform devices when booting with ATAGS, which is not supported on Exynos any more.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c | 37 -------------------------------------
 1 file changed, 37 deletions(-)

arch/arm/mach-exynos/common.c +0 ~~-37~~

index b1d0afa..2c8527c 100644
@@ -43,16 +43,7 @@
 #include <mach/regs-gpio.h>
 
 #include <plat/cpu.h>
-#include <plat/devs.h>
 #include <plat/pm.h>
-#include <plat/sdhci.h>
-#include <plat/gpio-cfg.h>
-#include <plat/adc-core.h>
-#include <plat/fb-core.h>
-#include <plat/fimc-core.h>
-#include <plat/iic-core.h>
-#include <plat/tv-core.h>
-#include <plat/spi-core.h>
 #include <plat/regs-serial.h>
 
 #include "common.h"

@@ -401,34 +392,6 @@ static void __init exynos4_map_io(void)
 		iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
 	if (soc_is_exynos4212() || soc_is_exynos4412())
 		iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
-
-	/* initialize device information early */
-	exynos4_default_sdhci0();
-	exynos4_default_sdhci1();
-	exynos4_default_sdhci2();
-	exynos4_default_sdhci3();
-
-	s3c_adc_setname("samsung-adc-v3");
-
-	s3c_fimc_setname(0, "exynos4-fimc");
-	s3c_fimc_setname(1, "exynos4-fimc");
-	s3c_fimc_setname(2, "exynos4-fimc");
-	s3c_fimc_setname(3, "exynos4-fimc");
-
-	s3c_sdhci_setname(0, "exynos4-sdhci");
-	s3c_sdhci_setname(1, "exynos4-sdhci");
-	s3c_sdhci_setname(2, "exynos4-sdhci");
-	s3c_sdhci_setname(3, "exynos4-sdhci");
-
-	/* The I2C bus controllers are directly compatible with s3c2440 */
-	s3c_i2c0_setname("s3c2440-i2c");
-	s3c_i2c1_setname("s3c2440-i2c");
-	s3c_i2c2_setname("s3c2440-i2c");
-
-	s5p_fb_setname(0, "exynos4-fb");
-	s5p_hdmi_setname("exynos4-hdmi");
-
-	s3c64xx_spi_setname("exynos4210-spi");
 }
 
 static void __init exynos5_map_io(void)

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #10 lore raw

PATCH v2 11/38 ARM: EXYNOS: common: Remove legacy mapping of chip ID block

This patch removes static mapping of chip ID block that was used when booting with ATAGS, which is not supported on Exynos any more.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c | 14 +-------------
 1 file changed, 1 insertion(+), 13 deletions(-)

arch/arm/mach-exynos/common.c +1 ~~-13~~

index 2c8527c..f81aa22 100644
@@ -99,15 +99,6 @@ static struct cpu_table cpu_ids[] __initdata = {
 
 /* Initial IO mappings */
 
-static struct map_desc exynos_iodesc[] __initdata = {
-	{
-		.virtual	= (unsigned long)S5P_VA_CHIPID,
-		.pfn		= __phys_to_pfn(EXYNOS_PA_CHIPID),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	},
-};
-
 static struct map_desc exynos4_iodesc[] __initdata = {
 	{
 		.virtual	= (unsigned long)S3C_VA_SYS,

@@ -365,10 +356,7 @@ void __init exynos_init_io(struct map_desc *mach_desc, int size)
 {
 	debug_ll_io_init();
 
-	if (initial_boot_params)
-		of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
-	else
-		iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
+	of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
 
 	if (mach_desc)
 		iotable_init(mach_desc, size);

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #11 lore raw

PATCH v2 12/38 ARM: EXYNOS: firmware: Remove check for device tree presence

This patch makes the firmware setup code assume presence of DT, since it is now the only way of booting supported for Exynos.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/firmware.c | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

arch/arm/mach-exynos/firmware.c +10 ~~-12~~

index ed11f10..932129e 100644
@@ -48,20 +48,18 @@ static const struct firmware_ops exynos_firmware_ops = {
 
 void __init exynos_firmware_init(void)
 {
-	if (of_have_populated_dt()) {
-		struct device_node *nd;
-		const __be32 *addr;
+	struct device_node *nd;
+	const __be32 *addr;
 
-		nd = of_find_compatible_node(NULL, NULL,
-						"samsung,secure-firmware");
-		if (!nd)
-			return;
+	nd = of_find_compatible_node(NULL, NULL,
+					"samsung,secure-firmware");
+	if (!nd)
+		return;
 
-		addr = of_get_address(nd, 0, NULL, NULL);
-		if (!addr) {
-			pr_err("%s: No address specified.\n", __func__);
-			return;
-		}
+	addr = of_get_address(nd, 0, NULL, NULL);
+	if (!addr) {
+		pr_err("%s: No address specified.\n", __func__);
+		return;
 	}
 
 	pr_info("Running under secure firmware.\n");

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #12 lore raw

PATCH v2 13/38 ARM: EXYNOS: pm_domains: Remove legacy power domain registration code

This patch removes static definitions of power domains and code responsible for registering them and adding devices to them, since only DT based boot is now supported on Exynos.

Cc linux-pm at vger.kernel.org

Cc "Rafael J. Wysocki" <[email protected]>

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/pm_domains.c | 94 +--------------------------------------
 1 file changed, 1 insertion(+), 93 deletions(-)

arch/arm/mach-exynos/pm_domains.c +1 ~~-93~~

index beb946d..1703593 100644
@@ -74,16 +74,6 @@ static int exynos_pd_power_off(struct generic_pm_domain *domain)
 	return exynos_pd_power(domain, false);
 }
 
-#define EXYNOS_GPD(PD, BASE, NAME)			\
-static struct exynos_pm_domain PD = {			\
-	.base = (void __iomem *)BASE,			\
-	.name = NAME,					\
-	.pd = {						\
-		.power_off = exynos_pd_power_off,	\
-		.power_on = exynos_pd_power_on,	\
-	},						\
-}
-
 static void exynos_add_device_to_domain(struct exynos_pm_domain *pd,
 					 struct device *dev)
 {

@@ -156,7 +146,7 @@ static struct notifier_block platform_nb = {
 	.notifier_call = exynos_pm_notifier_call,
 };
 
-static __init int exynos_pm_dt_parse_domains(void)
+static __init int exynos4_pm_init_power_domain(void)
 {
 	struct platform_device *pdev;
 	struct device_node *np;

@@ -192,88 +182,6 @@ static __init int exynos_pm_dt_parse_domains(void)
 
 	return 0;
 }
-
-static __init __maybe_unused void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
-						struct exynos_pm_domain *pd)
-{
-	if (pdev->dev.bus) {
-		if (!pm_genpd_add_device(&pd->pd, &pdev->dev))
-			pm_genpd_dev_need_restore(&pdev->dev, true);
-		else
-			pr_info("%s: error in adding %s device to %s power"
-				"domain\n", __func__, dev_name(&pdev->dev),
-				pd->name);
-	}
-}
-
-EXYNOS_GPD(exynos4_pd_mfc, S5P_PMU_MFC_CONF, "pd-mfc");
-EXYNOS_GPD(exynos4_pd_g3d, S5P_PMU_G3D_CONF, "pd-g3d");
-EXYNOS_GPD(exynos4_pd_lcd0, S5P_PMU_LCD0_CONF, "pd-lcd0");
-EXYNOS_GPD(exynos4_pd_lcd1, S5P_PMU_LCD1_CONF, "pd-lcd1");
-EXYNOS_GPD(exynos4_pd_tv, S5P_PMU_TV_CONF, "pd-tv");
-EXYNOS_GPD(exynos4_pd_cam, S5P_PMU_CAM_CONF, "pd-cam");
-EXYNOS_GPD(exynos4_pd_gps, S5P_PMU_GPS_CONF, "pd-gps");
-
-static struct exynos_pm_domain *exynos4_pm_domains[] = {
-	&exynos4_pd_mfc,
-	&exynos4_pd_g3d,
-	&exynos4_pd_lcd0,
-	&exynos4_pd_lcd1,
-	&exynos4_pd_tv,
-	&exynos4_pd_cam,
-	&exynos4_pd_gps,
-};
-
-static __init int exynos4_pm_init_power_domain(void)
-{
-	int idx;
-
-	if (of_have_populated_dt())
-		return exynos_pm_dt_parse_domains();
-
-	for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++) {
-		struct exynos_pm_domain *pd = exynos4_pm_domains[idx];
-		int on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN;
-
-		pm_genpd_init(&pd->pd, NULL, !on);
-	}
-
-#ifdef CONFIG_S5P_DEV_FIMD0
-	exynos_pm_add_dev_to_genpd(&s5p_device_fimd0, &exynos4_pd_lcd0);
-#endif
-#ifdef CONFIG_S5P_DEV_TV
-	exynos_pm_add_dev_to_genpd(&s5p_device_hdmi, &exynos4_pd_tv);
-	exynos_pm_add_dev_to_genpd(&s5p_device_mixer, &exynos4_pd_tv);
-#endif
-#ifdef CONFIG_S5P_DEV_MFC
-	exynos_pm_add_dev_to_genpd(&s5p_device_mfc, &exynos4_pd_mfc);
-#endif
-#ifdef CONFIG_S5P_DEV_FIMC0
-	exynos_pm_add_dev_to_genpd(&s5p_device_fimc0, &exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_FIMC1
-	exynos_pm_add_dev_to_genpd(&s5p_device_fimc1, &exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_FIMC2
-	exynos_pm_add_dev_to_genpd(&s5p_device_fimc2, &exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_FIMC3
-	exynos_pm_add_dev_to_genpd(&s5p_device_fimc3, &exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_CSIS0
-	exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis0, &exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_CSIS1
-	exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis1, &exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_G2D
-	exynos_pm_add_dev_to_genpd(&s5p_device_g2d, &exynos4_pd_lcd0);
-#endif
-#ifdef CONFIG_S5P_DEV_JPEG
-	exynos_pm_add_dev_to_genpd(&s5p_device_jpeg, &exynos4_pd_cam);
-#endif
-	return 0;
-}
 arch_initcall(exynos4_pm_init_power_domain);
 
 int __init exynos_pm_late_initcall(void)

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:33 UTC #13 lore raw

PATCH v2 14/38 ARM: SAMSUNG: Introduce GPIO_SAMSUNG Kconfig entry

This patch adds Kconfig entry that selects whether legacy Samsung GPIO driver should be built or not. For platforms that support only DT based boot, the new pinctrl driver is used and so the old one is not needed.

Cc Grant Likely <[email protected]>

Cc Linus Walleij <[email protected]>

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/Kconfig                        | 6 ++++++
 arch/arm/plat-samsung/include/plat/pm.h | 5 +++++
 drivers/gpio/Kconfig                    | 7 +++++++
 drivers/gpio/Makefile                   | 2 +-
 4 files changed, 19 insertions(+), 1 deletion(-)

arch/arm/Kconfig +6 -0

index ae7247d..9c69e6c 100644
@@ -695,6 +695,7 @@ config ARCH_S3C24XX
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
 	select GENERIC_CLOCKEVENTS
+	select GPIO_SAMSUNG
 	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG

@@ -718,6 +719,7 @@ config ARCH_S3C64XX
 	select CLKSRC_MMIO
 	select CPU_V6
 	select GENERIC_CLOCKEVENTS
+	select GPIO_SAMSUNG
 	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG

@@ -741,6 +743,7 @@ config ARCH_S5P64X0
 	select CLKSRC_MMIO
 	select CPU_V6
 	select GENERIC_CLOCKEVENTS
+	select GPIO_SAMSUNG
 	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG

@@ -758,6 +761,7 @@ config ARCH_S5PC100
 	select CLKSRC_MMIO
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
+	select GPIO_SAMSUNG
 	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG

@@ -776,6 +780,7 @@ config ARCH_S5PV210
 	select CLKSRC_MMIO
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
+	select GPIO_SAMSUNG
 	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG

@@ -795,6 +800,7 @@ config ARCH_EXYNOS
 	select COMMON_CLK
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
+	select GPIO_SAMSUNG
 	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG

arch/arm/plat-samsung/include/plat/pm.h +5 -0

index f6fcade..5d47ca3 100644
@@ -166,6 +166,7 @@ extern void s3c_pm_check_store(void);
  */
 extern void s3c_pm_configure_extint(void);
 
+#ifdef CONFIG_GPIO_SAMSUNG
 /**
  * samsung_pm_restore_gpios() - restore the state of the gpios after sleep.
  *

@@ -181,6 +182,10 @@ extern void samsung_pm_restore_gpios(void);
  * Save the GPIO states for resotration on resume. See samsung_pm_restore_gpios().
  */
 extern void samsung_pm_save_gpios(void);
+#else
+static inline void samsung_pm_restore_gpios(void) {}
+static inline void samsung_pm_save_gpios(void) {}
+#endif
 
 extern void s3c_pm_save_core(void);
 extern void s3c_pm_restore_core(void);

drivers/gpio/Kconfig +7 -0

index 573c449..9c993ed 100644
@@ -209,6 +209,13 @@ config GPIO_RCAR
 	help
 	  Say yes here to support GPIO on Renesas R-Car SoCs.
 
+config GPIO_SAMSUNG
+	bool
+	depends on PLAT_SAMSUNG
+	help
+	  Legacy GPIO support. Use only for platforms without support for
+	  pinctrl.
+
 config GPIO_SPEAR_SPICS
 	bool "ST SPEAr13xx SPI Chip Select as GPIO support"
 	depends on PLAT_SPEAR

drivers/gpio/Makefile +1 -1

index 0cb2d65..ef3e983 100644
@@ -59,7 +59,7 @@ obj-$(CONFIG_GPIO_PXA)		+= gpio-pxa.o
 obj-$(CONFIG_GPIO_RC5T583)	+= gpio-rc5t583.o
 obj-$(CONFIG_GPIO_RDC321X)	+= gpio-rdc321x.o
 obj-$(CONFIG_GPIO_RCAR)		+= gpio-rcar.o
-obj-$(CONFIG_PLAT_SAMSUNG)	+= gpio-samsung.o
+obj-$(CONFIG_GPIO_SAMSUNG)	+= gpio-samsung.o
 obj-$(CONFIG_ARCH_SA1100)	+= gpio-sa1100.o
 obj-$(CONFIG_GPIO_SCH)		+= gpio-sch.o
 obj-$(CONFIG_GPIO_SODAVILLE)	+= gpio-sodaville.o

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #14 lore raw

PATCH v2 15/38 ARM: EXYNOS: Provide compatibility stubs for PM code in pm-core.h header

This patch adds several compatibility definitions that are not relevant for Exynos, but are required by Samsung PM core.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/include/mach/pm-core.h | 4 ++++
 1 file changed, 4 insertions(+)

arch/arm/mach-exynos/include/mach/pm-core.h +4 -0

index 296090e..dd62559 100644
@@ -69,4 +69,8 @@ static inline void samsung_pm_saved_gpios(void)
 	/* nothing here yet */
 }
 
+/* Compatibility definitions to make plat-samsung/pm.c compile */
+#define s3c_irqwake_intallow	0
+#define s3c_irqwake_eintallow	0
+
 #endif /* __ASM_ARCH_PM_CORE_H */

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #15 lore raw

PATCH v2 16/38 ARM: SAMSUNG: Compile legacy IRQ and GPIO PM code only with ATAGS support

This patch adds new Kconfig symbols, SAMSUNG_PM_GPIO and S5P_IRQ_PM that get enabled when GPIO_SAMSUNG, PM and S5P_PM are enabled, but only if SAMSUNG_ATAGS is selected.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/plat-samsung/Kconfig  | 13 +++++++++++++
 arch/arm/plat-samsung/Makefile |  5 +++--
 2 files changed, 16 insertions(+), 2 deletions(-)

arch/arm/plat-samsung/Kconfig +13 -0

index c0f0542..7b08b26 100644
@@ -421,6 +421,19 @@ config S3C_DMA
 	help
 	  Internal configuration for S3C DMA core
 
+config S5P_IRQ_PM
+	bool
+	default y if S5P_PM
+	help
+	  Legacy IRQ power management for S5P platforms
+
+config SAMSUNG_PM_GPIO
+	bool
+	default y if GPIO_SAMSUNG && PM
+	help
+	  Include legacy GPIO power management code for platforms not using
+	  pinctrl-samsung driver.
+
 endif
 
 config SAMSUNG_DMADEV

arch/arm/plat-samsung/Makefile +3 -2

index b549ea9..6348ae2 100644
@@ -52,10 +52,11 @@ obj-$(CONFIG_SAMSUNG_DMADEV)	+= dma-ops.o
 # PM support
 
 obj-$(CONFIG_PM)		+= pm.o
-obj-$(CONFIG_PM)		+= pm-gpio.o
+obj-$(CONFIG_SAMSUNG_PM_GPIO)	+= pm-gpio.o
 obj-$(CONFIG_SAMSUNG_PM_CHECK)	+= pm-check.o
 
 obj-$(CONFIG_SAMSUNG_WAKEMASK)	+= wakeup-mask.o
 
-obj-$(CONFIG_S5P_PM)		+= s5p-pm.o s5p-irq-pm.o
+obj-$(CONFIG_S5P_PM)		+= s5p-pm.o
+obj-$(CONFIG_S5P_IRQ_PM)	+= s5p-irq-pm.o
 obj-$(CONFIG_S5P_SLEEP)		+= s5p-sleep.o

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #16 lore raw

PATCH v2 17/38 platform: Check for ARCH_EXYNOS separately

ARCH_EXYNOS is going to be excluded from PLAT_S5P, so it must be checked separately in Exynos-related Kconfig entries.

Cc linux-media at vger.kernel.org

Cc Mauro Carvalho Chehab <[email protected]>

Cc Sylwester Nawrocki <[email protected]>

Cc Kamil Debski <[email protected]>

Cc Tomasz Stanislawski <[email protected]>

Cc Jeongtae Park <[email protected]>

Signed-off-by Tomasz Figa <[email protected]>

---
 drivers/media/platform/Kconfig            | 6 +++---
 drivers/media/platform/exynos4-is/Kconfig | 3 ++-
 drivers/media/platform/s5p-tv/Kconfig     | 2 +-
 3 files changed, 6 insertions(+), 5 deletions(-)

drivers/media/platform/Kconfig +3 -3

index 0494d27..bce695d 100644
@@ -159,7 +159,7 @@ config VIDEO_MEM2MEM_DEINTERLACE
 
 config VIDEO_SAMSUNG_S5P_G2D
 	tristate "Samsung S5P and EXYNOS4 G2D 2d graphics accelerator driver"
-	depends on VIDEO_DEV && VIDEO_V4L2 && PLAT_S5P
+	depends on VIDEO_DEV && VIDEO_V4L2 && (PLAT_S5P || ARCH_EXYNOS)
 	select VIDEOBUF2_DMA_CONTIG
 	select V4L2_MEM2MEM_DEV
 	default n

@@ -169,7 +169,7 @@ config VIDEO_SAMSUNG_S5P_G2D
 
 config VIDEO_SAMSUNG_S5P_JPEG
 	tristate "Samsung S5P/Exynos4 JPEG codec driver"
-	depends on VIDEO_DEV && VIDEO_V4L2 && PLAT_S5P
+	depends on VIDEO_DEV && VIDEO_V4L2 && (PLAT_S5P || ARCH_EXYNOS)
 	select VIDEOBUF2_DMA_CONTIG
 	select V4L2_MEM2MEM_DEV
 	---help---

@@ -177,7 +177,7 @@ config VIDEO_SAMSUNG_S5P_JPEG
 
 config VIDEO_SAMSUNG_S5P_MFC
 	tristate "Samsung S5P MFC Video Codec"
-	depends on VIDEO_DEV && VIDEO_V4L2 && PLAT_S5P
+	depends on VIDEO_DEV && VIDEO_V4L2 && (PLAT_S5P || ARCH_EXYNOS)
 	select VIDEOBUF2_DMA_CONTIG
 	default n
 	help

drivers/media/platform/exynos4-is/Kconfig +2 -1

index 6ff99b5..004fd0b 100644
@@ -1,7 +1,8 @@
 
 config VIDEO_SAMSUNG_EXYNOS4_IS
 	bool "Samsung S5P/EXYNOS4 SoC series Camera Subsystem driver"
-	depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && PLAT_S5P && PM_RUNTIME
+	depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && PM_RUNTIME
+	depends on (PLAT_S5P || ARCH_EXYNOS)
 	help
 	  Say Y here to enable camera host interface devices for
 	  Samsung S5P and EXYNOS SoC series.

drivers/media/platform/s5p-tv/Kconfig +1 -1

index 7b659bd..369a4c1 100644
@@ -8,7 +8,7 @@
 
 config VIDEO_SAMSUNG_S5P_TV
 	bool "Samsung TV driver for S5P platform"
-	depends on PLAT_S5P && PM_RUNTIME
+	depends on (PLAT_S5P || ARCH_EXYNOS) && PM_RUNTIME
 	default n
 	---help---
 	  Say Y here to enable selecting the TV output devices for

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #17 lore raw

PATCH v2 18/38 USB: Check for ARCH_EXYNOS separately

ARCH_EXYNOS is going to be excluded from PLAT_S5P, so it must be checked separately in Exynos-related Kconfig entries.

Signed-off-by Tomasz Figa <[email protected]>

---
 drivers/usb/Kconfig      | 1 +
 drivers/usb/host/Kconfig | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

drivers/usb/Kconfig +1 -0

index 92e1dc9..a3b48b5 100644
@@ -43,6 +43,7 @@ config USB_ARCH_HAS_EHCI
 	default y if ARCH_VT8500
 	default y if PLAT_SPEAR
 	default y if PLAT_S5P
+	default y if ARCH_EXYNOS
 	default y if ARCH_MSM
 	default y if MICROBLAZE
 	default y if SPARC_LEON

drivers/usb/host/Kconfig +1 -1

index 344d5e2..922a65d 100644
@@ -225,7 +225,7 @@ config USB_EHCI_SH
 
 config USB_EHCI_S5P
        tristate "EHCI support for Samsung S5P/EXYNOS SoC Series"
-       depends on PLAT_S5P
+       depends on PLAT_S5P || ARCH_EXYNOS
        help
 	Enable support for the Samsung S5Pxxxx and Exynos3/4/5 SOC's
 	on-chip EHCI controller.

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #18 lore raw

PATCH v2 19/38 ARM: EXYNOS: Decouple ARCH_EXYNOS from PLAT_S5P

After removing support for ATAGS based boot on Exynos, there is not much that can be shared between Exynos and other S5P platforms. This patch makes Exynos a standalone Samsung platform, not using PLAT_S5P.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/Kconfig                | 3 +++
 arch/arm/Makefile               | 1 +
 arch/arm/mach-exynos/Kconfig    | 1 +
 arch/arm/plat-samsung/Kconfig   | 8 +++-----
 arch/arm/plat-samsung/pm-gpio.c | 5 +++--
 5 files changed, 11 insertions(+), 7 deletions(-)

arch/arm/Kconfig +3 -0

index 9c69e6c..b3560c2 100644
@@ -795,7 +795,9 @@ config ARCH_EXYNOS
 	bool "Samsung EXYNOS"
 	select ARCH_HAS_CPUFREQ
 	select ARCH_HAS_HOLES_MEMORYMODEL
+	select ARCH_REQUIRE_GPIOLIB
 	select ARCH_SPARSEMEM_ENABLE
+	select ARM_GIC
 	select CLKDEV_LOOKUP
 	select COMMON_CLK
 	select CPU_V7

@@ -807,6 +809,7 @@ config ARCH_EXYNOS
 	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_MEMORY_H
+	select S5P_GPIO_DRVSTR
 	select SAMSUNG_ATAGS
 	select USE_OF
 	help

arch/arm/Makefile +1 -0

index 1ba358b..60133fb 100644
@@ -197,6 +197,7 @@ machine-$(CONFIG_ARCH_SUNXI)		+= sunxi
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
+plat-$(CONFIG_ARCH_EXYNOS)	+= samsung
 plat-$(CONFIG_ARCH_OMAP)	+= omap
 plat-$(CONFIG_ARCH_S3C64XX)	+= samsung
 plat-$(CONFIG_PLAT_IOP)		+= iop

arch/arm/mach-exynos/Kconfig +1 -0

index 0d93ebe..65ca3ac 100644
@@ -14,6 +14,7 @@ menu "SAMSUNG EXYNOS SoCs Support"
 config ARCH_EXYNOS4
 	bool "SAMSUNG EXYNOS4"
 	default y
+	select GIC_NON_BANKED
 	select HAVE_ARM_SCU if SMP
 	select HAVE_SMP
 	select MIGHT_HAVE_CACHE_L2X0

arch/arm/plat-samsung/Kconfig +3 -5

index 7b08b26..ca27cc9 100644
@@ -6,7 +6,7 @@
 
 config PLAT_SAMSUNG
 	bool
-	depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
+	depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P || ARCH_EXYNOS
 	default y
 	select GENERIC_IRQ_CHIP
 	select NO_IOPORT

@@ -15,12 +15,10 @@ config PLAT_SAMSUNG
 
 config PLAT_S5P
 	bool
-	depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
+	depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
 	default y
 	select ARCH_REQUIRE_GPIOLIB
-	select ARM_GIC if ARCH_EXYNOS
-	select ARM_VIC if !ARCH_EXYNOS
-	select GIC_NON_BANKED if ARCH_EXYNOS4
+	select ARM_VIC
 	select NO_IOPORT
 	select PLAT_SAMSUNG
 	select S3C_GPIO_TRACK

arch/arm/plat-samsung/pm-gpio.c +3 -2

index c2ff92c..a8de3cf 100644
@@ -192,7 +192,8 @@ struct samsung_gpio_pm samsung_gpio_pm_2bit = {
 	.resume = samsung_gpio_pm_2bit_resume,
 };
 
-#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P)
+#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) \
+	|| defined(CONFIG_ARCH_EXYNOS)
 static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip)
 {
 	chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON);

@@ -302,7 +303,7 @@ struct samsung_gpio_pm samsung_gpio_pm_4bit = {
 	.save	= samsung_gpio_pm_4bit_save,
 	.resume = samsung_gpio_pm_4bit_resume,
 };
-#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */
+#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P || CONFIG_ARCH_EXYNOS */
 
 /**
  * samsung_pm_save_gpio() - save gpio chip data for suspend

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #19 lore raw

PATCH v2 20/38 ARM: SAMSUNG: pm: Include most of mach/ headers conditionally

Since it is illegal to include mach/ headers from source files outside of respective mach-* directory and DT-only Samsung platforms might not have all of them anyway, this patches makes inclusion of them conditional, based on CONFIG_SAMSUNG_ATAGS.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/plat-samsung/pm.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

arch/arm/plat-samsung/pm.c +6 -2

index 53210ec..d76ab72 100644
@@ -21,13 +21,17 @@
 
 #include <asm/cacheflush.h>
 #include <asm/suspend.h>
-#include <mach/hardware.h>
-#include <mach/map.h>
 
 #include <plat/regs-serial.h>
+
+#ifdef CONFIG_SAMSUNG_ATAGS
+#include <mach/hardware.h>
+#include <mach/map.h>
 #include <mach/regs-clock.h>
 #include <mach/regs-irq.h>
 #include <mach/irqs.h>
+#endif
+
 #include <asm/irq.h>
 
 #include <plat/pm.h>

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #20 lore raw

PATCH v2 21/38 ARM: EXYNOS: Do not select legacy Kconfig symbols any more

This patch removes selection of several legacy Kconfig symbols from ARCH_EXYNOS to bypass compilation of code used only for ATAGS based boot.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/Kconfig | 4 ----
 1 file changed, 4 deletions(-)

arch/arm/Kconfig +0 -4

index b3560c2..61dff79 100644
@@ -802,15 +802,11 @@ config ARCH_EXYNOS
 	select COMMON_CLK
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
-	select GPIO_SAMSUNG
 	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select HAVE_S3C_RTC if RTC_CLASS
-	select NEED_MACH_GPIO_H
 	select NEED_MACH_MEMORY_H
-	select S5P_GPIO_DRVSTR
-	select SAMSUNG_ATAGS
 	select USE_OF
 	help
 	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #21 lore raw

PATCH v2 22/38 ARM: EXYNOS: Remove setup-i2c0.c

Now since SAMSUNG_ATAGS is no longer selected for ARCH_EXYNOS, we can safely remove the remaining setup code.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/Makefile     |  4 ----
 arch/arm/mach-exynos/setup-i2c0.c | 19 -------------------
 2 files changed, 23 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/setup-i2c0.c

arch/arm/mach-exynos/Makefile +0 -4

index 5fc6cfd..e970a7a 100644
@@ -34,7 +34,3 @@ AFLAGS_exynos-smc.o		:=-Wa,-march=armv7-a$(plus_sec)
 
 obj-$(CONFIG_MACH_EXYNOS4_DT)		+= mach-exynos4-dt.o
 obj-$(CONFIG_MACH_EXYNOS5_DT)		+= mach-exynos5-dt.o
-
-# device support
-
-obj-$(CONFIG_ARCH_EXYNOS)		+= setup-i2c0.o

arch/arm/mach-exynos/setup-i2c0.c deleted +0 ~~-19~~

deleted file mode 100644
index ede6ceb..0000000
@@ -1,19 +0,0 @@
-/*
- * Copyright (c) 2009-2012 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com/
- *
- * I2C0 GPIO configuration.
- *
- * Based on plat-s3c64xx/setup-i2c0.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-struct platform_device; /* don't need the contents */
-
-void s3c_i2c0_cfg_gpio(struct platform_device *dev)
-{
-
-}

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #22 lore raw

PATCH v2 23/38 ARM: EXYNOS: Remove mach/gpio.h

This patch removes mach/gpio.h header that is not required any more on Exynos.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/include/mach/gpio.h | 289 -------------------------------
 1 file changed, 289 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/gpio.h

arch/arm/mach-exynos/include/mach/gpio.h deleted +0 ~~-289~~

deleted file mode 100644
index eb24f1e..0000000
@@ -1,289 +0,0 @@
-/*
- * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * EXYNOS - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H __FILE__
-
-/* Macro for EXYNOS GPIO numbering */
-
-#define EXYNOS_GPIO_NEXT(__gpio) \
-	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
-
-/* EXYNOS4 GPIO bank sizes */
-
-#define EXYNOS4_GPIO_A0_NR	(8)
-#define EXYNOS4_GPIO_A1_NR	(6)
-#define EXYNOS4_GPIO_B_NR	(8)
-#define EXYNOS4_GPIO_C0_NR	(5)
-#define EXYNOS4_GPIO_C1_NR	(5)
-#define EXYNOS4_GPIO_D0_NR	(4)
-#define EXYNOS4_GPIO_D1_NR	(4)
-#define EXYNOS4_GPIO_E0_NR	(5)
-#define EXYNOS4_GPIO_E1_NR	(8)
-#define EXYNOS4_GPIO_E2_NR	(6)
-#define EXYNOS4_GPIO_E3_NR	(8)
-#define EXYNOS4_GPIO_E4_NR	(8)
-#define EXYNOS4_GPIO_F0_NR	(8)
-#define EXYNOS4_GPIO_F1_NR	(8)
-#define EXYNOS4_GPIO_F2_NR	(8)
-#define EXYNOS4_GPIO_F3_NR	(6)
-#define EXYNOS4_GPIO_J0_NR	(8)
-#define EXYNOS4_GPIO_J1_NR	(5)
-#define EXYNOS4_GPIO_K0_NR	(7)
-#define EXYNOS4_GPIO_K1_NR	(7)
-#define EXYNOS4_GPIO_K2_NR	(7)
-#define EXYNOS4_GPIO_K3_NR	(7)
-#define EXYNOS4_GPIO_L0_NR	(8)
-#define EXYNOS4_GPIO_L1_NR	(3)
-#define EXYNOS4_GPIO_L2_NR	(8)
-#define EXYNOS4_GPIO_X0_NR	(8)
-#define EXYNOS4_GPIO_X1_NR	(8)
-#define EXYNOS4_GPIO_X2_NR	(8)
-#define EXYNOS4_GPIO_X3_NR	(8)
-#define EXYNOS4_GPIO_Y0_NR	(6)
-#define EXYNOS4_GPIO_Y1_NR	(4)
-#define EXYNOS4_GPIO_Y2_NR	(6)
-#define EXYNOS4_GPIO_Y3_NR	(8)
-#define EXYNOS4_GPIO_Y4_NR	(8)
-#define EXYNOS4_GPIO_Y5_NR	(8)
-#define EXYNOS4_GPIO_Y6_NR	(8)
-#define EXYNOS4_GPIO_Z_NR	(7)
-
-/* EXYNOS4 GPIO bank numbers */
-
-enum exynos4_gpio_number {
-	EXYNOS4_GPIO_A0_START	= 0,
-	EXYNOS4_GPIO_A1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A0),
-	EXYNOS4_GPIO_B_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A1),
-	EXYNOS4_GPIO_C0_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_B),
-	EXYNOS4_GPIO_C1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C0),
-	EXYNOS4_GPIO_D0_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C1),
-	EXYNOS4_GPIO_D1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D0),
-	EXYNOS4_GPIO_E0_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
-	EXYNOS4_GPIO_E1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E0),
-	EXYNOS4_GPIO_E2_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E1),
-	EXYNOS4_GPIO_E3_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E2),
-	EXYNOS4_GPIO_E4_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E3),
-	EXYNOS4_GPIO_F0_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E4),
-	EXYNOS4_GPIO_F1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F0),
-	EXYNOS4_GPIO_F2_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F1),
-	EXYNOS4_GPIO_F3_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F2),
-	EXYNOS4_GPIO_J0_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F3),
-	EXYNOS4_GPIO_J1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J0),
-	EXYNOS4_GPIO_K0_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J1),
-	EXYNOS4_GPIO_K1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K0),
-	EXYNOS4_GPIO_K2_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K1),
-	EXYNOS4_GPIO_K3_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K2),
-	EXYNOS4_GPIO_L0_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K3),
-	EXYNOS4_GPIO_L1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L0),
-	EXYNOS4_GPIO_L2_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L1),
-	EXYNOS4_GPIO_X0_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L2),
-	EXYNOS4_GPIO_X1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X0),
-	EXYNOS4_GPIO_X2_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X1),
-	EXYNOS4_GPIO_X3_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X2),
-	EXYNOS4_GPIO_Y0_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X3),
-	EXYNOS4_GPIO_Y1_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y0),
-	EXYNOS4_GPIO_Y2_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y1),
-	EXYNOS4_GPIO_Y3_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y2),
-	EXYNOS4_GPIO_Y4_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y3),
-	EXYNOS4_GPIO_Y5_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y4),
-	EXYNOS4_GPIO_Y6_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y5),
-	EXYNOS4_GPIO_Z_START	= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y6),
-};
-
-/* EXYNOS4 GPIO number definitions */
-
-#define EXYNOS4_GPA0(_nr)	(EXYNOS4_GPIO_A0_START + (_nr))
-#define EXYNOS4_GPA1(_nr)	(EXYNOS4_GPIO_A1_START + (_nr))
-#define EXYNOS4_GPB(_nr)	(EXYNOS4_GPIO_B_START + (_nr))
-#define EXYNOS4_GPC0(_nr)	(EXYNOS4_GPIO_C0_START + (_nr))
-#define EXYNOS4_GPC1(_nr)	(EXYNOS4_GPIO_C1_START + (_nr))
-#define EXYNOS4_GPD0(_nr)	(EXYNOS4_GPIO_D0_START + (_nr))
-#define EXYNOS4_GPD1(_nr)	(EXYNOS4_GPIO_D1_START + (_nr))
-#define EXYNOS4_GPE0(_nr)	(EXYNOS4_GPIO_E0_START + (_nr))
-#define EXYNOS4_GPE1(_nr)	(EXYNOS4_GPIO_E1_START + (_nr))
-#define EXYNOS4_GPE2(_nr)	(EXYNOS4_GPIO_E2_START + (_nr))
-#define EXYNOS4_GPE3(_nr)	(EXYNOS4_GPIO_E3_START + (_nr))
-#define EXYNOS4_GPE4(_nr)	(EXYNOS4_GPIO_E4_START + (_nr))
-#define EXYNOS4_GPF0(_nr)	(EXYNOS4_GPIO_F0_START + (_nr))
-#define EXYNOS4_GPF1(_nr)	(EXYNOS4_GPIO_F1_START + (_nr))
-#define EXYNOS4_GPF2(_nr)	(EXYNOS4_GPIO_F2_START + (_nr))
-#define EXYNOS4_GPF3(_nr)	(EXYNOS4_GPIO_F3_START + (_nr))
-#define EXYNOS4_GPJ0(_nr)	(EXYNOS4_GPIO_J0_START + (_nr))
-#define EXYNOS4_GPJ1(_nr)	(EXYNOS4_GPIO_J1_START + (_nr))
-#define EXYNOS4_GPK0(_nr)	(EXYNOS4_GPIO_K0_START + (_nr))
-#define EXYNOS4_GPK1(_nr)	(EXYNOS4_GPIO_K1_START + (_nr))
-#define EXYNOS4_GPK2(_nr)	(EXYNOS4_GPIO_K2_START + (_nr))
-#define EXYNOS4_GPK3(_nr)	(EXYNOS4_GPIO_K3_START + (_nr))
-#define EXYNOS4_GPL0(_nr)	(EXYNOS4_GPIO_L0_START + (_nr))
-#define EXYNOS4_GPL1(_nr)	(EXYNOS4_GPIO_L1_START + (_nr))
-#define EXYNOS4_GPL2(_nr)	(EXYNOS4_GPIO_L2_START + (_nr))
-#define EXYNOS4_GPX0(_nr)	(EXYNOS4_GPIO_X0_START + (_nr))
-#define EXYNOS4_GPX1(_nr)	(EXYNOS4_GPIO_X1_START + (_nr))
-#define EXYNOS4_GPX2(_nr)	(EXYNOS4_GPIO_X2_START + (_nr))
-#define EXYNOS4_GPX3(_nr)	(EXYNOS4_GPIO_X3_START + (_nr))
-#define EXYNOS4_GPY0(_nr)	(EXYNOS4_GPIO_Y0_START + (_nr))
-#define EXYNOS4_GPY1(_nr)	(EXYNOS4_GPIO_Y1_START + (_nr))
-#define EXYNOS4_GPY2(_nr)	(EXYNOS4_GPIO_Y2_START + (_nr))
-#define EXYNOS4_GPY3(_nr)	(EXYNOS4_GPIO_Y3_START + (_nr))
-#define EXYNOS4_GPY4(_nr)	(EXYNOS4_GPIO_Y4_START + (_nr))
-#define EXYNOS4_GPY5(_nr)	(EXYNOS4_GPIO_Y5_START + (_nr))
-#define EXYNOS4_GPY6(_nr)	(EXYNOS4_GPIO_Y6_START + (_nr))
-#define EXYNOS4_GPZ(_nr)	(EXYNOS4_GPIO_Z_START + (_nr))
-
-/* the end of the EXYNOS4 specific gpios */
-
-#define EXYNOS4_GPIO_END	(EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) + 1)
-
-/* EXYNOS5 GPIO bank sizes */
-
-#define EXYNOS5_GPIO_A0_NR	(8)
-#define EXYNOS5_GPIO_A1_NR	(6)
-#define EXYNOS5_GPIO_A2_NR	(8)
-#define EXYNOS5_GPIO_B0_NR	(5)
-#define EXYNOS5_GPIO_B1_NR	(5)
-#define EXYNOS5_GPIO_B2_NR	(4)
-#define EXYNOS5_GPIO_B3_NR	(4)
-#define EXYNOS5_GPIO_C0_NR	(7)
-#define EXYNOS5_GPIO_C1_NR	(4)
-#define EXYNOS5_GPIO_C2_NR	(7)
-#define EXYNOS5_GPIO_C3_NR	(7)
-#define EXYNOS5_GPIO_C4_NR	(7)
-#define EXYNOS5_GPIO_D0_NR	(4)
-#define EXYNOS5_GPIO_D1_NR	(8)
-#define EXYNOS5_GPIO_Y0_NR	(6)
-#define EXYNOS5_GPIO_Y1_NR	(4)
-#define EXYNOS5_GPIO_Y2_NR	(6)
-#define EXYNOS5_GPIO_Y3_NR	(8)
-#define EXYNOS5_GPIO_Y4_NR	(8)
-#define EXYNOS5_GPIO_Y5_NR	(8)
-#define EXYNOS5_GPIO_Y6_NR	(8)
-#define EXYNOS5_GPIO_X0_NR	(8)
-#define EXYNOS5_GPIO_X1_NR	(8)
-#define EXYNOS5_GPIO_X2_NR	(8)
-#define EXYNOS5_GPIO_X3_NR	(8)
-#define EXYNOS5_GPIO_E0_NR	(8)
-#define EXYNOS5_GPIO_E1_NR	(2)
-#define EXYNOS5_GPIO_F0_NR	(4)
-#define EXYNOS5_GPIO_F1_NR	(4)
-#define EXYNOS5_GPIO_G0_NR	(8)
-#define EXYNOS5_GPIO_G1_NR	(8)
-#define EXYNOS5_GPIO_G2_NR	(2)
-#define EXYNOS5_GPIO_H0_NR	(4)
-#define EXYNOS5_GPIO_H1_NR	(8)
-#define EXYNOS5_GPIO_V0_NR	(8)
-#define EXYNOS5_GPIO_V1_NR	(8)
-#define EXYNOS5_GPIO_V2_NR	(8)
-#define EXYNOS5_GPIO_V3_NR	(8)
-#define EXYNOS5_GPIO_V4_NR	(2)
-#define EXYNOS5_GPIO_Z_NR	(7)
-
-/* EXYNOS5 GPIO bank numbers */
-
-enum exynos5_gpio_number {
-	EXYNOS5_GPIO_A0_START		= 0,
-	EXYNOS5_GPIO_A1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A0),
-	EXYNOS5_GPIO_A2_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A1),
-	EXYNOS5_GPIO_B0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A2),
-	EXYNOS5_GPIO_B1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B0),
-	EXYNOS5_GPIO_B2_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B1),
-	EXYNOS5_GPIO_B3_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B2),
-	EXYNOS5_GPIO_C0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B3),
-	EXYNOS5_GPIO_C1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C0),
-	EXYNOS5_GPIO_C2_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C1),
-	EXYNOS5_GPIO_C3_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C2),
-	EXYNOS5_GPIO_C4_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C3),
-	EXYNOS5_GPIO_D0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C4),
-	EXYNOS5_GPIO_D1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D0),
-	EXYNOS5_GPIO_Y0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D1),
-	EXYNOS5_GPIO_Y1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y0),
-	EXYNOS5_GPIO_Y2_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y1),
-	EXYNOS5_GPIO_Y3_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y2),
-	EXYNOS5_GPIO_Y4_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y3),
-	EXYNOS5_GPIO_Y5_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y4),
-	EXYNOS5_GPIO_Y6_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y5),
-	EXYNOS5_GPIO_X0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y6),
-	EXYNOS5_GPIO_X1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X0),
-	EXYNOS5_GPIO_X2_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X1),
-	EXYNOS5_GPIO_X3_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X2),
-	EXYNOS5_GPIO_E0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X3),
-	EXYNOS5_GPIO_E1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_E0),
-	EXYNOS5_GPIO_F0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_E1),
-	EXYNOS5_GPIO_F1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_F0),
-	EXYNOS5_GPIO_G0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_F1),
-	EXYNOS5_GPIO_G1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G0),
-	EXYNOS5_GPIO_G2_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G1),
-	EXYNOS5_GPIO_H0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G2),
-	EXYNOS5_GPIO_H1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_H0),
-	EXYNOS5_GPIO_V0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_H1),
-	EXYNOS5_GPIO_V1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V0),
-	EXYNOS5_GPIO_V2_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V1),
-	EXYNOS5_GPIO_V3_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V2),
-	EXYNOS5_GPIO_V4_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V3),
-	EXYNOS5_GPIO_Z_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V4),
-};
-
-/* EXYNOS5 GPIO number definitions */
-
-#define EXYNOS5_GPA0(_nr)	(EXYNOS5_GPIO_A0_START + (_nr))
-#define EXYNOS5_GPA1(_nr)	(EXYNOS5_GPIO_A1_START + (_nr))
-#define EXYNOS5_GPA2(_nr)	(EXYNOS5_GPIO_A2_START + (_nr))
-#define EXYNOS5_GPB0(_nr)	(EXYNOS5_GPIO_B0_START + (_nr))
-#define EXYNOS5_GPB1(_nr)	(EXYNOS5_GPIO_B1_START + (_nr))
-#define EXYNOS5_GPB2(_nr)	(EXYNOS5_GPIO_B2_START + (_nr))
-#define EXYNOS5_GPB3(_nr)	(EXYNOS5_GPIO_B3_START + (_nr))
-#define EXYNOS5_GPC0(_nr)	(EXYNOS5_GPIO_C0_START + (_nr))
-#define EXYNOS5_GPC1(_nr)	(EXYNOS5_GPIO_C1_START + (_nr))
-#define EXYNOS5_GPC2(_nr)	(EXYNOS5_GPIO_C2_START + (_nr))
-#define EXYNOS5_GPC3(_nr)	(EXYNOS5_GPIO_C3_START + (_nr))
-#define EXYNOS5_GPC4(_nr)	(EXYNOS5_GPIO_C4_START + (_nr))
-#define EXYNOS5_GPD0(_nr)	(EXYNOS5_GPIO_D0_START + (_nr))
-#define EXYNOS5_GPD1(_nr)	(EXYNOS5_GPIO_D1_START + (_nr))
-#define EXYNOS5_GPY0(_nr)	(EXYNOS5_GPIO_Y0_START + (_nr))
-#define EXYNOS5_GPY1(_nr)	(EXYNOS5_GPIO_Y1_START + (_nr))
-#define EXYNOS5_GPY2(_nr)	(EXYNOS5_GPIO_Y2_START + (_nr))
-#define EXYNOS5_GPY3(_nr)	(EXYNOS5_GPIO_Y3_START + (_nr))
-#define EXYNOS5_GPY4(_nr)	(EXYNOS5_GPIO_Y4_START + (_nr))
-#define EXYNOS5_GPY5(_nr)	(EXYNOS5_GPIO_Y5_START + (_nr))
-#define EXYNOS5_GPY6(_nr)	(EXYNOS5_GPIO_Y6_START + (_nr))
-#define EXYNOS5_GPX0(_nr)	(EXYNOS5_GPIO_X0_START + (_nr))
-#define EXYNOS5_GPX1(_nr)	(EXYNOS5_GPIO_X1_START + (_nr))
-#define EXYNOS5_GPX2(_nr)	(EXYNOS5_GPIO_X2_START + (_nr))
-#define EXYNOS5_GPX3(_nr)	(EXYNOS5_GPIO_X3_START + (_nr))
-#define EXYNOS5_GPE0(_nr)	(EXYNOS5_GPIO_E0_START + (_nr))
-#define EXYNOS5_GPE1(_nr)	(EXYNOS5_GPIO_E1_START + (_nr))
-#define EXYNOS5_GPF0(_nr)	(EXYNOS5_GPIO_F0_START + (_nr))
-#define EXYNOS5_GPF1(_nr)	(EXYNOS5_GPIO_F1_START + (_nr))
-#define EXYNOS5_GPG0(_nr)	(EXYNOS5_GPIO_G0_START + (_nr))
-#define EXYNOS5_GPG1(_nr)	(EXYNOS5_GPIO_G1_START + (_nr))
-#define EXYNOS5_GPG2(_nr)	(EXYNOS5_GPIO_G2_START + (_nr))
-#define EXYNOS5_GPH0(_nr)	(EXYNOS5_GPIO_H0_START + (_nr))
-#define EXYNOS5_GPH1(_nr)	(EXYNOS5_GPIO_H1_START + (_nr))
-#define EXYNOS5_GPV0(_nr)	(EXYNOS5_GPIO_V0_START + (_nr))
-#define EXYNOS5_GPV1(_nr)	(EXYNOS5_GPIO_V1_START + (_nr))
-#define EXYNOS5_GPV2(_nr)	(EXYNOS5_GPIO_V2_START + (_nr))
-#define EXYNOS5_GPV3(_nr)	(EXYNOS5_GPIO_V3_START + (_nr))
-#define EXYNOS5_GPV4(_nr)	(EXYNOS5_GPIO_V4_START + (_nr))
-#define EXYNOS5_GPZ(_nr)	(EXYNOS5_GPIO_Z_START + (_nr))
-
-/* the end of the EXYNOS5 specific gpios */
-
-#define EXYNOS5_GPIO_END	(EXYNOS5_GPZ(EXYNOS5_GPIO_Z_NR) + 1)
-
-/* actually, EXYNOS5_GPIO_END is bigger than EXYNOS4 */
-
-#define S3C_GPIO_END		(EXYNOS5_GPIO_END)
-
-/* define the number of gpios */
-
-#define ARCH_NR_GPIOS		(CONFIG_SAMSUNG_GPIO_EXTRA + S3C_GPIO_END)
-
-#endif /* __ASM_ARCH_GPIO_H */

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #23 lore raw

PATCH v2 24/38 ARM: EXYNOS: Remove mach/regs-gpio.h header

Contents of this header are not used any more and can be safely removed.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c                 |  1 -
 arch/arm/mach-exynos/include/mach/regs-gpio.h | 40 ---------------------------
 arch/arm/mach-exynos/pm.c                     |  1 -
 3 files changed, 42 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/regs-gpio.h

arch/arm/mach-exynos/common.c +0 -1

index f81aa22..7b53e4c 100644
@@ -40,7 +40,6 @@
 
 #include <mach/regs-irq.h>
 #include <mach/regs-pmu.h>
-#include <mach/regs-gpio.h>
 
 #include <plat/cpu.h>
 #include <plat/pm.h>

arch/arm/mach-exynos/include/mach/regs-gpio.h deleted +0 ~~-40~~

deleted file mode 100644
index e4b5b60..0000000
@@ -1,40 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/regs-gpio.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * EXYNOS4 - GPIO (including EINT) register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_GPIO_H
-#define __ASM_ARCH_REGS_GPIO_H __FILE__
-
-#include <mach/map.h>
-#include <mach/irqs.h>
-
-#define EINT_REG_NR(x)			(EINT_OFFSET(x) >> 3)
-#define EINT_CON(b, x)			(b + 0xE00 + (EINT_REG_NR(x) * 4))
-#define EINT_FLTCON(b, x)		(b + 0xE80 + (EINT_REG_NR(x) * 4))
-#define EINT_MASK(b, x)			(b + 0xF00 + (EINT_REG_NR(x) * 4))
-#define EINT_PEND(b, x)			(b + 0xF40 + (EINT_REG_NR(x) * 4))
-
-#define EINT_OFFSET_BIT(x)		(1 << (EINT_OFFSET(x) & 0x7))
-
-/* compatibility for plat-s5p/irq-pm.c */
-#define EXYNOS4_EINT40CON		(S5P_VA_GPIO2 + 0xE00)
-#define S5P_EINT_CON(x)			(EXYNOS4_EINT40CON + ((x) * 0x4))
-
-#define EXYNOS4_EINT40FLTCON0		(S5P_VA_GPIO2 + 0xE80)
-#define S5P_EINT_FLTCON(x)		(EXYNOS4_EINT40FLTCON0 + ((x) * 0x4))
-
-#define EXYNOS4_EINT40MASK		(S5P_VA_GPIO2 + 0xF00)
-#define S5P_EINT_MASK(x)		(EXYNOS4_EINT40MASK + ((x) * 0x4))
-
-#define EXYNOS4_EINT40PEND		(S5P_VA_GPIO2 + 0xF40)
-#define S5P_EINT_PEND(x)		(EXYNOS4_EINT40PEND + ((x) * 0x4))
-
-#endif /* __ASM_ARCH_REGS_GPIO_H */

arch/arm/mach-exynos/pm.c +0 -1

index e3faaa81..41c2069 100644
@@ -30,7 +30,6 @@
 #include <plat/regs-srom.h>
 
 #include <mach/regs-irq.h>
-#include <mach/regs-gpio.h>
 #include <mach/regs-clock.h>
 #include <mach/regs-pmu.h>
 #include <mach/pm-core.h>

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #24 lore raw

PATCH v2 25/38 ARM: SAMSUNG: Make legacy MFC support code depend on SAMSUNG_ATAGS

This allows to bypass compilation of static platform device and resource definitions that require interrupts and base addresses to be defined statically.

Cc Jeongtae Park <[email protected]>

Cc Kamil Debski <[email protected]>

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/plat-samsung/s5p-dev-mfc.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

arch/arm/plat-samsung/s5p-dev-mfc.c +10 -1

index a93fb6f..ad51f85 100644
@@ -17,10 +17,12 @@
 #include <linux/of_fdt.h>
 #include <linux/of.h>
 
+#include <plat/mfc.h>
+
+#ifdef CONFIG_SAMSUNG_ATAGS
 #include <mach/map.h>
 #include <mach/irqs.h>
 #include <plat/devs.h>
-#include <plat/mfc.h>
 
 static struct resource s5p_mfc_resource[] = {
 	[0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),

@@ -61,6 +63,10 @@ struct platform_device s5p_device_mfc_r = {
 		.coherent_dma_mask	= DMA_BIT_MASK(32),
 	},
 };
+#else
+static struct platform_device s5p_device_mfc_l;
+static struct platform_device s5p_device_mfc_r;
+#endif
 
 struct s5p_mfc_reserved_mem {
 	phys_addr_t	base;

@@ -70,6 +76,7 @@ struct s5p_mfc_reserved_mem {
 
 static struct s5p_mfc_reserved_mem s5p_mfc_mem[2] __initdata;
 
+
 void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
 				phys_addr_t lbase, unsigned int lsize)
 {

@@ -93,6 +100,7 @@ void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
 	}
 }
 
+#ifdef CONFIG_SAMSUNG_ATAGS
 static int __init s5p_mfc_memory_init(void)
 {
 	int i;

@@ -111,6 +119,7 @@ static int __init s5p_mfc_memory_init(void)
 	return 0;
 }
 device_initcall(s5p_mfc_memory_init);
+#endif
 
 #ifdef CONFIG_OF
 int __init s5p_fdt_find_mfc_mem(unsigned long node, const char *uname,

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #25 lore raw

PATCH v2 26/38 ARM: EXYNOS: Select SPARSE_IRQ for Exynos

This patch adds selection of CONFIG_SPARSE_IRQ for ARCH_EXYNOS, since it is required by multiplatform and allows to remove the legacy mach/irqs.h header.

To make this possible, a dummy IRQ_EINT_BIT macro is added to pm-core.h header to allow plat-samsung/pm.c compile. This macro is irrelevant for Exynos and will be removed after reworking Samsung pm code for multiplatform compatibility.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/Kconfig                            | 1 +
 arch/arm/mach-exynos/include/mach/pm-core.h | 1 +
 2 files changed, 2 insertions(+)

arch/arm/Kconfig +1 -0

index 61dff79..ff2fe0f 100644
@@ -807,6 +807,7 @@ config ARCH_EXYNOS
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_MEMORY_H
+	select SPARSE_IRQ
 	select USE_OF
 	help
 	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)

arch/arm/mach-exynos/include/mach/pm-core.h +1 -0

index dd62559..71e6b89 100644
@@ -70,6 +70,7 @@ static inline void samsung_pm_saved_gpios(void)
 }
 
 /* Compatibility definitions to make plat-samsung/pm.c compile */
+#define IRQ_EINT_BIT(x)		1
 #define s3c_irqwake_intallow	0
 #define s3c_irqwake_eintallow	0

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #26 lore raw

PATCH v2 27/38 ARM: EXYNOS: Remove mach/irqs.h header

Since Exynos now uses CONFIG_SPARSE_IRQ and all remaining users of this header has been fixed, we can safely remove it.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/include/mach/irqs.h | 476 -------------------------------
 1 file changed, 476 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/irqs.h

arch/arm/mach-exynos/include/mach/irqs.h deleted +0 ~~-476~~

deleted file mode 100644
index c72f59d..0000000
@@ -1,476 +0,0 @@
-/*
- * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * EXYNOS - IRQ definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H __FILE__
-
-#include <plat/irqs.h>
-
-/* PPI: Private Peripheral Interrupt */
-
-#define IRQ_PPI(x)			(x + 16)
-
-/* SPI: Shared Peripheral Interrupt */
-
-#define IRQ_SPI(x)			(x + 32)
-
-/* COMBINER */
-
-#define MAX_IRQ_IN_COMBINER		8
-#define COMBINER_GROUP(x)		((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128))
-#define COMBINER_IRQ(x, y)		(COMBINER_GROUP(x) + y)
-
-/* For EXYNOS4 and EXYNOS5 */
-
-#define EXYNOS_IRQ_EINT16_31		IRQ_SPI(32)
-
-/* For EXYNOS4 SoCs */
-
-#define EXYNOS4_IRQ_EINT0		IRQ_SPI(16)
-#define EXYNOS4_IRQ_EINT1		IRQ_SPI(17)
-#define EXYNOS4_IRQ_EINT2		IRQ_SPI(18)
-#define EXYNOS4_IRQ_EINT3		IRQ_SPI(19)
-#define EXYNOS4_IRQ_EINT4		IRQ_SPI(20)
-#define EXYNOS4_IRQ_EINT5		IRQ_SPI(21)
-#define EXYNOS4_IRQ_EINT6		IRQ_SPI(22)
-#define EXYNOS4_IRQ_EINT7		IRQ_SPI(23)
-#define EXYNOS4_IRQ_EINT8		IRQ_SPI(24)
-#define EXYNOS4_IRQ_EINT9		IRQ_SPI(25)
-#define EXYNOS4_IRQ_EINT10		IRQ_SPI(26)
-#define EXYNOS4_IRQ_EINT11		IRQ_SPI(27)
-#define EXYNOS4_IRQ_EINT12		IRQ_SPI(28)
-#define EXYNOS4_IRQ_EINT13		IRQ_SPI(29)
-#define EXYNOS4_IRQ_EINT14		IRQ_SPI(30)
-#define EXYNOS4_IRQ_EINT15		IRQ_SPI(31)
-
-#define EXYNOS4_IRQ_MDMA0		IRQ_SPI(33)
-#define EXYNOS4_IRQ_MDMA1		IRQ_SPI(34)
-#define EXYNOS4_IRQ_PDMA0		IRQ_SPI(35)
-#define EXYNOS4_IRQ_PDMA1		IRQ_SPI(36)
-#define EXYNOS4_IRQ_TIMER0_VIC		IRQ_SPI(37)
-#define EXYNOS4_IRQ_TIMER1_VIC		IRQ_SPI(38)
-#define EXYNOS4_IRQ_TIMER2_VIC		IRQ_SPI(39)
-#define EXYNOS4_IRQ_TIMER3_VIC		IRQ_SPI(40)
-#define EXYNOS4_IRQ_TIMER4_VIC		IRQ_SPI(41)
-#define EXYNOS4_IRQ_MCT_L0		IRQ_SPI(42)
-#define EXYNOS4_IRQ_WDT			IRQ_SPI(43)
-#define EXYNOS4_IRQ_RTC_ALARM		IRQ_SPI(44)
-#define EXYNOS4_IRQ_RTC_TIC		IRQ_SPI(45)
-#define EXYNOS4_IRQ_GPIO_XB		IRQ_SPI(46)
-#define EXYNOS4_IRQ_GPIO_XA		IRQ_SPI(47)
-#define EXYNOS4_IRQ_MCT_L1		IRQ_SPI(48)
-
-#define EXYNOS4_IRQ_UART0		IRQ_SPI(52)
-#define EXYNOS4_IRQ_UART1		IRQ_SPI(53)
-#define EXYNOS4_IRQ_UART2		IRQ_SPI(54)
-#define EXYNOS4_IRQ_UART3		IRQ_SPI(55)
-#define EXYNOS4_IRQ_UART4		IRQ_SPI(56)
-#define EXYNOS4_IRQ_MCT_G0		IRQ_SPI(57)
-#define EXYNOS4_IRQ_IIC			IRQ_SPI(58)
-#define EXYNOS4_IRQ_IIC1		IRQ_SPI(59)
-#define EXYNOS4_IRQ_IIC2		IRQ_SPI(60)
-#define EXYNOS4_IRQ_IIC3		IRQ_SPI(61)
-#define EXYNOS4_IRQ_IIC4		IRQ_SPI(62)
-#define EXYNOS4_IRQ_IIC5		IRQ_SPI(63)
-#define EXYNOS4_IRQ_IIC6		IRQ_SPI(64)
-#define EXYNOS4_IRQ_IIC7		IRQ_SPI(65)
-#define EXYNOS4_IRQ_SPI0		IRQ_SPI(66)
-#define EXYNOS4_IRQ_SPI1		IRQ_SPI(67)
-#define EXYNOS4_IRQ_SPI2		IRQ_SPI(68)
-
-#define EXYNOS4_IRQ_USB_HOST		IRQ_SPI(70)
-#define EXYNOS4_IRQ_USB_HSOTG		IRQ_SPI(71)
-#define EXYNOS4_IRQ_MODEM_IF		IRQ_SPI(72)
-#define EXYNOS4_IRQ_HSMMC0		IRQ_SPI(73)
-#define EXYNOS4_IRQ_HSMMC1		IRQ_SPI(74)
-#define EXYNOS4_IRQ_HSMMC2		IRQ_SPI(75)
-#define EXYNOS4_IRQ_HSMMC3		IRQ_SPI(76)
-#define EXYNOS4_IRQ_DWMCI		IRQ_SPI(77)
-
-#define EXYNOS4_IRQ_MIPI_CSIS0		IRQ_SPI(78)
-#define EXYNOS4_IRQ_MIPI_CSIS1		IRQ_SPI(80)
-
-#define EXYNOS4_IRQ_ONENAND_AUDI	IRQ_SPI(82)
-#define EXYNOS4_IRQ_ROTATOR		IRQ_SPI(83)
-#define EXYNOS4_IRQ_FIMC0		IRQ_SPI(84)
-#define EXYNOS4_IRQ_FIMC1		IRQ_SPI(85)
-#define EXYNOS4_IRQ_FIMC2		IRQ_SPI(86)
-#define EXYNOS4_IRQ_FIMC3		IRQ_SPI(87)
-#define EXYNOS4_IRQ_JPEG		IRQ_SPI(88)
-#define EXYNOS4_IRQ_2D			IRQ_SPI(89)
-#define EXYNOS4_IRQ_PCIE		IRQ_SPI(90)
-
-#define EXYNOS4_IRQ_MIXER		IRQ_SPI(91)
-#define EXYNOS4_IRQ_HDMI		IRQ_SPI(92)
-#define EXYNOS4_IRQ_IIC_HDMIPHY		IRQ_SPI(93)
-#define EXYNOS4_IRQ_MFC			IRQ_SPI(94)
-#define EXYNOS4_IRQ_SDO			IRQ_SPI(95)
-
-#define EXYNOS4_IRQ_AUDIO_SS		IRQ_SPI(96)
-#define EXYNOS4_IRQ_I2S0		IRQ_SPI(97)
-#define EXYNOS4_IRQ_I2S1		IRQ_SPI(98)
-#define EXYNOS4_IRQ_I2S2		IRQ_SPI(99)
-#define EXYNOS4_IRQ_AC97		IRQ_SPI(100)
-
-#define EXYNOS4_IRQ_SPDIF		IRQ_SPI(104)
-#define EXYNOS4_IRQ_ADC0		IRQ_SPI(105)
-#define EXYNOS4_IRQ_PEN0		IRQ_SPI(106)
-#define EXYNOS4_IRQ_ADC1		IRQ_SPI(107)
-#define EXYNOS4_IRQ_PEN1		IRQ_SPI(108)
-#define EXYNOS4_IRQ_KEYPAD		IRQ_SPI(109)
-#define EXYNOS4_IRQ_POWER_PMU		IRQ_SPI(110)
-#define EXYNOS4_IRQ_GPS			IRQ_SPI(111)
-#define EXYNOS4_IRQ_INTFEEDCTRL_SSS	IRQ_SPI(112)
-#define EXYNOS4_IRQ_SLIMBUS		IRQ_SPI(113)
-
-#define EXYNOS4_IRQ_TSI			IRQ_SPI(115)
-#define EXYNOS4_IRQ_SATA		IRQ_SPI(116)
-
-#define EXYNOS4_IRQ_PMU			COMBINER_IRQ(2, 2)
-#define EXYNOS4_IRQ_PMU_CPU1		COMBINER_IRQ(3, 2)
-#define EXYNOS4_IRQ_PMU_CPU2		COMBINER_IRQ(18, 2)
-#define EXYNOS4_IRQ_PMU_CPU3		COMBINER_IRQ(19, 2)
-
-#define EXYNOS4_IRQ_TMU_TRIG0		COMBINER_IRQ(2, 4)
-#define EXYNOS4_IRQ_TMU_TRIG1		COMBINER_IRQ(3, 4)
-
-#define EXYNOS4_IRQ_SYSMMU_MDMA0_0	COMBINER_IRQ(4, 0)
-#define EXYNOS4_IRQ_SYSMMU_SSS_0	COMBINER_IRQ(4, 1)
-#define EXYNOS4_IRQ_SYSMMU_FIMC0_0	COMBINER_IRQ(4, 2)
-#define EXYNOS4_IRQ_SYSMMU_FIMC1_0	COMBINER_IRQ(4, 3)
-#define EXYNOS4_IRQ_SYSMMU_FIMC2_0	COMBINER_IRQ(4, 4)
-#define EXYNOS4_IRQ_SYSMMU_FIMC3_0	COMBINER_IRQ(4, 5)
-#define EXYNOS4_IRQ_SYSMMU_JPEG_0	COMBINER_IRQ(4, 6)
-#define EXYNOS4_IRQ_SYSMMU_2D_0		COMBINER_IRQ(4, 7)
-
-#define EXYNOS4_IRQ_SYSMMU_ROTATOR_0	COMBINER_IRQ(5, 0)
-#define EXYNOS4_IRQ_SYSMMU_MDMA1_0	COMBINER_IRQ(5, 1)
-#define EXYNOS4_IRQ_SYSMMU_LCD0_M0_0	COMBINER_IRQ(5, 2)
-#define EXYNOS4_IRQ_SYSMMU_LCD1_M1_0	COMBINER_IRQ(5, 3)
-#define EXYNOS4_IRQ_SYSMMU_TV_M0_0	COMBINER_IRQ(5, 4)
-#define EXYNOS4_IRQ_SYSMMU_MFC_M0_0	COMBINER_IRQ(5, 5)
-#define EXYNOS4_IRQ_SYSMMU_MFC_M1_0	COMBINER_IRQ(5, 6)
-#define EXYNOS4_IRQ_SYSMMU_PCIE_0	COMBINER_IRQ(5, 7)
-
-#define EXYNOS4_IRQ_SYSMMU_FIMC_LITE0_0	COMBINER_IRQ(16, 0)
-#define EXYNOS4_IRQ_SYSMMU_FIMC_LITE1_0	COMBINER_IRQ(16, 1)
-#define EXYNOS4_IRQ_SYSMMU_FIMC_ISP_0	COMBINER_IRQ(16, 2)
-#define EXYNOS4_IRQ_SYSMMU_FIMC_DRC_0	COMBINER_IRQ(16, 3)
-#define EXYNOS4_IRQ_SYSMMU_FIMC_FD_0	COMBINER_IRQ(16, 4)
-#define EXYNOS4_IRQ_SYSMMU_FIMC_CX_0	COMBINER_IRQ(16, 5)
-
-#define EXYNOS4_IRQ_FIMD0_FIFO		COMBINER_IRQ(11, 0)
-#define EXYNOS4_IRQ_FIMD0_VSYNC		COMBINER_IRQ(11, 1)
-#define EXYNOS4_IRQ_FIMD0_SYSTEM	COMBINER_IRQ(11, 2)
-
-#define EXYNOS4210_MAX_COMBINER_NR	16
-#define EXYNOS4212_MAX_COMBINER_NR	18
-#define EXYNOS4412_MAX_COMBINER_NR	20
-#define EXYNOS4_MAX_COMBINER_NR		EXYNOS4412_MAX_COMBINER_NR
-
-#define EXYNOS4_IRQ_GPIO1_NR_GROUPS	16
-#define EXYNOS4_IRQ_GPIO2_NR_GROUPS	9
-
-/*
- * For Compatibility:
- * the default is for EXYNOS4, and
- * for exynos5, should be re-mapped at function
- */
-
-#define IRQ_TIMER0_VIC			EXYNOS4_IRQ_TIMER0_VIC
-#define IRQ_TIMER1_VIC			EXYNOS4_IRQ_TIMER1_VIC
-#define IRQ_TIMER2_VIC			EXYNOS4_IRQ_TIMER2_VIC
-#define IRQ_TIMER3_VIC			EXYNOS4_IRQ_TIMER3_VIC
-#define IRQ_TIMER4_VIC			EXYNOS4_IRQ_TIMER4_VIC
-
-#define IRQ_WDT				EXYNOS4_IRQ_WDT
-#define IRQ_RTC_ALARM			EXYNOS4_IRQ_RTC_ALARM
-#define IRQ_RTC_TIC			EXYNOS4_IRQ_RTC_TIC
-#define IRQ_GPIO_XB			EXYNOS4_IRQ_GPIO_XB
-#define IRQ_GPIO_XA			EXYNOS4_IRQ_GPIO_XA
-
-#define IRQ_IIC				EXYNOS4_IRQ_IIC
-#define IRQ_IIC1			EXYNOS4_IRQ_IIC1
-#define IRQ_IIC3			EXYNOS4_IRQ_IIC3
-#define IRQ_IIC5			EXYNOS4_IRQ_IIC5
-#define IRQ_IIC6			EXYNOS4_IRQ_IIC6
-#define IRQ_IIC7			EXYNOS4_IRQ_IIC7
-
-#define IRQ_SPI0			EXYNOS4_IRQ_SPI0
-#define IRQ_SPI1			EXYNOS4_IRQ_SPI1
-#define IRQ_SPI2			EXYNOS4_IRQ_SPI2
-
-#define IRQ_USB_HOST			EXYNOS4_IRQ_USB_HOST
-#define IRQ_OTG				EXYNOS4_IRQ_USB_HSOTG
-
-#define IRQ_HSMMC0			EXYNOS4_IRQ_HSMMC0
-#define IRQ_HSMMC1			EXYNOS4_IRQ_HSMMC1
-#define IRQ_HSMMC2			EXYNOS4_IRQ_HSMMC2
-#define IRQ_HSMMC3			EXYNOS4_IRQ_HSMMC3
-
-#define IRQ_MIPI_CSIS0			EXYNOS4_IRQ_MIPI_CSIS0
-
-#define IRQ_ONENAND_AUDI		EXYNOS4_IRQ_ONENAND_AUDI
-
-#define IRQ_FIMC0			EXYNOS4_IRQ_FIMC0
-#define IRQ_FIMC1			EXYNOS4_IRQ_FIMC1
-#define IRQ_FIMC2			EXYNOS4_IRQ_FIMC2
-#define IRQ_FIMC3			EXYNOS4_IRQ_FIMC3
-#define IRQ_JPEG			EXYNOS4_IRQ_JPEG
-#define IRQ_2D				EXYNOS4_IRQ_2D
-
-#define IRQ_MIXER			EXYNOS4_IRQ_MIXER
-#define IRQ_HDMI			EXYNOS4_IRQ_HDMI
-#define IRQ_IIC_HDMIPHY			EXYNOS4_IRQ_IIC_HDMIPHY
-#define IRQ_MFC				EXYNOS4_IRQ_MFC
-#define IRQ_SDO				EXYNOS4_IRQ_SDO
-
-#define IRQ_I2S0			EXYNOS4_IRQ_I2S0
-
-#define IRQ_ADC				EXYNOS4_IRQ_ADC0
-#define IRQ_TC				EXYNOS4_IRQ_PEN0
-
-#define IRQ_KEYPAD			EXYNOS4_IRQ_KEYPAD
-
-#define IRQ_FIMD0_FIFO			EXYNOS4_IRQ_FIMD0_FIFO
-#define IRQ_FIMD0_VSYNC			EXYNOS4_IRQ_FIMD0_VSYNC
-#define IRQ_FIMD0_SYSTEM		EXYNOS4_IRQ_FIMD0_SYSTEM
-
-#define IRQ_GPIO1_NR_GROUPS		EXYNOS4_IRQ_GPIO1_NR_GROUPS
-#define IRQ_GPIO2_NR_GROUPS		EXYNOS4_IRQ_GPIO2_NR_GROUPS
-
-/* For EXYNOS5 SoCs */
-
-#define EXYNOS5_IRQ_MDMA0		IRQ_SPI(33)
-#define EXYNOS5_IRQ_PDMA0		IRQ_SPI(34)
-#define EXYNOS5_IRQ_PDMA1		IRQ_SPI(35)
-#define EXYNOS5_IRQ_TIMER0_VIC		IRQ_SPI(36)
-#define EXYNOS5_IRQ_TIMER1_VIC		IRQ_SPI(37)
-#define EXYNOS5_IRQ_TIMER2_VIC		IRQ_SPI(38)
-#define EXYNOS5_IRQ_TIMER3_VIC		IRQ_SPI(39)
-#define EXYNOS5_IRQ_TIMER4_VIC		IRQ_SPI(40)
-#define EXYNOS5_IRQ_RTIC		IRQ_SPI(41)
-#define EXYNOS5_IRQ_WDT			IRQ_SPI(42)
-#define EXYNOS5_IRQ_RTC_ALARM		IRQ_SPI(43)
-#define EXYNOS5_IRQ_RTC_TIC		IRQ_SPI(44)
-#define EXYNOS5_IRQ_GPIO_XB		IRQ_SPI(45)
-#define EXYNOS5_IRQ_GPIO_XA		IRQ_SPI(46)
-#define EXYNOS5_IRQ_GPIO		IRQ_SPI(47)
-#define EXYNOS5_IRQ_IEM_IEC		IRQ_SPI(48)
-#define EXYNOS5_IRQ_IEM_APC		IRQ_SPI(49)
-#define EXYNOS5_IRQ_GPIO_C2C		IRQ_SPI(50)
-#define EXYNOS5_IRQ_IIC			IRQ_SPI(56)
-#define EXYNOS5_IRQ_IIC1		IRQ_SPI(57)
-#define EXYNOS5_IRQ_IIC2		IRQ_SPI(58)
-#define EXYNOS5_IRQ_IIC3		IRQ_SPI(59)
-#define EXYNOS5_IRQ_IIC4		IRQ_SPI(60)
-#define EXYNOS5_IRQ_IIC5		IRQ_SPI(61)
-#define EXYNOS5_IRQ_IIC6		IRQ_SPI(62)
-#define EXYNOS5_IRQ_IIC7		IRQ_SPI(63)
-#define EXYNOS5_IRQ_IIC_HDMIPHY		IRQ_SPI(64)
-#define EXYNOS5_IRQ_TMU			IRQ_SPI(65)
-#define EXYNOS5_IRQ_FIQ_0		IRQ_SPI(66)
-#define EXYNOS5_IRQ_FIQ_1		IRQ_SPI(67)
-#define EXYNOS5_IRQ_SPI0		IRQ_SPI(68)
-#define EXYNOS5_IRQ_SPI1		IRQ_SPI(69)
-#define EXYNOS5_IRQ_SPI2		IRQ_SPI(70)
-#define EXYNOS5_IRQ_USB_HOST		IRQ_SPI(71)
-#define EXYNOS5_IRQ_USB3_DRD		IRQ_SPI(72)
-#define EXYNOS5_IRQ_MIPI_HSI		IRQ_SPI(73)
-#define EXYNOS5_IRQ_USB_HSOTG		IRQ_SPI(74)
-#define EXYNOS5_IRQ_HSMMC0		IRQ_SPI(75)
-#define EXYNOS5_IRQ_HSMMC1		IRQ_SPI(76)
-#define EXYNOS5_IRQ_HSMMC2		IRQ_SPI(77)
-#define EXYNOS5_IRQ_HSMMC3		IRQ_SPI(78)
-#define EXYNOS5_IRQ_MIPICSI0		IRQ_SPI(79)
-#define EXYNOS5_IRQ_MIPICSI1		IRQ_SPI(80)
-#define EXYNOS5_IRQ_EFNFCON_DMA_ABORT	IRQ_SPI(81)
-#define EXYNOS5_IRQ_MIPIDSI0		IRQ_SPI(82)
-#define EXYNOS5_IRQ_WDT_IOP		IRQ_SPI(83)
-#define EXYNOS5_IRQ_ROTATOR		IRQ_SPI(84)
-#define EXYNOS5_IRQ_GSC0		IRQ_SPI(85)
-#define EXYNOS5_IRQ_GSC1		IRQ_SPI(86)
-#define EXYNOS5_IRQ_GSC2		IRQ_SPI(87)
-#define EXYNOS5_IRQ_GSC3		IRQ_SPI(88)
-#define EXYNOS5_IRQ_JPEG		IRQ_SPI(89)
-#define EXYNOS5_IRQ_EFNFCON_DMA		IRQ_SPI(90)
-#define EXYNOS5_IRQ_2D			IRQ_SPI(91)
-#define EXYNOS5_IRQ_EFNFCON_0		IRQ_SPI(92)
-#define EXYNOS5_IRQ_EFNFCON_1		IRQ_SPI(93)
-#define EXYNOS5_IRQ_MIXER		IRQ_SPI(94)
-#define EXYNOS5_IRQ_HDMI		IRQ_SPI(95)
-#define EXYNOS5_IRQ_MFC			IRQ_SPI(96)
-#define EXYNOS5_IRQ_AUDIO_SS		IRQ_SPI(97)
-#define EXYNOS5_IRQ_I2S0		IRQ_SPI(98)
-#define EXYNOS5_IRQ_I2S1		IRQ_SPI(99)
-#define EXYNOS5_IRQ_I2S2		IRQ_SPI(100)
-#define EXYNOS5_IRQ_AC97		IRQ_SPI(101)
-#define EXYNOS5_IRQ_PCM0		IRQ_SPI(102)
-#define EXYNOS5_IRQ_PCM1		IRQ_SPI(103)
-#define EXYNOS5_IRQ_PCM2		IRQ_SPI(104)
-#define EXYNOS5_IRQ_SPDIF		IRQ_SPI(105)
-#define EXYNOS5_IRQ_ADC0		IRQ_SPI(106)
-#define EXYNOS5_IRQ_ADC1		IRQ_SPI(107)
-#define EXYNOS5_IRQ_SATA_PHY		IRQ_SPI(108)
-#define EXYNOS5_IRQ_SATA_PMEMREQ	IRQ_SPI(109)
-#define EXYNOS5_IRQ_CAM_C		IRQ_SPI(110)
-#define EXYNOS5_IRQ_EAGLE_PMU		IRQ_SPI(111)
-#define EXYNOS5_IRQ_INTFEEDCTRL_SSS	IRQ_SPI(112)
-#define EXYNOS5_IRQ_DP1_INTP1		IRQ_SPI(113)
-#define EXYNOS5_IRQ_CEC			IRQ_SPI(114)
-#define EXYNOS5_IRQ_SATA		IRQ_SPI(115)
-
-#define EXYNOS5_IRQ_MMC44		IRQ_SPI(123)
-#define EXYNOS5_IRQ_MDMA1		IRQ_SPI(124)
-#define EXYNOS5_IRQ_FIMC_LITE0		IRQ_SPI(125)
-#define EXYNOS5_IRQ_FIMC_LITE1		IRQ_SPI(126)
-#define EXYNOS5_IRQ_RP_TIMER		IRQ_SPI(127)
-
-/* EXYNOS5440 */
-
-#define EXYNOS5440_IRQ_UART0		IRQ_SPI(2)
-#define EXYNOS5440_IRQ_UART1		IRQ_SPI(3)
-
-#define EXYNOS5_IRQ_PMU			COMBINER_IRQ(1, 2)
-
-#define EXYNOS5_IRQ_SYSMMU_GSC0_0	COMBINER_IRQ(2, 0)
-#define EXYNOS5_IRQ_SYSMMU_GSC0_1	COMBINER_IRQ(2, 1)
-#define EXYNOS5_IRQ_SYSMMU_GSC1_0	COMBINER_IRQ(2, 2)
-#define EXYNOS5_IRQ_SYSMMU_GSC1_1	COMBINER_IRQ(2, 3)
-#define EXYNOS5_IRQ_SYSMMU_GSC2_0	COMBINER_IRQ(2, 4)
-#define EXYNOS5_IRQ_SYSMMU_GSC2_1	COMBINER_IRQ(2, 5)
-#define EXYNOS5_IRQ_SYSMMU_GSC3_0	COMBINER_IRQ(2, 6)
-#define EXYNOS5_IRQ_SYSMMU_GSC3_1	COMBINER_IRQ(2, 7)
-
-#define EXYNOS5_IRQ_SYSMMU_LITE2_0	COMBINER_IRQ(3, 0)
-#define EXYNOS5_IRQ_SYSMMU_LITE2_1	COMBINER_IRQ(3, 1)
-#define EXYNOS5_IRQ_SYSMMU_FIMD1_0	COMBINER_IRQ(3, 2)
-#define EXYNOS5_IRQ_SYSMMU_FIMD1_1	COMBINER_IRQ(3, 3)
-#define EXYNOS5_IRQ_SYSMMU_LITE0_0	COMBINER_IRQ(3, 4)
-#define EXYNOS5_IRQ_SYSMMU_LITE0_1	COMBINER_IRQ(3, 5)
-#define EXYNOS5_IRQ_SYSMMU_SCALERPISP_0	COMBINER_IRQ(3, 6)
-#define EXYNOS5_IRQ_SYSMMU_SCALERPISP_1	COMBINER_IRQ(3, 7)
-
-#define EXYNOS5_IRQ_SYSMMU_ROTATOR_0	COMBINER_IRQ(4, 0)
-#define EXYNOS5_IRQ_SYSMMU_ROTATOR_1	COMBINER_IRQ(4, 1)
-#define EXYNOS5_IRQ_SYSMMU_JPEG_0	COMBINER_IRQ(4, 2)
-#define EXYNOS5_IRQ_SYSMMU_JPEG_1	COMBINER_IRQ(4, 3)
-
-#define EXYNOS5_IRQ_SYSMMU_FD_0		COMBINER_IRQ(5, 0)
-#define EXYNOS5_IRQ_SYSMMU_FD_1		COMBINER_IRQ(5, 1)
-#define EXYNOS5_IRQ_SYSMMU_SCALERCISP_0	COMBINER_IRQ(5, 2)
-#define EXYNOS5_IRQ_SYSMMU_SCALERCISP_1	COMBINER_IRQ(5, 3)
-#define EXYNOS5_IRQ_SYSMMU_MCUISP_0	COMBINER_IRQ(5, 4)
-#define EXYNOS5_IRQ_SYSMMU_MCUISP_1	COMBINER_IRQ(5, 5)
-#define EXYNOS5_IRQ_SYSMMU_3DNR_0	COMBINER_IRQ(5, 6)
-#define EXYNOS5_IRQ_SYSMMU_3DNR_1	COMBINER_IRQ(5, 7)
-
-#define EXYNOS5_IRQ_SYSMMU_ARM_0	COMBINER_IRQ(6, 0)
-#define EXYNOS5_IRQ_SYSMMU_ARM_1	COMBINER_IRQ(6, 1)
-#define EXYNOS5_IRQ_SYSMMU_MFC_R_0	COMBINER_IRQ(6, 2)
-#define EXYNOS5_IRQ_SYSMMU_MFC_R_1	COMBINER_IRQ(6, 3)
-#define EXYNOS5_IRQ_SYSMMU_RTIC_0	COMBINER_IRQ(6, 4)
-#define EXYNOS5_IRQ_SYSMMU_RTIC_1	COMBINER_IRQ(6, 5)
-#define EXYNOS5_IRQ_SYSMMU_SSS_0	COMBINER_IRQ(6, 6)
-#define EXYNOS5_IRQ_SYSMMU_SSS_1	COMBINER_IRQ(6, 7)
-
-#define EXYNOS5_IRQ_SYSMMU_MDMA0_0	COMBINER_IRQ(7, 0)
-#define EXYNOS5_IRQ_SYSMMU_MDMA0_1	COMBINER_IRQ(7, 1)
-#define EXYNOS5_IRQ_SYSMMU_MDMA1_0	COMBINER_IRQ(7, 2)
-#define EXYNOS5_IRQ_SYSMMU_MDMA1_1	COMBINER_IRQ(7, 3)
-#define EXYNOS5_IRQ_SYSMMU_TV_0		COMBINER_IRQ(7, 4)
-#define EXYNOS5_IRQ_SYSMMU_TV_1		COMBINER_IRQ(7, 5)
-
-#define EXYNOS5_IRQ_SYSMMU_MFC_L_0	COMBINER_IRQ(8, 5)
-#define EXYNOS5_IRQ_SYSMMU_MFC_L_1	COMBINER_IRQ(8, 6)
-
-#define EXYNOS5_IRQ_SYSMMU_DIS1_0	COMBINER_IRQ(9, 4)
-#define EXYNOS5_IRQ_SYSMMU_DIS1_1	COMBINER_IRQ(9, 5)
-
-#define EXYNOS5_IRQ_DP			COMBINER_IRQ(10, 3)
-#define EXYNOS5_IRQ_SYSMMU_DIS0_0	COMBINER_IRQ(10, 4)
-#define EXYNOS5_IRQ_SYSMMU_DIS0_1	COMBINER_IRQ(10, 5)
-#define EXYNOS5_IRQ_SYSMMU_ISP_0	COMBINER_IRQ(10, 6)
-#define EXYNOS5_IRQ_SYSMMU_ISP_1	COMBINER_IRQ(10, 7)
-
-#define EXYNOS5_IRQ_SYSMMU_ODC_0	COMBINER_IRQ(11, 0)
-#define EXYNOS5_IRQ_SYSMMU_ODC_1	COMBINER_IRQ(11, 1)
-#define EXYNOS5_IRQ_SYSMMU_DRC_0	COMBINER_IRQ(11, 6)
-#define EXYNOS5_IRQ_SYSMMU_DRC_1	COMBINER_IRQ(11, 7)
-
-#define EXYNOS5_IRQ_MDMA1_ABORT		COMBINER_IRQ(13, 1)
-
-#define EXYNOS5_IRQ_MDMA0_ABORT		COMBINER_IRQ(15, 3)
-
-#define EXYNOS5_IRQ_FIMD1_FIFO		COMBINER_IRQ(18, 4)
-#define EXYNOS5_IRQ_FIMD1_VSYNC		COMBINER_IRQ(18, 5)
-#define EXYNOS5_IRQ_FIMD1_SYSTEM	COMBINER_IRQ(18, 6)
-
-#define EXYNOS5_IRQ_ARMIOP_GIC		COMBINER_IRQ(19, 0)
-#define EXYNOS5_IRQ_ARMISP_GIC		COMBINER_IRQ(19, 1)
-#define EXYNOS5_IRQ_IOP_GIC		COMBINER_IRQ(19, 3)
-#define EXYNOS5_IRQ_ISP_GIC		COMBINER_IRQ(19, 4)
-
-#define EXYNOS5_IRQ_PMU_CPU1		COMBINER_IRQ(22, 4)
-
-#define EXYNOS5_IRQ_EINT0		COMBINER_IRQ(23, 0)
-
-#define EXYNOS5_IRQ_EINT1		COMBINER_IRQ(24, 0)
-#define EXYNOS5_IRQ_SYSMMU_LITE1_0	COMBINER_IRQ(24, 1)
-#define EXYNOS5_IRQ_SYSMMU_LITE1_1	COMBINER_IRQ(24, 2)
-#define EXYNOS5_IRQ_SYSMMU_2D_0		COMBINER_IRQ(24, 5)
-#define EXYNOS5_IRQ_SYSMMU_2D_1		COMBINER_IRQ(24, 6)
-
-#define EXYNOS5_IRQ_EINT2		COMBINER_IRQ(25, 0)
-#define EXYNOS5_IRQ_EINT3		COMBINER_IRQ(25, 1)
-
-#define EXYNOS5_IRQ_EINT4		COMBINER_IRQ(26, 0)
-#define EXYNOS5_IRQ_EINT5		COMBINER_IRQ(26, 1)
-
-#define EXYNOS5_IRQ_EINT6		COMBINER_IRQ(27, 0)
-#define EXYNOS5_IRQ_EINT7		COMBINER_IRQ(27, 1)
-
-#define EXYNOS5_IRQ_EINT8		COMBINER_IRQ(28, 0)
-#define EXYNOS5_IRQ_EINT9		COMBINER_IRQ(28, 1)
-
-#define EXYNOS5_IRQ_EINT10		COMBINER_IRQ(29, 0)
-#define EXYNOS5_IRQ_EINT11		COMBINER_IRQ(29, 1)
-
-#define EXYNOS5_IRQ_EINT12		COMBINER_IRQ(30, 0)
-#define EXYNOS5_IRQ_EINT13		COMBINER_IRQ(30, 1)
-
-#define EXYNOS5_IRQ_EINT14		COMBINER_IRQ(31, 0)
-#define EXYNOS5_IRQ_EINT15		COMBINER_IRQ(31, 1)
-
-#define EXYNOS5_MAX_COMBINER_NR		32
-
-#define EXYNOS5_IRQ_GPIO1_NR_GROUPS	14
-#define EXYNOS5_IRQ_GPIO2_NR_GROUPS	9
-#define EXYNOS5_IRQ_GPIO3_NR_GROUPS	5
-#define EXYNOS5_IRQ_GPIO4_NR_GROUPS	1
-
-#define MAX_COMBINER_NR			(EXYNOS4_MAX_COMBINER_NR > EXYNOS5_MAX_COMBINER_NR ? \
-					EXYNOS4_MAX_COMBINER_NR : EXYNOS5_MAX_COMBINER_NR)
-
-#define S5P_EINT_BASE1			COMBINER_IRQ(MAX_COMBINER_NR, 0)
-#define S5P_EINT_BASE2			(S5P_EINT_BASE1 + 16)
-#define S5P_GPIOINT_BASE		(S5P_EINT_BASE1 + 32)
-#define IRQ_GPIO_END			(S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
-#define IRQ_TIMER_BASE			(IRQ_GPIO_END + 64)
-
-/* Set the default NR_IRQS */
-#define EXYNOS_NR_IRQS			(IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
-
-#ifndef CONFIG_SPARSE_IRQ
-#define NR_IRQS				EXYNOS_NR_IRQS
-#endif
-
-#endif /* __ASM_ARCH_IRQS_H */

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #27 lore raw

PATCH v2 28/38 ARM: EXYNOS: Remove unused base addresses from mach/map.h header

This patch removes all the unused base addresses from mach/map.h header, leaving only addresses of IPs that currently use static IO mapping or need the address hardcoded, like low level debug UART.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/include/mach/map.h | 218 +-------------------------------
 1 file changed, 4 insertions(+), 214 deletions(-)

arch/arm/mach-exynos/include/mach/map.h +4 ~~-214~~

index 92b29bb..7966407 100644
@@ -23,6 +23,10 @@
 
 #include <plat/map-s5p.h>
 
+/*
+ * FIXME: go through the list and remove from iotable
+ * all that are not essential
+ */
 #define EXYNOS4_PA_SYSRAM0		0x02025000
 #define EXYNOS4_PA_SYSRAM1		0x02020000
 #define EXYNOS5_PA_SYSRAM		0x02020000

@@ -30,31 +34,6 @@
 #define EXYNOS4x12_PA_SYSRAM_NS		0x0204F000
 #define EXYNOS5250_PA_SYSRAM_NS		0x0204F000
 
-#define EXYNOS4_PA_FIMC0		0x11800000
-#define EXYNOS4_PA_FIMC1		0x11810000
-#define EXYNOS4_PA_FIMC2		0x11820000
-#define EXYNOS4_PA_FIMC3		0x11830000
-
-#define EXYNOS4_PA_JPEG			0x11840000
-
-/* x = 0...1 */
-#define EXYNOS4_PA_FIMC_LITE(x)		(0x12390000 + ((x) * 0x10000))
-
-#define EXYNOS4_PA_G2D			0x12800000
-
-#define EXYNOS4_PA_I2S0			0x03830000
-#define EXYNOS4_PA_I2S1			0xE3100000
-#define EXYNOS4_PA_I2S2			0xE2A00000
-
-#define EXYNOS4_PA_PCM0			0x03840000
-#define EXYNOS4_PA_PCM1			0x13980000
-#define EXYNOS4_PA_PCM2			0x13990000
-
-#define EXYNOS4_PA_SROM_BANK(x)		(0x04000000 + ((x) * 0x01000000))
-
-#define EXYNOS4_PA_ONENAND		0x0C000000
-#define EXYNOS4_PA_ONENAND_DMA		0x0C600000
-
 #define EXYNOS_PA_CHIPID		0x10000000
 
 #define EXYNOS4_PA_SYSCON		0x10010000

@@ -71,10 +50,6 @@
 #define EXYNOS4_PA_WATCHDOG		0x10060000
 #define EXYNOS5_PA_WATCHDOG		0x101D0000
 
-#define EXYNOS4_PA_RTC			0x10070000
-
-#define EXYNOS4_PA_KEYPAD		0x100A0000
-
 #define EXYNOS4_PA_DMC0			0x10400000
 #define EXYNOS4_PA_DMC1			0x10410000

@@ -87,207 +62,22 @@
 #define EXYNOS5_PA_GIC_DIST		0x10481000
 
 #define EXYNOS4_PA_COREPERI		0x10500000
-#define EXYNOS4_PA_TWD			0x10500600
 #define EXYNOS4_PA_L2CC			0x10502000
 
-#define EXYNOS4_PA_TMU			0x100C0000
-
-#define EXYNOS4_PA_MDMA0		0x10810000
-#define EXYNOS4_PA_MDMA1		0x12850000
-#define EXYNOS4_PA_S_MDMA1		0x12840000
-#define EXYNOS4_PA_PDMA0		0x12680000
-#define EXYNOS4_PA_PDMA1		0x12690000
-#define EXYNOS5_PA_MDMA0		0x10800000
-#define EXYNOS5_PA_MDMA1		0x11C10000
-#define EXYNOS5_PA_PDMA0		0x121A0000
-#define EXYNOS5_PA_PDMA1		0x121B0000
-
-#define EXYNOS4_PA_SYSMMU_MDMA		0x10A40000
-#define EXYNOS4_PA_SYSMMU_2D_ACP	0x10A40000
-#define EXYNOS4_PA_SYSMMU_SSS		0x10A50000
-#define EXYNOS4_PA_SYSMMU_FIMC0		0x11A20000
-#define EXYNOS4_PA_SYSMMU_FIMC1		0x11A30000
-#define EXYNOS4_PA_SYSMMU_FIMC2		0x11A40000
-#define EXYNOS4_PA_SYSMMU_FIMC3		0x11A50000
-#define EXYNOS4_PA_SYSMMU_JPEG		0x11A60000
-#define EXYNOS4_PA_SYSMMU_FIMD0		0x11E20000
-#define EXYNOS4_PA_SYSMMU_FIMD1		0x12220000
-#define EXYNOS4_PA_SYSMMU_FIMC_ISP	0x12260000
-#define EXYNOS4_PA_SYSMMU_FIMC_DRC	0x12270000
-#define EXYNOS4_PA_SYSMMU_FIMC_FD	0x122A0000
-#define EXYNOS4_PA_SYSMMU_ISPCPU	0x122B0000
-#define EXYNOS4_PA_SYSMMU_FIMC_LITE0	0x123B0000
-#define EXYNOS4_PA_SYSMMU_FIMC_LITE1	0x123C0000
-#define EXYNOS4_PA_SYSMMU_PCIe		0x12620000
-#define EXYNOS4_PA_SYSMMU_G2D		0x12A20000
-#define EXYNOS4_PA_SYSMMU_ROTATOR	0x12A30000
-#define EXYNOS4_PA_SYSMMU_MDMA2		0x12A40000
-#define EXYNOS4_PA_SYSMMU_TV		0x12E20000
-#define EXYNOS4_PA_SYSMMU_MFC_L		0x13620000
-#define EXYNOS4_PA_SYSMMU_MFC_R		0x13630000
-
-#define EXYNOS5_PA_GSC0			0x13E00000
-#define EXYNOS5_PA_GSC1			0x13E10000
-#define EXYNOS5_PA_GSC2			0x13E20000
-#define EXYNOS5_PA_GSC3			0x13E30000
-
-#define EXYNOS5_PA_SYSMMU_MDMA1		0x10A40000
-#define EXYNOS5_PA_SYSMMU_SSS		0x10A50000
-#define EXYNOS5_PA_SYSMMU_2D		0x10A60000
-#define EXYNOS5_PA_SYSMMU_MFC_L		0x11200000
-#define EXYNOS5_PA_SYSMMU_MFC_R		0x11210000
-#define EXYNOS5_PA_SYSMMU_ROTATOR	0x11D40000
-#define EXYNOS5_PA_SYSMMU_MDMA2		0x11D50000
-#define EXYNOS5_PA_SYSMMU_JPEG		0x11F20000
-#define EXYNOS5_PA_SYSMMU_IOP		0x12360000
-#define EXYNOS5_PA_SYSMMU_RTIC		0x12370000
-#define EXYNOS5_PA_SYSMMU_ISP		0x13260000
-#define EXYNOS5_PA_SYSMMU_DRC		0x12370000
-#define EXYNOS5_PA_SYSMMU_SCALERC	0x13280000
-#define EXYNOS5_PA_SYSMMU_SCALERP	0x13290000
-#define EXYNOS5_PA_SYSMMU_FD		0x132A0000
-#define EXYNOS5_PA_SYSMMU_ISPCPU	0x132B0000
-#define EXYNOS5_PA_SYSMMU_ODC		0x132C0000
-#define EXYNOS5_PA_SYSMMU_DIS0		0x132D0000
-#define EXYNOS5_PA_SYSMMU_DIS1		0x132E0000
-#define EXYNOS5_PA_SYSMMU_3DNR		0x132F0000
-#define EXYNOS5_PA_SYSMMU_LITE0		0x13C40000
-#define EXYNOS5_PA_SYSMMU_LITE1		0x13C50000
-#define EXYNOS5_PA_SYSMMU_GSC0		0x13E80000
-#define EXYNOS5_PA_SYSMMU_GSC1		0x13E90000
-#define EXYNOS5_PA_SYSMMU_GSC2		0x13EA0000
-#define EXYNOS5_PA_SYSMMU_GSC3		0x13EB0000
-#define EXYNOS5_PA_SYSMMU_FIMD1		0x14640000
-#define EXYNOS5_PA_SYSMMU_TV		0x14650000
-
-#define EXYNOS4_PA_SPI0			0x13920000
-#define EXYNOS4_PA_SPI1			0x13930000
-#define EXYNOS4_PA_SPI2			0x13940000
-#define EXYNOS5_PA_SPI0			0x12D20000
-#define EXYNOS5_PA_SPI1			0x12D30000
-#define EXYNOS5_PA_SPI2			0x12D40000
-
-#define EXYNOS4_PA_GPIO1		0x11400000
-#define EXYNOS4_PA_GPIO2		0x11000000
-#define EXYNOS4_PA_GPIO3		0x03860000
-#define EXYNOS5_PA_GPIO1		0x11400000
-#define EXYNOS5_PA_GPIO2		0x13400000
-#define EXYNOS5_PA_GPIO3		0x10D10000
-#define EXYNOS5_PA_GPIO4		0x03860000
-
-#define EXYNOS4_PA_MIPI_CSIS0		0x11880000
-#define EXYNOS4_PA_MIPI_CSIS1		0x11890000
-
-#define EXYNOS4_PA_FIMD0		0x11C00000
-
-#define EXYNOS4_PA_HSMMC(x)		(0x12510000 + ((x) * 0x10000))
-#define EXYNOS4_PA_DWMCI		0x12550000
-#define EXYNOS5_PA_DWMCI0		0x12200000
-#define EXYNOS5_PA_DWMCI1		0x12210000
-#define EXYNOS5_PA_DWMCI2		0x12220000
-#define EXYNOS5_PA_DWMCI3		0x12230000
-
-#define EXYNOS4_PA_HSOTG		0x12480000
-#define EXYNOS4_PA_USB_HSPHY		0x125B0000
-
-#define EXYNOS4_PA_SATA			0x12560000
-#define EXYNOS4_PA_SATAPHY		0x125D0000
-#define EXYNOS4_PA_SATAPHY_CTRL		0x126B0000
-
 #define EXYNOS4_PA_SROMC		0x12570000
 #define EXYNOS5_PA_SROMC		0x12250000
 
-#define EXYNOS4_PA_EHCI			0x12580000
-#define EXYNOS4_PA_OHCI			0x12590000
 #define EXYNOS4_PA_HSPHY		0x125B0000
-#define EXYNOS4_PA_MFC			0x13400000
 
 #define EXYNOS4_PA_UART			0x13800000
 #define EXYNOS5_PA_UART			0x12C00000
 
-#define EXYNOS4_PA_VP			0x12C00000
-#define EXYNOS4_PA_MIXER		0x12C10000
-#define EXYNOS4_PA_SDO			0x12C20000
-#define EXYNOS4_PA_HDMI			0x12D00000
-#define EXYNOS4_PA_IIC_HDMIPHY		0x138E0000
-
-#define EXYNOS4_PA_IIC(x)		(0x13860000 + ((x) * 0x10000))
-#define EXYNOS5_PA_IIC(x)		(0x12C60000 + ((x) * 0x10000))
-
-#define EXYNOS4_PA_ADC			0x13910000
-#define EXYNOS4_PA_ADC1			0x13911000
-
-#define EXYNOS4_PA_AC97			0x139A0000
-
-#define EXYNOS4_PA_SPDIF		0x139B0000
-
 #define EXYNOS4_PA_TIMER		0x139D0000
 #define EXYNOS5_PA_TIMER		0x12DD0000
 
-#define EXYNOS4_PA_SDRAM		0x40000000
-#define EXYNOS5_PA_SDRAM		0x40000000
-
-/* Compatibiltiy Defines */
-
-#define S3C_PA_HSMMC0			EXYNOS4_PA_HSMMC(0)
-#define S3C_PA_HSMMC1			EXYNOS4_PA_HSMMC(1)
-#define S3C_PA_HSMMC2			EXYNOS4_PA_HSMMC(2)
-#define S3C_PA_HSMMC3			EXYNOS4_PA_HSMMC(3)
-#define S3C_PA_IIC			EXYNOS4_PA_IIC(0)
-#define S3C_PA_IIC1			EXYNOS4_PA_IIC(1)
-#define S3C_PA_IIC2			EXYNOS4_PA_IIC(2)
-#define S3C_PA_IIC3			EXYNOS4_PA_IIC(3)
-#define S3C_PA_IIC4			EXYNOS4_PA_IIC(4)
-#define S3C_PA_IIC5			EXYNOS4_PA_IIC(5)
-#define S3C_PA_IIC6			EXYNOS4_PA_IIC(6)
-#define S3C_PA_IIC7			EXYNOS4_PA_IIC(7)
-#define S3C_PA_RTC			EXYNOS4_PA_RTC
-#define S3C_PA_WDT			EXYNOS4_PA_WATCHDOG
-#define S3C_PA_SPI0			EXYNOS4_PA_SPI0
-#define S3C_PA_SPI1			EXYNOS4_PA_SPI1
-#define S3C_PA_SPI2			EXYNOS4_PA_SPI2
-#define S3C_PA_USB_HSOTG		EXYNOS4_PA_HSOTG
-
-#define S5P_PA_EHCI			EXYNOS4_PA_EHCI
-#define S5P_PA_FIMC0			EXYNOS4_PA_FIMC0
-#define S5P_PA_FIMC1			EXYNOS4_PA_FIMC1
-#define S5P_PA_FIMC2			EXYNOS4_PA_FIMC2
-#define S5P_PA_FIMC3			EXYNOS4_PA_FIMC3
-#define S5P_PA_JPEG			EXYNOS4_PA_JPEG
-#define S5P_PA_G2D			EXYNOS4_PA_G2D
-#define S5P_PA_FIMD0			EXYNOS4_PA_FIMD0
-#define S5P_PA_HDMI			EXYNOS4_PA_HDMI
-#define S5P_PA_IIC_HDMIPHY		EXYNOS4_PA_IIC_HDMIPHY
-#define S5P_PA_MFC			EXYNOS4_PA_MFC
-#define S5P_PA_MIPI_CSIS0		EXYNOS4_PA_MIPI_CSIS0
-#define S5P_PA_MIPI_CSIS1		EXYNOS4_PA_MIPI_CSIS1
-#define S5P_PA_MIXER			EXYNOS4_PA_MIXER
-#define S5P_PA_ONENAND			EXYNOS4_PA_ONENAND
-#define S5P_PA_ONENAND_DMA		EXYNOS4_PA_ONENAND_DMA
-#define S5P_PA_SDO			EXYNOS4_PA_SDO
-#define S5P_PA_SDRAM			EXYNOS4_PA_SDRAM
-#define S5P_PA_VP			EXYNOS4_PA_VP
-
-#define SAMSUNG_PA_ADC			EXYNOS4_PA_ADC
-#define SAMSUNG_PA_ADC1			EXYNOS4_PA_ADC1
-#define SAMSUNG_PA_KEYPAD		EXYNOS4_PA_KEYPAD
-
 /* Compatibility UART */
 
-#define EXYNOS4_PA_UART0		0x13800000
-#define EXYNOS4_PA_UART1		0x13810000
-#define EXYNOS4_PA_UART2		0x13820000
-#define EXYNOS4_PA_UART3		0x13830000
-#define EXYNOS4_SZ_UART			SZ_256
-
-#define EXYNOS5_PA_UART0		0x12C00000
-#define EXYNOS5_PA_UART1		0x12C10000
-#define EXYNOS5_PA_UART2		0x12C20000
-#define EXYNOS5_PA_UART3		0x12C30000
-
 #define EXYNOS5440_PA_UART0		0x000B0000
-#define EXYNOS5440_PA_UART1		0x000C0000
-#define EXYNOS5440_SZ_UART		SZ_256
 
 #define S3C_VA_UARTx(x)			(S3C_VA_UART + ((x) * S3C_UART_OFFSET))

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #28 lore raw

PATCH v2 29/38 thermal: exynos: Support both Exynos4x12 SoCs

Exynos4212 and Exynos4412 have the same thermal block, so there is no reason to include support only for Exynos4412 in this driver.

Cc linux-pm at vger.kernel.org

Cc Zhang Rui <[email protected]>

Cc Eduardo Valentin <[email protected]>

Signed-off-by Tomasz Figa <[email protected]>

In reply to Eduardo Valentin

---
 drivers/thermal/exynos_thermal.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

drivers/thermal/exynos_thermal.c +2 -1

index 788b1dd..4cbe3ee 100644
@@ -817,7 +817,8 @@ static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
 #define EXYNOS4210_TMU_DRV_DATA (NULL)
 #endif
 
-#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
+#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412) || \
+	defined(CONFIG_SOC_EXYNOS4212)
 static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
 	.threshold_falling = 10,
 	.trigger_levels[0] = 85,

Signature · 1 line

1.8.2.1

Arnd Bergmann

2013-06-17 19:59 UTC #29 lore raw

PATCH v2 29/38 thermal: exynos: Support both Exynos4x12 SoCs

Quoted 5 lines · Tomasz Figa

drivers/thermal/exynos_thermal.c +0 -0
index 788b1dd..4cbe3ee 100644

drivers/thermal/exynos_thermal.c static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = { · line 824

Quoted 9 lines

drivers/thermal/exynos_thermal.c +2 -1

@@ -817,7 +817,8 @@ static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
 #define EXYNOS4210_TMU_DRV_DATA (NULL)
 #endif
 
-#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
+#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412) || \
+       defined(CONFIG_SOC_EXYNOS4212)
 static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
        .threshold_falling = 10,
        .trigger_levels[0] = 85,

The patch is correct, but generally speaking I think we should get away from having the drivers get configured per SoC on such a fine-grained level. Better make this driver (and others) always work on all exynos variants.

Arnd

Eduardo Valentin

2013-06-17 23:34 UTC #30 lore raw

PATCH v2 29/38 thermal: exynos: Support both Exynos4x12 SoCs

Arnd,

Quoted 9 lines · Arnd Bergmann

Quoted 8 lines · Tomasz Figa

drivers/thermal/exynos_thermal.c +0 -0

index 788b1dd..4cbe3ee 100644
@@ -817,7 +817,8 @@ static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
 #define EXYNOS4210_TMU_DRV_DATA (NULL)
 #endif

Quoted 10 lines

drivers/thermal/exynos_thermal.c static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = { · line 824
Quoted 6 lines
drivers/thermal/exynos_thermal.c +2 -1
-#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
+#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412) || \
+       defined(CONFIG_SOC_EXYNOS4212)
 static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
        .threshold_falling = 10,
        .trigger_levels[0] = 85,
The patch is correct, but generally speaking I think we should get away from having the drivers get configured per SoC on such a fine-grained level. Better make this driver (and others) always work on all exynos variants.

Amit, correct if I am wrong, but:

The driver will work on supported exynos variants. Those that have the need for thermal sensing. And each of them have specific thermal needs (trigger points, thresholds, etc). That is what this file tries to isolate. And there is specific data structures for each soc version.

Quoted 4 lines

Arnd

Signature · 11 lines

You have got to be excited about what you are doing. (L. Lamport)

Eduardo Valentin

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amit daniel kachhap

2013-06-18 08:54 UTC #31 lore raw

PATCH v2 29/38 thermal: exynos: Support both Exynos4x12 SoCs

Hi Eduardo,

Quoted 23 lines · Eduardo Valentin

Arnd,
Quoted 9 lines · Arnd Bergmann
Quoted 8 lines · Tomasz Figa
drivers/thermal/exynos_thermal.c +0 -0
index 788b1dd..4cbe3ee 100644
@@ -817,7 +817,8 @@ static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
 #define EXYNOS4210_TMU_DRV_DATA (NULL)
 #endif
 
Quoted 10 lines
drivers/thermal/exynos_thermal.c static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = { · line 824
Quoted 6 lines
drivers/thermal/exynos_thermal.c +2 -1
-#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
+#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412) || \
+       defined(CONFIG_SOC_EXYNOS4212)
 static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
        .threshold_falling = 10,
        .trigger_levels[0] = 85,
The patch is correct, but generally speaking I think we should get away from having the drivers get configured per SoC on such a fine-grained level. Better make this driver (and others) always work on all exynos variants.

Quoted 6 lines

Amit, correct if I am wrong, but:
The driver will work on supported exynos variants. Those that have the need for thermal sensing. And each of them have specific thermal needs (trigger points, thresholds, etc). That is what this file tries to isolate. And there is specific data structures for each soc version.

Yes its correct that there may be some changes in data points for different soc's. in the new re-structured code data is separated from driver so more data can be added cleanly.

Quoted 13 lines

Quoted 6 lines
Arnd
--
You have got to be excited about what you are doing. (L. Lamport)
Eduardo Valentin

Arnd Bergmann

2013-06-18 13:02 UTC #32 lore raw

PATCH v2 29/38 thermal: exynos: Support both Exynos4x12 SoCs

Quoted 4 lines · Eduardo Valentin

The driver will work on supported exynos variants. Those that have the need for thermal sensing. And each of them have specific thermal needs (trigger points, thresholds, etc). That is what this file tries to isolate. And there is specific data structures for each soc version.

Correct. My point is that the driver itself is much larger than the SoC-specific data sets in it. There is no reason to conditionally build a 108 byte data structure, making it more maintainably by removing all the #ifdef far outweighs the cost.

You can also change the driver to work only for DT based booting, that will simplify it further and save you more in terms of object code size than the exynos_tmu_platform_data instances.

Arnd

Tomasz Figa

author

2013-06-17 16:34 UTC #33 lore raw

PATCH v2 30/38 ARM: EXYNOS: Remove CONFIG_SOC_EXYNOS4412

Exynos4212 and Exynos4412 SoCs differ only in number of ARM cores and there is no need to have separate Kconfig options for them, since they use the same code.

This patch removes CONFIG_SOC_EXYNOS4412, leaving CONFIG_SOC_EXYNOS4212 as the one supporting both SoCs from this series.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/Kconfig             | 11 +----------
 arch/arm/plat-samsung/include/plat/cpu.h |  6 +-----
 2 files changed, 2 insertions(+), 15 deletions(-)

arch/arm/mach-exynos/Kconfig +1 ~~-10~~

index 65ca3ac..fcebdfb 100644
@@ -46,7 +46,7 @@ config CPU_EXYNOS4210
 	  Enable EXYNOS4210 CPU support
 
 config SOC_EXYNOS4212
-	bool "SAMSUNG EXYNOS4212"
+	bool "SAMSUNG EXYNOS4212/4412"
 	default y
 	depends on ARCH_EXYNOS4
 	select PINCTRL_EXYNOS

@@ -56,15 +56,6 @@ config SOC_EXYNOS4212
 	help
 	  Enable EXYNOS4212 SoC support
 
-config SOC_EXYNOS4412
-	bool "SAMSUNG EXYNOS4412"
-	default y
-	depends on ARCH_EXYNOS4
-	select PINCTRL_EXYNOS
-	select SAMSUNG_DMADEV
-	help
-	  Enable EXYNOS4412 SoC support
-
 config SOC_EXYNOS5250
 	bool "SAMSUNG EXYNOS5250"
 	default y

arch/arm/plat-samsung/include/plat/cpu.h +1 -5

index 989fefe..87b03bb 100644
@@ -122,13 +122,9 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
 
 #if defined(CONFIG_SOC_EXYNOS4212)
 # define soc_is_exynos4212()	is_samsung_exynos4212()
-#else
-# define soc_is_exynos4212()	0
-#endif
-
-#if defined(CONFIG_SOC_EXYNOS4412)
 # define soc_is_exynos4412()	is_samsung_exynos4412()
 #else
+# define soc_is_exynos4212()	0
 # define soc_is_exynos4412()	0
 #endif

Signature · 1 line

1.8.2.1

Kukjin Kim

NAK

2013-06-18 09:17 UTC #34 lore raw

PATCH v2 30/38 ARM: EXYNOS: Remove CONFIG_SOC_EXYNOS4412

Quoted 31 lines · Tomasz Figa

Exynos4212 and Exynos4412 SoCs differ only in number of ARM cores and there is no need to have separate Kconfig options for them, since they use the same code.
This patch removes CONFIG_SOC_EXYNOS4412, leaving CONFIG_SOC_EXYNOS4212 as the one supporting both SoCs from this series.
Signed-off-by Tomasz Figa <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/mach-exynos/Kconfig             | 11 +----------
 arch/arm/plat-samsung/include/plat/cpu.h |  6 +-----
 2 files changed, 2 insertions(+), 15 deletions(-)
arch/arm/mach-exynos/Kconfig +1 -1
index 65ca3ac..fcebdfb 100644
@@ -46,7 +46,7 @@ config CPU_EXYNOS4210
 	  Enable EXYNOS4210 CPU support
 
 config SOC_EXYNOS4212
-	bool "SAMSUNG EXYNOS4212"
+	bool "SAMSUNG EXYNOS4212/4412"
 	default y
 	depends on ARCH_EXYNOS4
 	select PINCTRL_EXYNOS
@@ -56,15 +56,6 @@ config SOC_EXYNOS4212
 	help
 	  Enable EXYNOS4212 SoC support

arch/arm/mach-exynos/Kconfig config SOC_EXYNOS4212 · line 67

Quoted 10 lines

arch/arm/mach-exynos/Kconfig +0 -9

 
-config SOC_EXYNOS4412
-	bool "SAMSUNG EXYNOS4412"
-	default y
-	depends on ARCH_EXYNOS4
-	select PINCTRL_EXYNOS
-	select SAMSUNG_DMADEV
-	help
-	  Enable EXYNOS4412 SoC support
-

NAK, I'm still saying we need separation of exynos4212 and exynos4412 because there are differences, it is not implemented yet but will be implemented in future. So would be helpful if we could keep them.

Thanks,
- Kukjin

Tomasz Figa

author

2013-06-18 09:31 UTC #35 lore raw

PATCH v2 30/38 ARM: EXYNOS: Remove CONFIG_SOC_EXYNOS4412

Hi Kukjin,

Quoted 39 lines · On Tuesday 18 of June 2013 18:17:14 Kukjin Kim wrote:

Quoted 38 lines · Tomasz Figa
Exynos4212 and Exynos4412 SoCs differ only in number of ARM cores and there is no need to have separate Kconfig options for them, since they use the same code.
This patch removes CONFIG_SOC_EXYNOS4412, leaving CONFIG_SOC_EXYNOS4212 as the one supporting both SoCs from this series.
Signed-off-by Tomasz Figa <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/mach-exynos/Kconfig             | 11 +----------
 arch/arm/plat-samsung/include/plat/cpu.h |  6 +-----
 2 files changed, 2 insertions(+), 15 deletions(-)
arch/arm/mach-exynos/Kconfig +1 -1
index 65ca3ac..fcebdfb 100644
@@ -46,7 +46,7 @@ config CPU_EXYNOS4210
 
 	  Enable EXYNOS4210 CPU support
 
 config SOC_EXYNOS4212
 
-	bool "SAMSUNG EXYNOS4212"
+	bool "SAMSUNG EXYNOS4212/4412"
 
arch/arm/mach-exynos/Kconfig +0 -0
 	default y
 	depends on ARCH_EXYNOS4
 	select PINCTRL_EXYNOS
@@ -56,15 +56,6 @@ config SOC_EXYNOS4212
 
 	help
 
 	  Enable EXYNOS4212 SoC support
 

Quoted 13 lines

arch/arm/mach-exynos/Kconfig config SOC_EXYNOS4212 · line 67
Quoted 9 lines
arch/arm/mach-exynos/Kconfig +0 -9
-config SOC_EXYNOS4412
-	bool "SAMSUNG EXYNOS4412"
-	default y
-	depends on ARCH_EXYNOS4
-	select PINCTRL_EXYNOS
-	select SAMSUNG_DMADEV
-	help
-	  Enable EXYNOS4412 SoC support
-
NAK, I'm still saying we need separation of exynos4212 and exynos4412 because there are differences, it is not implemented yet but will be implemented in future. So would be helpful if we could keep them.

Sorry, but I don't understand how a Kconfig entry is related to separation of those SoCs. It just selects which code needs to be compiled in, not what code should be executed - this selection is done based on DeviceTree.

Could you give a bit more in depth explanation for this?

Best regards,
Tomasz

Tomasz Figa

author

2013-06-17 16:34 UTC #36 lore raw

PATCH v2 31/38 cpufreq: exynos4x12: Remove check for SOC_EXYNOS4412

Since SOC_EXYNOS4412 Kconfig symbol has been removed, it is enough to check for SOC_EXYNOS4212 for both SoCs from Exynos4x12 series.

Cc linux-pm at vger.kernel.org

Cc Viresh Kumar <[email protected]>

Signed-off-by Tomasz Figa <[email protected]>

---
 drivers/cpufreq/Kconfig.arm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/cpufreq/Kconfig.arm +1 -1

index a924408..b214ad6 100644
@@ -32,7 +32,7 @@ config ARM_EXYNOS4210_CPUFREQ
 	  SoC (S5PV310 or S5PC210).
 
 config ARM_EXYNOS4X12_CPUFREQ
-	def_bool (SOC_EXYNOS4212 || SOC_EXYNOS4412)
+	def_bool SOC_EXYNOS4212
 	help
 	  This adds the CPUFreq driver for Samsung EXYNOS4X12
 	  SoC (EXYNOS4212 or EXYNOS4412).

Signature · 1 line

1.8.2.1

Viresh Kumar

maintainer

2013-06-18 03:18 UTC #37 lore raw

PATCH v2 31/38 cpufreq: exynos4x12: Remove check for SOC_EXYNOS4412

Quoted 10 lines · Tomasz Figa

Since SOC_EXYNOS4412 Kconfig symbol has been removed, it is enough to check for SOC_EXYNOS4212 for both SoCs from Exynos4x12 series.
Cc linux-pm at vger.kernel.org
Cc Viresh Kumar <[email protected]>
Signed-off-by Tomasz Figa <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 drivers/cpufreq/Kconfig.arm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Looks good. You want it to get via samsung tree or cpufreq? I think all cpufreq related patches should go through cpufreq unless there is a real dependency on samsung tree.

Kukjin Kim

NAK

2013-06-18 09:18 UTC #38 lore raw

PATCH v2 31/38 cpufreq: exynos4x12: Remove check for SOC_EXYNOS4412

Quoted 26 lines · Tomasz Figa

Since SOC_EXYNOS4412 Kconfig symbol has been removed, it is enough to check for SOC_EXYNOS4212 for both SoCs from Exynos4x12 series.
Cc linux-pm at vger.kernel.org
Cc Viresh Kumar <[email protected]>
Signed-off-by Tomasz Figa <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 drivers/cpufreq/Kconfig.arm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/cpufreq/Kconfig.arm +1 -2
index a924408..b214ad6 100644
@@ -32,7 +32,7 @@ config ARM_EXYNOS4210_CPUFREQ
 	  SoC (S5PV310 or S5PC210).
 
 config ARM_EXYNOS4X12_CPUFREQ
-	def_bool (SOC_EXYNOS4212 || SOC_EXYNOS4412)
+	def_bool SOC_EXYNOS4212
 	help
 	  This adds the CPUFreq driver for Samsung EXYNOS4X12
 	  SoC (EXYNOS4212 or EXYNOS4412).
--

Quoted 1 line

1.8.2.1

NAK, the reason is same with my comments on 30th patch.

- Kukjin

Tomasz Figa

author

2013-06-17 16:34 UTC #39 lore raw

PATCH v2 32/38 exynos4-is: Remove check for SOC_EXYNOS4412

Since SOC_EXYNOS4412 Kconfig symbol has been removed, it is enough to check for SOC_EXYNOS4212 for both SoCs from Exynos4x12 series.

Cc linux-media at vger.kernel.org

Cc Mauro Carvalho Chehab <[email protected]>

Cc Sylwester Nawrocki <[email protected]>

Signed-off-by Tomasz Figa <[email protected]>

---
 drivers/media/platform/exynos4-is/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/media/platform/exynos4-is/Kconfig +1 -1

index 004fd0b..0d4fd5c 100644
@@ -33,7 +33,7 @@ config VIDEO_S5P_MIPI_CSIS
 	  To compile this driver as a module, choose M here: the
 	  module will be called s5p-csis.
 
-if SOC_EXYNOS4212 || SOC_EXYNOS4412 || SOC_EXYNOS5250
+if SOC_EXYNOS4212 || SOC_EXYNOS5250
 
 config VIDEO_EXYNOS_FIMC_LITE
 	tristate "EXYNOS FIMC-LITE camera interface driver"

Signature · 1 line

1.8.2.1

Kukjin Kim

NAK

2013-06-18 09:18 UTC #40 lore raw

PATCH v2 32/38 exynos4-is: Remove check for SOC_EXYNOS4412

Quoted 28 lines · Tomasz Figa

Since SOC_EXYNOS4412 Kconfig symbol has been removed, it is enough to check for SOC_EXYNOS4212 for both SoCs from Exynos4x12 series.
Cc linux-media at vger.kernel.org
Cc Mauro Carvalho Chehab <[email protected]>
Cc Sylwester Nawrocki <[email protected]>
Signed-off-by Tomasz Figa <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 drivers/media/platform/exynos4-is/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/media/platform/exynos4-is/Kconfig +1 -2
index 004fd0b..0d4fd5c 100644
@@ -33,7 +33,7 @@ config VIDEO_S5P_MIPI_CSIS
 	  To compile this driver as a module, choose M here: the
 	  module will be called s5p-csis.
 
-if SOC_EXYNOS4212 || SOC_EXYNOS4412 || SOC_EXYNOS5250
+if SOC_EXYNOS4212 || SOC_EXYNOS5250
 
 config VIDEO_EXYNOS_FIMC_LITE
 	tristate "EXYNOS FIMC-LITE camera interface driver"
--

Quoted 1 line

1.8.2.1

NAK, the reason is same with my comments on 30th patch.

- Kukjin

Tomasz Figa

author

2013-06-17 16:34 UTC #41 lore raw

PATCH v2 33/38 thermal: exynos: Remove check for SOC_EXYNOS4412

Since SOC_EXYNOS4412 Kconfig symbol has been removed, it is enough to check for SOC_EXYNOS4212 for both SoCs from Exynos4x12 series.

Cc linux-pm at vger.kernel.org

Cc Zhang Rui <[email protected]>

Cc Eduardo Valentin <[email protected]>

Signed-off-by Tomasz Figa <[email protected]>

---
 drivers/thermal/exynos_thermal.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

drivers/thermal/exynos_thermal.c +1 -2

index 4cbe3ee..f88a2ad 100644
@@ -817,8 +817,7 @@ static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
 #define EXYNOS4210_TMU_DRV_DATA (NULL)
 #endif
 
-#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412) || \
-	defined(CONFIG_SOC_EXYNOS4212)
+#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4212)
 static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
 	.threshold_falling = 10,
 	.trigger_levels[0] = 85,

Signature · 1 line

1.8.2.1

Kukjin Kim

NAK

2013-06-18 09:19 UTC #42 lore raw

PATCH v2 33/38 thermal: exynos: Remove check for SOC_EXYNOS4412

Quoted 28 lines · Tomasz Figa

Since SOC_EXYNOS4412 Kconfig symbol has been removed, it is enough to check for SOC_EXYNOS4212 for both SoCs from Exynos4x12 series.
Cc linux-pm at vger.kernel.org
Cc Zhang Rui <[email protected]>
Cc Eduardo Valentin <[email protected]>
Signed-off-by Tomasz Figa <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 drivers/thermal/exynos_thermal.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
drivers/thermal/exynos_thermal.c +1 -2
index 4cbe3ee..f88a2ad 100644
@@ -817,8 +817,7 @@ static struct exynos_tmu_platform_data const
 exynos4210_default_tmu_data = {
 #define EXYNOS4210_TMU_DRV_DATA (NULL)
 #endif
 
-#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412) || \
-	defined(CONFIG_SOC_EXYNOS4212)
+#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4212)
 static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
 	.threshold_falling = 10,

Quoted 3 lines

.trigger_levels[0] = 85,
--
1.8.2.1

NAK, the reason is same with my comments on 30th patch.

- Kukjin

Tomasz Figa

author

2013-06-17 16:34 UTC #43 lore raw

PATCH v2 34/38 ARM: EXYNOS: Remove mach/regs-usb-phy.h header

This patch removes mach/regs-usb-phy.h header, which is not used anywhere in the kernel.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/include/mach/regs-usb-phy.h | 74 ------------------------
 1 file changed, 74 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/regs-usb-phy.h

arch/arm/mach-exynos/include/mach/regs-usb-phy.h deleted +0 ~~-74~~

deleted file mode 100644
index 0727773..0000000
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2011 Samsung Electronics Co.Ltd
- * Author: Joonyoung Shim <[email protected]>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#ifndef __PLAT_S5P_REGS_USB_PHY_H
-#define __PLAT_S5P_REGS_USB_PHY_H
-
-#define EXYNOS4_HSOTG_PHYREG(x)		((x) + S3C_VA_USB_HSPHY)
-
-#define EXYNOS4_PHYPWR			EXYNOS4_HSOTG_PHYREG(0x00)
-#define PHY1_HSIC_NORMAL_MASK		(0xf << 9)
-#define PHY1_HSIC1_SLEEP		(1 << 12)
-#define PHY1_HSIC1_FORCE_SUSPEND	(1 << 11)
-#define PHY1_HSIC0_SLEEP		(1 << 10)
-#define PHY1_HSIC0_FORCE_SUSPEND	(1 << 9)
-
-#define PHY1_STD_NORMAL_MASK		(0x7 << 6)
-#define PHY1_STD_SLEEP			(1 << 8)
-#define PHY1_STD_ANALOG_POWERDOWN	(1 << 7)
-#define PHY1_STD_FORCE_SUSPEND		(1 << 6)
-
-#define PHY0_NORMAL_MASK		(0x39 << 0)
-#define PHY0_SLEEP			(1 << 5)
-#define PHY0_OTG_DISABLE		(1 << 4)
-#define PHY0_ANALOG_POWERDOWN		(1 << 3)
-#define PHY0_FORCE_SUSPEND		(1 << 0)
-
-#define EXYNOS4_PHYCLK			EXYNOS4_HSOTG_PHYREG(0x04)
-#define PHY1_COMMON_ON_N		(1 << 7)
-#define PHY0_COMMON_ON_N		(1 << 4)
-#define PHY0_ID_PULLUP			(1 << 2)
-
-#define EXYNOS4_CLKSEL_SHIFT		(0)
-
-#define EXYNOS4210_CLKSEL_MASK		(0x3 << 0)
-#define EXYNOS4210_CLKSEL_48M		(0x0 << 0)
-#define EXYNOS4210_CLKSEL_12M		(0x2 << 0)
-#define EXYNOS4210_CLKSEL_24M		(0x3 << 0)
-
-#define EXYNOS4X12_CLKSEL_MASK		(0x7 << 0)
-#define EXYNOS4X12_CLKSEL_9600K		(0x0 << 0)
-#define EXYNOS4X12_CLKSEL_10M		(0x1 << 0)
-#define EXYNOS4X12_CLKSEL_12M		(0x2 << 0)
-#define EXYNOS4X12_CLKSEL_19200K	(0x3 << 0)
-#define EXYNOS4X12_CLKSEL_20M		(0x4 << 0)
-#define EXYNOS4X12_CLKSEL_24M		(0x5 << 0)
-
-#define EXYNOS4_RSTCON			EXYNOS4_HSOTG_PHYREG(0x08)
-#define HOST_LINK_PORT_SWRST_MASK	(0xf << 6)
-#define HOST_LINK_PORT2_SWRST		(1 << 9)
-#define HOST_LINK_PORT1_SWRST		(1 << 8)
-#define HOST_LINK_PORT0_SWRST		(1 << 7)
-#define HOST_LINK_ALL_SWRST		(1 << 6)
-
-#define PHY1_SWRST_MASK			(0x7 << 3)
-#define PHY1_HSIC_SWRST			(1 << 5)
-#define PHY1_STD_SWRST			(1 << 4)
-#define PHY1_ALL_SWRST			(1 << 3)
-
-#define PHY0_SWRST_MASK			(0x7 << 0)
-#define PHY0_PHYLINK_SWRST		(1 << 2)
-#define PHY0_HLINK_SWRST		(1 << 1)
-#define PHY0_SWRST			(1 << 0)
-
-#define EXYNOS4_PHY1CON			EXYNOS4_HSOTG_PHYREG(0x34)
-#define FPENABLEN			(1 << 0)
-
-#endif /* __PLAT_S5P_REGS_USB_PHY_H */

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #44 lore raw

PATCH v2 35/38 ARM: EXYNOS: Remove custom init_irq callbacks

Since both exynos4_init_irq() and exynos5_init_irq() are just calling irqchip_init(), there is no need for them to exist any more, since this is the default that is called when init_irq callback is not specified.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c          | 10 ----------
 arch/arm/mach-exynos/common.h          |  2 --
 arch/arm/mach-exynos/mach-exynos4-dt.c |  1 -
 arch/arm/mach-exynos/mach-exynos5-dt.c |  1 -
 4 files changed, 14 deletions(-)

arch/arm/mach-exynos/common.c +0 ~~-10~~

index 7b53e4c..91d457f 100644
@@ -400,16 +400,6 @@ void __init exynos_init_time(void)
 	clocksource_of_init();
 }
 
-void __init exynos4_init_irq(void)
-{
-	irqchip_init();
-}
-
-void __init exynos5_init_irq(void)
-{
-	irqchip_init();
-}
-
 struct bus_type exynos_subsys = {
 	.name		= "exynos-core",
 	.dev_name	= "exynos-core",

arch/arm/mach-exynos/common.h +0 -2

index 11fc1e2..1c83f95 100644
@@ -20,8 +20,6 @@ extern unsigned long xxti_f, xusbxti_f;
 
 struct map_desc;
 void exynos_init_io(struct map_desc *mach_desc, int size);
-void exynos4_init_irq(void);
-void exynos5_init_irq(void);
 void exynos4_restart(char mode, const char *cmd);
 void exynos5_restart(char mode, const char *cmd);
 void exynos_init_late(void);

arch/arm/mach-exynos/mach-exynos4-dt.c +0 -1

index b9ed834..df15726 100644
@@ -55,7 +55,6 @@ static void __init exynos4_reserve(void)
 DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
 	/* Maintainer: Thomas Abraham <[email protected]> */
 	.smp		= smp_ops(exynos_smp_ops),
-	.init_irq	= exynos4_init_irq,
 	.map_io		= exynos4_dt_map_io,
 	.init_early	= exynos_firmware_init,
 	.init_machine	= exynos4_dt_machine_init,

arch/arm/mach-exynos/mach-exynos5-dt.c +0 -1

index 9596861..8777310 100644
@@ -104,7 +104,6 @@ static void __init exynos5_reserve(void)
 
 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
 	/* Maintainer: Kukjin Kim <[email protected]> */
-	.init_irq	= exynos5_init_irq,
 	.smp		= smp_ops(exynos_smp_ops),
 	.map_io		= exynos5_dt_map_io,
 	.init_machine	= exynos5_dt_machine_init,

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #45 lore raw

PATCH v2 36/38 ARM: EXYNOS: Use exynos_init_io() as map_io callback

Since there is no board specific mapping needed on Exynos, exynos_init_io() can be simplified and used as map_io callback for both Exynos4 and Exynos5.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c          | 5 +----
 arch/arm/mach-exynos/common.h          | 2 +-
 arch/arm/mach-exynos/mach-exynos4-dt.c | 7 +------
 arch/arm/mach-exynos/mach-exynos5-dt.c | 7 +------
 4 files changed, 4 insertions(+), 17 deletions(-)

arch/arm/mach-exynos/common.c +1 -4

index 91d457f..561890f 100644
@@ -351,15 +351,12 @@ int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
  * register the standard cpu IO areas
  */
 
-void __init exynos_init_io(struct map_desc *mach_desc, int size)
+void __init exynos_init_io(void)
 {
 	debug_ll_io_init();
 
 	of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
 
-	if (mach_desc)
-		iotable_init(mach_desc, size);
-
 	/* detect cpu id and rev. */
 	s5p_init_cpu(S5P_VA_CHIPID);

arch/arm/mach-exynos/common.h +1 -1

index 1c83f95..38d45fd 100644
@@ -19,7 +19,7 @@ void exynos_init_time(void);
 extern unsigned long xxti_f, xusbxti_f;
 
 struct map_desc;
-void exynos_init_io(struct map_desc *mach_desc, int size);
+void exynos_init_io(void);
 void exynos4_restart(char mode, const char *cmd);
 void exynos5_restart(char mode, const char *cmd);
 void exynos_init_late(void);

arch/arm/mach-exynos/mach-exynos4-dt.c +1 -6

index df15726..0099c6c 100644
@@ -23,11 +23,6 @@
 
 #include "common.h"
 
-static void __init exynos4_dt_map_io(void)
-{
-	exynos_init_io(NULL, 0);
-}
-
 static void __init exynos4_dt_machine_init(void)
 {
 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);

@@ -55,7 +50,7 @@ static void __init exynos4_reserve(void)
 DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
 	/* Maintainer: Thomas Abraham <[email protected]> */
 	.smp		= smp_ops(exynos_smp_ops),
-	.map_io		= exynos4_dt_map_io,
+	.map_io		= exynos_init_io,
 	.init_early	= exynos_firmware_init,
 	.init_machine	= exynos4_dt_machine_init,
 	.init_late	= exynos_init_late,

arch/arm/mach-exynos/mach-exynos5-dt.c +1 -6

index 8777310..ab54770 100644
@@ -27,11 +27,6 @@
 static u64 dma_mask64 = DMA_BIT_MASK(64);
 static u64 dma_mask32 = DMA_BIT_MASK(32);
 
-static void __init exynos5_dt_map_io(void)
-{
-	exynos_init_io(NULL, 0);
-}
-
 static int exynos5440_platform_notifier(struct notifier_block *nb,
 				  unsigned long event, void *__dev)
 {

@@ -105,7 +100,7 @@ static void __init exynos5_reserve(void)
 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
 	/* Maintainer: Kukjin Kim <[email protected]> */
 	.smp		= smp_ops(exynos_smp_ops),
-	.map_io		= exynos5_dt_map_io,
+	.map_io		= exynos_init_io,
 	.init_machine	= exynos5_dt_machine_init,
 	.init_late	= exynos_init_late,
 	.init_time	= exynos_init_time,

Signature · 1 line

1.8.2.1

Kukjin Kim

2013-06-18 09:36 UTC #46 lore raw

PATCH v2 36/38 ARM: EXYNOS: Use exynos_init_io() as map_io callback

Quoted 68 lines · Tomasz Figa

Since there is no board specific mapping needed on Exynos, exynos_init_io() can be simplified and used as map_io callback for both Exynos4 and Exynos5.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c          | 5 +----
 arch/arm/mach-exynos/common.h          | 2 +-
 arch/arm/mach-exynos/mach-exynos4-dt.c | 7 +------
 arch/arm/mach-exynos/mach-exynos5-dt.c | 7 +------
 4 files changed, 4 insertions(+), 17 deletions(-)

arch/arm/mach-exynos/common.c +1 -4

index 91d457f..561890f 100644
@@ -351,15 +351,12 @@ int __init exynos_fdt_map_chipid(unsigned long node,
 const char *uname,
  * register the standard cpu IO areas
  */
 
-void __init exynos_init_io(struct map_desc *mach_desc, int size)
+void __init exynos_init_io(void)
 {
 	debug_ll_io_init();
 
 	of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
 
-	if (mach_desc)
-		iotable_init(mach_desc, size);
-
 	/* detect cpu id and rev. */
 	s5p_init_cpu(S5P_VA_CHIPID);

arch/arm/mach-exynos/common.h +1 -1

index 1c83f95..38d45fd 100644
@@ -19,7 +19,7 @@ void exynos_init_time(void);
 extern unsigned long xxti_f, xusbxti_f;
 
 struct map_desc;
-void exynos_init_io(struct map_desc *mach_desc, int size);
+void exynos_init_io(void);
 void exynos4_restart(char mode, const char *cmd);
 void exynos5_restart(char mode, const char *cmd);
 void exynos_init_late(void);

arch/arm/mach- renamed from arch/arm/mach-exynos/mach-exynos4-dt.c +0 -0

exynos/mach-exynos4-dt.c
index df15726..0099c6c 100644

arch/arm/mach-exynos/mach-exynos4-dt.c +0 -5

@@ -23,11 +23,6 @@
 
 #include "common.h"
 
-static void __init exynos4_dt_map_io(void)
-{
-	exynos_init_io(NULL, 0);
-}
-
 static void __init exynos4_dt_machine_init(void)
 {
 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);

arch/arm/mach-exynos/mach-exynos4-dt.c static void __init exynos4_reserve(void) · line 50

Quoted 1 line

arch/arm/mach-exynos/mach-exynos4-dt.c +0 -0

@@ -55,7 +50,7 @@ static void __init exynos4_reserve(void)
 DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device

Tree)")

Quoted 34 lines

arch/arm/mach-exynos/mach-exynos4-dt.c +1 -1

 	/* Maintainer: Thomas Abraham <[email protected]> */
 	.smp		= smp_ops(exynos_smp_ops),
-	.map_io		= exynos4_dt_map_io,
+	.map_io		= exynos_init_io,
 	.init_early	= exynos_firmware_init,
 	.init_machine	= exynos4_dt_machine_init,
 	.init_late	= exynos_init_late,

arch/arm/mach- renamed from arch/arm/mach-exynos/mach-exynos5-dt.c +0 -0

exynos/mach-exynos5-dt.c
index 8777310..ab54770 100644

arch/arm/mach-exynos/mach-exynos5-dt.c +1 -7

@@ -27,11 +27,6 @@
 static u64 dma_mask64 = DMA_BIT_MASK(64);
 static u64 dma_mask32 = DMA_BIT_MASK(32);
 
-static void __init exynos5_dt_map_io(void)
-{
-	exynos_init_io(NULL, 0);
-}
-
 static int exynos5440_platform_notifier(struct notifier_block *nb,
 				  unsigned long event, void *__dev)
 {

@@ -105,7 +100,7 @@ static void __init exynos5_reserve(void)
 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
 	/* Maintainer: Kukjin Kim <[email protected]> */
 	.smp		= smp_ops(exynos_smp_ops),
-	.map_io		= exynos5_dt_map_io,
+	.map_io		= exynos_init_io,
 	.init_machine	= exynos5_dt_machine_init,
 	.init_late	= exynos_init_late,
 	.init_time	= exynos_init_time,
--

Quoted 1 line

1.8.2.1

Looks good to me, but I think, this change has been submitted by Arnd even though you did split, so the author should be Arnd. As you know, it is very important. Let me fix this and some patches when I apply. If any problems, let me know.

Thanks,
- Kukjin

Tomasz Figa

author

2013-06-18 09:48 UTC #47 lore raw

PATCH v2 36/38 ARM: EXYNOS: Use exynos_init_io() as map_io callback

Quoted 131 lines · On Tuesday 18 of June 2013 18:36:16 Kukjin Kim wrote:

Quoted 79 lines · Tomasz Figa
Since there is no board specific mapping needed on Exynos, exynos_init_io() can be simplified and used as map_io callback for both Exynos4 and Exynos5.
Signed-off-by Arnd Bergmann <[email protected]>
Signed-off-by Tomasz Figa <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/mach-exynos/common.c          | 5 +----
 arch/arm/mach-exynos/common.h          | 2 +-
 arch/arm/mach-exynos/mach-exynos4-dt.c | 7 +------
 arch/arm/mach-exynos/mach-exynos5-dt.c | 7 +------
 4 files changed, 4 insertions(+), 17 deletions(-)
arch/arm/mach-exynos/common.c +1 -4
index 91d457f..561890f 100644
@@ -351,15 +351,12 @@ int __init exynos_fdt_map_chipid(unsigned long node,
 const char *uname,
 
  * register the standard cpu IO areas
  */
 
-void __init exynos_init_io(struct map_desc *mach_desc, int size)
+void __init exynos_init_io(void)
 
 {
 
 	debug_ll_io_init();
 
 	of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
 
-	if (mach_desc)
-		iotable_init(mach_desc, size);
-
 
 	/* detect cpu id and rev. */
 	s5p_init_cpu(S5P_VA_CHIPID);
arch/arm/mach-exynos/common.h +1 -1
index 1c83f95..38d45fd 100644
@@ -19,7 +19,7 @@ void exynos_init_time(void);
 
 extern unsigned long xxti_f, xusbxti_f;
 
 struct map_desc;
 
-void exynos_init_io(struct map_desc *mach_desc, int size);
+void exynos_init_io(void);
 
void exynos4_restart(char mode, const char *cmd); void exynos5_restart(char mode, const char *cmd); void exynos_init_late(void);
arch/arm/mach- renamed from arch/arm/mach-exynos/mach-exynos4-dt.c +0 -0
exynos/mach-exynos4-dt.c
index df15726..0099c6c 100644
arch/arm/mach-exynos/mach-exynos4-dt.c +0 -5
@@ -23,11 +23,6 @@
 
 #include "common.h"
 
-static void __init exynos4_dt_map_io(void)
-{
-	exynos_init_io(NULL, 0);
-}
-
 
 static void __init exynos4_dt_machine_init(void)
 {
arch/arm/mach-exynos/mach-exynos4-dt.c +0 -0
 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
arch/arm/mach-exynos/mach-exynos4-dt.c static void __init exynos4_reserve(void) · line 51
Quoted 2 lines
arch/arm/mach-exynos/mach-exynos4-dt.c +0 -0
@@ -55,7 +50,7 @@ static void __init exynos4_reserve(void)
 
 DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device
Tree)")
Quoted 46 lines
arch/arm/mach-exynos/mach-exynos4-dt.c +1 -1
 	/* Maintainer: Thomas Abraham <[email protected]> */
 	.smp		= smp_ops(exynos_smp_ops),
 
-	.map_io		= exynos4_dt_map_io,
+	.map_io		= exynos_init_io,
 
arch/arm/mach-exynos/mach-exynos4-dt.c +0 -0
 	.init_early	= exynos_firmware_init,
 	.init_machine	= exynos4_dt_machine_init,
 	.init_late	= exynos_init_late,
arch/arm/mach- renamed from arch/arm/mach-exynos/mach-exynos5-dt.c +0 -0
exynos/mach-exynos5-dt.c
index 8777310..ab54770 100644
arch/arm/mach-exynos/mach-exynos5-dt.c +0 -5
@@ -27,11 +27,6 @@
 
 static u64 dma_mask64 = DMA_BIT_MASK(64);
 static u64 dma_mask32 = DMA_BIT_MASK(32);
 
-static void __init exynos5_dt_map_io(void)
-{
-	exynos_init_io(NULL, 0);
-}
-
 
 static int exynos5440_platform_notifier(struct notifier_block *nb,
arch/arm/mach-exynos/mach-exynos5-dt.c +1 -1
 				  unsigned long event, void *__dev)
 
 {
@@ -105,7 +100,7 @@ static void __init exynos5_reserve(void)
 
 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
 
 	/* Maintainer: Kukjin Kim <[email protected]> */
 	.smp		= smp_ops(exynos_smp_ops),
 
-	.map_io		= exynos5_dt_map_io,
+	.map_io		= exynos_init_io,
arch/arm/mach-exynos/mach-exynos5-dt.c +0 -0
 	.init_machine	= exynos5_dt_machine_init,
 	.init_late	= exynos_init_late,
 	.init_time	= exynos_init_time,

Quoted 7 lines

Quoted 2 lines
--
1.8.2.1
Looks good to me, but I think, this change has been submitted by Arnd even though you did split, so the author should be Arnd. As you know, it is very important. Let me fix this and some patches when I apply. If any problems, let me know.

Right, I've been applying those changes manually and forgot to change the author. Please fix patches 36-38 then.

Best regards,
Tomasz

Tomasz Figa

author

2013-06-17 16:34 UTC #48 lore raw

PATCH v2 37/38 ARM: EXYNOS: Remove legacy L2X0 initialization

Since Exynos is now supporting only DT-based boot, the old L2X0 initialization code is not needed anymore, so exynos4_l2x0_cache_init() can be greatly simplified.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/common.c | 48 ++++---------------------------------------
 1 file changed, 4 insertions(+), 44 deletions(-)

arch/arm/mach-exynos/common.c +4 ~~-44~~

index 561890f..e886154 100644
@@ -412,59 +412,19 @@ static int __init exynos_core_init(void)
 }
 core_initcall(exynos_core_init);
 
-#ifdef CONFIG_CACHE_L2X0
 static int __init exynos4_l2x0_cache_init(void)
 {
 	int ret;
 
-	if (soc_is_exynos5250() || soc_is_exynos5440())
-		return 0;
-
 	ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
-	if (!ret) {
-		l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
-		clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
-		return 0;
-	}
-
-	if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) {
-		l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC;
-		/* TAG, Data Latency Control: 2 cycles */
-		l2x0_saved_regs.tag_latency = 0x110;
-
-		if (soc_is_exynos4212() || soc_is_exynos4412())
-			l2x0_saved_regs.data_latency = 0x120;
-		else
-			l2x0_saved_regs.data_latency = 0x110;
-
-		l2x0_saved_regs.prefetch_ctrl = 0x30000007;
-		l2x0_saved_regs.pwr_ctrl =
-			(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN);
-
-		l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
-
-		__raw_writel(l2x0_saved_regs.tag_latency,
-				S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
-		__raw_writel(l2x0_saved_regs.data_latency,
-				S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
-
-		/* L2X0 Prefetch Control */
-		__raw_writel(l2x0_saved_regs.prefetch_ctrl,
-				S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
-
-		/* L2X0 Power Control */
-		__raw_writel(l2x0_saved_regs.pwr_ctrl,
-				S5P_VA_L2CC + L2X0_POWER_CTRL);
-
-		clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
-		clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs));
-	}
+	if (ret)
+		return ret;
 
-	l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK);
+	l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
+	clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long));
 	return 0;
 }
 early_initcall(exynos4_l2x0_cache_init);
-#endif
 
 static int __init exynos_init(void)
 {

Signature · 1 line

1.8.2.1

Tomasz Figa

author

2013-06-17 16:34 UTC #49 lore raw

PATCH v2 38/38 ARM: EXYNOS: Remove remaining dead code after non-DT support removal

This patch removes remaining small bits of unused code that was left after removing non-DT support.

Signed-off-by Tomasz Figa <[email protected]>

---
 arch/arm/mach-exynos/Kconfig                | 17 -----------------
 arch/arm/mach-exynos/common.c               |  4 +---
 arch/arm/mach-exynos/include/mach/pm-core.h |  7 +------
 3 files changed, 2 insertions(+), 26 deletions(-)

arch/arm/mach-exynos/Kconfig +0 ~~-17~~

index fcebdfb..fa14283 100644
@@ -110,23 +110,6 @@ config MACH_EXYNOS5_DT
 	  Machine support for Samsung EXYNOS5 machine with device tree enabled.
 	  Select this if a fdt blob is available for the EXYNOS5 SoC based board.
 
-if ARCH_EXYNOS4
-
-comment "Configuration for HSMMC 8-bit bus width"
-
-config EXYNOS4_SDHCI_CH0_8BIT
-	bool "Channel 0 with 8-bit bus"
-	help
-	  Support HSMMC Channel 0 8-bit bus.
-	  If selected, Channel 1 is disabled.
-
-config EXYNOS4_SDHCI_CH2_8BIT
-	bool "Channel 2 with 8-bit bus"
-	help
-	  Support HSMMC Channel 2 8-bit bus.
-	  If selected, Channel 3 is disabled.
-endif
-
 endmenu
 
 endif

arch/arm/mach-exynos/common.c +1 -3

index e886154..81e6320 100644
@@ -60,8 +60,6 @@ static void exynos5_map_io(void);
 static void exynos5440_map_io(void);
 static int exynos_init(void);
 
-unsigned long xxti_f = 0, xusbxti_f = 0;
-
 static struct cpu_table cpu_ids[] __initdata = {
 	{
 		.idcode		= EXYNOS4210_CPU_ID,

@@ -322,7 +320,7 @@ void __init exynos_init_late(void)
 	exynos_pm_late_initcall();
 }
 
-int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
+static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
 					int depth, void *data)
 {
 	struct map_desc iodesc;

arch/arm/mach-exynos/include/mach/pm-core.h +1 -6

index 71e6b89..2b00833 100644
@@ -34,12 +34,7 @@ static inline void s3c_pm_debug_init_uart(void)
 
 static inline void s3c_pm_arch_prepare_irqs(void)
 {
-	u32 eintmask = s3c_irqwake_eintmask;
-
-	if (of_have_populated_dt())
-		eintmask = exynos_get_eint_wake_mask();
-
-	__raw_writel(eintmask, S5P_EINT_WAKEUP_MASK);
+	__raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
 	__raw_writel(s3c_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
 }

Signature · 1 line

1.8.2.1

Arnd Bergmann

2013-06-17 20:00 UTC #50 lore raw

v2 cover Thirty eight patches big Exynos cleanup

Quoted 12 lines · Tomasz Figa

As I promised, I am doing some spring (or rather summer) cleaning of Exynos- and Samsung- related code.
This first part consists mostly of removing dead code remaining after removal of ATAGS support for Exynos, but several patches cleans up other things found by the way.
See particular patches for more detailed description.
On Exynos4210-based Trats board:
Tested-by Tomasz Figa <[email protected]>

Looks all good to me.

Acked-by Arnd Bergmann <[email protected]>

Kukjin Kim

2013-06-18 10:23 UTC #51 lore raw

v2 cover Thirty eight patches big Exynos cleanup