MIPS: Fix typos and cleanup comment

PATCH New Tony Wu 1 participant 1 message Jun 21, 2013 MIPS

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Tony Wu

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2013-06-21 11:09 UTC #0 lore raw

PATCH 1/1 MIPS: Fix typos and cleanup comment

Signed-off-by Tony Wu <[email protected]>

---
 arch/mips/include/asm/gic.h |    2 +-
 arch/mips/kernel/process.c  |    3 ---
 arch/mips/mm/tlbex.c        |    2 +-
 3 files changed, 2 insertions(+), 5 deletions(-)

arch/mips/include/asm/gic.h +1 -1

index 7153b32..b2e3e93 100644
@@ -347,7 +347,7 @@ struct gic_shared_intr_map {
 #define GIC_CPU_INT2		2 /* .		      */
 #define GIC_CPU_INT3		3 /* .		      */
 #define GIC_CPU_INT4		4 /* .		      */
-#define GIC_CPU_INT5		5 /* Core Interrupt 5 */
+#define GIC_CPU_INT5		5 /* Core Interrupt 7 */
 
 /* Local GIC interrupts. */
 #define GIC_INT_TMR		(GIC_CPU_INT5)

arch/mips/kernel/process.c +0 -3

index 706bda8..a748f04 100644
@@ -201,9 +201,6 @@ int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
 	return 1;
 }
 
-/*
- *
- */
 struct mips_frame_info {
 	void		*func;
 	unsigned long	func_size;

arch/mips/mm/tlbex.c +1 -1

index afeef93..fb25aad 100644
@@ -961,7 +961,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
 	uasm_i_srl(p, ptr, ptr, 19);
 #else
 	/*
-	 * smp_processor_id() << 3 is stored in CONTEXT.
+	 * smp_processor_id() << 2 is stored in CONTEXT.
 	 */
 	uasm_i_mfc0(p, ptr, C0_CONTEXT);
 	UASM_i_LA_mostly(p, tmp, pgdc);

Signature · 1 line

1.7.10.2