MIPS: Fix gic_set_affinity infinite loop

There is an infinite loop in gic_set_affinity. When irq_set_affinity gets called on gic controller, it blocks forever.

---
 arch/mips/kernel/irq-gic.c |   15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

index c01b307..5b5ddb2 100644
@@ -219,16 +219,15 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
 
 	/* Assumption : cpumask refers to a single CPU */
 	spin_lock_irqsave(&gic_lock, flags);
-	for (;;) {
-		/* Re-route this IRQ */
-		GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp));
 
-		/* Update the pcpu_masks */
-		for (i = 0; i < NR_CPUS; i++)
-			clear_bit(irq, pcpu_masks[i].pcpu_mask);
-		set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
+	/* Re-route this IRQ */
+	GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp));
+
+	/* Update the pcpu_masks */
+	for (i = 0; i < NR_CPUS; i++)
+		clear_bit(irq, pcpu_masks[i].pcpu_mask);
+	set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
 
-	}
 	cpumask_copy(d->affinity, cpumask);
 	spin_unlock_irqrestore(&gic_lock, flags);
 

1.7.10.2

Tony,

What hardware platform is this on and how do you trigger the call to 'gic_set_affinity' such that you get stuck? Thanks.

-Steve

I assume on a SMP GIC configuration he must have tried something like

echo 1 > /proc/irq/2/smp_affinity

Where 1 is a CPU bit mask and 2 the number of a GIC interrupt of which to change the affinity.

This is a hillarious bug, this obviously has never been working.

I'm not sure if anything else would need fixing or if the loop had any sane purpose but as of now I can't see one so I'm queueing the patch for linux-next.

Ralf

I confirmed the hang on the Malta board. Tony's patch fixes this. Thank you Tony.

Steve