ARM: PJ4B: fix for 3.10-rc

This commit fixes the regression on Armada 370 (the kernal hang during boot) introduced by the commit: "ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead".

When coming out of either a Wait for Interrupt (WFI) or a Wait for Event (WFE) IDLE states, a specific timing sensitivity exists between the retiring WFI/WFE instructions and the newly issued subsequent instructions. This sensitivity can result in a CPU hang scenario. The workaround is to insert either a Data Synchronization Barrier (DSB) or Data Memory Barrier (DMB) command immediately after the WFI/WFE instruction.

This commit was based on the work of Lior Amsalem, but heavily modified to apply the errata fix dynamically according to the processor type thanks to the suggestions of Russell King and Nicolas Pitre.

Signed-off-by Gregory CLEMENT <[email protected]>

Reviewed-by Will Deacon <[email protected]>

Cc <[email protected]>

This commit fixes the regression on Armada 370 (the kernal hang during boot) introduced by the commit: "ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead".

When coming out of either a Wait for Interrupt (WFI) or a Wait for Event (WFE) IDLE states, a specific timing sensitivity exists between the retiring WFI/WFE instructions and the newly issued subsequent instructions. This sensitivity can result in a CPU hang scenario. The workaround is to insert either a Data Synchronization Barrier (DSB) or Data Memory Barrier (DMB) command immediately after the WFI/WFE instruction.

This commit was based on the work of Lior Amsalem, but heavily modified to apply the errata fix dynamically according to the processor type thanks to the suggestions of Russell King and Nicolas Pitre.

Signed-off-by Gregory CLEMENT <[email protected]>

Reviewed-by Will Deacon <[email protected]>

Cc <[email protected]>

Hi Greg,

Quoted 17 lines · Gregory CLEMENT

This commit fixes the regression on Armada 370 (the kernal hang during boot) introduced by the commit: "ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead".

When coming out of either a Wait for Interrupt (WFI) or a Wait for Event (WFE) IDLE states, a specific timing sensitivity exists between the retiring WFI/WFE instructions and the newly issued subsequent instructions. This sensitivity can result in a CPU hang scenario. The workaround is to insert either a Data Synchronization Barrier (DSB) or Data Memory Barrier (DMB) command immediately after the WFI/WFE instruction.

This commit was based on the work of Lior Amsalem, but heavily modified to apply the errata fix dynamically according to the processor type thanks to the suggestions of Russell King and Nicolas Pitre.

Quoted 3 lines

Signed-off-by Gregory CLEMENT <[email protected]>

Reviewed-by Will Deacon <[email protected]>

Cc <[email protected]>

This patch doesn't seem to apply on any 3.10-rcX;
maybe I'm doing something wrong, but could you double-check this?

Quoted 24 lines · Ezequiel Garcia

Hi Greg,

Quoted 20 lines · Gregory CLEMENT

This commit fixes the regression on Armada 370 (the kernal hang during boot) introduced by the commit: "ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead".

When coming out of either a Wait for Interrupt (WFI) or a Wait for Event (WFE) IDLE states, a specific timing sensitivity exists between the retiring WFI/WFE instructions and the newly issued subsequent instructions. This sensitivity can result in a CPU hang scenario. The workaround is to insert either a Data Synchronization Barrier (DSB) or Data Memory Barrier (DMB) command immediately after the WFI/WFE instruction.

This commit was based on the work of Lior Amsalem, but heavily modified to apply the errata fix dynamically according to the processor type thanks to the suggestions of Russell King and Nicolas Pitre.

Signed-off-by Gregory CLEMENT <[email protected]>

Reviewed-by Will Deacon <[email protected]>

Cc <[email protected]>

Quoted 2 lines

This patch doesn't seem to apply on any 3.10-rcX;
maybe I'm doing something wrong, but could you double-check this?

Interesting, I had the same issue and thought it was because of my tree, though visually I couldn't spot the issue. It probably was a space/tab issue only.

Quoted 3 lines · Willy Tarreau

Interesting, I had the same issue and thought it was because of my tree, though visually I couldn't spot the issue. It probably was a space/tab issue only.

OK it was probably because of other pending changes since rc6, because it applied perfectly on top of 3.10-rc7.

Quoted 7 lines · Willy Tarreau

Quoted 3 lines · Willy Tarreau

Interesting, I had the same issue and thought it was because of my tree, though visually I couldn't spot the issue. It probably was a space/tab issue only.

OK it was probably because of other pending changes since rc6, because it applied perfectly on top of 3.10-rc7.

It needs its counterpart patch:

049be07053ebbf0ee8543caea23ae7bdf0765bb2
ARM: 7754/1: Fix the CPU ID and the mask associated to the PJ4B

which did made it into -rc7.

Quoted 5 lines · Willy Tarreau

Quoted 3 lines · Willy Tarreau

Interesting, I had the same issue and thought it was because of my tree, though visually I couldn't spot the issue. It probably was a space/tab issue only.

Quoted 2 lines

OK it was probably because of other pending changes since rc6, because it applied perfectly on top of 3.10-rc7.

It needs its counterpart patch:

049be07053ebbf0ee8543caea23ae7bdf0765bb2
ARM: 7754/1: Fix the CPU ID and the mask associated to the PJ4B

Hello,

This path allows to fix one errata for PJ4B CPUs.

Without this the Armada 370 based board can't boot anymore since 3.10-rc1. So this one really need to be applied on 3.10-rc.

Willy Tarreau have reported that with the last version the kernel crashed in !SMP. The problem was that all the pj4b cpu functions were defined in the __CPU_INIT section and in !SMP the code was removed from the memory once the kernel initialization done. In this version I fixed this issue by moving the code outside this section, and the kernel now boots in SMP and !SMP.

Nicolas, would you agree to give your acked-by on this new version before I sumbit it to Russell King's patch system?

Thanks,

V1 -> V2;
- Fixed various coding style and typo issues
- Replaced the "mcr p15, 0, r0, c7, c10, 4" by "dsb"

V2 -> v3:
- As suggested by Russell, the first errata is now applied dynamically according to the processor type

v3 -> v4:
- Moved the glob_equ maco into proc-macro.S
- Split the patch in 2 parts, one for fixing the ID and mask of the PJ4B and the second for fixing the errata itself

v4 -> v5:
- Added #ifdef all the places the new symbols conditionally defined are used.

v5 -> v6:
- Selected the fix by default if MACH_ARMADA_370 is selected, as without it there is no point to use Armada 370 base board.

v6 -> v7:
- Move the pj4b cpu functions outside the CPU_INIT section

Gregory CLEMENT (1):
ARM PJ4B: Add support for errata 4742

 arch/arm/Kconfig                 | 14 ++++++++++++++
 arch/arm/include/asm/glue-proc.h |  9 +++++++++
 arch/arm/mm/proc-macros.S        |  5 +++++
 arch/arm/mm/proc-v7.S            | 34 +++++++++++++++++++++++++++++++---
 4 files changed, 59 insertions(+), 3 deletions(-)

Signature · 1 line

1.8.1.2

This path allows to fix one errata for PJ4B CPUs.

Without this the Armada 370 based board can't boot anymore since 3.10-rc1. So this one really need to be applied on 3.10-rc.

Hello,

Quoted 4 lines · Gregory CLEMENT

This path allows to fix one errata for PJ4B CPUs.

Without this the Armada 370 based board can't boot anymore since 3.10-rc1. So this one really need to be applied on 3.10-rc.

I'd like to point out that this patch is really needed for 3.10-rc, *OR* ae8a8b9553 ("ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead") should be reverted, as it introduces a regression compared to 3.9.

Without one of those two solutions, 3.10 cannot boot on Armada 370 platforms, which is a clear regression compared to 3.9.

Linus has just released 3.10-rc7 and said it would most likely be the last rc.

Quoted 17 lines · Thomas Petazzoni

Hello,

Quoted 4 lines · Gregory CLEMENT

This path allows to fix one errata for PJ4B CPUs.

Without this the Armada 370 based board can't boot anymore since 3.10-rc1. So this one really need to be applied on 3.10-rc.

I'd like to point out that this patch is really needed for 3.10-rc, *OR* ae8a8b9553 ("ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead") should be reverted, as it introduces a regression compared to 3.9.

Without one of those two solutions, 3.10 cannot boot on Armada 370 platforms, which is a clear regression compared to 3.9.

Quoted 2 lines

Linus has just released 3.10-rc7 and said it would most likely be the last rc.

The only thing I can say is that it would have been in -rc7 if the previous revision hadn't contained a mistake.

And I also see no sign of this patch in the patch system yet.