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ARM: dts: imx27: Add SAHARA2 devicetree node

PATCH New Alexander Shiyan 3 participants 9 messages Jun 23, 2013 – Jun 24, 2013

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Device tree bindings Arm i.MX and Layerscape
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Alexander Shiyan

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#0 lore raw

PATCH 1/6 ARM: dts: imx27: Add SAHARA2 devicetree node

From: Alexander Shiyan <[email protected]>

This patch adds the missing (Symmetric/Asymmetric Hashing and Random Accelerator) SAHARA2 devicetree node for i.MX27 CPUs.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/boot/dts/imx27.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/imx27.dtsi +8 -0
index 0695264..04f9154 100644
@@ -351,6 +351,14 @@
 				iram = <&iram>;
 			};
 
+			sahara2: sahara at 10025000 {
+				compatible = "fsl,imx27-sahara";
+				reg = <0x10025000 0x0800>;
+				interrupts = <59>;
+				clocks = <&clks 32>, <&clks 64>;
+				clock-names = "ipg", "ahb";
+			};
+
 			clks: ccm at 10027000{
 				compatible = "fsl,imx27-ccm";
 				reg = <0x10027000 0x1000>;
Signature · 1 line
1.8.1.5
author
#1 lore raw

PATCH 2/6 ARM: dts: imx27: Add AUDMUX devicetree node

From: Alexander Shiyan <[email protected]>

This patch adds the missing (Digital Audio MUX) AUDMUX devicetree node for i.MX27 CPUs.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/boot/dts/imx27.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/boot/dts/imx27.dtsi +7 -0
index 04f9154..5009d93 100644
@@ -260,6 +260,13 @@
 				#interrupt-cells = <2>;
 			};
 
+			audmux: audmux at 10016000 {
+				compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
+				reg = <0x10016000 0x1000>;
+				clocks = <&clks 0>;
+				clock-names = "audmux";
+			};
+
 			cspi3: cspi at 10017000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
Signature · 1 line
1.8.1.5
author
#2 lore raw

PATCH 3/6 ARM: dts: imx27: Rename PWM devicetree node

In reply to Alexander Shiyan

From: Alexander Shiyan <[email protected]>

i.MX27 have only one PWM, so index from PWM devicetree node removed.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/boot/dts/imx27.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/imx27.dtsi +1 -1
index 5009d93..845af3f 100644
@@ -102,7 +102,7 @@
 				clock-names = "ipg", "per";
 			};
 
-			pwm0: pwm at 10006000 {
+			pwm: pwm at 10006000 {
 				compatible = "fsl,imx27-pwm";
 				reg = <0x10006000 0x1000>;
 				interrupts = <23>;
Signature · 1 line
1.8.1.5
author
#3 lore raw

PATCH 4/6 ARM: dts: imx27: Sort entries by address

In reply to Alexander Shiyan

From: Alexander Shiyan <[email protected]>

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/boot/dts/imx27.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
arch/arm/boot/dts/imx27.dtsi +5 -5
index 845af3f..85890d8 100644
@@ -382,11 +382,6 @@
 			};
 		};
 
-		iram: iram at ffff4c00 {
-			compatible = "mmio-sram";
-			reg = <0xffff4c00 0xb400>;
-		};
-
 		nfc: nand at d8000000 {
 			#address-cells = <1>;
 			#size-cells = <1>;

@@ -396,5 +391,10 @@
 			clocks = <&clks 54>;
 			status = "disabled";
 		};
+
+		iram: iram at ffff4c00 {
+			compatible = "mmio-sram";
+			reg = <0xffff4c00 0xb400>;
+		};
 	};
 };
Signature · 1 line
1.8.1.5
author
#4 lore raw

PATCH 5/6 ARM: dts: imx27-phytec-phycore-som: Define minimal memory layout

In reply to Alexander Shiyan

From: Alexander Shiyan <[email protected]>

Define minimal memory layout for i.MX27 PCM-038 module. This will help to use appended DTB with non-DT capable bootloaders.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/boot/dts/imx27-phytec-phycore-som.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/imx27-phytec-phycore-som.dts +1 -1
index f010565..76edf59 100644
@@ -17,7 +17,7 @@
 	compatible = "phytec,imx27-pcm038", "fsl,imx27";
 
 	memory {
-		reg = <0x0 0x0>;
+		reg = <0xa0000000 0x08000000>;
 	};
 
 	soc {
Signature · 1 line
1.8.1.5
author
#5 lore raw

PATCH 6/6 ARM: dts: imx27: Add kpp devicetree node

In reply to Alexander Shiyan

From: Alexander Shiyan <[email protected]>

This patch adds the missing (Keypad Port) KPP devicetree node for i.MX27 CPUs.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/boot/dts/imx27.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/imx27.dtsi +8 -0
index 85890d8..c20bbb7 100644
@@ -110,6 +110,14 @@
 				clock-names = "ipg", "per";
 			};
 
+			kpp: kpp at 10008000 {
+				compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
+				reg = <0x10008000 0x1000>;
+				interrupts = <21>;
+				clocks = <&clks 37>;
+				status = "disabled";
+			};
+
 			uart1: serial at 1000a000 {
 				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 				reg = <0x1000a000 0x1000>;
Signature · 1 line
1.8.1.5
maintainer
#6 lore raw

PATCH 1/6 ARM: dts: imx27: Add SAHARA2 devicetree node

In reply to Alexander Shiyan
Quoted 15 lines · Alexander Shiyan

From: Alexander Shiyan <[email protected]>

This patch adds the missing (Symmetric/Asymmetric Hashing and Random Accelerator) SAHARA2 devicetree node for i.MX27 CPUs.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/boot/dts/imx27.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/imx27.dtsi +0 -0
index 0695264..04f9154 100644

arch/arm/boot/dts/imx27.dtsi line 356

Quoted 6 lines
arch/arm/boot/dts/imx27.dtsi +3 -0
@@ -351,6 +351,14 @@
 				iram = <&iram>;
 			};
 
+			sahara2: sahara at 10025000 {
+				compatible = "fsl,imx27-sahara";
+				reg = <0x10025000 0x0800>;

I think we should use the whole register space here which would be 0x1000.

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#7 lore raw

PATCH 1/6 ARM: dts: imx27: Add SAHARA2 devicetree node

Quoted 19 lines · Sascha Hauer
Quoted 18 lines · Alexander Shiyan

From: Alexander Shiyan <[email protected]>

This patch adds the missing (Symmetric/Asymmetric Hashing and Random Accelerator) SAHARA2 devicetree node for i.MX27 CPUs.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/boot/dts/imx27.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/imx27.dtsi +0 -0
index 0695264..04f9154 100644
@@ -351,6 +351,14 @@
 				iram = <&iram>;
 			};
Quoted 6 lines

arch/arm/boot/dts/imx27.dtsi line 356

Quoted 3 lines
arch/arm/boot/dts/imx27.dtsi +3 -0
+			sahara2: sahara at 10025000 {
+				compatible = "fsl,imx27-sahara";
+				reg = <0x10025000 0x0800>;

I think we should use the whole register space here which would be 0x1000.

I just fixed it up and applied the series.

Shawn

maintainer
#8 lore raw

PATCH 1/6 ARM: dts: imx27: Add SAHARA2 devicetree node

In reply to Alexander Shiyan
Quoted 6 lines · Alexander Shiyan

From: Alexander Shiyan <[email protected]>

This patch adds the missing (Symmetric/Asymmetric Hashing and Random Accelerator) SAHARA2 devicetree node for i.MX27 CPUs.

Signed-off-by Alexander Shiyan <[email protected]>

Apart from the one minor comment:

Acked-by Sascha Hauer <[email protected]>
Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |