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Final Samsung PWM support cleanup

PATCH Superseded Tomasz Figa 8 participants 45 messages Jun 20, 2013 – Jun 25, 2013

Subsystems (5)

v2 of 4 Superseded Latest is v4 →

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#0 lore raw

v2 cover Final Samsung PWM support cleanup

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.

This series attempts to achieve this goal by:
1) moving remaining Samsung platforms to the new clocksource driver
2) removing old clocksource driver
3) adding new multiplatform- and DT-aware PWM driver
4) moving all Samsung platforms to use the new PWM driver
5) removing old PWM driver
6) removing all PWM-related code that is not used anymore

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage I decided to keep the old driver, add new one, move all platforms to it and then remove the old one.

See particular patches for more detailed descriptions.

On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a scope):

Changes since v1:
- made sure that suspend/resume is handled correctly in both clocksource and PWM drivers,
- fixed incorrect definition of AUTORELOAD bit for channel 4,
- fixed order of registering PWM device and calling samsung_bl_set(), which assumes that PWM device has been already registered,
- corrected commit messages of several patches,
- addressed all the valid comments from reviewers, including cleanup of most code originally copied from previous PWM driver,
- rebased on top of current Kgene's for-next,
- tested on Exynos4210, verifying correct PWM output with a scope.

Needs testing on other platforms as I could only compile test for them. Tomasz Figa (18):
ARM: SAMSUNG: Unify base address definitions of timer block
ARM: SAMSUNG: Add new PWM platform device
ARM: SAMSUNG: Set PWM platform data
clocksource: samsung_pwm_timer: Cache clocksource register address
clocksource: samsung_pwm_timer: Do not use clocksource_mmio
clocksource: samsung_pwm_timer: Handle suspend/resume correctly
ARM: SAMSUNG: Move all platforms to new clocksource driver
ARM: SAMSUNG: Remove old samsung-time driver
ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
pwm: samsung: Rename to pwm-samsung-legacy
pwm: Add new pwm-samsung driver
ARM: SAMSUNG: Rework private data handling in dev-backlight
ARM: SAMSUNG: Modify board files to use new PWM platform device
pwm: Remove superseded pwm-samsung-legacy driver
ARM: SAMSUNG: Remove old PWM timer platform devices
ARM: SAMSUNG: Remove pwm-clock infrastructure
ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
ARM: SAMSUNG: Remove plat/regs-timer.h header

 arch/arm/Kconfig                                   |   1 -
 arch/arm/mach-s3c24xx/Kconfig                      |  12 +-
 arch/arm/mach-s3c24xx/clock-s3c2410.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2412.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2416.c              |   2 -
 arch/arm/mach-s3c24xx/clock-s3c2443.c              |   2 -
 arch/arm/mach-s3c24xx/common.c                     |  27 +
 arch/arm/mach-s3c24xx/include/mach/map.h           |   2 +
 arch/arm/mach-s3c24xx/mach-h1940.c                 |   4 +-
 arch/arm/mach-s3c24xx/mach-rx1950.c                |   5 +-
 arch/arm/mach-s3c64xx/Kconfig                      |   4 +-
 arch/arm/mach-s3c64xx/clock.c                      |   2 -
 arch/arm/mach-s3c64xx/common.c                     |  32 +-
 arch/arm/mach-s3c64xx/include/mach/irqs.h          |   8 -
 arch/arm/mach-s3c64xx/include/mach/map.h           |   1 +
 arch/arm/mach-s3c64xx/irq-pm.c                     |   2 -
 arch/arm/mach-s3c64xx/mach-crag6410.c              |   4 +-
 arch/arm/mach-s3c64xx/mach-hmt.c                   |   4 +-
 arch/arm/mach-s3c64xx/mach-smartq.c                |   4 +-
 arch/arm/mach-s3c64xx/mach-smdk6410.c              |   5 +-
 arch/arm/mach-s5p64x0/Kconfig                      |   4 +-
 arch/arm/mach-s5p64x0/clock-s5p6440.c              |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6450.c              |   2 -
 arch/arm/mach-s5p64x0/common.c                     |  27 +
 arch/arm/mach-s5p64x0/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5p64x0/include/mach/map.h           |   1 +
 arch/arm/mach-s5p64x0/mach-smdk6440.c              |   5 +-
 arch/arm/mach-s5p64x0/mach-smdk6450.c              |   5 +-
 arch/arm/mach-s5p64x0/pm.c                         |   3 -
 arch/arm/mach-s5pc100/Kconfig                      |   2 +-
 arch/arm/mach-s5pc100/clock.c                      |   2 -
 arch/arm/mach-s5pc100/common.c                     |  28 +
 arch/arm/mach-s5pc100/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pc100/include/mach/map.h           |   1 +
 arch/arm/mach-s5pc100/mach-smdkc100.c              |   5 +-
 arch/arm/mach-s5pv210/Kconfig                      |   2 +-
 arch/arm/mach-s5pv210/clock.c                      |   1 -
 arch/arm/mach-s5pv210/common.c                     |  28 +
 arch/arm/mach-s5pv210/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pv210/include/mach/map.h           |   1 +
 arch/arm/mach-s5pv210/mach-smdkv210.c              |   5 +-
 arch/arm/mach-s5pv210/pm.c                         |  10 -
 arch/arm/plat-samsung/Kconfig                      |  14 -
 arch/arm/plat-samsung/Makefile                     |   3 -
 arch/arm/plat-samsung/dev-backlight.c              |  61 +-
 arch/arm/plat-samsung/devs.c                       |  42 +-
 arch/arm/plat-samsung/include/plat/clock.h         |   4 -
 arch/arm/plat-samsung/include/plat/devs.h          |   1 +
 arch/arm/plat-samsung/include/plat/irq-vic-timer.h |  13 -
 arch/arm/plat-samsung/include/plat/irqs.h          |   9 -
 arch/arm/plat-samsung/include/plat/pwm-clock.h     |  81 ---
 arch/arm/plat-samsung/include/plat/pwm-core.h      |  24 +
 arch/arm/plat-samsung/include/plat/regs-timer.h    | 124 ----
 arch/arm/plat-samsung/include/plat/samsung-time.h  |  23 -
 arch/arm/plat-samsung/irq-vic-timer.c              |  98 ---
 arch/arm/plat-samsung/pwm-clock.c                  | 474 --------------
 arch/arm/plat-samsung/s5p-irq.c                    |   4 -
 arch/arm/plat-samsung/samsung-time.c               | 394 ------------
 drivers/clocksource/samsung_pwm_timer.c            |  84 +--
 drivers/pwm/pwm-samsung.c                          | 694 ++++++++++++++-------
 60 files changed, 766 insertions(+), 1644 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
 create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
 delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
 delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
 delete mode 100644 arch/arm/plat-samsung/samsung-time.c
Signature · 1 line
1.8.2.1
#1 lore raw

PATCH v2 1/18 ARM: SAMSUNG: Unify base address definitions of timer block

From: Tomasz Figa <[email protected]>

This patch makes all defintions of timer block base address use the same prefix to allow using the common name to define platform device resource.

---
 arch/arm/mach-s3c24xx/include/mach/map.h | 2 ++
 arch/arm/mach-s3c64xx/include/mach/map.h | 1 +
 arch/arm/mach-s5p64x0/include/mach/map.h | 1 +
 arch/arm/mach-s5pc100/include/mach/map.h | 1 +
 arch/arm/mach-s5pv210/include/mach/map.h | 1 +
 5 files changed, 6 insertions(+)
arch/arm/mach-s3c24xx/include/mach/map.h +2 -0
index 8ba381f..444793f 100644
@@ -167,4 +167,6 @@
 #define S3C_PA_SPI0		S3C2443_PA_SPI0
 #define S3C_PA_SPI1		S3C2443_PA_SPI1
 
+#define SAMSUNG_PA_TIMER	S3C2410_PA_TIMER
+
 #endif /* __ASM_ARCH_MAP_H */
arch/arm/mach-s3c64xx/include/mach/map.h +1 -0
index 8e2097b..f55ccb1 100644
@@ -121,5 +121,6 @@
 #define SAMSUNG_PA_ADC		S3C64XX_PA_ADC
 #define SAMSUNG_PA_CFCON	S3C64XX_PA_CFCON
 #define SAMSUNG_PA_KEYPAD	S3C64XX_PA_KEYPAD
+#define SAMSUNG_PA_TIMER	S3C64XX_PA_TIMER
 
 #endif /* __ASM_ARCH_6400_MAP_H */
arch/arm/mach-s5p64x0/include/mach/map.h +1 -0
index 0c0175d..50a6e96 100644
@@ -76,6 +76,7 @@
 #define S5P_PA_TIMER		S5P64X0_PA_TIMER
 
 #define SAMSUNG_PA_ADC		S5P64X0_PA_ADC
+#define SAMSUNG_PA_TIMER	S5P64X0_PA_TIMER
 
 /* UART */
 
arch/arm/mach-s5pc100/include/mach/map.h +1 -0
index 54bc4f8..2550b61 100644
@@ -116,6 +116,7 @@
 #define SAMSUNG_PA_ADC			S5PC100_PA_TSADC
 #define SAMSUNG_PA_CFCON		S5PC100_PA_CFCON
 #define SAMSUNG_PA_KEYPAD		S5PC100_PA_KEYPAD
+#define SAMSUNG_PA_TIMER		S5PC100_PA_TIMER
 
 #define S5PC100_VA_OTHERS		(S3C_VA_SYS + 0x10000)
 
arch/arm/mach-s5pv210/include/mach/map.h +1 -0
index b7c8a19..763929a 100644
@@ -139,6 +139,7 @@
 #define SAMSUNG_PA_ADC			S5PV210_PA_ADC
 #define SAMSUNG_PA_CFCON		S5PV210_PA_CFCON
 #define SAMSUNG_PA_KEYPAD		S5PV210_PA_KEYPAD
+#define SAMSUNG_PA_TIMER		S5PV210_PA_TIMER
 
 /* UART */
 
Signature · 1 line
1.8.2.1
#2 lore raw

PATCH v2 2/18 ARM: SAMSUNG: Add new PWM platform device

In reply to Tomasz Figa

This patch adds new samsung_device_pwm platform device that represents the whole PWM/timer block and includes memory and IRQ resources.

---
 arch/arm/plat-samsung/devs.c                  | 17 +++++++++++++++++
 arch/arm/plat-samsung/include/plat/devs.h     |  1 +
 arch/arm/plat-samsung/include/plat/pwm-core.h | 24 ++++++++++++++++++++++++
 3 files changed, 42 insertions(+)
 create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
arch/arm/plat-samsung/devs.c +17 -0
index 0f9c3f4..bba6d78 100644
@@ -58,6 +58,7 @@
 #include <plat/keypad.h>
 #include <linux/platform_data/mmc-s3cmci.h>
 #include <linux/platform_data/mtd-nand-s3c2410.h>
+#include <plat/pwm-core.h>
 #include <plat/sdhci.h>
 #include <linux/platform_data/touchscreen-s3c2410.h>
 #include <linux/platform_data/usb-s3c2410_udc.h>
@@ -1127,6 +1128,22 @@ struct platform_device s3c_device_timer[] = {
 	[3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
 	[4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
 };
+
+static struct resource samsung_pwm_resource[] = {
+	DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
+};
+
+struct platform_device samsung_device_pwm = {
+	.name		= "samsung-pwm",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(samsung_pwm_resource),
+	.resource	= samsung_pwm_resource,
+};
+
+void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
+{
+	samsung_device_pwm.dev.platform_data = pd;
+}
 #endif /* CONFIG_SAMSUNG_DEV_PWM */
 
 /* RTC */
arch/arm/plat-samsung/include/plat/devs.h +1 -0
index 87d501f..0dc4ac4 100644
@@ -134,6 +134,7 @@ extern struct platform_device exynos4_device_spdif;
 
 extern struct platform_device samsung_asoc_idma;
 extern struct platform_device samsung_device_keypad;
+extern struct platform_device samsung_device_pwm;
 
 /* s3c2440 specific devices */
 
arch/arm/plat-samsung/include/plat/pwm-core.h new file +24 -0
new file mode 100644
index 0000000..df50f5c
@@ -0,0 +1,24 @@
+/*
+ * linux/arch/arm/plat-samsung/onenand-core.h
+ *
+ *  Copyright (c) 2013 Tomasz Figa <[email protected]>
+ *
+ * Samsung PWM Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWM_CORE_H
+#define __ASM_ARCH_PWM_CORE_H __FILE__
+
+#include <clocksource/samsung_pwm.h>
+
+#ifdef CONFIG_SAMSUNG_DEV_PWM
+extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd);
+#else
+static inline void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) { }
+#endif
+
+#endif /* __ASM_ARCH_PWM_CORE_H */
Signature · 1 line
1.8.2.1
#3 lore raw

PATCH v2 3/18 ARM: SAMSUNG: Set PWM platform data

In reply to Tomasz Figa

From: Tomasz Figa <[email protected]>

This patch adds PWM platform data needed for legacy (non-DT) platforms to handle SoC-specific bits of the PWM/timer block.

---
 arch/arm/mach-s3c24xx/common.c | 11 +++++++++++
 arch/arm/mach-s3c64xx/common.c | 11 +++++++++++
 arch/arm/mach-s5p64x0/common.c | 10 ++++++++++
 arch/arm/mach-s5pc100/common.c | 11 +++++++++++
 arch/arm/mach-s5pv210/common.c | 11 +++++++++++
 5 files changed, 54 insertions(+)
arch/arm/mach-s3c24xx/common.c +11 -0
index c157103..e5e7d7d 100644
@@ -27,6 +27,7 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/serial_core.h>
+#include <clocksource/samsung_pwm.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 #include <linux/io.h>
@@ -49,6 +50,7 @@
 #include <plat/clock.h>
 #include <plat/cpu-freq.h>
 #include <plat/pll.h>
+#include <plat/pwm-core.h>
 
 #include "common.h"
 
@@ -216,6 +218,13 @@ static void s3c24xx_default_idle(void)
 		     S3C2410_CLKCON);
 }
 
+static struct samsung_pwm_variant s3c24xx_pwm_variant = {
+	.bits		= 16,
+	.div_base	= 1,
+	.has_tint_cstat	= false,
+	.tclk_mask	= (1 << 4),
+};
+
 void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 {
 	arm_pm_idle = s3c24xx_default_idle;
@@ -232,6 +241,8 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 	s3c24xx_init_cpu();
 
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+	samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
 }
 
 /* Serial port registrations */
arch/arm/mach-s3c64xx/common.c +11 -0
index 1aed6f4..0ab97c3 100644
@@ -26,6 +26,7 @@
 #include <linux/irq.h>
 #include <linux/gpio.h>
 #include <linux/irqchip/arm-vic.h>
+#include <clocksource/samsung_pwm.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -42,6 +43,7 @@
 #include <plat/gpio-cfg.h>
 #include <plat/irq-uart.h>
 #include <plat/irq-vic-timer.h>
+#include <plat/pwm-core.h>
 #include <plat/regs-irqtype.h>
 #include <plat/regs-serial.h>
 #include <plat/watchdog-reset.h>
@@ -148,6 +150,13 @@ static struct device s3c64xx_dev = {
 	.bus	= &s3c64xx_subsys,
 };
 
+static struct samsung_pwm_variant s3c64xx_pwm_variant = {
+	.bits		= 32,
+	.div_base	= 0,
+	.has_tint_cstat	= true,
+	.tclk_mask	= (1 << 7) | (1 << 6) | (1 << 5),
+};
+
 /* read cpu identification code */
 
 void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
@@ -160,6 +169,8 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
 	s3c64xx_init_cpu();
 
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+	samsung_pwm_set_platdata(&s3c64xx_pwm_variant);
 }
 
 static __init int s3c64xx_dev_init(void)
arch/arm/mach-s5p64x0/common.c +10 -0
index 76d0053..c14d719 100644
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 #include <linux/device.h>
 #include <linux/serial_core.h>
+#include <clocksource/samsung_pwm.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/dma-mapping.h>
@@ -46,6 +47,7 @@
 #include <plat/fb-core.h>
 #include <plat/spi-core.h>
 #include <plat/gpio-cfg.h>
+#include <plat/pwm-core.h>
 #include <plat/regs-irqtype.h>
 #include <plat/regs-serial.h>
 #include <plat/watchdog-reset.h>
@@ -156,6 +158,13 @@ static void s5p64x0_idle(void)
 	cpu_do_idle();
 }
 
+static struct samsung_pwm_variant s5p64x0_pwm_variant = {
+	.bits		= 32,
+	.div_base	= 0,
+	.has_tint_cstat	= true,
+	.tclk_mask	= 0,
+};
+
 /*
  * s5p64x0_map_io
  *
@@ -175,6 +184,7 @@ void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
 	samsung_wdt_reset_init(S3C_VA_WATCHDOG);
 
+	samsung_pwm_set_platdata(&s5p64x0_pwm_variant);
 }
 
 void __init s5p6440_map_io(void)
arch/arm/mach-s5pc100/common.c +11 -0
index 5110315..a62e8a4 100644
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <linux/device.h>
 #include <linux/serial_core.h>
+#include <clocksource/samsung_pwm.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 
@@ -45,6 +46,7 @@
 #include <plat/fb-core.h>
 #include <plat/iic-core.h>
 #include <plat/onenand-core.h>
+#include <plat/pwm-core.h>
 #include <plat/spi-core.h>
 #include <plat/regs-serial.h>
 #include <plat/watchdog-reset.h>
@@ -131,6 +133,13 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
 	}
 };
 
+static struct samsung_pwm_variant s5pc100_pwm_variant = {
+	.bits		= 32,
+	.div_base	= 0,
+	.has_tint_cstat	= true,
+	.tclk_mask	= (1 << 5),
+};
+
 /*
  * s5pc100_map_io
  *
@@ -148,6 +157,8 @@ void __init s5pc100_init_io(struct map_desc *mach_desc, int size)
 	s5p_init_cpu(S5P_VA_CHIPID);
 
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+	samsung_pwm_set_platdata(&s5pc100_pwm_variant);
 }
 
 void __init s5pc100_map_io(void)
arch/arm/mach-s5pv210/common.c +11 -0
index 9dfe93e..4eba33d 100644
@@ -19,6 +19,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/device.h>
+#include <clocksource/samsung_pwm.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/dma-mapping.h>
@@ -42,6 +43,7 @@
 #include <plat/fimc-core.h>
 #include <plat/iic-core.h>
 #include <plat/keypad-core.h>
+#include <plat/pwm-core.h>
 #include <plat/tv-core.h>
 #include <plat/spi-core.h>
 #include <plat/regs-serial.h>
@@ -148,6 +150,13 @@ void s5pv210_restart(char mode, const char *cmd)
 	__raw_writel(0x1, S5P_SWRESET);
 }
 
+static struct samsung_pwm_variant s5pv210_pwm_variant = {
+	.bits		= 32,
+	.div_base	= 0,
+	.has_tint_cstat	= true,
+	.tclk_mask	= (1 << 5),
+};
+
 /*
  * s5pv210_map_io
  *
@@ -165,6 +174,8 @@ void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
 	s5p_init_cpu(S5P_VA_CHIPID);
 
 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+	samsung_pwm_set_platdata(&s5pv210_pwm_variant);
 }
 
 void __init s5pv210_map_io(void)
Signature · 1 line
1.8.2.1
#4 lore raw

PATCH v2 4/18 clocksource: samsung_pwm_timer: Cache clocksource register address

In reply to Tomasz Figa

Instead of calculating register every time the timer should be read, we can just do it one time at initialization and store the address in driver data.

---
 drivers/clocksource/samsung_pwm_timer.c | 33 ++++++++-------------------------
 1 file changed, 8 insertions(+), 25 deletions(-)
drivers/clocksource/samsung_pwm_timer.c +8 -25
index 553115b..d361b5e 100644
@@ -54,6 +54,7 @@ EXPORT_SYMBOL(samsung_pwm_lock);
 
 struct samsung_pwm_clocksource {
 	void __iomem *base;
+	void __iomem *source_reg;
 	unsigned int irq[SAMSUNG_PWM_NUM];
 	struct samsung_pwm_variant variant;
 
@@ -286,23 +287,6 @@ static void __init samsung_clockevent_init(void)
 	}
 }
 
-static void __iomem *samsung_timer_reg(void)
-{
-	switch (pwm.source_id) {
-	case 0:
-	case 1:
-	case 2:
-	case 3:
-		return pwm.base + pwm.source_id * 0x0c + 0x14;
-
-	case 4:
-		return pwm.base + 0x40;
-
-	default:
-		BUG();
-	}
-}
-
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some
@@ -312,17 +296,11 @@ static void __iomem *samsung_timer_reg(void)
  */
 static u32 notrace samsung_read_sched_clock(void)
 {
-	void __iomem *reg = samsung_timer_reg();
-
-	if (!reg)
-		return 0;
-
-	return ~__raw_readl(reg);
+	return ~__raw_readl(pwm.source_reg);
 }
 
 static void __init samsung_clocksource_init(void)
 {
-	void __iomem *reg = samsung_timer_reg();
 	unsigned long pclk;
 	unsigned long clock_rate;
 	int ret;
@@ -337,10 +315,15 @@ static void __init samsung_clocksource_init(void)
 	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
 	samsung_time_start(pwm.source_id, true);
 
+	if (pwm.source_id == 4)
+		pwm.source_reg = pwm.base + 0x40;
+	else
+		pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14;
+
 	setup_sched_clock(samsung_read_sched_clock,
 						pwm.variant.bits, clock_rate);
 
-	ret = clocksource_mmio_init(reg, "samsung_clocksource_timer",
+	ret = clocksource_mmio_init(pwm.source_reg, "samsung_clocksource_timer",
 					clock_rate, 250, pwm.variant.bits,
 					clocksource_mmio_readl_down);
 	if (ret)
Signature · 1 line
1.8.2.1
#5 lore raw

PATCH v2 5/18 clocksource: samsung_pwm_timer: Do not use clocksource_mmio

In reply to Tomasz Figa

In case of Samsung PWM timer, clocksource MMIO can not be used, because custom suspend/resume callbacks are required.

---
 drivers/clocksource/samsung_pwm_timer.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)
drivers/clocksource/samsung_pwm_timer.c +15 -4
index d361b5e..ff150d1 100644
@@ -287,6 +287,18 @@ static void __init samsung_clockevent_init(void)
 	}
 }
 
+static cycle_t samsung_clocksource_read(struct clocksource *c)
+{
+	return ~readl_relaxed(pwm.source_reg);
+}
+
+static struct clocksource samsung_clocksource = {
+	.name		= "samsung_clocksource_timer",
+	.rating		= 250,
+	.read		= samsung_clocksource_read,
+	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some
@@ -296,7 +308,7 @@ static void __init samsung_clockevent_init(void)
  */
 static u32 notrace samsung_read_sched_clock(void)
 {
-	return ~__raw_readl(pwm.source_reg);
+	return samsung_clocksource_read(NULL);
 }
 
 static void __init samsung_clocksource_init(void)
@@ -323,9 +335,8 @@ static void __init samsung_clocksource_init(void)
 	setup_sched_clock(samsung_read_sched_clock,
 						pwm.variant.bits, clock_rate);
 
-	ret = clocksource_mmio_init(pwm.source_reg, "samsung_clocksource_timer",
-					clock_rate, 250, pwm.variant.bits,
-					clocksource_mmio_readl_down);
+	samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
+	ret = clocksource_register_hz(&samsung_clocksource, clock_rate);
 	if (ret)
 		panic("samsung_clocksource_timer: can't register clocksource\n");
 }
Signature · 1 line
1.8.2.1
#6 lore raw

PATCH v2 6/18 clocksource: samsung_pwm_timer: Handle suspend/resume correctly

In reply to Tomasz Figa

Current suspend/resume handling of the driver was broken, because:
- periodic timer was being enabled in CLOCK_EVT_MODE_RESUME mode, which does not seem to be correct behavior looking at other platforms,
- PWM divisors need to be restored, but they were not,
- clockevent interrupt mask needs to be restored, but it was not,
- clocksource was being restored in clockevent resume callback.

This patch fixes issues mentioned above, making suspend/resume handling in the driver correct.

---
 drivers/clocksource/samsung_pwm_timer.c | 42 ++++++++++++++++++++++-----------
 1 file changed, 28 insertions(+), 14 deletions(-)
drivers/clocksource/samsung_pwm_timer.c +28 -14
index ff150d1..2977043 100644
@@ -196,17 +196,6 @@ static int samsung_set_next_event(unsigned long cycles,
 	return 0;
 }
 
-static void samsung_timer_resume(void)
-{
-	/* event timer restart */
-	samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1);
-	samsung_time_start(pwm.event_id, true);
-
-	/* source timer restart */
-	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
-	samsung_time_start(pwm.source_id, true);
-}
-
 static void samsung_set_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt)
 {
@@ -223,20 +212,29 @@ static void samsung_set_mode(enum clock_event_mode mode,
 
 	case CLOCK_EVT_MODE_UNUSED:
 	case CLOCK_EVT_MODE_SHUTDOWN:
-		break;
-
 	case CLOCK_EVT_MODE_RESUME:
-		samsung_timer_resume();
 		break;
 	}
 }
 
+static void samsung_clockevent_resume(struct clock_event_device *cev)
+{
+	samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);
+	samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);
+
+	if (pwm.variant.has_tint_cstat) {
+		u32 mask = (1 << pwm.event_id);
+		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
+	}
+}
+
 static struct clock_event_device time_event_device = {
 	.name		= "samsung_event_timer",
 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 200,
 	.set_next_event	= samsung_set_next_event,
 	.set_mode	= samsung_set_mode,
+	.resume		= samsung_clockevent_resume,
 };
 
 static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
@@ -287,6 +285,20 @@ static void __init samsung_clockevent_init(void)
 	}
 }
 
+static void samsung_clocksource_suspend(struct clocksource *cs)
+{
+	samsung_time_stop(pwm.source_id);
+}
+
+static void samsung_clocksource_resume(struct clocksource *cs)
+{
+	samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);
+	samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);
+
+	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
+	samsung_time_start(pwm.source_id, true);
+}
+
 static cycle_t samsung_clocksource_read(struct clocksource *c)
 {
 	return ~readl_relaxed(pwm.source_reg);
@@ -296,6 +308,8 @@ static struct clocksource samsung_clocksource = {
 	.name		= "samsung_clocksource_timer",
 	.rating		= 250,
 	.read		= samsung_clocksource_read,
+	.suspend	= samsung_clocksource_suspend,
+	.resume		= samsung_clocksource_resume,
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
Signature · 1 line
1.8.2.1
#7 lore raw

PATCH v2 7/18 ARM: SAMSUNG: Move all platforms to new clocksource driver

In reply to Tomasz Figa

This patch moves all Samsung platforms using PWM clocksource from legacy samsung-time to new samsung-pwm-timer driver.

---
 arch/arm/mach-s3c24xx/Kconfig  | 12 ++++++------
 arch/arm/mach-s3c24xx/common.c | 16 ++++++++++++++++
 arch/arm/mach-s3c64xx/Kconfig  |  4 ++--
 arch/arm/mach-s3c64xx/common.c | 17 +++++++++++++++++
 arch/arm/mach-s5p64x0/Kconfig  |  4 ++--
 arch/arm/mach-s5p64x0/common.c | 17 +++++++++++++++++
 arch/arm/mach-s5pc100/Kconfig  |  2 +-
 arch/arm/mach-s5pc100/common.c | 17 +++++++++++++++++
 arch/arm/mach-s5pv210/Kconfig  |  2 +-
 arch/arm/mach-s5pv210/common.c | 17 +++++++++++++++++
 10 files changed, 96 insertions(+), 12 deletions(-)
arch/arm/mach-s3c24xx/Kconfig +6 -6
index 6d9252e..46f9a9c 100644
@@ -30,7 +30,7 @@ config CPU_S3C2410
 	select S3C2410_CLOCK
 	select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
 	select S3C2410_PM if PM
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	select SAMSUNG_WDT_RESET
 	help
 	  Support for S3C2410 and S3C2410A family from the S3C24XX line
@@ -42,7 +42,7 @@ config CPU_S3C2412
 	select CPU_LLSERIAL_S3C2440
 	select S3C2412_DMA if S3C24XX_DMA
 	select S3C2412_PM if PM
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	help
 	  Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
@@ -54,7 +54,7 @@ config CPU_S3C2416
 	select S3C2443_COMMON
 	select S3C2443_DMA if S3C24XX_DMA
 	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	help
 	  Support for the S3C2416 SoC from the S3C24XX line
 
@@ -65,7 +65,7 @@ config CPU_S3C2440
 	select S3C2410_CLOCK
 	select S3C2410_PM if PM
 	select S3C2440_DMA if S3C24XX_DMA
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	help
 	  Support for S3C2440 Samsung Mobile CPU based systems.
 
@@ -75,7 +75,7 @@ config CPU_S3C2442
 	select CPU_LLSERIAL_S3C2440
 	select S3C2410_CLOCK
 	select S3C2410_PM if PM
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	help
 	  Support for S3C2442 Samsung Mobile CPU based systems.
 
@@ -91,7 +91,7 @@ config CPU_S3C2443
 	select S3C2443_COMMON
 	select S3C2443_DMA if S3C24XX_DMA
 	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	help
 	  Support for the S3C2443 SoC from the S3C24XX line
 
arch/arm/mach-s3c24xx/common.c +16 -0
index e5e7d7d..457261c 100644
@@ -245,6 +245,22 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 	samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
 }
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s3c24xx_pwm_variant);
+}
+
 /* Serial port registrations */
 
 #define S3C2410_PA_UART0      (S3C24XX_PA_UART)
arch/arm/mach-s3c64xx/Kconfig +2 -2
index 2057853..f78a6a0 100644
@@ -17,13 +17,13 @@ config PLAT_S3C64XX
 # Configuration options for the S3C6410 CPU
 
 config CPU_S3C6400
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	bool
 	help
 	  Enable S3C6400 CPU support
 
 config CPU_S3C6410
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	bool
 	help
 	  Enable S3C6410 CPU support
arch/arm/mach-s3c64xx/common.c +17 -0
index 0ab97c3..91df45a 100644
@@ -157,6 +157,23 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = {
 	.tclk_mask	= (1 << 7) | (1 << 6) | (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s3c64xx_pwm_variant);
+}
+
 /* read cpu identification code */
 
 void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
arch/arm/mach-s5p64x0/Kconfig +2 -2
index 5a707bd..a39cd9e 100644
@@ -11,14 +11,14 @@ config CPU_S5P6440
 	bool
 	select S5P_SLEEP if PM
 	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	select SAMSUNG_WAKEMASK if PM
 	help
 	  Enable S5P6440 CPU support
 
 config CPU_S5P6450
 	bool
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	select S5P_SLEEP if PM
 	select SAMSUNG_DMADEV
 	select SAMSUNG_WAKEMASK if PM
arch/arm/mach-s5p64x0/common.c +17 -0
index c14d719..6ee5638 100644
@@ -165,6 +165,23 @@ static struct samsung_pwm_variant s5p64x0_pwm_variant = {
 	.tclk_mask	= 0,
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s5p64x0_pwm_variant);
+}
+
 /*
  * s5p64x0_map_io
  *
arch/arm/mach-s5pc100/Kconfig +1 -1
index 2f456a4..2094a9b 100644
@@ -11,7 +11,7 @@ config CPU_S5PC100
 	bool
 	select S5P_EXT_INT
 	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	help
 	  Enable S5PC100 CPU support
 
arch/arm/mach-s5pc100/common.c +17 -0
index a62e8a4..544a9c6 100644
@@ -140,6 +140,23 @@ static struct samsung_pwm_variant s5pc100_pwm_variant = {
 	.tclk_mask	= (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s5pc100_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s5pc100_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s5pc100_pwm_variant);
+}
+
 /*
  * s5pc100_map_io
  *
arch/arm/mach-s5pv210/Kconfig +1 -1
index 0963283..07cdff7 100644
@@ -15,7 +15,7 @@ config CPU_S5PV210
 	select S5P_PM if PM
 	select S5P_SLEEP if PM
 	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM
 	help
 	  Enable S5PV210 CPU support
 
arch/arm/mach-s5pv210/common.c +17 -0
index 4eba33d..d28affb 100644
@@ -157,6 +157,23 @@ static struct samsung_pwm_variant s5pv210_pwm_variant = {
 	.tclk_mask	= (1 << 5),
 };
 
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+	s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+	};
+
+	samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &s5pv210_pwm_variant);
+}
+
 /*
  * s5pv210_map_io
  *
Signature · 1 line
1.8.2.1
#8 lore raw

PATCH v2 7/18 ARM: SAMSUNG: Move all platforms to new clocksource driver

Quoted 22 lines · Tomasz Figa

This patch moves all Samsung platforms using PWM clocksource from legacy samsung-time to new samsung-pwm-timer driver.

---
  arch/arm/mach-s3c24xx/Kconfig  | 12 ++++++------
  arch/arm/mach-s3c24xx/common.c | 16 ++++++++++++++++
  arch/arm/mach-s3c64xx/Kconfig  |  4 ++--
  arch/arm/mach-s3c64xx/common.c | 17 +++++++++++++++++
  arch/arm/mach-s5p64x0/Kconfig  |  4 ++--
  arch/arm/mach-s5p64x0/common.c | 17 +++++++++++++++++
  arch/arm/mach-s5pc100/Kconfig  |  2 +-
  arch/arm/mach-s5pc100/common.c | 17 +++++++++++++++++
  arch/arm/mach-s5pv210/Kconfig  |  2 +-
  arch/arm/mach-s5pv210/common.c | 17 +++++++++++++++++
  10 files changed, 96 insertions(+), 12 deletions(-)
arch/arm/mach-s3c24xx/Kconfig +0 -0
index 6d9252e..46f9a9c 100644

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2410 · line 33

Quoted 5 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -30,7 +30,7 @@ config CPU_S3C2410
  	select S3C2410_CLOCK
  	select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
  	select S3C2410_PM if PM
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Please put this in alphabetical ordering, this is just replacing though.

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2412 · line 45

Quoted 9 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  	select SAMSUNG_WDT_RESET
  	help
  	  Support for S3C2410 and S3C2410A family from the S3C24XX line
@@ -42,7 +42,7 @@ config CPU_S3C2412
  	select CPU_LLSERIAL_S3C2440
  	select S3C2412_DMA if S3C24XX_DMA
  	select S3C2412_PM if PM
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same as above.

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2416 · line 57

Quoted 9 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  	help
  	  Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
@@ -54,7 +54,7 @@ config CPU_S3C2416
  	select S3C2443_COMMON
  	select S3C2443_DMA if S3C24XX_DMA
  	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same as above.

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2440 · line 68

Quoted 9 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  	help
  	  Support for the S3C2416 SoC from the S3C24XX line
 
@@ -65,7 +65,7 @@ config CPU_S3C2440
  	select S3C2410_CLOCK
  	select S3C2410_PM if PM
  	select S3C2440_DMA if S3C24XX_DMA
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same as above.

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2442 · line 78

Quoted 9 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  	help
  	  Support for S3C2440 Samsung Mobile CPU based systems.
 
@@ -75,7 +75,7 @@ config CPU_S3C2442
  	select CPU_LLSERIAL_S3C2440
  	select S3C2410_CLOCK
  	select S3C2410_PM if PM
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2443 · line 94

Quoted 9 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  	help
  	  Support for S3C2442 Samsung Mobile CPU based systems.
 
@@ -91,7 +91,7 @@ config CPU_S3C2443
  	select S3C2443_COMMON
  	select S3C2443_DMA if S3C24XX_DMA
  	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

[...]

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2443 · line 96

Quoted 4 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  config CPU_S3C6400
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

arch/arm/mach-s3c24xx/Kconfig

Quoted 7 lines
arch/arm/mach-s3c24xx/Kconfig +0 -0
  	bool

help
Enable S3C6400 CPU support

config CPU_S3C6410

arch/arm/mach-s3c24xx/Kconfig +1 -1
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

Quoted 3 lines

bool
help
Enable S3C6410 CPU support

[...]

arch/arm/mach-s3c24xx/Kconfig config CPU_S5P6440 · line 14

Quoted 6 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -11,14 +11,14 @@ config CPU_S5P6440
  	bool
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

arch/arm/mach-s3c24xx/Kconfig config CPU_S5P6440 · line 21

Quoted 8 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  	select SAMSUNG_WAKEMASK if PM
  	help
  	  Enable S5P6440 CPU support
 
  config CPU_S5P6450
  	bool
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

[...]

arch/arm/mach-s3c24xx/Kconfig config CPU_S5PC100 · line 14

Quoted 6 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -11,7 +11,7 @@ config CPU_S5PC100
  	bool
  	select S5P_EXT_INT
  	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

[...]

arch/arm/mach-s3c24xx/Kconfig config CPU_S5PV210 · line 18

Quoted 6 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -15,7 +15,7 @@ config CPU_S5PV210
  	select S5P_PM if PM
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

[...]

Let me fix it...

- Kukjin

#9 lore raw

PATCH v2 7/18 ARM: SAMSUNG: Move all platforms to new clocksource driver

Quoted 25 lines · On Tuesday 25 of June 2013 00:33:01 Kukjin Kim wrote:
Quoted 24 lines · Tomasz Figa

This patch moves all Samsung platforms using PWM clocksource from legacy samsung-time to new samsung-pwm-timer driver.

---

  arch/arm/mach-s3c24xx/Kconfig  | 12 ++++++------
  arch/arm/mach-s3c24xx/common.c | 16 ++++++++++++++++
  arch/arm/mach-s3c64xx/Kconfig  |  4 ++--
  arch/arm/mach-s3c64xx/common.c | 17 +++++++++++++++++
  arch/arm/mach-s5p64x0/Kconfig  |  4 ++--
  arch/arm/mach-s5p64x0/common.c | 17 +++++++++++++++++
  arch/arm/mach-s5pc100/Kconfig  |  2 +-
  arch/arm/mach-s5pc100/common.c | 17 +++++++++++++++++
  arch/arm/mach-s5pv210/Kconfig  |  2 +-
  arch/arm/mach-s5pv210/common.c | 17 +++++++++++++++++
  10 files changed, 96 insertions(+), 12 deletions(-)
(quoted diff) +0 -0

b/arch/arm/mach-s3c24xx/Kconfig index 6d9252e..46f9a9c 100644

arch/arm/mach-s3c24xx/Kconfig +0 -0
@@ -30,7 +30,7 @@ config CPU_S3C2410
 
Quoted 8 lines

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2410 · line 33

Quoted 6 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  	select S3C2410_CLOCK
  	select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
  	select S3C2410_PM if PM
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Please put this in alphabetical ordering, this is just replacing though.

Argh, I always forget about this ordering, sorry.

Quoted 150 lines

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2412 · line 47

Quoted 13 lines
arch/arm/mach-s3c24xx/Kconfig +0 -0
  	select SAMSUNG_WDT_RESET

help

Support for S3C2410 and S3C2410A family from the S3C24XX line

arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -42,7 +42,7 @@ config CPU_S3C2412
 
  	select CPU_LLSERIAL_S3C2440
  	select S3C2412_DMA if S3C24XX_DMA
  	select S3C2412_PM if PM
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same as above.

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2416 · line 59

Quoted 12 lines
arch/arm/mach-s3c24xx/Kconfig +0 -0
  	help

Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line

arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -54,7 +54,7 @@ config CPU_S3C2416
 
  	select S3C2443_COMMON
  	select S3C2443_DMA if S3C24XX_DMA
  	select SAMSUNG_CLKSRC
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same as above.

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2440 · line 70

Quoted 12 lines
arch/arm/mach-s3c24xx/Kconfig +0 -0
  	help

Support for the S3C2416 SoC from the S3C24XX line

arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -65,7 +65,7 @@ config CPU_S3C2440
 
  	select S3C2410_CLOCK
  	select S3C2410_PM if PM
  	select S3C2440_DMA if S3C24XX_DMA
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same as above.

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2442 · line 80

Quoted 12 lines
arch/arm/mach-s3c24xx/Kconfig +0 -0
  	help

Support for S3C2440 Samsung Mobile CPU based systems.

arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -75,7 +75,7 @@ config CPU_S3C2442
 
  	select CPU_LLSERIAL_S3C2440
  	select S3C2410_CLOCK
  	select S3C2410_PM if PM
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2443 · line 96

Quoted 12 lines
arch/arm/mach-s3c24xx/Kconfig +0 -0
  	help

Support for S3C2442 Samsung Mobile CPU based systems.

arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -91,7 +91,7 @@ config CPU_S3C2443
 
  	select S3C2443_COMMON
  	select S3C2443_DMA if S3C24XX_DMA
  	select SAMSUNG_CLKSRC
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

[...]

arch/arm/mach-s3c24xx/Kconfig config CPU_S3C2443

Quoted 4 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  config CPU_S3C6400
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

arch/arm/mach-s3c24xx/Kconfig

Quoted 9 lines

bool
help

Enable S3C6400 CPU support

config CPU_S3C6410

arch/arm/mach-s3c24xx/Kconfig +1 -1
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

Quoted 4 lines

bool
help

Enable S3C6410 CPU support

[...]

arch/arm/mach-s3c24xx/Kconfig config CPU_S5P6440 · line 16

Quoted 8 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -11,14 +11,14 @@ config CPU_S5P6440
 
  	bool
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

arch/arm/mach-s3c24xx/Kconfig config CPU_S5P6440

Quoted 11 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
  	select SAMSUNG_WAKEMASK if PM
  	help
 
  	  Enable S5P6440 CPU support
 
  config CPU_S5P6450
 
  	bool
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

[...]

arch/arm/mach-s3c24xx/Kconfig config CPU_S5PC100 · line 16

Quoted 8 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
@@ -11,7 +11,7 @@ config CPU_S5PC100
 
  	bool
  	select S5P_EXT_INT
  	select SAMSUNG_DMADEV
 
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

[...]

Quoted 6 lines
arch/arm/mach-s3c24xx/Kconfig +0 -0
@@ -15,7 +15,7 @@ config CPU_S5PV210
 
  	select S5P_PM if PM
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
 
Quoted 8 lines

arch/arm/mach-s3c24xx/Kconfig config CPU_S5PV210 · line 20

Quoted 2 lines
arch/arm/mach-s3c24xx/Kconfig +1 -1
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Same.

[...]

Let me fix it...

Thanks.

Best regards,
Tomasz

#10 lore raw

PATCH v2 7/18 ARM: SAMSUNG: Move all platforms to new clocksource driver

On 06/25/13 00:38, Tomasz Figa wrote:

[...]

Quoted 7 lines
Quoted 4 lines

Review

Quoted 2 lines
(quoted diff) +1 -1
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Please put this in alphabetical ordering, this is just replacing though.

Argh, I always forget about this ordering, sorry.

no problem ;-)

[...]

Quoted 1 line
Quoted 1 line

Let me fix it...

like following :-)

8<----------------------------------------------

arch/arm/Kconfig +5 -0
index 49d993c..734d85b 100644
@@ -694,6 +694,7 @@ config ARCH_S3C24XX
  	select ARCH_REQUIRE_GPIOLIB
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
  	select HAVE_S3C2410_I2C if I2C
@@ -715,6 +716,7 @@ config ARCH_S3C64XX
  	select ARM_VIC
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select CPU_V6
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
@@ -737,6 +739,7 @@ config ARCH_S5P64X0
  	bool "Samsung S5P6440 S5P6450"
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select CPU_V6
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
@@ -753,6 +756,7 @@ config ARCH_S5PC100
  	select ARCH_REQUIRE_GPIOLIB
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select CPU_V7
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
@@ -770,6 +774,7 @@ config ARCH_S5PV210
  	select ARCH_SPARSEMEM_ENABLE
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select CPU_V7
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
arch/arm/mach-s3c24xx/Kconfig +0 -6
index f2f7088..8124ec7 100644
@@ -30,7 +30,6 @@ config CPU_S3C2410
  	select S3C2410_CLOCK
  	select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
  	select S3C2410_PM if PM
-	select SAMSUNG_HRT
  	help
  	  Support for S3C2410 and S3C2410A family from the S3C24XX line
  	  of Samsung Mobile CPUs.
@@ -41,7 +40,6 @@ config CPU_S3C2412
  	select CPU_LLSERIAL_S3C2440
  	select S3C2412_DMA if S3C24XX_DMA
  	select S3C2412_PM if PM
-	select SAMSUNG_HRT
  	help
  	  Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
@@ -53,7 +51,6 @@ config CPU_S3C2416
  	select S3C2443_COMMON
  	select S3C2443_DMA if S3C24XX_DMA
  	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
  	help
  	  Support for the S3C2416 SoC from the S3C24XX line
 
@@ -64,7 +61,6 @@ config CPU_S3C2440
  	select S3C2410_CLOCK
  	select S3C2410_PM if PM
  	select S3C2440_DMA if S3C24XX_DMA
-	select SAMSUNG_HRT
  	help
  	  Support for S3C2440 Samsung Mobile CPU based systems.
 
@@ -74,7 +70,6 @@ config CPU_S3C2442
  	select CPU_LLSERIAL_S3C2440
  	select S3C2410_CLOCK
  	select S3C2410_PM if PM
-	select SAMSUNG_HRT
  	help
  	  Support for S3C2442 Samsung Mobile CPU based systems.
 
@@ -89,7 +84,6 @@ config CPU_S3C2443
  	select S3C2443_COMMON
  	select S3C2443_DMA if S3C24XX_DMA
  	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
  	help
  	  Support for the S3C2443 SoC from the S3C24XX line
 
arch/arm/mach-s3c64xx/Kconfig +0 -2
index 2057853..041da51 100644
@@ -17,13 +17,11 @@ config PLAT_S3C64XX
  # Configuration options for the S3C6410 CPU
 
  config CPU_S3C6400
-	select SAMSUNG_HRT
  	bool
  	help
  	  Enable S3C6400 CPU support
 
  config CPU_S3C6410
-	select SAMSUNG_HRT
  	bool
  	help
  	  Enable S3C6410 CPU support
arch/arm/mach-s5p64x0/Kconfig +0 -2
index 5a707bd..bb2111b 100644
@@ -11,14 +11,12 @@ config CPU_S5P6440
  	bool
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
  	select SAMSUNG_WAKEMASK if PM
  	help
  	  Enable S5P6440 CPU support
 
  config CPU_S5P6450
  	bool
-	select SAMSUNG_HRT
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
  	select SAMSUNG_WAKEMASK if PM
arch/arm/mach-s5pc100/Kconfig +0 -1
index 2f456a4..15170be 100644
@@ -11,7 +11,6 @@ config CPU_S5PC100
  	bool
  	select S5P_EXT_INT
  	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
  	help
  	  Enable S5PC100 CPU support
 
arch/arm/mach-s5pv210/Kconfig +0 -2
index 0963283..caaedaf 100644
@@ -15,7 +15,6 @@ config CPU_S5PV210
  	select S5P_PM if PM
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
  	help
  	  Enable S5PV210 CPU support
-- 

Thanks.
- Kukjin

#11 lore raw

PATCH v2 7/18 ARM: SAMSUNG: Move all platforms to new clocksource driver

Quoted 171 lines · On Tuesday 25 of June 2013 00:46:06 Kukjin Kim wrote:

On 06/25/13 00:38, Tomasz Figa wrote:

[...]

Quoted 6 lines
Quoted 5 lines

Review

Quoted 2 lines
(quoted diff) +1 -1
-	select SAMSUNG_HRT
+	select CLKSRC_SAMSUNG_PWM

Please put this in alphabetical ordering, this is just replacing though.>

Argh, I always forget about this ordering, sorry.

no problem ;-)

[...]

Quoted 1 line
Quoted 1 line

Let me fix it...

like following :-)

8<----------------------------------------------

arch/arm/Kconfig +5 -0
index 49d993c..734d85b 100644
@@ -694,6 +694,7 @@ config ARCH_S3C24XX
  	select ARCH_REQUIRE_GPIOLIB
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
  	select HAVE_S3C2410_I2C if I2C
@@ -715,6 +716,7 @@ config ARCH_S3C64XX
  	select ARM_VIC
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select CPU_V6
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
@@ -737,6 +739,7 @@ config ARCH_S5P64X0
  	bool "Samsung S5P6440 S5P6450"
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select CPU_V6
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
@@ -753,6 +756,7 @@ config ARCH_S5PC100
  	select ARCH_REQUIRE_GPIOLIB
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select CPU_V7
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
@@ -770,6 +774,7 @@ config ARCH_S5PV210
  	select ARCH_SPARSEMEM_ENABLE
  	select CLKDEV_LOOKUP
  	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
  	select CPU_V7
  	select GENERIC_CLOCKEVENTS
  	select HAVE_CLK
(quoted diff) +0 -0

b/arch/arm/mach-s3c24xx/Kconfig index f2f7088..8124ec7 100644

arch/arm/mach-s3c24xx/Kconfig +0 -6
@@ -30,7 +30,6 @@ config CPU_S3C2410
  	select S3C2410_CLOCK
  	select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
  	select S3C2410_PM if PM
-	select SAMSUNG_HRT
  	help
  	  Support for S3C2410 and S3C2410A family from the S3C24XX line
  	  of Samsung Mobile CPUs.
@@ -41,7 +40,6 @@ config CPU_S3C2412
  	select CPU_LLSERIAL_S3C2440
  	select S3C2412_DMA if S3C24XX_DMA
  	select S3C2412_PM if PM
-	select SAMSUNG_HRT
  	help
  	  Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
@@ -53,7 +51,6 @@ config CPU_S3C2416
  	select S3C2443_COMMON
  	select S3C2443_DMA if S3C24XX_DMA
  	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
  	help
  	  Support for the S3C2416 SoC from the S3C24XX line
 
@@ -64,7 +61,6 @@ config CPU_S3C2440
  	select S3C2410_CLOCK
  	select S3C2410_PM if PM
  	select S3C2440_DMA if S3C24XX_DMA
-	select SAMSUNG_HRT
  	help
  	  Support for S3C2440 Samsung Mobile CPU based systems.
 
@@ -74,7 +70,6 @@ config CPU_S3C2442
  	select CPU_LLSERIAL_S3C2440
  	select S3C2410_CLOCK
  	select S3C2410_PM if PM
-	select SAMSUNG_HRT
  	help
  	  Support for S3C2442 Samsung Mobile CPU based systems.
 
@@ -89,7 +84,6 @@ config CPU_S3C2443
  	select S3C2443_COMMON
  	select S3C2443_DMA if S3C24XX_DMA
  	select SAMSUNG_CLKSRC
-	select SAMSUNG_HRT
  	help
  	  Support for the S3C2443 SoC from the S3C24XX line
 
(quoted diff) +0 -0

b/arch/arm/mach-s3c64xx/Kconfig index 2057853..041da51 100644

arch/arm/mach-s3c64xx/Kconfig +0 -2
@@ -17,13 +17,11 @@ config PLAT_S3C64XX
  # Configuration options for the S3C6410 CPU
 
  config CPU_S3C6400
-	select SAMSUNG_HRT
  	bool
  	help
  	  Enable S3C6400 CPU support
 
  config CPU_S3C6410
-	select SAMSUNG_HRT
  	bool
  	help
  	  Enable S3C6410 CPU support
(quoted diff) +0 -0

b/arch/arm/mach-s5p64x0/Kconfig index 5a707bd..bb2111b 100644

arch/arm/mach-s5p64x0/Kconfig +0 -2
@@ -11,14 +11,12 @@ config CPU_S5P6440
  	bool
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
  	select SAMSUNG_WAKEMASK if PM
  	help
  	  Enable S5P6440 CPU support
 
  config CPU_S5P6450
  	bool
-	select SAMSUNG_HRT
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
  	select SAMSUNG_WAKEMASK if PM
(quoted diff) +0 -0

b/arch/arm/mach-s5pc100/Kconfig index 2f456a4..15170be 100644

arch/arm/mach-s5pc100/Kconfig +0 -1
@@ -11,7 +11,6 @@ config CPU_S5PC100
  	bool
  	select S5P_EXT_INT
  	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
  	help
  	  Enable S5PC100 CPU support
 
(quoted diff) +0 -0

b/arch/arm/mach-s5pv210/Kconfig index 0963283..caaedaf 100644

arch/arm/mach-s5pv210/Kconfig config CPU_S5PV210 · line 19

Quoted 6 lines
arch/arm/mach-s5pv210/Kconfig +0 -1
@@ -15,7 +15,6 @@ config CPU_S5PV210
  	select S5P_PM if PM
  	select S5P_SLEEP if PM
  	select SAMSUNG_DMADEV
-	select SAMSUNG_HRT
  	help
  	  Enable S5PV210 CPU support

Looks good, thanks.

Best regards,
Tomasz

#12 lore raw

PATCH v2 8/18 ARM: SAMSUNG: Remove old samsung-time driver

In reply to Tomasz Figa

This patch removes the old samsung-time driver, since all its users have been migrated to the new samsung_pwm_timer clocksource driver.

---
 arch/arm/plat-samsung/Kconfig                     |   8 -
 arch/arm/plat-samsung/Makefile                    |   1 -
 arch/arm/plat-samsung/include/plat/samsung-time.h |  23 --
 arch/arm/plat-samsung/samsung-time.c              | 394 ----------------------
 4 files changed, 426 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/samsung-time.c
arch/arm/plat-samsung/Kconfig +0 -8
index 3dc5cbe..3e880b7 100644
@@ -72,14 +72,6 @@ config SAMSUNG_ATAGS
 
 if SAMSUNG_ATAGS
 
-# timer options
-
-config SAMSUNG_HRT
-	bool
-	select SAMSUNG_DEV_PWM
-	help
-	  Use the High Resolution timer support
-
 # clock options
 
 config SAMSUNG_CLOCK
arch/arm/plat-samsung/Makefile +0 -1
index 98d07d8..cf41bf9 100644
@@ -12,7 +12,6 @@ obj-				:=
 # Objects we always build independent of SoC choice
 
 obj-y				+= init.o cpu.o
-obj-$(CONFIG_SAMSUNG_HRT) 	+= samsung-time.o
 
 obj-$(CONFIG_SAMSUNG_CLOCK)	+= clock.o
 obj-$(CONFIG_SAMSUNG_CLOCK)	+= pwm-clock.o
arch/arm/plat-samsung/include/plat/samsung-time.h +0 -23
index 4cc99bb..209464a 100644
@@ -22,29 +22,6 @@ enum samsung_timer_mode {
 	SAMSUNG_PWM4,
 };
 
-struct samsung_timer_source {
-	unsigned int event_id;
-	unsigned int source_id;
-};
-
-/* Be able to sleep for atleast 4 seconds (usually more) */
-#define SAMSUNG_TIMER_MIN_RANGE	4
-
-#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S5PC100)
-#define TCNT_MAX		0xffff
-#define TSCALER_DIV		25
-#define TDIV			50
-#define TSIZE			16
-#else
-#define TCNT_MAX		0xffffffff
-#define TSCALER_DIV		2
-#define TDIV			2
-#define TSIZE			32
-#endif
-
-#define NON_PERIODIC		0
-#define PERIODIC		1
-
 extern void __init samsung_set_timer_source(enum samsung_timer_mode event,
 					enum samsung_timer_mode source);
 
arch/arm/plat-samsung/samsung-time.c deleted +0 -394

394 lines not on this page · raw message

Signature · 1 line
1.8.2.1
#13 lore raw

PATCH v2 9/18 ARM: SAMSUNG: Remove unused PWM timer IRQ chip code

In reply to Tomasz Figa

From: Tomasz Figa <[email protected]>

As the need for an IRQ chip handling PWM timer interrupt chaining is gone now, this patch removes all the code made unnecessary.

---
 arch/arm/Kconfig                                   |  1 -
 arch/arm/mach-s3c64xx/common.c                     |  4 -
 arch/arm/mach-s3c64xx/include/mach/irqs.h          |  8 --
 arch/arm/mach-s5p64x0/include/mach/irqs.h          |  2 -
 arch/arm/mach-s5pc100/include/mach/irqs.h          |  2 -
 arch/arm/mach-s5pv210/include/mach/irqs.h          |  2 -
 arch/arm/plat-samsung/Kconfig                      |  6 --
 arch/arm/plat-samsung/Makefile                     |  1 -
 arch/arm/plat-samsung/devs.c                       | 25 ++----
 arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 ---
 arch/arm/plat-samsung/include/plat/irqs.h          |  9 --
 arch/arm/plat-samsung/irq-vic-timer.c              | 98 ----------------------
 arch/arm/plat-samsung/s5p-irq.c                    |  3 -
 13 files changed, 6 insertions(+), 168 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
 delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
arch/arm/Kconfig +0 -1
index ddf2667..b5fdce1 100644
@@ -732,7 +732,6 @@ config ARCH_S3C64XX
 	select SAMSUNG_ATAGS
 	select SAMSUNG_CLKSRC
 	select SAMSUNG_GPIOLIB_4BIT
-	select SAMSUNG_IRQ_VIC_TIMER
 	select SAMSUNG_WDT_RESET
 	select USB_ARCH_HAS_OHCI
 	help
arch/arm/mach-s3c64xx/common.c +0 -4
index 91df45a..0b33683 100644
@@ -42,7 +42,6 @@
 #include <plat/pm.h>
 #include <plat/gpio-cfg.h>
 #include <plat/irq-uart.h>
-#include <plat/irq-vic-timer.h>
 #include <plat/pwm-core.h>
 #include <plat/regs-irqtype.h>
 #include <plat/regs-serial.h>
@@ -222,9 +221,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
 	/* initialise the pair of VICs */
 	vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
 	vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
-
-	/* add the timer sub-irqs */
-	s3c_init_vic_timer_irq(5, IRQ_TIMER0);
 }
 
 #define eint_offset(irq)	((irq) - IRQ_EINT(0))
arch/arm/mach-s3c64xx/include/mach/irqs.h +0 -8
index 96d60e0..67bbd1d 100644
@@ -107,14 +107,6 @@
 #define IRQ_TC			IRQ_PENDN
 #define IRQ_ADC			S3C64XX_IRQ_VIC1(31)
 
-#define S3C64XX_TIMER_IRQ(x)	S3C_IRQ(64 + (x))
-
-#define IRQ_TIMER0		S3C64XX_TIMER_IRQ(0)
-#define IRQ_TIMER1		S3C64XX_TIMER_IRQ(1)
-#define IRQ_TIMER2		S3C64XX_TIMER_IRQ(2)
-#define IRQ_TIMER3		S3C64XX_TIMER_IRQ(3)
-#define IRQ_TIMER4		S3C64XX_TIMER_IRQ(4)
-
 /* compatibility for device defines */
 
 #define IRQ_IIC1		IRQ_S3C6410_IIC1
arch/arm/mach-s5p64x0/include/mach/irqs.h +0 -2
index 5b845e8..53982db 100644
@@ -141,8 +141,6 @@
 
 #define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE + (x))
 
-#define IRQ_TIMER_BASE		(11)
-
 /* Set the default NR_IRQS */
 
 #define NR_IRQS			(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
arch/arm/mach-s5pc100/include/mach/irqs.h +0 -2
index 2870f12..d2eb475 100644
@@ -97,8 +97,6 @@
 #define IRQ_SDMFIQ		S5P_IRQ_VIC2(31)
 #define IRQ_VIC_END		S5P_IRQ_VIC2(31)
 
-#define IRQ_TIMER_BASE		(11)
-
 #define S5P_EINT_BASE1		(S5P_IRQ_VIC0(0))
 #define S5P_EINT_BASE2		(IRQ_VIC_END + 1)
 
arch/arm/mach-s5pv210/include/mach/irqs.h +0 -2
index e777e01..5e0de3a 100644
@@ -118,8 +118,6 @@
 #define IRQ_MDNIE3		S5P_IRQ_VIC3(8)
 #define IRQ_VIC_END		S5P_IRQ_VIC3(31)
 
-#define IRQ_TIMER_BASE		(11)
-
 #define S5P_EINT_BASE1		(S5P_IRQ_VIC0(0))
 #define S5P_EINT_BASE2		(IRQ_VIC_END + 1)
 
arch/arm/plat-samsung/Kconfig +0 -6
index 3e880b7..b21d9d5 100644
@@ -25,7 +25,6 @@ config PLAT_S5P
 	select S5P_GPIO_DRVSTR
 	select SAMSUNG_CLKSRC if !COMMON_CLK
 	select SAMSUNG_GPIOLIB_4BIT
-	select SAMSUNG_IRQ_VIC_TIMER
 	help
 	  Base platform code for Samsung's S5P series SoC.
 
@@ -91,11 +90,6 @@ config S5P_CLOCK
 
 # options for IRQ support
 
-config SAMSUNG_IRQ_VIC_TIMER
-       bool
-       help
-         Internal configuration to build the VIC timer interrupt code.
-
 config S5P_IRQ
 	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
 	help
arch/arm/plat-samsung/Makefile +0 -1
index cf41bf9..aafbe56 100644
@@ -19,7 +19,6 @@ obj-$(CONFIG_SAMSUNG_CLOCK)	+= pwm-clock.o
 obj-$(CONFIG_SAMSUNG_CLKSRC)	+= clock-clksrc.o
 obj-$(CONFIG_S5P_CLOCK)		+= s5p-clock.o
 
-obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
 obj-$(CONFIG_S5P_IRQ)		+= s5p-irq.o
 obj-$(CONFIG_S5P_EXT_INT)	+= s5p-irq-eint.o
 obj-$(CONFIG_S5P_GPIO_INT)	+= s5p-irq-gpioint.o
arch/arm/plat-samsung/devs.c +6 -19
index bba6d78..290f63a 100644
@@ -1099,22 +1099,9 @@ arch_initcall(s5p_pmu_init);
 
 #ifdef CONFIG_SAMSUNG_DEV_PWM
 
-#define TIMER_RESOURCE_SIZE (1)
-
-#define TIMER_RESOURCE(_tmr, _irq)			\
-	(struct resource [TIMER_RESOURCE_SIZE]) {	\
-		[0] = {					\
-			.start	= _irq,			\
-			.end	= _irq,			\
-			.flags	= IORESOURCE_IRQ	\
-		}					\
-	}
-
-#define DEFINE_S3C_TIMER(_tmr_no, _irq)			\
+#define DEFINE_S3C_TIMER(_tmr_no)			\
 	.name		= "s3c24xx-pwm",		\
 	.id		= _tmr_no,			\
-	.num_resources	= TIMER_RESOURCE_SIZE,		\
-	.resource	= TIMER_RESOURCE(_tmr_no, _irq),	\
 
 /*
  * since we already have an static mapping for the timer,
@@ -1122,11 +1109,11 @@ arch_initcall(s5p_pmu_init);
  */
 
 struct platform_device s3c_device_timer[] = {
-	[0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
-	[1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
-	[2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
-	[3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
-	[4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
+	[0] = { DEFINE_S3C_TIMER(0) },
+	[1] = { DEFINE_S3C_TIMER(1) },
+	[2] = { DEFINE_S3C_TIMER(2) },
+	[3] = { DEFINE_S3C_TIMER(3) },
+	[4] = { DEFINE_S3C_TIMER(4) },
 };
 
 static struct resource samsung_pwm_resource[] = {
arch/arm/plat-samsung/include/plat/irq-vic-timer.h deleted +0 -13
deleted file mode 100644
index 5b9c42f..0000000
@@ -1,13 +0,0 @@
-/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
- *
- * Copyright (c) 2010 Simtec Electronics
- *	Ben Dooks <[email protected]>
- *
- * Header file for Samsung SoC IRQ VIC timer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-extern void s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq);
arch/arm/plat-samsung/include/plat/irqs.h +0 -9
index df46b77..039001c 100644
@@ -44,15 +44,6 @@
 #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
 #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
 
-#define S5P_TIMER_IRQ(x)	(IRQ_TIMER_BASE + (x))
-
-#define IRQ_TIMER0		S5P_TIMER_IRQ(0)
-#define IRQ_TIMER1		S5P_TIMER_IRQ(1)
-#define IRQ_TIMER2		S5P_TIMER_IRQ(2)
-#define IRQ_TIMER3		S5P_TIMER_IRQ(3)
-#define IRQ_TIMER4		S5P_TIMER_IRQ(4)
-#define IRQ_TIMER_COUNT		(5)
-
 #define IRQ_EINT(x)		((x) < 16 ? ((x) + S5P_EINT_BASE1) \
 					: ((x) - 16 + S5P_EINT_BASE2))
 
arch/arm/plat-samsung/irq-vic-timer.c deleted +0 -98

98 lines not on this page · raw message

arch/arm/plat-samsung/s5p-irq.c +0 -3
index ff1a760..6729cb2 100644
@@ -19,7 +19,6 @@
 #include <mach/map.h>
 #include <plat/regs-timer.h>
 #include <plat/cpu.h>
-#include <plat/irq-vic-timer.h>
 
 void __init s5p_init_irq(u32 *vic, u32 num_vic)
 {
@@ -30,6 +29,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
 	for (irq = 0; irq < num_vic; irq++)
 		vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
 #endif
-
-	s3c_init_vic_timer_irq(5, IRQ_TIMER0);
 }
Signature · 1 line
1.8.2.1
#14 lore raw

PATCH v2 10/18 pwm: samsung: Rename to pwm-samsung-legacy

In reply to Tomasz Figa

This patch renames the old pwm-samsung driver to pwm-samsung-legacy to create place for the new, rewritten, DT-aware pwm-samsung driver using Samsung PWM/timer master driver.

---
 drivers/pwm/Makefile             |   2 +-
 drivers/pwm/pwm-samsung-legacy.c | 353 +++++++++++++++++++++++++++++++++++++++
 drivers/pwm/pwm-samsung.c        | 353 ---------------------------------------
 3 files changed, 354 insertions(+), 354 deletions(-)
 create mode 100644 drivers/pwm/pwm-samsung-legacy.c
 delete mode 100644 drivers/pwm/pwm-samsung.c
drivers/pwm/Makefile +1 -1
index 94ba21e..229a599 100644
@@ -8,7 +8,7 @@ obj-$(CONFIG_PWM_LPC32XX)	+= pwm-lpc32xx.o
 obj-$(CONFIG_PWM_MXS)		+= pwm-mxs.o
 obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
-obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
+obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
 obj-$(CONFIG_PWM_TIECAP)	+= pwm-tiecap.o
drivers/pwm/pwm-samsung-legacy.c new file +353 -0

353 lines not on this page · raw message

drivers/pwm/pwm-samsung.c deleted +0 -353

353 lines not on this page · raw message

Signature · 1 line
1.8.2.1
#15 lore raw

PATCH v3 10/18 pwm: samsung: Rename to pwm-samsung-legacy

This patch renames the old pwm-samsung driver to pwm-samsung-legacy to create place for the new, rewritten, DT- and multiplatform- aware pwm-samsung driver that will be added in further patch.

---
 drivers/pwm/Makefile                                | 2 +-
 drivers/pwm/{pwm-samsung.c => pwm-samsung-legacy.c} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename drivers/pwm/{pwm-samsung.c => pwm-samsung-legacy.c} (100%)

Changes since v2:
- Used git format-patch -M to detect rename.
- Corrected commit message.

drivers/pwm/Makefile +1 -1
index 94ba21e..229a599 100644
@@ -8,7 +8,7 @@ obj-$(CONFIG_PWM_LPC32XX)	+= pwm-lpc32xx.o
 obj-$(CONFIG_PWM_MXS)		+= pwm-mxs.o
 obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
-obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
+obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
 obj-$(CONFIG_PWM_TIECAP)	+= pwm-tiecap.o
drivers/pwm/pwm-samsung-legacy.c renamed from drivers/pwm/pwm-samsung.c +0 -0
similarity index 100%
rename from drivers/pwm/pwm-samsung.c
rename to drivers/pwm/pwm-samsung-legacy.c
Signature · 1 line
1.8.2.1
#16 lore raw

PATCH v2 11/18 pwm: Add new pwm-samsung driver

In reply to Tomasz Figa

This patch introduces new Samsung PWM driver, which uses Samsung PWM/timer master driver to control shared parts of the hardware.

---
 drivers/pwm/Makefile      |   1 +
 drivers/pwm/pwm-samsung.c | 601 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 602 insertions(+)
 create mode 100644 drivers/pwm/pwm-samsung.c
drivers/pwm/Makefile +1 -0
index 229a599..833c3ac 100644
@@ -9,6 +9,7 @@ obj-$(CONFIG_PWM_MXS)		+= pwm-mxs.o
 obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
 obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
+obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
 obj-$(CONFIG_PWM_TIECAP)	+= pwm-tiecap.o
drivers/pwm/pwm-samsung.c new file +601 -0

601 lines not on this page · raw message

Signature · 1 line
1.8.2.1
#17 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

This patch introduces new Samsung PWM driver, which is heavily cleaned, multiplatform aware and supports DeviceTree based instantiation.

Since on historical hardware PWM block can be shared with clocksource driver, a shared spinlock is used to protect access to shared registers, already exported from the clocksource driver.

---
 drivers/pwm/Makefile      |   1 +
 drivers/pwm/pwm-samsung.c | 601 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 602 insertions(+)
 create mode 100644 drivers/pwm/pwm-samsung.c

Changes since v2:
- Replaced __raw_{readl,writel} with {readl,writel}.
- Corrected commit message.

drivers/pwm/Makefile +1 -0
index 229a599..833c3ac 100644
@@ -9,6 +9,7 @@ obj-$(CONFIG_PWM_MXS)		+= pwm-mxs.o
 obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
 obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
+obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
 obj-$(CONFIG_PWM_TIECAP)	+= pwm-tiecap.o
drivers/pwm/pwm-samsung.c new file +601 -0

601 lines not on this page · raw message

Signature · 1 line
1.8.2.1
#18 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 18 lines · Tomasz Figa

This patch introduces new Samsung PWM driver, which is heavily cleaned, multiplatform aware and supports DeviceTree based instantiation.

Since on historical hardware PWM block can be shared with clocksource driver, a shared spinlock is used to protect access to shared registers, already exported from the clocksource driver.

---
  drivers/pwm/Makefile      |   1 +
  drivers/pwm/pwm-samsung.c | 601 ++++++++++++++++++++++++++++++++++++++++++++++
  2 files changed, 602 insertions(+)

create mode 100644 drivers/pwm/pwm-samsung.c

Changes since v2:
- Replaced __raw_{readl,writel} with {readl,writel}.
- Corrected commit message.

[...]

drivers/pwm/pwm-samsung.c line 432

Quoted 3 lines
drivers/pwm/pwm-samsung.c new file +3 -0
+	of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
+		if (val>= SAMSUNG_PWM_NUM) {
+			pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n",

Just note, checkpatch complains following, so fixed to use pr_warn() when I applied.

WARNING: Prefer pr_warn(... to pr_warning(...
#471: FILE: drivers/pwm/pwm-samsung.c:432:
+ pr_warning("%s: invalid channel index in samsung,pwm-outputs
property\n",

[...]

drivers/pwm/pwm-samsung.c line 583

Quoted 2 lines
drivers/pwm/pwm-samsung.c new file +2 -0
+
+static struct dev_pm_ops pwm_samsung_pm_ops = {

WARNING: struct dev_pm_ops should normally be const #622: FILE: drivers/pwm/pwm-samsung.c:583:
+static struct dev_pm_ops pwm_samsung_pm_ops = {

fixed to add const when I applied.

drivers/pwm/pwm-samsung.c line 586

Quoted 3 lines
drivers/pwm/pwm-samsung.c new file +3 -0
+	SET_SYSTEM_SLEEP_PM_OPS(pwm_samsung_suspend, pwm_samsung_resume)
+};
+

Thanks,
- Kukjin

#19 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 18 lines · On Tuesday 25 of June 2013 00:22:42 Kukjin Kim wrote:
Quoted 17 lines · Tomasz Figa

This patch introduces new Samsung PWM driver, which is heavily cleaned,
multiplatform aware and supports DeviceTree based instantiation.

Since on historical hardware PWM block can be shared with clocksource driver, a shared spinlock is used to protect access to shared registers, already exported from the clocksource driver.

---

  drivers/pwm/Makefile      |   1 +
  drivers/pwm/pwm-samsung.c | 601

++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 602 insertions(+)
create mode 100644 drivers/pwm/pwm-samsung.c

Quoted 7 lines
Quoted 3 lines

Changes since v2:
- Replaced __raw_{readl,writel} with {readl,writel}.
- Corrected commit message.

[...]

Review

Quoted 1 line
(quoted diff) +1 -0
+	of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, 

val)

Quoted 3 lines

Review

Quoted 3 lines

{

(quoted diff) +2 -0
+		if (val>= SAMSUNG_PWM_NUM) {
+			pr_warning("%s: invalid channel index in 

samsung,pwm-outputs

Review

Quoted 7 lines
Quoted 1 line

property\n",

Just note, checkpatch complains following, so fixed to use pr_warn() when I applied.

WARNING: Prefer pr_warn(... to pr_warning(...
#471: FILE: drivers/pwm/pwm-samsung.c:432:

(quoted diff) +1 -0
+			pr_warning("%s: invalid channel index in 

samsung,pwm-outputs

Quoted 4 lines

property\n",

[...]

Quoted 8 lines

drivers/pwm/pwm-samsung.c line 583

Quoted 2 lines
drivers/pwm/pwm-samsung.c new file +2 -0
+
+static struct dev_pm_ops pwm_samsung_pm_ops = {

WARNING: struct dev_pm_ops should normally be const #622: FILE: drivers/pwm/pwm-samsung.c:583:
+static struct dev_pm_ops pwm_samsung_pm_ops = {

fixed to add const when I applied.

Oops, I forgot to fix them, sorry. Thank you for fixing and applying.

Best regards,
Tomasz

#20 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

In reply to Kukjin Kim
Quoted 20 lines · Kukjin Kim
Quoted 14 lines · Tomasz Figa

This patch introduces new Samsung PWM driver, which is heavily cleaned, multiplatform aware and supports DeviceTree based instantiation.

Since on historical hardware PWM block can be shared with clocksource driver, a shared spinlock is used to protect access to shared registers, already exported from the clocksource driver.

---
 drivers/pwm/Makefile      |   1 +
 drivers/pwm/pwm-samsung.c | 601 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 602 insertions(+)
 create mode 100644 drivers/pwm/pwm-samsung.c
Quoted 4 lines

Changes since v2:
- Replaced __raw_{readl,writel} with {readl,writel}.
- Corrected commit message.

Quoted 8 lines

[...]

drivers/pwm/pwm-samsung.c line 432

Quoted 3 lines
drivers/pwm/pwm-samsung.c new file +3 -0
+	of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
+		if (val>= SAMSUNG_PWM_NUM) {
+			pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n",

Just note, checkpatch complains following, so fixed to use pr_warn() when I applied.

Note that you can't apply patches that touch the PWM tree without my Ack and I already mentioned that the current way this driver is written isn't acceptable.

So either you fix it properly, or if everybody except me thinks we don't need a proper design for drivers anymore, then the only way I'll accept this driver into the PWM tree is if you put a really big comment at the top of the file saying that the driver is badly designed on purpose and that people shouldn't be using it as a reference.

Thierry
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#21 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 19 lines · On Monday 24 of June 2013 19:49:04 Thierry Reding wrote:
Quoted 18 lines · Kukjin Kim
Quoted 17 lines · Tomasz Figa

This patch introduces new Samsung PWM driver, which is heavily cleaned,
multiplatform aware and supports DeviceTree based instantiation.

Since on historical hardware PWM block can be shared with clocksource driver, a shared spinlock is used to protect access to shared registers, already exported from the clocksource driver.

---

 drivers/pwm/Makefile      |   1 +
 drivers/pwm/pwm-samsung.c | 601
 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed,
 602 insertions(+)
 create mode 100644 drivers/pwm/pwm-samsung.c
Quoted 7 lines
Quoted 7 lines
Quoted 3 lines

Changes since v2:
- Replaced __raw_{readl,writel} with {readl,writel}.
- Corrected commit message.

[...]

Review

Quoted 1 line
(quoted diff) +1 -0
+	of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, 

val)

Quoted 3 lines
Quoted 3 lines

Review

Quoted 3 lines

{

(quoted diff) +2 -0
+		if (val>= SAMSUNG_PWM_NUM) {
+			pr_warning("%s: invalid channel index in 

samsung,pwm-outputs

Quoted 8 lines
Quoted 3 lines
Quoted 1 line

property\n",>

Just note, checkpatch complains following, so fixed to use pr_warn() when I applied.

Note that you can't apply patches that touch the PWM tree without my Ack and I already mentioned that the current way this driver is written isn't acceptable.

Quoted 5 lines

So either you fix it properly, or if everybody except me thinks we don't need a proper design for drivers anymore, then the only way I'll accept this driver into the PWM tree is if you put a really big comment at the top of the file saying that the driver is badly designed on purpose and that people shouldn't be using it as a reference.

Sorry, I don't understand what problem you have with this design. It completely meets all the requirements applicable on hardware platforms it is (and going to be) used on.

The only thing it would do in a suboptimal way would be synchronization of register accesses for multiple instances of the driver - one spinlock would be used for all of them. This is insignificant because there is no time critical code in this driver and it is really unlikely that a SoC with multiple instances of this IP block shows up.

Channel reservation between clocksource and PWM drivers is completely correct, relying on the fact that the former can only use channels _without_ outputs and the latter can only use channels _with_ outputs. Do I have to add that there can't be a channel both with and without output?

So the only place for improvement here, without starting overengineering things, is a comment about the purpose of the spinlock and why it can be used in our case.

Best regards,
Tomasz

#22 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 46 lines · Tomasz Figa
Quoted 19 lines · On Monday 24 of June 2013 19:49:04 Thierry Reding wrote:
Quoted 18 lines · Kukjin Kim
Quoted 17 lines · Tomasz Figa

This patch introduces new Samsung PWM driver, which is heavily cleaned,
multiplatform aware and supports DeviceTree based instantiation.

Since on historical hardware PWM block can be shared with clocksource driver, a shared spinlock is used to protect access to shared registers, already exported from the clocksource driver.

---

 drivers/pwm/Makefile      |   1 +
 drivers/pwm/pwm-samsung.c | 601
 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed,
 602 insertions(+)
 create mode 100644 drivers/pwm/pwm-samsung.c
Quoted 7 lines
Quoted 7 lines
Quoted 3 lines

Changes since v2:
- Replaced __raw_{readl,writel} with {readl,writel}.
- Corrected commit message.

[...]

Review

Quoted 1 line
(quoted diff) +1 -0
+	of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, 

val)

Quoted 3 lines
Quoted 3 lines

Review

Quoted 3 lines

{

(quoted diff) +2 -0
+		if (val>= SAMSUNG_PWM_NUM) {
+			pr_warning("%s: invalid channel index in 

samsung,pwm-outputs

Quoted 8 lines
Quoted 3 lines
Quoted 1 line

property\n",>

Just note, checkpatch complains following, so fixed to use pr_warn() when I applied.

Note that you can't apply patches that touch the PWM tree without my Ack and I already mentioned that the current way this driver is written isn't acceptable.

Quoted 5 lines

So either you fix it properly, or if everybody except me thinks we don't need a proper design for drivers anymore, then the only way I'll accept this driver into the PWM tree is if you put a really big comment at the top of the file saying that the driver is badly designed on purpose and that people shouldn't be using it as a reference.

Quoted 3 lines

Sorry, I don't understand what problem you have with this design. It completely meets all the requirements applicable on hardware platforms it is (and going to be) used on.

My main problem with it is that there is no design. And as such it sets a bad example. If I accept this into the PWM tree as is then what am I supposed to tell the next person that comes up with a similarly broken driver?

Quoted 5 lines

The only thing it would do in a suboptimal way would be synchronization of register accesses for multiple instances of the driver - one spinlock would be used for all of them. This is insignificant because there is no time critical code in this driver and it is really unlikely that a SoC with multiple instances of this IP block shows up.

I've had people give me guarantees that this and that would *never* happen only to change their minds 6 months down the road. And again, even if it was actually true in this case, it isn't a valid excuse for setting a bad example.

Quoted 4 lines

Channel reservation between clocksource and PWM drivers is completely correct, relying on the fact that the former can only use channels _without_ outputs and the latter can only use channels _with_ outputs. Do I have to add that there can't be a channel both with and without output?

The issue is that you can't really ensure that both the clocksource and PWM drivers use the same variant and therefore might be using different masks.

Quoted 3 lines

So the only place for improvement here, without starting overengineering things, is a comment about the purpose of the spinlock and why it can be used in our case.

I disagree. You actually even had a version with a halfway decent design at some point and it was discarded. I don't think I'm asking for all that much here. I even gave you the option of admitting that the driver was suboptimal. All I request in return is that you mention that in the code so that either somebody else might go and clean things up or at least that nobody will copy from a bad example.

Thierry
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#23 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 3 lines · On Monday 24 of June 2013 22:13:27 Thierry Reding wrote:
Quoted 2 lines · Tomasz Figa
Quoted 1 line · On Monday 24 of June 2013 19:49:04 Thierry Reding wrote:

On Tue, Jun 25, 2013 at 12:22:42AM +0900, Kukjin Kim wrote:

[snip]

Quoted 16 lines
Quoted 16 lines
Quoted 15 lines
Quoted 4 lines

Just note, checkpatch complains following, so fixed to use pr_warn()
when I applied.

Note that you can't apply patches that touch the PWM tree without my Ack and I already mentioned that the current way this driver is written isn't acceptable.

So either you fix it properly, or if everybody except me thinks we don't need a proper design for drivers anymore, then the only way I'll accept this driver into the PWM tree is if you put a really big comment at the top of the file saying that the driver is badly designed on purpose and that people shouldn't be using it as a reference.

Quoted 8 lines
Quoted 3 lines

Sorry, I don't understand what problem you have with this design. It completely meets all the requirements applicable on hardware platforms it is (and going to be) used on.

My main problem with it is that there is no design. And as such it sets a bad example. If I accept this into the PWM tree as is then what am I supposed to tell the next person that comes up with a similarly broken driver?

I wouldn't call it no design. It's a simple (trivial) design.

Simple design is often better than a complex one. In this case it indeed is, because it doesn't add code that serves no purpose, without any functional drawbacks.

Quoted 11 lines
Quoted 6 lines

The only thing it would do in a suboptimal way would be synchronization of register accesses for multiple instances of the driver - one spinlock would be used for all of them. This is insignificant because there is no time critical code in this driver and it is really unlikely that a SoC with multiple instances of this IP block shows up.

I've had people give me guarantees that this and that would *never* happen only to change their minds 6 months down the road. And again, even if it was actually true in this case, it isn't a valid excuse for setting a bad example.

Well, even if that happens, there is nothing on the way stopping from extending this design with something that will work optimally for multiple instances. For all currently supported platforms solution used in this series is enough.

Quoted 8 lines
Quoted 5 lines

Channel reservation between clocksource and PWM drivers is completely correct, relying on the fact that the former can only use channels _without_ outputs and the latter can only use channels _with_ outputs. Do I have to add that there can't be a channel both with and without output?

The issue is that you can't really ensure that both the clocksource and PWM drivers use the same variant and therefore might be using different masks.

Output mask is _not_ a part of the constant variant data. It is stored in the same struct, which is to simplify passing SoC-specific parameters from platform code to both drivers, but it is not defined as a constant anywhere in drivers.

As I already explained in one of my previous replies, it is either parsed from DT (samsung,pwm-outputs property) or passed through the variant struct as platform_data from board files. It isn't possible for both drivers to get different mask values.

Quoted 10 lines
Quoted 3 lines

So the only place for improvement here, without starting overengineering things, is a comment about the purpose of the spinlock and why it can be used in our case.

I disagree. You actually even had a version with a halfway decent design at some point and it was discarded. I don't think I'm asking for all that much here. I even gave you the option of admitting that the driver was suboptimal. All I request in return is that you mention that in the code so that either somebody else might go and clean things up or at least that nobody will copy from a bad example.

What about:

/*
* PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
* and some registers need access synchronization. If both drivers are
* compiled in, the spinlock is defined in the clocksource driver,
* otherwise following definition is used.
*
* Currently we do not need any more complex synchronization method
* because all the supported SoCs contain only one instance of the PWM
* IP. Should this change, both drivers will need to be modified to
* properly synchronize accesses to particular instances.
*/

Best regards,
Tomasz

#24 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 2 lines · Tomasz Figa
Quoted 1 line · On Monday 24 of June 2013 22:13:27 Thierry Reding wrote:

On Mon, Jun 24, 2013 at 08:31:43PM +0200, Tomasz Figa wrote:

[...]

Quoted 14 lines
Quoted 8 lines
Quoted 5 lines

Channel reservation between clocksource and PWM drivers is completely correct, relying on the fact that the former can only use channels _without_ outputs and the latter can only use channels _with_ outputs. Do I have to add that there can't be a channel both with and without output?

The issue is that you can't really ensure that both the clocksource and PWM drivers use the same variant and therefore might be using different masks.

Output mask is _not_ a part of the constant variant data. It is stored in the same struct, which is to simplify passing SoC-specific parameters from platform code to both drivers, but it is not defined as a constant anywhere in drivers.

Quoted 4 lines

As I already explained in one of my previous replies, it is either parsed from DT (samsung,pwm-outputs property) or passed through the variant struct as platform_data from board files. It isn't possible for both drivers to get different mask values.

But samsung_pwm_set_platdata() and samsung_pwm_clocksource_init() can still be called with different variants, can't they? Furthermore the variants aren't read-only and therefore can be modified at any point in time. So it is indeed possible for them to get different mask values.

Granted, it may be unlikely that they will but it wouldn't be all that difficult to write the driver in a way to make it really impossible and at the same time make sure that both driver share the same variant information.

Quoted 13 lines
Quoted 10 lines
Quoted 3 lines

So the only place for improvement here, without starting overengineering things, is a comment about the purpose of the spinlock and why it can be used in our case.

I disagree. You actually even had a version with a halfway decent design at some point and it was discarded. I don't think I'm asking for all that much here. I even gave you the option of admitting that the driver was suboptimal. All I request in return is that you mention that in the code so that either somebody else might go and clean things up or at least that nobody will copy from a bad example.

What about:

Quoted 11 lines

/*
* PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
* and some registers need access synchronization. If both drivers are
* compiled in, the spinlock is defined in the clocksource driver,
* otherwise following definition is used.
*
* Currently we do not need any more complex synchronization method
* because all the supported SoCs contain only one instance of the PWM
* IP. Should this change, both drivers will need to be modified to
* properly synchronize accesses to particular instances.
*/

I see that you can't be persuaded. And everybody else seems to be okay with it so... have it your way. I'm probably going to regret this.

Thierry
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#25 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 25 lines · On Monday 24 of June 2013 22:53:42 Thierry Reding wrote:
Quoted 2 lines · Tomasz Figa
Quoted 1 line · On Monday 24 of June 2013 22:13:27 Thierry Reding wrote:

On Mon, Jun 24, 2013 at 08:31:43PM +0200, Tomasz Figa wrote:

[...]

Quoted 20 lines
Quoted 9 lines
Quoted 8 lines

Channel reservation between clocksource and PWM drivers is completely
correct, relying on the fact that the former can only use channels _without_ outputs and the latter can only use channels _with_ outputs.
Do I have to add that there can't be a channel both with and without
output?

Quoted 5 lines

The issue is that you can't really ensure that both the clocksource and
PWM drivers use the same variant and therefore might be using different
masks.

Output mask is _not_ a part of the constant variant data. It is stored in the same struct, which is to simplify passing SoC-specific parameters from platform code to both drivers, but it is not defined as a constant anywhere in drivers.

Quoted 7 lines
Quoted 4 lines

As I already explained in one of my previous replies, it is either parsed from DT (samsung,pwm-outputs property) or passed through the variant struct as platform_data from board files. It isn't possible for both drivers to get different mask values.

But samsung_pwm_set_platdata() and samsung_pwm_clocksource_init() can still be called with different variants, can't they?

Sure, they can be, but the question is who would even want to call them this way? We are on kernel level, we have assumptions here and we don't break those assumptions.

Quoted 3 lines

Furthermore the
variants aren't read-only and therefore can be modified at any point in time. So it is indeed possible for them to get different mask values.

Again, who would be willing to do something like this? We are not in userspace.

Quoted 4 lines

Granted, it may be unlikely that they will but it wouldn't be all that difficult to write the driver in a way to make it really impossible and at the same time make sure that both driver share the same variant information.

Sure, it wouldn't. If I'm not mistaken, I already acomplished this in one or two of the versions I posted long time ago, but was it really worth all the added drawbacks?

Keep in mind that originally, when I started my work on this, I thought exactly the same as you - let's design something scalable and sane. However, sometimes it's necessary to ask the question if that's really what is needed.

Quoted 28 lines
Quoted 16 lines
Quoted 11 lines
Quoted 3 lines

So the only place for improvement here, without starting overengineering things, is a comment about the purpose of the spinlock and why it can be used in our case.

I disagree. You actually even had a version with a halfway decent design at some point and it was discarded. I don't think I'm asking for all that much here. I even gave you the option of admitting that the driver was suboptimal. All I request in return is that you mention that in the code so that either somebody else might go and clean things up or at least that nobody will copy from a bad example.

What about:

/*

Quoted 11 lines

* PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
* and some registers need access synchronization. If both drivers are
* compiled in, the spinlock is defined in the clocksource driver,
* otherwise following definition is used.
*
* Currently we do not need any more complex synchronization method
* because all the supported SoCs contain only one instance of the PWM
* IP. Should this change, both drivers will need to be modified to
* properly synchronize accesses to particular instances. */

Quoted 2 lines

I see that you can't be persuaded. And everybody else seems to be okay with it so... have it your way. I'm probably going to regret this.

This was just a proposal. Do you want anything else to be added to the comment or anything to be changed?

Sure, an alternative would be getting rid of the hacky shared spinlock, but do we really need that? Do we really want to have something in the kernel that we don't need? I'm just trying to avoid this.

Best regards,
Tomasz

#26 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 2 lines · Tomasz Figa
Quoted 1 line · On Monday 24 of June 2013 22:53:42 Thierry Reding wrote:

On Mon, Jun 24, 2013 at 10:32:55PM +0200, Tomasz Figa wrote:

[...]

Quoted 16 lines
Quoted 16 lines
Quoted 15 lines

What about:

/*

* PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
* and some registers need access synchronization. If both drivers are
* compiled in, the spinlock is defined in the clocksource driver,
* otherwise following definition is used.
*
* Currently we do not need any more complex synchronization method
* because all the supported SoCs contain only one instance of the PWM
* IP. Should this change, both drivers will need to be modified to
* properly synchronize accesses to particular instances. */

Quoted 5 lines
Quoted 2 lines

I see that you can't be persuaded. And everybody else seems to be okay with it so... have it your way. I'm probably going to regret this.

This was just a proposal. Do you want anything else to be added to the comment or anything to be changed?

For reference, I still don't like this but since I'm the only one complaining, go ahead. With that comment added to the driver:

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#27 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 27 lines · On Tuesday 25 of June 2013 12:26:47 Thierry Reding wrote:
Quoted 2 lines · Tomasz Figa
Quoted 1 line · On Monday 24 of June 2013 22:53:42 Thierry Reding wrote:

On Mon, Jun 24, 2013 at 10:32:55PM +0200, Tomasz Figa wrote:

[...]

Quoted 22 lines
Quoted 21 lines
Quoted 4 lines

What about:

/*

Quoted 13 lines

* PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
* and some registers need access synchronization. If both drivers are
* compiled in, the spinlock is defined in the clocksource driver,
* otherwise following definition is used.
*
* Currently we do not need any more complex synchronization method
* because all the supported SoCs contain only one instance of the PWM
* IP. Should this change, both drivers will need to be modified to
* properly synchronize accesses to particular instances. */

I see that you can't be persuaded. And everybody else seems to be okay
with it so... have it your way. I'm probably going to regret this.

Quoted 7 lines
Quoted 2 lines

This was just a proposal. Do you want anything else to be added to the comment or anything to be changed?

For reference, I still don't like this but since I'm the only one complaining, go ahead. With that comment added to the driver:

OK. Thank you.

Kukjin, can you amend the comment I mentioned to this patch above the line with DEFINE_SPINLOCK or I should send fixed version?

Best regards,
Tomasz

#28 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

Quoted 2 lines · Tomasz Figa

Kukjin, can you amend the comment I mentioned to this patch above the line with DEFINE_SPINLOCK or I should send fixed version?

If you're amending stuff please feel free to also add

(for the whole series)
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#29 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

In reply to Tomasz Figa

On 06/25/13 20:19, Tomasz Figa wrote:

[...]

Quoted 26 lines
Quoted 26 lines
Quoted 16 lines
Quoted 16 lines
Quoted 15 lines

/*

* PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
* and some registers need access synchronization. If both drivers are
* compiled in, the spinlock is defined in the clocksource driver,
* otherwise following definition is used.
*
* Currently we do not need any more complex synchronization method
* because all the supported SoCs contain only one instance of the PWM
* IP. Should this change, both drivers will need to be modified to
* properly synchronize accesses to particular instances. */

Quoted 6 lines
Quoted 3 lines

I see that you can't be persuaded. And everybody else seems to be okay
with it so... have it your way. I'm probably going to regret this.

This was just a proposal. Do you want anything else to be added to the comment or anything to be changed?

For reference, I still don't like this but since I'm the only one complaining, go ahead. With that comment added to the driver:

Quoted 7 lines
Quoted 1 line

OK. Thank you.

Kukjin, can you amend the comment I mentioned to this patch above the line with DEFINE_SPINLOCK or I should send fixed version?

Tomasz, please re-send this one with fixing it but I'm not sure this can be sent for upcoming merge window because it's a little bit late. Anyway, let me try it.

Thanks,
- Kukjin

#30 lore raw

PATCH v3 11/18 pwm: Add new pwm-samsung driver

In reply to Thierry Reding

On 06/25/13 02:49, Thierry Reding wrote:

[...]

Quoted 10 lines

Note that you can't apply patches that touch the PWM tree without my Ack and I already mentioned that the current way this driver is written isn't acceptable.

So either you fix it properly, or if everybody except me thinks we don't need a proper design for drivers anymore, then the only way I'll accept this driver into the PWM tree is if you put a really big comment at the top of the file saying that the driver is badly designed on purpose and that people shouldn't be using it as a reference.

Thierry, hmm...I thought Tomasz addressed comments from you and probably there are some comments I I missed...OK, I see what your concern is.

Let me drop this series for upcoming merge window.

- Kukjin

#31 lore raw

PATCH v2 12/18 ARM: SAMSUNG: Rework private data handling in dev-backlight

In reply to Tomasz Figa

This patch modifies dev-backlight helpers to get private data using container_of instead of abusing platform_data field of PWM device.

---
 arch/arm/plat-samsung/dev-backlight.c | 51 ++++++++++++++++++++---------------
 1 file changed, 29 insertions(+), 22 deletions(-)
arch/arm/plat-samsung/dev-backlight.c +29 -22
index 5f197dc..e467a01 100644
@@ -20,13 +20,18 @@
 #include <plat/gpio-cfg.h>
 #include <plat/backlight.h>
 
+struct samsung_bl_drvdata {
+	struct platform_pwm_backlight_data plat_data;
+	struct samsung_bl_gpio_info *gpio_info;
+};
+
 static int samsung_bl_init(struct device *dev)
 {
 	int ret = 0;
-	struct platform_device *timer_dev =
-			container_of(dev->parent, struct platform_device, dev);
-	struct samsung_bl_gpio_info *bl_gpio_info =
-			timer_dev->dev.platform_data;
+	struct platform_pwm_backlight_data *pdata = dev->platform_data;
+	struct samsung_bl_drvdata *drvdata = container_of(pdata,
+					struct samsung_bl_drvdata, plat_data);
+	struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
 
 	ret = gpio_request(bl_gpio_info->no, "Backlight");
 	if (ret) {
@@ -42,10 +47,10 @@ static int samsung_bl_init(struct device *dev)
 
 static void samsung_bl_exit(struct device *dev)
 {
-	struct platform_device *timer_dev =
-			container_of(dev->parent, struct platform_device, dev);
-	struct samsung_bl_gpio_info *bl_gpio_info =
-			timer_dev->dev.platform_data;
+	struct platform_pwm_backlight_data *pdata = dev->platform_data;
+	struct samsung_bl_drvdata *drvdata = container_of(pdata,
+					struct samsung_bl_drvdata, plat_data);
+	struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
 
 	s3c_gpio_cfgpin(bl_gpio_info->no, S3C_GPIO_OUTPUT);
 	gpio_free(bl_gpio_info->no);
@@ -60,12 +65,14 @@ static void samsung_bl_exit(struct device *dev)
  * for their specific boards
  */
 
-static struct platform_pwm_backlight_data samsung_dfl_bl_data __initdata = {
-	.max_brightness = 255,
-	.dft_brightness = 255,
-	.pwm_period_ns  = 78770,
-	.init           = samsung_bl_init,
-	.exit           = samsung_bl_exit,
+static struct samsung_bl_drvdata samsung_dfl_bl_data __initdata = {
+	.plat_data = {
+		.max_brightness = 255,
+		.dft_brightness = 255,
+		.pwm_period_ns  = 78770,
+		.init           = samsung_bl_init,
+		.exit           = samsung_bl_exit,
+	},
 };
 
 static struct platform_device samsung_dfl_bl_device __initdata = {
@@ -82,6 +89,7 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 {
 	int ret = 0;
 	struct platform_device *samsung_bl_device;
+	struct samsung_bl_drvdata *samsung_bl_drvdata;
 	struct platform_pwm_backlight_data *samsung_bl_data;
 
 	samsung_bl_device = kmemdup(&samsung_dfl_bl_device,
@@ -91,17 +99,19 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 		return;
 	}
 
-	samsung_bl_data = s3c_set_platdata(&samsung_dfl_bl_data,
-		sizeof(struct platform_pwm_backlight_data), samsung_bl_device);
-	if (!samsung_bl_data) {
+	samsung_bl_drvdata = kmemdup(&samsung_dfl_bl_data,
+				sizeof(samsung_dfl_bl_data), GFP_KERNEL);
+	if (!samsung_bl_drvdata) {
 		printk(KERN_ERR "%s: no memory for platform dev\n", __func__);
 		goto err_data;
 	}
+	samsung_bl_device->dev.platform_data = &samsung_bl_drvdata->plat_data;
+	samsung_bl_drvdata->gpio_info = gpio_info;
+	samsung_bl_data = &samsung_bl_drvdata->plat_data;
 
 	/* Copy board specific data provided by user */
 	samsung_bl_data->pwm_id = bl_data->pwm_id;
-	samsung_bl_device->dev.parent =
-			&s3c_device_timer[samsung_bl_data->pwm_id].dev;
+	samsung_bl_device->dev.parent = &samsung_device_pwm.dev;
 
 	if (bl_data->max_brightness)
 		samsung_bl_data->max_brightness = bl_data->max_brightness;
@@ -122,9 +132,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 	if (bl_data->check_fb)
 		samsung_bl_data->check_fb = bl_data->check_fb;
 
-	/* Keep the GPIO info for future use */
-	s3c_device_timer[samsung_bl_data->pwm_id].dev.platform_data = gpio_info;
-
 	/* Register the specific PWM timer dev for Backlight control */
 	ret = platform_device_register(
 			&s3c_device_timer[samsung_bl_data->pwm_id]);
Signature · 1 line
1.8.2.1
#32 lore raw

PATCH v2 13/18 ARM: SAMSUNG: Modify board files to use new PWM platform device

In reply to Tomasz Figa

This patch modifies any board files using the legacy PWM device to use the new device instead.

---
 arch/arm/mach-s3c24xx/mach-h1940.c    |  4 ++--
 arch/arm/mach-s3c24xx/mach-rx1950.c   |  5 ++---
 arch/arm/mach-s3c64xx/mach-crag6410.c |  4 ++--
 arch/arm/mach-s3c64xx/mach-hmt.c      |  4 ++--
 arch/arm/mach-s3c64xx/mach-smartq.c   |  4 ++--
 arch/arm/mach-s3c64xx/mach-smdk6410.c |  5 +++--
 arch/arm/mach-s5p64x0/mach-smdk6440.c |  5 +++--
 arch/arm/mach-s5p64x0/mach-smdk6450.c |  5 +++--
 arch/arm/mach-s5pc100/mach-smdkc100.c |  5 +++--
 arch/arm/mach-s5pv210/mach-smdkv210.c |  5 +++--
 arch/arm/plat-samsung/dev-backlight.c | 10 ----------
 11 files changed, 25 insertions(+), 31 deletions(-)
arch/arm/mach-s3c24xx/mach-h1940.c +2 -2
index af4334d..74dd479 100644
@@ -512,7 +512,7 @@ static struct platform_pwm_backlight_data backlight_data = {
 static struct platform_device h1940_backlight = {
 	.name = "pwm-backlight",
 	.dev  = {
-		.parent = &s3c_device_timer[0].dev,
+		.parent = &samsung_device_pwm.dev,
 		.platform_data = &backlight_data,
 	},
 	.id   = -1,
@@ -632,7 +632,7 @@ static struct platform_device *h1940_devices[] __initdata = {
 	&h1940_device_bluetooth,
 	&s3c_device_sdi,
 	&s3c_device_rtc,
-	&s3c_device_timer[0],
+	&samsung_device_pwm,
 	&h1940_backlight,
 	&h1940_lcd_powerdev,
 	&s3c_device_adc,
arch/arm/mach-s3c24xx/mach-rx1950.c +2 -3
index 44ca018..206b1f7 100644
@@ -530,7 +530,7 @@ static struct platform_pwm_backlight_data rx1950_backlight_data = {
 static struct platform_device rx1950_backlight = {
 	.name = "pwm-backlight",
 	.dev = {
-		.parent = &s3c_device_timer[0].dev,
+		.parent = &samsung_device_pwm.dev,
 		.platform_data = &rx1950_backlight_data,
 	},
 };
@@ -717,8 +717,7 @@ static struct platform_device *rx1950_devices[] __initdata = {
 	&s3c_device_sdi,
 	&s3c_device_adc,
 	&s3c_device_ts,
-	&s3c_device_timer[0],
-	&s3c_device_timer[1],
+	&samsung_device_pwm,
 	&rx1950_backlight,
 	&rx1950_device_gpiokeys,
 	&power_supply,
arch/arm/mach-s3c64xx/mach-crag6410.c +2 -2
index 8ad88ac..28889cc 100644
@@ -120,7 +120,7 @@ static struct platform_device crag6410_backlight_device = {
 	.name		= "pwm-backlight",
 	.id		= -1,
 	.dev		= {
-		.parent	= &s3c_device_timer[0].dev,
+		.parent	= &samsung_device_pwm.dev,
 		.platform_data = &crag6410_backlight_data,
 	},
 };
@@ -375,7 +375,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
 	&s3c_device_fb,
 	&s3c_device_ohci,
 	&s3c_device_usb_hsotg,
-	&s3c_device_timer[0],
+	&samsung_device_pwm,
 	&s3c64xx_device_iis0,
 	&s3c64xx_device_iis1,
 	&samsung_device_keypad,
arch/arm/mach-s3c64xx/mach-hmt.c +2 -2
index 5b7f357..f39569e 100644
@@ -123,7 +123,7 @@ static struct platform_pwm_backlight_data hmt_backlight_data = {
 static struct platform_device hmt_backlight_device = {
 	.name		= "pwm-backlight",
 	.dev		= {
-		.parent	= &s3c_device_timer[1].dev,
+		.parent	= &samsung_device_pwm.dev,
 		.platform_data = &hmt_backlight_data,
 	},
 };
@@ -239,7 +239,7 @@ static struct platform_device *hmt_devices[] __initdata = {
 	&s3c_device_nand,
 	&s3c_device_fb,
 	&s3c_device_ohci,
-	&s3c_device_timer[1],
+	&samsung_device_pwm,
 	&hmt_backlight_device,
 	&hmt_leds_device,
 };
arch/arm/mach-s3c64xx/mach-smartq.c +2 -2
index 58ac990..86d980b 100644
@@ -157,7 +157,7 @@ static struct platform_pwm_backlight_data smartq_backlight_data = {
 static struct platform_device smartq_backlight_device = {
 	.name		= "pwm-backlight",
 	.dev		= {
-		.parent	= &s3c_device_timer[1].dev,
+		.parent	= &samsung_device_pwm.dev,
 		.platform_data = &smartq_backlight_data,
 	},
 };
@@ -246,7 +246,7 @@ static struct platform_device *smartq_devices[] __initdata = {
 	&s3c_device_i2c0,
 	&s3c_device_ohci,
 	&s3c_device_rtc,
-	&s3c_device_timer[1],
+	&samsung_device_pwm,
 	&s3c_device_ts,
 	&s3c_device_usb_hsotg,
 	&s3c64xx_device_iis0,
arch/arm/mach-s3c64xx/mach-smdk6410.c +3 -2
index bd3295a..d90b450 100644
@@ -274,6 +274,7 @@ static struct platform_device *smdk6410_devices[] __initdata = {
 	&s3c_device_i2c1,
 	&s3c_device_fb,
 	&s3c_device_ohci,
+	&samsung_device_pwm,
 	&s3c_device_usb_hsotg,
 	&s3c64xx_device_iisv4,
 	&samsung_device_keypad,
@@ -691,9 +692,9 @@ static void __init smdk6410_machine_init(void)
 
 	s3c_ide_set_platdata(&smdk6410_ide_pdata);
 
-	samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
-
 	platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
+
+	samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
 }
 
 MACHINE_START(SMDK6410, "SMDK6410")
arch/arm/mach-s5p64x0/mach-smdk6440.c +3 -2
index 73f71a6..0b00304 100644
@@ -162,6 +162,7 @@ static struct platform_device *smdk6440_devices[] __initdata = {
 	&s3c_device_rtc,
 	&s3c_device_i2c0,
 	&s3c_device_i2c1,
+	&samsung_device_pwm,
 	&s3c_device_ts,
 	&s3c_device_wdt,
 	&s5p6440_device_iis,
@@ -254,8 +255,6 @@ static void __init smdk6440_machine_init(void)
 	i2c_register_board_info(1, smdk6440_i2c_devs1,
 			ARRAY_SIZE(smdk6440_i2c_devs1));
 
-	samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
-
 	s5p6440_set_lcd_interface();
 	s3c_fb_set_platdata(&smdk6440_lcd_pdata);
 
@@ -264,6 +263,8 @@ static void __init smdk6440_machine_init(void)
 	s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
 
 	platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
+
+	samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
 }
 
 MACHINE_START(SMDK6440, "SMDK6440")
arch/arm/mach-s5p64x0/mach-smdk6450.c +3 -2
index 18303e1..5949296 100644
@@ -180,6 +180,7 @@ static struct platform_device *smdk6450_devices[] __initdata = {
 	&s3c_device_rtc,
 	&s3c_device_i2c0,
 	&s3c_device_i2c1,
+	&samsung_device_pwm,
 	&s3c_device_ts,
 	&s3c_device_wdt,
 	&s5p6450_device_iis0,
@@ -273,8 +274,6 @@ static void __init smdk6450_machine_init(void)
 	i2c_register_board_info(1, smdk6450_i2c_devs1,
 			ARRAY_SIZE(smdk6450_i2c_devs1));
 
-	samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
-
 	s5p6450_set_lcd_interface();
 	s3c_fb_set_platdata(&smdk6450_lcd_pdata);
 
@@ -283,6 +282,8 @@ static void __init smdk6450_machine_init(void)
 	s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
 
 	platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
+
+	samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
 }
 
 MACHINE_START(SMDK6450, "SMDK6450")
arch/arm/mach-s5pc100/mach-smdkc100.c +3 -2
index 8c880f7..7c57a22 100644
@@ -194,6 +194,7 @@ static struct platform_device *smdkc100_devices[] __initdata = {
 	&s3c_device_hsmmc0,
 	&s3c_device_hsmmc1,
 	&s3c_device_hsmmc2,
+	&samsung_device_pwm,
 	&s3c_device_ts,
 	&s3c_device_wdt,
 	&smdkc100_lcd_powerdev,
@@ -246,9 +247,9 @@ static void __init smdkc100_machine_init(void)
 	gpio_request(S5PC100_GPH0(6), "GPH0");
 	smdkc100_lcd_power_set(&smdkc100_lcd_power_data, 0);
 
-	samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data);
-
 	platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices));
+
+	samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data);
 }
 
 MACHINE_START(SMDKC100, "SMDKC100")
arch/arm/mach-s5pv210/mach-smdkv210.c +3 -2
index d50b6f1..6d72bb99 100644
@@ -218,6 +218,7 @@ static struct platform_device *smdkv210_devices[] __initdata = {
 	&s3c_device_i2c0,
 	&s3c_device_i2c1,
 	&s3c_device_i2c2,
+	&samsung_device_pwm,
 	&s3c_device_rtc,
 	&s3c_device_ts,
 	&s3c_device_usb_hsotg,
@@ -316,11 +317,11 @@ static void __init smdkv210_machine_init(void)
 
 	s3c_fb_set_platdata(&smdkv210_lcd0_pdata);
 
-	samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data);
-
 	s3c_hsotg_set_platdata(&smdkv210_hsotg_pdata);
 
 	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
+
+	samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data);
 }
 
 MACHINE_START(SMDKV210, "SMDKV210")
arch/arm/plat-samsung/dev-backlight.c +0 -10
index e467a01..d51f956 100644
@@ -132,14 +132,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 	if (bl_data->check_fb)
 		samsung_bl_data->check_fb = bl_data->check_fb;
 
-	/* Register the specific PWM timer dev for Backlight control */
-	ret = platform_device_register(
-			&s3c_device_timer[samsung_bl_data->pwm_id]);
-	if (ret) {
-		printk(KERN_ERR "failed to register pwm timer for backlight: %d\n", ret);
-		goto err_plat_reg1;
-	}
-
 	/* Register the Backlight dev */
 	ret = platform_device_register(samsung_bl_device);
 	if (ret) {
@@ -150,8 +142,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
 	return;
 
 err_plat_reg2:
-	platform_device_unregister(&s3c_device_timer[samsung_bl_data->pwm_id]);
-err_plat_reg1:
 	kfree(samsung_bl_data);
 err_data:
 	kfree(samsung_bl_device);
Signature · 1 line
1.8.2.1
#33 lore raw

PATCH v2 14/18 pwm: Remove superseded pwm-samsung-legacy driver

In reply to Tomasz Figa

This patch removes the now unused pwm-samsung-legacy driver, which was replaced by new pwm-samsung driver.

---
 drivers/pwm/Makefile             |   1 -
 drivers/pwm/pwm-samsung-legacy.c | 353 ---------------------------------------
 2 files changed, 354 deletions(-)
 delete mode 100644 drivers/pwm/pwm-samsung-legacy.c
drivers/pwm/Makefile +0 -1
index 833c3ac..94ba21e 100644
@@ -8,7 +8,6 @@ obj-$(CONFIG_PWM_LPC32XX)	+= pwm-lpc32xx.o
 obj-$(CONFIG_PWM_MXS)		+= pwm-mxs.o
 obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
 obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
-obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung-legacy.o
 obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
 obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
 obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
drivers/pwm/pwm-samsung-legacy.c deleted +0 -353

353 lines not on this page · raw message

Signature · 1 line
1.8.2.1
#34 lore raw

PATCH v2 15/18 ARM: SAMSUNG: Remove old PWM timer platform devices

In reply to Tomasz Figa

This patch removes old Samsung PWM timer platform devices that are not used any more.

---
 arch/arm/plat-samsung/devs.c | 18 ------------------
 1 file changed, 18 deletions(-)
arch/arm/plat-samsung/devs.c +0 -18
index 290f63a..8ce0ac0 100644
@@ -1098,24 +1098,6 @@ arch_initcall(s5p_pmu_init);
 /* PWM Timer */
 
 #ifdef CONFIG_SAMSUNG_DEV_PWM
-
-#define DEFINE_S3C_TIMER(_tmr_no)			\
-	.name		= "s3c24xx-pwm",		\
-	.id		= _tmr_no,			\
-
-/*
- * since we already have an static mapping for the timer,
- * we do not bother setting any IO resource for the base.
- */
-
-struct platform_device s3c_device_timer[] = {
-	[0] = { DEFINE_S3C_TIMER(0) },
-	[1] = { DEFINE_S3C_TIMER(1) },
-	[2] = { DEFINE_S3C_TIMER(2) },
-	[3] = { DEFINE_S3C_TIMER(3) },
-	[4] = { DEFINE_S3C_TIMER(4) },
-};
-
 static struct resource samsung_pwm_resource[] = {
 	DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
 };
Signature · 1 line
1.8.2.1
#35 lore raw

PATCH v2 16/18 ARM: SAMSUNG: Remove pwm-clock infrastructure

In reply to Tomasz Figa

Since all the used PWM prescalers and dividers configuration has been moved to appropriate drivers, the pwm-clock infrastructure is now unused and so this patch removes it.

---
 arch/arm/mach-s3c24xx/clock-s3c2410.c          |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2412.c          |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2416.c          |   2 -
 arch/arm/mach-s3c24xx/clock-s3c2443.c          |   2 -
 arch/arm/mach-s3c64xx/clock.c                  |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6440.c          |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6450.c          |   2 -
 arch/arm/mach-s5pc100/clock.c                  |   2 -
 arch/arm/mach-s5pv210/clock.c                  |   1 -
 arch/arm/plat-samsung/Makefile                 |   1 -
 arch/arm/plat-samsung/include/plat/clock.h     |   4 -
 arch/arm/plat-samsung/include/plat/pwm-clock.h |  81 -----
 arch/arm/plat-samsung/pwm-clock.c              | 474 -------------------------
 13 files changed, 575 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
 delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
arch/arm/mach-s3c24xx/clock-s3c2410.c +0 -1
index 34fffdf..afa0267 100644
@@ -246,6 +246,5 @@ int __init s3c2410_baseclk_add(void)
 	       (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
 	       (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
 
-	s3c_pwmclk_init();
 	return 0;
 }
arch/arm/mach-s3c24xx/clock-s3c2412.c +0 -1
index 2cc017d..d8f253f 100644
@@ -757,6 +757,5 @@ int __init s3c2412_baseclk_add(void)
 	}
 
 	clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup));
-	s3c_pwmclk_init();
 	return 0;
 }
arch/arm/mach-s3c24xx/clock-s3c2416.c +0 -2
index 036056ce..d421a72 100644
@@ -168,6 +168,4 @@ void __init s3c2416_init_clocks(int xtal)
 	s3c24xx_register_clock(&hsmmc0_clk);
 	clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
 
-	s3c_pwmclk_init();
-
 }
arch/arm/mach-s3c24xx/clock-s3c2443.c +0 -2
index 0a53051..76cd31f 100644
@@ -209,6 +209,4 @@ void __init s3c2443_init_clocks(int xtal)
 	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 	clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s3c64xx/clock.c +0 -2
index 8499415..c1bcc4a 100644
@@ -1004,6 +1004,4 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
 	for (cnt = 0; cnt < ARRAY_SIZE(clksrc_cdev); cnt++)
 		s3c_register_clksrc(clksrc_cdev[cnt], 1);
 	clkdev_add_table(s3c64xx_clk_lookup, ARRAY_SIZE(s3c64xx_clk_lookup));
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s5p64x0/clock-s5p6440.c +0 -2
index 35378152..ae34a1d 100644
@@ -629,6 +629,4 @@ void __init s5p6440_register_clocks(void)
 	clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup));
 
 	s3c24xx_register_clock(&dummy_apb_pclk);
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s5p64x0/clock-s5p6450.c +0 -2
index af384dd..0b3ca2e 100644
@@ -698,6 +698,4 @@ void __init s5p6450_register_clocks(void)
 	clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup));
 
 	s3c24xx_register_clock(&dummy_apb_pclk);
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s5pc100/clock.c +0 -2
index a206dc3..d0dc10e 100644
@@ -1358,6 +1358,4 @@ void __init s5pc100_register_clocks(void)
 		s3c_disable_clocks(clk_cdev[ptr], 1);
 
 	s3c24xx_register_clock(&dummy_apb_pclk);
-
-	s3c_pwmclk_init();
 }
arch/arm/mach-s5pv210/clock.c +0 -1
index f051f53..ca46372 100644
@@ -1362,5 +1362,4 @@ void __init s5pv210_register_clocks(void)
 	for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
 		s3c_disable_clocks(clk_cdev[ptr], 1);
 
-	s3c_pwmclk_init();
 }
arch/arm/plat-samsung/Makefile +0 -1
index aafbe56..5d7f839 100644
@@ -14,7 +14,6 @@ obj-				:=
 obj-y				+= init.o cpu.o
 
 obj-$(CONFIG_SAMSUNG_CLOCK)	+= clock.o
-obj-$(CONFIG_SAMSUNG_CLOCK)	+= pwm-clock.o
 
 obj-$(CONFIG_SAMSUNG_CLKSRC)	+= clock-clksrc.o
 obj-$(CONFIG_S5P_CLOCK)		+= s5p-clock.o
arch/arm/plat-samsung/include/plat/clock.h +0 -4
index a62753d..254c3dd 100644
@@ -140,10 +140,6 @@ extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable);
 
 extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
 
-/* Init for pwm clock code */
-
-extern void s3c_pwmclk_init(void);
-
 /* Global watchdog clock used by arch_wtd_reset() callback */
 
 extern struct clk *s3c2410_wdtclk;
arch/arm/plat-samsung/include/plat/pwm-clock.h deleted +0 -81

81 lines not on this page · raw message

arch/arm/plat-samsung/pwm-clock.c deleted +0 -474

474 lines not on this page · raw message

Signature · 1 line
1.8.2.1
#36 lore raw

PATCH v2 17/18 ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header

In reply to Tomasz Figa

This patch removes remaining inclusions of plat/regs-timer.h as a preparation to remove the header.

As a part of this, things like save and restore of PWM registers are removed from SoC-specific code, because it is handled in appropriate drivers now.

---
 arch/arm/mach-s3c64xx/irq-pm.c  |  2 --
 arch/arm/mach-s5p64x0/pm.c      |  3 ---
 arch/arm/mach-s5pv210/pm.c      | 10 ----------
 arch/arm/plat-samsung/s5p-irq.c |  1 -
 4 files changed, 16 deletions(-)
arch/arm/mach-s3c64xx/irq-pm.c +0 -2
index 0c7e1d9..c3da1b6 100644
@@ -22,7 +22,6 @@
 #include <mach/map.h>
 
 #include <plat/regs-serial.h>
-#include <plat/regs-timer.h>
 #include <mach/regs-gpio.h>
 #include <plat/cpu.h>
 #include <plat/pm.h>
@@ -43,7 +42,6 @@ static struct sleep_save irq_save[] = {
 	SAVE_ITEM(S3C64XX_EINT0FLTCON2),
 	SAVE_ITEM(S3C64XX_EINT0FLTCON3),
 	SAVE_ITEM(S3C64XX_EINT0MASK),
-	SAVE_ITEM(S3C64XX_TINT_CSTAT),
 };
 
 static struct irq_grp_save {
arch/arm/mach-s5p64x0/pm.c +0 -3
index 97c2a08a..861e15c 100644
@@ -18,7 +18,6 @@
 
 #include <plat/cpu.h>
 #include <plat/pm.h>
-#include <plat/regs-timer.h>
 #include <plat/wakeup-mask.h>
 
 #include <mach/regs-clock.h>
@@ -48,8 +47,6 @@ static struct sleep_save s5p64x0_misc_save[] = {
 	SAVE_ITEM(S5P64X0_MEM0CONSLP1),
 	SAVE_ITEM(S5P64X0_MEM0DRVCON),
 	SAVE_ITEM(S5P64X0_MEM1DRVCON),
-
-	SAVE_ITEM(S3C64XX_TINT_CSTAT),
 };
 
 /* DPLL is present only in S5P6450 */
arch/arm/mach-s5pv210/pm.c +0 -10
index 2b68a67..3cf3f9c 100644
@@ -21,7 +21,6 @@
 
 #include <plat/cpu.h>
 #include <plat/pm.h>
-#include <plat/regs-timer.h>
 
 #include <mach/regs-irq.h>
 #include <mach/regs-clock.h>
@@ -77,15 +76,6 @@ static struct sleep_save s5pv210_core_save[] = {
 	/* Clock ETC */
 	SAVE_ITEM(S5P_CLK_OUT),
 	SAVE_ITEM(S5P_MDNIE_SEL),
-
-	/* PWM Register */
-	SAVE_ITEM(S3C2410_TCFG0),
-	SAVE_ITEM(S3C2410_TCFG1),
-	SAVE_ITEM(S3C64XX_TINT_CSTAT),
-	SAVE_ITEM(S3C2410_TCON),
-	SAVE_ITEM(S3C2410_TCNTB(0)),
-	SAVE_ITEM(S3C2410_TCMPB(0)),
-	SAVE_ITEM(S3C2410_TCNTO(0)),
 };
 
 static int s5pv210_cpu_suspend(unsigned long arg)
arch/arm/plat-samsung/s5p-irq.c +0 -1
index 6729cb2..ddfaca9 100644
@@ -17,7 +17,6 @@
 
 #include <mach/irqs.h>
 #include <mach/map.h>
-#include <plat/regs-timer.h>
 #include <plat/cpu.h>
 
 void __init s5p_init_irq(u32 *vic, u32 num_vic)
Signature · 1 line
1.8.2.1
#37 lore raw

PATCH v2 18/18 ARM: SAMSUNG: Remove plat/regs-timer.h header

In reply to Tomasz Figa

Since all uses of the header has been removed by previous patches it can be removed safely.

---
 arch/arm/plat-samsung/include/plat/regs-timer.h | 124 ------------------------
 1 file changed, 124 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
arch/arm/plat-samsung/include/plat/regs-timer.h deleted +0 -124
deleted file mode 100644
index d097d92..0000000
@@ -1,124 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-timer.h
- *
- * Copyright (c) 2003 Simtec Electronics <[email protected]>
- *		      http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 Timer configuration
-*/
-
-#ifndef __ASM_ARCH_REGS_TIMER_H
-#define __ASM_ARCH_REGS_TIMER_H
-
-#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x))
-#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
-
-#define S3C2410_TCFG0	      S3C_TIMERREG(0x00)
-#define S3C2410_TCFG1	      S3C_TIMERREG(0x04)
-#define S3C2410_TCON	      S3C_TIMERREG(0x08)
-
-#define S3C64XX_TINT_CSTAT    S3C_TIMERREG(0x44)
-
-#define S3C2410_TCFG_PRESCALER0_MASK (255<<0)
-#define S3C2410_TCFG_PRESCALER1_MASK (255<<8)
-#define S3C2410_TCFG_PRESCALER1_SHIFT (8)
-#define S3C2410_TCFG_DEADZONE_MASK   (255<<16)
-#define S3C2410_TCFG_DEADZONE_SHIFT  (16)
-
-#define S3C2410_TCFG1_MUX4_DIV2	  (0<<16)
-#define S3C2410_TCFG1_MUX4_DIV4	  (1<<16)
-#define S3C2410_TCFG1_MUX4_DIV8	  (2<<16)
-#define S3C2410_TCFG1_MUX4_DIV16  (3<<16)
-#define S3C2410_TCFG1_MUX4_TCLK1  (4<<16)
-#define S3C2410_TCFG1_MUX4_MASK	  (15<<16)
-#define S3C2410_TCFG1_MUX4_SHIFT  (16)
-
-#define S3C2410_TCFG1_MUX3_DIV2	  (0<<12)
-#define S3C2410_TCFG1_MUX3_DIV4	  (1<<12)
-#define S3C2410_TCFG1_MUX3_DIV8	  (2<<12)
-#define S3C2410_TCFG1_MUX3_DIV16  (3<<12)
-#define S3C2410_TCFG1_MUX3_TCLK1  (4<<12)
-#define S3C2410_TCFG1_MUX3_MASK	  (15<<12)
-
-
-#define S3C2410_TCFG1_MUX2_DIV2	  (0<<8)
-#define S3C2410_TCFG1_MUX2_DIV4	  (1<<8)
-#define S3C2410_TCFG1_MUX2_DIV8	  (2<<8)
-#define S3C2410_TCFG1_MUX2_DIV16  (3<<8)
-#define S3C2410_TCFG1_MUX2_TCLK1  (4<<8)
-#define S3C2410_TCFG1_MUX2_MASK	  (15<<8)
-
-
-#define S3C2410_TCFG1_MUX1_DIV2	  (0<<4)
-#define S3C2410_TCFG1_MUX1_DIV4	  (1<<4)
-#define S3C2410_TCFG1_MUX1_DIV8	  (2<<4)
-#define S3C2410_TCFG1_MUX1_DIV16  (3<<4)
-#define S3C2410_TCFG1_MUX1_TCLK0  (4<<4)
-#define S3C2410_TCFG1_MUX1_MASK	  (15<<4)
-
-#define S3C2410_TCFG1_MUX0_DIV2	  (0<<0)
-#define S3C2410_TCFG1_MUX0_DIV4	  (1<<0)
-#define S3C2410_TCFG1_MUX0_DIV8	  (2<<0)
-#define S3C2410_TCFG1_MUX0_DIV16  (3<<0)
-#define S3C2410_TCFG1_MUX0_TCLK0  (4<<0)
-#define S3C2410_TCFG1_MUX0_MASK	  (15<<0)
-
-#define S3C2410_TCFG1_MUX_DIV2	  (0<<0)
-#define S3C2410_TCFG1_MUX_DIV4	  (1<<0)
-#define S3C2410_TCFG1_MUX_DIV8	  (2<<0)
-#define S3C2410_TCFG1_MUX_DIV16   (3<<0)
-#define S3C2410_TCFG1_MUX_TCLK    (4<<0)
-#define S3C2410_TCFG1_MUX_MASK	  (15<<0)
-
-#define S3C64XX_TCFG1_MUX_DIV1	  (0<<0)
-#define S3C64XX_TCFG1_MUX_DIV2	  (1<<0)
-#define S3C64XX_TCFG1_MUX_DIV4	  (2<<0)
-#define S3C64XX_TCFG1_MUX_DIV8    (3<<0)
-#define S3C64XX_TCFG1_MUX_DIV16   (4<<0)
-#define S3C64XX_TCFG1_MUX_TCLK    (5<<0)  /* 3 sets of TCLK */
-#define S3C64XX_TCFG1_MUX_MASK	  (15<<0)
-
-#define S3C2410_TCFG1_SHIFT(x)	  ((x) * 4)
-
-/* for each timer, we have an count buffer, an compare buffer and
- * an observation buffer
-*/
-
-/* WARNING - timer 4 has no buffer reg, and it's observation is@+4 */
-
-#define S3C2410_TCNTB(tmr)    S3C_TIMERREG2(tmr, 0x00)
-#define S3C2410_TCMPB(tmr)    S3C_TIMERREG2(tmr, 0x04)
-#define S3C2410_TCNTO(tmr)    S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))
-
-#define S3C2410_TCON_T4RELOAD	  (1<<22)
-#define S3C2410_TCON_T4MANUALUPD  (1<<21)
-#define S3C2410_TCON_T4START	  (1<<20)
-
-#define S3C2410_TCON_T3RELOAD	  (1<<19)
-#define S3C2410_TCON_T3INVERT	  (1<<18)
-#define S3C2410_TCON_T3MANUALUPD  (1<<17)
-#define S3C2410_TCON_T3START	  (1<<16)
-
-#define S3C2410_TCON_T2RELOAD	  (1<<15)
-#define S3C2410_TCON_T2INVERT	  (1<<14)
-#define S3C2410_TCON_T2MANUALUPD  (1<<13)
-#define S3C2410_TCON_T2START	  (1<<12)
-
-#define S3C2410_TCON_T1RELOAD	  (1<<11)
-#define S3C2410_TCON_T1INVERT	  (1<<10)
-#define S3C2410_TCON_T1MANUALUPD  (1<<9)
-#define S3C2410_TCON_T1START	  (1<<8)
-
-#define S3C2410_TCON_T0DEADZONE	  (1<<4)
-#define S3C2410_TCON_T0RELOAD	  (1<<3)
-#define S3C2410_TCON_T0INVERT	  (1<<2)
-#define S3C2410_TCON_T0MANUALUPD  (1<<1)
-#define S3C2410_TCON_T0START	  (1<<0)
-
-#endif /*  __ASM_ARCH_REGS_TIMER_H */
-
-
-
Signature · 1 line
1.8.2.1
#38 lore raw

v2 cover Final Samsung PWM support cleanup

In reply to Tomasz Figa

Hi All,

Quoted 19 lines · On Friday 21 of June 2013 00:12:45 Tomasz Figa wrote:

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.

This series attempts to achieve this goal by:
1) moving remaining Samsung platforms to the new clocksource driver
2) removing old clocksource driver
3) adding new multiplatform- and DT-aware PWM driver
4) moving all Samsung platforms to use the new PWM driver
5) removing old PWM driver
6) removing all PWM-related code that is not used anymore

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage I decided to keep the old driver, add new one, move all platforms to it and then remove the old one.

Quoted 7 lines

See particular patches for more detailed descriptions.

On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a scope):

Just tested on SMDK6410 with PWM backlight and works fine.

Best regards,
Tomasz

Quoted 102 lines

Changes since v1:
- made sure that suspend/resume is handled correctly in both clocksource and PWM drivers,
- fixed incorrect definition of AUTORELOAD bit for channel 4,
- fixed order of registering PWM device and calling samsung_bl_set(), which assumes that PWM device has been already registered,
- corrected commit messages of several patches,
- addressed all the valid comments from reviewers, including cleanup of most code originally copied from previous PWM driver,
- rebased on top of current Kgene's for-next,
- tested on Exynos4210, verifying correct PWM output with a scope.

Needs testing on other platforms as I could only compile test for them. Tomasz Figa (18):
ARM: SAMSUNG: Unify base address definitions of timer block
ARM: SAMSUNG: Add new PWM platform device
ARM: SAMSUNG: Set PWM platform data
clocksource: samsung_pwm_timer: Cache clocksource register address
clocksource: samsung_pwm_timer: Do not use clocksource_mmio
clocksource: samsung_pwm_timer: Handle suspend/resume correctly
ARM: SAMSUNG: Move all platforms to new clocksource driver
ARM: SAMSUNG: Remove old samsung-time driver
ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
pwm: samsung: Rename to pwm-samsung-legacy
pwm: Add new pwm-samsung driver
ARM: SAMSUNG: Rework private data handling in dev-backlight
ARM: SAMSUNG: Modify board files to use new PWM platform device
pwm: Remove superseded pwm-samsung-legacy driver
ARM: SAMSUNG: Remove old PWM timer platform devices
ARM: SAMSUNG: Remove pwm-clock infrastructure
ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
ARM: SAMSUNG: Remove plat/regs-timer.h header

 arch/arm/Kconfig                                   |   1 -
 arch/arm/mach-s3c24xx/Kconfig                      |  12 +-
 arch/arm/mach-s3c24xx/clock-s3c2410.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2412.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2416.c              |   2 -
 arch/arm/mach-s3c24xx/clock-s3c2443.c              |   2 -
 arch/arm/mach-s3c24xx/common.c                     |  27 +
 arch/arm/mach-s3c24xx/include/mach/map.h           |   2 +
 arch/arm/mach-s3c24xx/mach-h1940.c                 |   4 +-
 arch/arm/mach-s3c24xx/mach-rx1950.c                |   5 +-
 arch/arm/mach-s3c64xx/Kconfig                      |   4 +-
 arch/arm/mach-s3c64xx/clock.c                      |   2 -
 arch/arm/mach-s3c64xx/common.c                     |  32 +-
 arch/arm/mach-s3c64xx/include/mach/irqs.h          |   8 -
 arch/arm/mach-s3c64xx/include/mach/map.h           |   1 +
 arch/arm/mach-s3c64xx/irq-pm.c                     |   2 -
 arch/arm/mach-s3c64xx/mach-crag6410.c              |   4 +-
 arch/arm/mach-s3c64xx/mach-hmt.c                   |   4 +-
 arch/arm/mach-s3c64xx/mach-smartq.c                |   4 +-
 arch/arm/mach-s3c64xx/mach-smdk6410.c              |   5 +-
 arch/arm/mach-s5p64x0/Kconfig                      |   4 +-
 arch/arm/mach-s5p64x0/clock-s5p6440.c              |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6450.c              |   2 -
 arch/arm/mach-s5p64x0/common.c                     |  27 +
 arch/arm/mach-s5p64x0/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5p64x0/include/mach/map.h           |   1 +
 arch/arm/mach-s5p64x0/mach-smdk6440.c              |   5 +-
 arch/arm/mach-s5p64x0/mach-smdk6450.c              |   5 +-
 arch/arm/mach-s5p64x0/pm.c                         |   3 -
 arch/arm/mach-s5pc100/Kconfig                      |   2 +-
 arch/arm/mach-s5pc100/clock.c                      |   2 -
 arch/arm/mach-s5pc100/common.c                     |  28 +
 arch/arm/mach-s5pc100/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pc100/include/mach/map.h           |   1 +
 arch/arm/mach-s5pc100/mach-smdkc100.c              |   5 +-
 arch/arm/mach-s5pv210/Kconfig                      |   2 +-
 arch/arm/mach-s5pv210/clock.c                      |   1 -
 arch/arm/mach-s5pv210/common.c                     |  28 +
 arch/arm/mach-s5pv210/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pv210/include/mach/map.h           |   1 +
 arch/arm/mach-s5pv210/mach-smdkv210.c              |   5 +-
 arch/arm/mach-s5pv210/pm.c                         |  10 -
 arch/arm/plat-samsung/Kconfig                      |  14 -
 arch/arm/plat-samsung/Makefile                     |   3 -
 arch/arm/plat-samsung/dev-backlight.c              |  61 +-
 arch/arm/plat-samsung/devs.c                       |  42 +-
 arch/arm/plat-samsung/include/plat/clock.h         |   4 -
 arch/arm/plat-samsung/include/plat/devs.h          |   1 +
 arch/arm/plat-samsung/include/plat/irq-vic-timer.h |  13 -
 arch/arm/plat-samsung/include/plat/irqs.h          |   9 -
 arch/arm/plat-samsung/include/plat/pwm-clock.h     |  81 ---
 arch/arm/plat-samsung/include/plat/pwm-core.h      |  24 +
 arch/arm/plat-samsung/include/plat/regs-timer.h    | 124 ----
 arch/arm/plat-samsung/include/plat/samsung-time.h  |  23 -
 arch/arm/plat-samsung/irq-vic-timer.c              |  98 ---
 arch/arm/plat-samsung/pwm-clock.c                  | 474 --------------
arch/arm/plat-samsung/s5p-irq.c                    |   4 -
 arch/arm/plat-samsung/samsung-time.c               | 394 ------------
 drivers/clocksource/samsung_pwm_timer.c            |  84 +--
 drivers/pwm/pwm-samsung.c                          | 694
++++++++++++++------- 60 files changed, 766 insertions(+), 1644
deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
 create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
 delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
 delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
 delete mode 100644 arch/arm/plat-samsung/samsung-time.c
#39 lore raw

v2 cover Final Samsung PWM support cleanup

In reply to Tomasz Figa
Quoted 17 lines · Tomasz Figa

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.

This series attempts to achieve this goal by:
1) moving remaining Samsung platforms to the new clocksource driver
2) removing old clocksource driver
3) adding new multiplatform- and DT-aware PWM driver
4) moving all Samsung platforms to use the new PWM driver
5) removing old PWM driver
6) removing all PWM-related code that is not used anymore

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage I decided to keep the old driver, add new one, move all platforms to it and then remove the old one.

Quoted 7 lines

See particular patches for more detailed descriptions.

On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a scope):

Looks good to me,

Two small comments:

* always use 'git format-patch -M' to detect renames (patch 10)

* for new code, don't use __raw_readl and similar functions but use readl_relaxed or plain readl.

Arnd

#40 lore raw

v2 cover Final Samsung PWM support cleanup

Quoted 25 lines · On Friday 21 of June 2013 16:04:38 Arnd Bergmann wrote:
Quoted 24 lines · Tomasz Figa

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.>
This series attempts to achieve this goal by:
1) moving remaining Samsung platforms to the new clocksource driver
2) removing old clocksource driver
3) adding new multiplatform- and DT-aware PWM driver
4) moving all Samsung platforms to use the new PWM driver
5) removing old PWM driver
6) removing all PWM-related code that is not used anymore

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage I decided to keep the old driver, add new one, move all platforms to it and then remove the old one.

See particular patches for more detailed descriptions.

On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a scope):

Quoted 5 lines
Quoted 1 line

Looks good to me,

Thanks.

Quoted 6 lines

Two small comments:

* always use 'git format-patch -M' to detect renames (patch 10)

* for new code, don't use __raw_readl and similar functions but use readl_relaxed or plain readl.

Just posted v3 of patches 10 and 11 addressing these issues.

Best regards,
Tomasz

#41 lore raw

v2 cover Final Samsung PWM support cleanup

In reply to Tomasz Figa

Am Freitag, 21. Juni 2013, 00:12:45 schrieb Tomasz Figa:

Quoted 17 lines

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.

This series attempts to achieve this goal by:
1) moving remaining Samsung platforms to the new clocksource driver
2) removing old clocksource driver
3) adding new multiplatform- and DT-aware PWM driver
4) moving all Samsung platforms to use the new PWM driver
5) removing old PWM driver
6) removing all PWM-related code that is not used anymore

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage I decided to keep the old driver, add new one, move all platforms to it and then remove the old one.

Quoted 6 lines

See particular patches for more detailed descriptions.

On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a scope):

On a s3c2416 based machine (with the additional two v3 patches)

and again thanks for working on this :-)

Quoted 102 lines

Changes since v1:
- made sure that suspend/resume is handled correctly in both clocksource and PWM drivers,
- fixed incorrect definition of AUTORELOAD bit for channel 4,
- fixed order of registering PWM device and calling samsung_bl_set(), which assumes that PWM device has been already registered,
- corrected commit messages of several patches,
- addressed all the valid comments from reviewers, including cleanup of most code originally copied from previous PWM driver,
- rebased on top of current Kgene's for-next,
- tested on Exynos4210, verifying correct PWM output with a scope.

Needs testing on other platforms as I could only compile test for them. Tomasz Figa (18):
ARM: SAMSUNG: Unify base address definitions of timer block
ARM: SAMSUNG: Add new PWM platform device
ARM: SAMSUNG: Set PWM platform data
clocksource: samsung_pwm_timer: Cache clocksource register address
clocksource: samsung_pwm_timer: Do not use clocksource_mmio
clocksource: samsung_pwm_timer: Handle suspend/resume correctly
ARM: SAMSUNG: Move all platforms to new clocksource driver
ARM: SAMSUNG: Remove old samsung-time driver
ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
pwm: samsung: Rename to pwm-samsung-legacy
pwm: Add new pwm-samsung driver
ARM: SAMSUNG: Rework private data handling in dev-backlight
ARM: SAMSUNG: Modify board files to use new PWM platform device
pwm: Remove superseded pwm-samsung-legacy driver
ARM: SAMSUNG: Remove old PWM timer platform devices
ARM: SAMSUNG: Remove pwm-clock infrastructure
ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
ARM: SAMSUNG: Remove plat/regs-timer.h header

 arch/arm/Kconfig                                   |   1 -
 arch/arm/mach-s3c24xx/Kconfig                      |  12 +-
 arch/arm/mach-s3c24xx/clock-s3c2410.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2412.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2416.c              |   2 -
 arch/arm/mach-s3c24xx/clock-s3c2443.c              |   2 -
 arch/arm/mach-s3c24xx/common.c                     |  27 +
 arch/arm/mach-s3c24xx/include/mach/map.h           |   2 +
 arch/arm/mach-s3c24xx/mach-h1940.c                 |   4 +-
 arch/arm/mach-s3c24xx/mach-rx1950.c                |   5 +-
 arch/arm/mach-s3c64xx/Kconfig                      |   4 +-
 arch/arm/mach-s3c64xx/clock.c                      |   2 -
 arch/arm/mach-s3c64xx/common.c                     |  32 +-
 arch/arm/mach-s3c64xx/include/mach/irqs.h          |   8 -
 arch/arm/mach-s3c64xx/include/mach/map.h           |   1 +
 arch/arm/mach-s3c64xx/irq-pm.c                     |   2 -
 arch/arm/mach-s3c64xx/mach-crag6410.c              |   4 +-
 arch/arm/mach-s3c64xx/mach-hmt.c                   |   4 +-
 arch/arm/mach-s3c64xx/mach-smartq.c                |   4 +-
 arch/arm/mach-s3c64xx/mach-smdk6410.c              |   5 +-
 arch/arm/mach-s5p64x0/Kconfig                      |   4 +-
 arch/arm/mach-s5p64x0/clock-s5p6440.c              |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6450.c              |   2 -
 arch/arm/mach-s5p64x0/common.c                     |  27 +
 arch/arm/mach-s5p64x0/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5p64x0/include/mach/map.h           |   1 +
 arch/arm/mach-s5p64x0/mach-smdk6440.c              |   5 +-
 arch/arm/mach-s5p64x0/mach-smdk6450.c              |   5 +-
 arch/arm/mach-s5p64x0/pm.c                         |   3 -
 arch/arm/mach-s5pc100/Kconfig                      |   2 +-
 arch/arm/mach-s5pc100/clock.c                      |   2 -
 arch/arm/mach-s5pc100/common.c                     |  28 +
 arch/arm/mach-s5pc100/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pc100/include/mach/map.h           |   1 +
 arch/arm/mach-s5pc100/mach-smdkc100.c              |   5 +-
 arch/arm/mach-s5pv210/Kconfig                      |   2 +-
 arch/arm/mach-s5pv210/clock.c                      |   1 -
 arch/arm/mach-s5pv210/common.c                     |  28 +
 arch/arm/mach-s5pv210/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pv210/include/mach/map.h           |   1 +
 arch/arm/mach-s5pv210/mach-smdkv210.c              |   5 +-
 arch/arm/mach-s5pv210/pm.c                         |  10 -
 arch/arm/plat-samsung/Kconfig                      |  14 -
 arch/arm/plat-samsung/Makefile                     |   3 -
 arch/arm/plat-samsung/dev-backlight.c              |  61 +-
 arch/arm/plat-samsung/devs.c                       |  42 +-
 arch/arm/plat-samsung/include/plat/clock.h         |   4 -
 arch/arm/plat-samsung/include/plat/devs.h          |   1 +
 arch/arm/plat-samsung/include/plat/irq-vic-timer.h |  13 -
 arch/arm/plat-samsung/include/plat/irqs.h          |   9 -
 arch/arm/plat-samsung/include/plat/pwm-clock.h     |  81 ---
 arch/arm/plat-samsung/include/plat/pwm-core.h      |  24 +
 arch/arm/plat-samsung/include/plat/regs-timer.h    | 124 ----
 arch/arm/plat-samsung/include/plat/samsung-time.h  |  23 -
 arch/arm/plat-samsung/irq-vic-timer.c              |  98 ---
 arch/arm/plat-samsung/pwm-clock.c                  | 474 --------------
 arch/arm/plat-samsung/s5p-irq.c                    |   4 -
 arch/arm/plat-samsung/samsung-time.c               | 394 ------------
 drivers/clocksource/samsung_pwm_timer.c            |  84 +--
 drivers/pwm/pwm-samsung.c                          | 694
++++++++++++++------- 60 files changed, 766 insertions(+), 1644
deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
 create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
 delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
 delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
 delete mode 100644 arch/arm/plat-samsung/samsung-time.c
#42 lore raw

v2 cover Final Samsung PWM support cleanup

Hi Heiko,

Quoted 25 lines · On Saturday 22 of June 2013 20:01:49 Heiko St?bner wrote:

Am Freitag, 21. Juni 2013, 00:12:45 schrieb Tomasz Figa:

Quoted 24 lines

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.>
This series attempts to achieve this goal by:
1) moving remaining Samsung platforms to the new clocksource driver
2) removing old clocksource driver
3) adding new multiplatform- and DT-aware PWM driver
4) moving all Samsung platforms to use the new PWM driver
5) removing old PWM driver
6) removing all PWM-related code that is not used anymore

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage I decided to keep the old driver, add new one, move all platforms to it and then remove the old one.

See particular patches for more detailed descriptions.

On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a scope):

Quoted 8 lines
Quoted 1 line

On a s3c2416 based machine (with the additional two v3 patches)

and again thanks for working on this :-)

Thanks for testing!

I hope we can get this merged ASAP, as this is an important prerequisite for further work on S3C24xx and S3C64xx...

Best regards,
Tomasz

Quoted 113 lines
Quoted 113 lines

Changes since v1:
- made sure that suspend/resume is handled correctly in both

clocksource and PWM drivers,

- fixed incorrect definition of AUTORELOAD bit for channel 4,
- fixed order of registering PWM device and calling samsung_bl_set(),

which assumes that PWM device has been already registered,

- corrected commit messages of several patches,
- addressed all the valid comments from reviewers, including cleanup

of most code originally copied from previous PWM driver,

- rebased on top of current Kgene's for-next,
- tested on Exynos4210, verifying correct PWM output with a scope.

Needs testing on other platforms as I could only compile test for them.

Tomasz Figa (18):
ARM: SAMSUNG: Unify base address definitions of timer block
ARM: SAMSUNG: Add new PWM platform device
ARM: SAMSUNG: Set PWM platform data
clocksource: samsung_pwm_timer: Cache clocksource register address
clocksource: samsung_pwm_timer: Do not use clocksource_mmio
clocksource: samsung_pwm_timer: Handle suspend/resume correctly
ARM: SAMSUNG: Move all platforms to new clocksource driver
ARM: SAMSUNG: Remove old samsung-time driver
ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
pwm: samsung: Rename to pwm-samsung-legacy
pwm: Add new pwm-samsung driver
ARM: SAMSUNG: Rework private data handling in dev-backlight
ARM: SAMSUNG: Modify board files to use new PWM platform device
pwm: Remove superseded pwm-samsung-legacy driver
ARM: SAMSUNG: Remove old PWM timer platform devices
ARM: SAMSUNG: Remove pwm-clock infrastructure
ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
ARM: SAMSUNG: Remove plat/regs-timer.h header

 arch/arm/Kconfig                                   |   1 -
 arch/arm/mach-s3c24xx/Kconfig                      |  12 +-
 arch/arm/mach-s3c24xx/clock-s3c2410.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2412.c              |   1 -
 arch/arm/mach-s3c24xx/clock-s3c2416.c              |   2 -
 arch/arm/mach-s3c24xx/clock-s3c2443.c              |   2 -
 arch/arm/mach-s3c24xx/common.c                     |  27 +
 arch/arm/mach-s3c24xx/include/mach/map.h           |   2 +
 arch/arm/mach-s3c24xx/mach-h1940.c                 |   4 +-
 arch/arm/mach-s3c24xx/mach-rx1950.c                |   5 +-
 arch/arm/mach-s3c64xx/Kconfig                      |   4 +-
 arch/arm/mach-s3c64xx/clock.c                      |   2 -
 arch/arm/mach-s3c64xx/common.c                     |  32 +-
 arch/arm/mach-s3c64xx/include/mach/irqs.h          |   8 -
 arch/arm/mach-s3c64xx/include/mach/map.h           |   1 +
 arch/arm/mach-s3c64xx/irq-pm.c                     |   2 -
 arch/arm/mach-s3c64xx/mach-crag6410.c              |   4 +-
 arch/arm/mach-s3c64xx/mach-hmt.c                   |   4 +-
 arch/arm/mach-s3c64xx/mach-smartq.c                |   4 +-
 arch/arm/mach-s3c64xx/mach-smdk6410.c              |   5 +-
 arch/arm/mach-s5p64x0/Kconfig                      |   4 +-
 arch/arm/mach-s5p64x0/clock-s5p6440.c              |   2 -
 arch/arm/mach-s5p64x0/clock-s5p6450.c              |   2 -
 arch/arm/mach-s5p64x0/common.c                     |  27 +
 arch/arm/mach-s5p64x0/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5p64x0/include/mach/map.h           |   1 +
 arch/arm/mach-s5p64x0/mach-smdk6440.c              |   5 +-
 arch/arm/mach-s5p64x0/mach-smdk6450.c              |   5 +-
 arch/arm/mach-s5p64x0/pm.c                         |   3 -
 arch/arm/mach-s5pc100/Kconfig                      |   2 +-
 arch/arm/mach-s5pc100/clock.c                      |   2 -
 arch/arm/mach-s5pc100/common.c                     |  28 +
 arch/arm/mach-s5pc100/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pc100/include/mach/map.h           |   1 +
 arch/arm/mach-s5pc100/mach-smdkc100.c              |   5 +-
 arch/arm/mach-s5pv210/Kconfig                      |   2 +-
 arch/arm/mach-s5pv210/clock.c                      |   1 -
 arch/arm/mach-s5pv210/common.c                     |  28 +
 arch/arm/mach-s5pv210/include/mach/irqs.h          |   2 -
 arch/arm/mach-s5pv210/include/mach/map.h           |   1 +
 arch/arm/mach-s5pv210/mach-smdkv210.c              |   5 +-
 arch/arm/mach-s5pv210/pm.c                         |  10 -
 arch/arm/plat-samsung/Kconfig                      |  14 -
 arch/arm/plat-samsung/Makefile                     |   3 -
 arch/arm/plat-samsung/dev-backlight.c              |  61 +-
 arch/arm/plat-samsung/devs.c                       |  42 +-
 arch/arm/plat-samsung/include/plat/clock.h         |   4 -
 arch/arm/plat-samsung/include/plat/devs.h          |   1 +
 arch/arm/plat-samsung/include/plat/irq-vic-timer.h |  13 -
 arch/arm/plat-samsung/include/plat/irqs.h          |   9 -
 arch/arm/plat-samsung/include/plat/pwm-clock.h     |  81 ---
 arch/arm/plat-samsung/include/plat/pwm-core.h      |  24 +
 arch/arm/plat-samsung/include/plat/regs-timer.h    | 124 ----
 arch/arm/plat-samsung/include/plat/samsung-time.h  |  23 -
 arch/arm/plat-samsung/irq-vic-timer.c              |  98 ---
 arch/arm/plat-samsung/pwm-clock.c                  | 474
 --------------
 arch/arm/plat-samsung/s5p-irq.c                    |   4 -
 arch/arm/plat-samsung/samsung-time.c               | 394 ------------
 drivers/clocksource/samsung_pwm_timer.c            |  84 +--
 drivers/pwm/pwm-samsung.c                          | 694

++++++++++++++------- 60 files changed, 766 insertions(+), 1644 deletions(-)

 delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
 create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
 delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
 delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
 delete mode 100644 arch/arm/plat-samsung/samsung-time.c
#43 lore raw

v2 cover Final Samsung PWM support cleanup

Quoted 31 lines · Tomasz Figa

Hi Heiko,

Quoted 27 lines · On Saturday 22 of June 2013 20:01:49 Heiko St?bner wrote:

Am Freitag, 21. Juni 2013, 00:12:45 schrieb Tomasz Figa:

Quoted 25 lines

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.>
This series attempts to achieve this goal by:
1) moving remaining Samsung platforms to the new clocksource driver
2) removing old clocksource driver
3) adding new multiplatform- and DT-aware PWM driver
4) moving all Samsung platforms to use the new PWM driver
5) removing old PWM driver
6) removing all PWM-related code that is not used anymore

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage I decided to keep the old driver, add new one, move all platforms to it and then remove the old one.

See particular patches for more detailed descriptions.

On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a scope):

Thanks.

Quoted 4 lines
Quoted 4 lines

On a s3c2416 based machine (with the additional two v3 patches)

Thanks.

Quoted 8 lines
Quoted 2 lines

and again thanks for working on this :-)

Thanks for testing!

I hope we can get this merged ASAP, as this is an important prerequisite for further work on S3C24xx and S3C64xx...

OK, let me take this series into 4th pull-request will be sent to arm-soc tonight in my time. Thanks for your guys' effort.

- Kukjin

#44 lore raw

v2 cover Final Samsung PWM support cleanup

In reply to Heiko Stübner

Hi,

W dniu 2013-06-22 20:01, Heiko St?bner pisze:

Quoted 20 lines

Am Freitag, 21. Juni 2013, 00:12:45 schrieb Tomasz Figa:

Quoted 19 lines

Since we now have a proper Samsung PWM clocksource driver in place, we can proceed with further cleanup of PWM timers support on Samsung SoCs.

This series attempts to achieve this goal by:
1) moving remaining Samsung platforms to the new clocksource driver
2) removing old clocksource driver
3) adding new multiplatform- and DT-aware PWM driver
4) moving all Samsung platforms to use the new PWM driver
5) removing old PWM driver
6) removing all PWM-related code that is not used anymore

Cleaning up the PWM driver is a bit tricky, because the design of current driver makes it completely unsuitable for DT and multiplatform and would require a heavy rework to make it usable, breaking any existing Samsung PWM users by the way. To avoid any breakage I decided to keep the old driver, add new one, move all platforms to it and then remove the old one.

See particular patches for more detailed descriptions.

Quoted 8 lines
Quoted 4 lines

On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a scope):

On a s3c2416 based machine (with the additional two v3 patches)

I have tested this series on Mini2440 board (all v2 patches). Only boot testing for now, however I'm going to inspect the PWM output signal and will report back if there are any issues. I think you could add my

I had to revert this patch (introduced between v3.10-rc4 and v3.10-rc5)

commit 60e93575476f90a72146b51283f514da655410a7

Author: Chander Kashyap <[email protected]>
Date:   Tue May 28 18:32:07 2013 +0530

serial: samsung: enable clock before clearing pending interrupts
during init

Ensure that the uart controller clock is enabled prior to writing
to the
interrupt mask and pending registers in the s3c24xx_serial_init_port function.

to make serial console working again on Mini2440, but this is a different story.

Thanks,
Sylwester