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ARM: shmobile: r8a7790: add thermal driver support

PATCH Superseded Simon Horman 4 participants 6 messages Jun 26, 2013 – Dec 25, 2013

Subsystems (6)
Device tree bindings Arm (32-bit) Arm sub-architectures Common clk +2 more subsystems

v2 of 7 Superseded Latest is v7 →

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Simon Horman

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#0 lore raw

v2 cover ARM: shmobile: r8a7790: add thermal driver support

This short series enables the thermal driver on the r8a7790 SoC and thus the lager board.

It is based on renesas-next-20130620

Simon Horman (2):
ARM: shmobile: r8a7790: add thermal driver support
ARM: shmobile: r8a73a4: add clocks for thermal

 arch/arm/mach-shmobile/clock-r8a7790.c |  4 ++++
 arch/arm/mach-shmobile/setup-r8a7790.c | 12 ++++++++++++
 2 files changed, 16 insertions(+)
Signature · 1 line
1.8.2.1
author
#1 lore raw

PATCH v2 1/2 ARM: shmobile: r8a7790: add thermal driver support

You can get current thermal by

Quoted 1 line

cat /sys/class/thermal/thermal_zone?/temp

Based on similar work for the r8a73a4 by Kuninori Morimoto.

Cc Kuninori Morimoto <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/mach-shmobile/setup-r8a7790.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/mach-shmobile/setup-r8a7790.c +12 -0
index 28f9475..06c720f 100644
@@ -149,6 +149,17 @@ static struct resource irqc0_resources[] __initdata = {
 					  &irqc##idx##_data,		\
 					  sizeof(struct renesas_irqc_config))
 
+static struct resource thermal_resources[] __initdata = {
+	DEFINE_RES_MEM(0xe61f0000, 0x14),
+	DEFINE_RES_MEM(0xe61f0100, 0x38),
+	DEFINE_RES_IRQ(gic_spi(69)),
+};
+
+#define r8a7790_register_thermal()					\
+	platform_device_register_simple("rcar_thermal", -1,		\
+					thermal_resources,		\
+					ARRAY_SIZE(thermal_resources))
+
 void __init r8a7790_add_standard_devices(void)
 {
 	r8a7790_register_scif(SCIFA0);

@@ -162,6 +173,7 @@ void __init r8a7790_add_standard_devices(void)
 	r8a7790_register_scif(HSCIF0);
 	r8a7790_register_scif(HSCIF1);
 	r8a7790_register_irqc(0);
+	r8a7790_register_thermal();
 }
 
 void __init r8a7790_timer_init(void)
Signature · 1 line
1.8.2.1
#2 lore raw

PATCH v2 1/2 ARM: shmobile: r8a7790: Add SSI clocks in device tree

Signed-off-by Laurent Pinchart <[email protected]>
---
 arch/arm/boot/dts/r8a7790.dtsi            | 18 ++++++++++++++++++
 include/dt-bindings/clock/r8a7790-clock.h | 13 +++++++++++++
 2 files changed, 31 insertions(+)
arch/arm/boot/dts/r8a7790.dtsi +17 -0
index 7d7d441..5f68149b 100644
@@ -726,5 +726,23 @@
 			clock-output-names  				"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
 		};
+		mstp10_clks: mstp10_clks@e6150998 {
+			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
+			clocks = <&p_clk>, <&mstp10_clks 0>, <&mstp10_clks 0>,
+				 <&mstp10_clks 0>, <&mstp10_clks 0>, <&mstp10_clks 0>,
+				 <&mstp10_clks 0>, <&mstp10_clks 0>, <&mstp10_clks 0>,
+				 <&mstp10_clks 0>, <&mstp10_clks 0>;
+			#clock-cells = <1>;
+			renesas,clock-indices = <
+				R8A7790_CLK_SSI R8A7790_CLK_SSI9 R8A7790_CLK_SSI8
+				R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5
+				R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2
+				R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
+			>;
+			clock-output-names +				"ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
+				"ssi4", "ssi3", "ssi2", "ssi1", "ssi0";
+		};
 	};
 };
include/dt-bindings/clock/r8a7790-clock.h +13 -0
index 859e9be..dbb262a 100644
@@ -104,4 +104,17 @@
 #define R8A7790_CLK_I2C1		30
 #define R8A7790_CLK_I2C0		31
 
+/* MSTP10 */
+#define R8A7790_CLK_SSI			5
+#define R8A7790_CLK_SSI9		6
+#define R8A7790_CLK_SSI8		7
+#define R8A7790_CLK_SSI7		8
+#define R8A7790_CLK_SSI6		9
+#define R8A7790_CLK_SSI5		10
+#define R8A7790_CLK_SSI4		11
+#define R8A7790_CLK_SSI3		12
+#define R8A7790_CLK_SSI2		13
+#define R8A7790_CLK_SSI1		14
+#define R8A7790_CLK_SSI0		15
+
 #endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */
Signature · 1 line
1.8.3.2
author
#3 lore raw

PATCH v2 2/2 ARM: shmobile: r8a73a4: add clocks for thermal

In reply to Simon Horman
Cc Kuninori Morimoto <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/mach-shmobile/clock-r8a7790.c +4 -0
index 5d71313..28eccd1 100644
@@ -49,6 +49,7 @@
 
 #define SMSTPCR2 0xe6150138
 #define SMSTPCR3 0xe615013c
+#define SMSTPCR5 0xe6150144
 #define SMSTPCR7 0xe615014c
 
 #define MODEMR		0xE6160060

@@ -182,6 +183,7 @@ static struct clk div6_clks[DIV6_NR] = {
 enum {
 	MSTP721, MSTP720,
 	MSTP717, MSTP716,
+	MSTP522,
 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
 	MSTP_NR

@@ -203,6 +205,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
 	[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
 	[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
+	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
 	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
 	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
 };

@@ -254,6 +257,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
 	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
 	CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
+	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
 	CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
Signature · 1 line
1.8.2.1
#5 lore raw

PATCH v2 2/2 ARM: shmobile: r8a73a4: add clocks for thermal

Quoted 5 lines · Sergei Shtylyov

Hello.

On 26-06-2013 12:40, Simon Horman wrote:

    s/73a4/7790/ in the subject.

Thanks, I have fixed that and reposted.