ARM: shmobile: r8a73a4/r8a7790 CMT and Arch timer update
Magnus Damm
maintainercover ARM: shmobile: r8a73a4/r8a7790 CMT and Arch timer update
ARM: shmobile: r8a73a4/r8a7790 CMT and Arch timer update
[PATCH 01/04] ARM: shmobile: Add r8a7790 CMT00 clock event [PATCH 02/04] ARM: shmobile: Make r8a7790 Arch timer optional [PATCH 03/04] ARM: shmobile: Add r8a73a4 CMT10 clock event [PATCH 04/04] ARM: shmobile: Make r8a73a4 Arch timer optional
Add clock event support through a CMT timer channel for the SoCs r8a7790 and r8a73a4 as well as APE6EVM and Lager boards.
Also, to be able to test the CMT timers, make it possible to deselect Arch timer and instead rely on predefined values for udelay() and instead of local timer for SMP use broadcast.
A nice side effect of this is that high resolution timers now become available. The reason for the is that the Arch timer sets the C3STOP flag which in turn will tell the time keeping code to not allow high resolution timer without an additional clock event. So here they are.
---
Written against renesas.git renesas-next-20130628 plus [PATCH] ARM: shmobile: Sort r8a7790 MSTP entries [PATCH 00/06] ARM: shmobile: Remove unused auxdata tables
For proper run time operation the following patch included in renesas-next-20130628 must be included in the CMT driver:
clocksource: sh_cmt: 32-bit control register support
arch/arm/mach-shmobile/Kconfig | 2 - arch/arm/mach-shmobile/board-ape6evm.c | 1 arch/arm/mach-shmobile/board-lager.c | 1 arch/arm/mach-shmobile/clock-r8a73a4.c | 4 ++- arch/arm/mach-shmobile/clock-r8a7790.c | 4 +++ arch/arm/mach-shmobile/include/mach/r8a73a4.h | 1 arch/arm/mach-shmobile/include/mach/r8a7790.h | 1 arch/arm/mach-shmobile/setup-r8a73a4.c | 29 +++++++++++++++++++++++++ arch/arm/mach-shmobile/setup-r8a7790.c | 29 +++++++++++++++++++++++++ 9 files changed, 69 insertions(+), 3 deletions(-)
Magnus Damm
maintainerPATCH 1/4 ARM: shmobile: Add r8a7790 CMT00 clock event
From: Magnus Damm <[email protected]>
Add clock event support for CMT0 timer channel 0 to the r8a7790 SoC code. On most ARM mach-shmobile the CMT is hooked up to a 32KHz clock but on r8a7790 a 31.7KHz clock is instead used.
---
arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++ arch/arm/mach-shmobile/setup-r8a7790.c | 21 +++++++++++++++++++++ 2 files changed, 25 insertions(+)
arch/arm/mach-shmobile/clock-r8a7790.c +4 -0
@@ -47,6 +47,7 @@#define CPG_BASE 0xe6150000#define CPG_LEN 0x1000 +#define SMSTPCR1 0xe6150134#define SMSTPCR2 0xe6150138#define SMSTPCR3 0xe615013c#define SMSTPCR5 0xe6150144
@@ -186,6 +187,7 @@ enum {MSTP522 ,MSTP315 ,MSTP314 ,MSTP313 ,MSTP312 ,MSTP311 ,MSTP305 ,MSTP304 ,MSTP216 ,MSTP207 ,MSTP206 ,MSTP204 ,MSTP203 ,MSTP202 , +MSTP124 ,MSTP_NR };
@@ -208,6 +210,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ + [MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */ };static struct clk_lookup lookups[] = {
@@ -270,6 +273,7 @@ static struct clk_lookup lookups[] = {CLKDEV_DEV_ID ("sh_mobile_sdhi.3" , &mstp_clks[MSTP311 ]),CLKDEV_DEV_ID ("ee220000.mmcif" , &mstp_clks[MSTP305 ]),CLKDEV_DEV_ID ("sh_mmcif.1" , &mstp_clks[MSTP305 ]), + CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), };#define R8A7790_CLOCK_ROOT (e, m, p0, p1, p30, p31) \
arch/arm/mach-shmobile/setup-r8a7790.c +21 -0
@@ -23,6 +23,7 @@#include <linux/kernel.h> #include <linux/of_platform.h> #include <linux/serial_sci.h> +#include <linux/sh_timer.h> #include <linux/platform_data/gpio-rcar.h> #include <linux/platform_data/irq-renesas-irqc.h> #include <mach/common.h>
@@ -160,6 +161,25 @@ static struct resource thermal_resources thermal_resources, \ ARRAY_SIZE(thermal_resources)) +static struct sh_timer_config cmt00_platform_data = { + .name ="CMT00" , + .timer_bit =0 , + .clockevent_rating =80 , +}; + +static struct resource cmt00_resources[] = { +DEFINE_RES_MEM (0xffca0510 ,0x0c ), +DEFINE_RES_MEM (0xffca0500 ,0x04 ), +DEFINE_RES_IRQ (gic_spi (142 )),/* CMT0_0 */ +}; + +#define r8a7790_register_cmt (idx) \ + platform_device_register_resndata(&platform_bus, "sh_cmt", \ + idx, cmt##idx##_resources, \ + ARRAY_SIZE(cmt##idx##_resources), \ + &cmt##idx##_platform_data, \ + sizeof(struct sh_timer_config)) +void __init r8a7790_add_standard_devices (void ) {r8a7790_register_scif (SCIFA0 );
@@ -174,6 +194,7 @@ void __init r8a7790_add_standard_devicesr8a7790_register_scif (HSCIF1 );r8a7790_register_irqc (0 );r8a7790_register_thermal (); +r8a7790_register_cmt (00 ); }void __init r8a7790_timer_init (void )
Magnus Damm
maintainerPATCH 2/4 ARM: shmobile: Make r8a7790 Arch timer optional
In reply to Magnus DammFrom: Magnus Damm <[email protected]>
Update the r8a7790 code to allow using other
timers than Arch timer for clock events.
---
arch/arm/mach-shmobile/Kconfig | 1 - arch/arm/mach-shmobile/board-lager.c | 1 + arch/arm/mach-shmobile/include/mach/r8a7790.h | 1 + arch/arm/mach-shmobile/setup-r8a7790.c | 8 ++++++++ 4 files changed, 10 insertions(+), 1 deletion(-)
arch/arm/mach-shmobile/Kconfig +0 -1
@@ -61,7 +61,6 @@ config ARCH_R8A7790 select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_GIC select CPU_V7 - select ARM_ARCH_TIMER select SH_CLK_CPG select RENESAS_IRQC
arch/arm/mach-shmobile/board-lager.c +1 -0
@@ -103,6 +103,7 @@ static const char *lager_boards_compat_d };DT_MACHINE_START (LAGER_DT ,"lager" ) + .init_early = r8a7790_init_delay, .init_irq = irqchip_init, .init_time = r8a7790_timer_init, .init_machine = lager_add_standard_devices,
arch/arm/mach-shmobile/include/mach/r8a7790.h +1 -0
@@ -4,6 +4,7 @@void r8a7790_add_standard_devices (void );void r8a7790_clock_init (void );void r8a7790_pinmux_init (void ); +void r8a7790_init_delay (void );void r8a7790_timer_init (void );#endif /* __ASM_R8A7790_H__ */
arch/arm/mach-shmobile/setup-r8a7790.c +8 -0
@@ -209,6 +209,13 @@ void __init r8a7790_timer_init(void)shmobile_timer_init (); } +void __init r8a7790_init_delay (void ) +{ +#ifndef CONFIG_ARM_ARCH_TIMER +shmobile_setup_delay (1300 ,2 ,4 );/* Cortex-A15 @ 1300MHz */ +#endif +} +#ifdef CONFIG_USE_OF void __init r8a7790_add_standard_devices_dt (void ) {
@@ -221,6 +228,7 @@ static const char *r8a7790_boards_compat };DT_MACHINE_START (R8A7790_DT ,"Generic R8A7790 (Flattened Device Tree)" ) + .init_early = r8a7790_init_delay, .init_irq = irqchip_init, .init_machine = r8a7790_add_standard_devices_dt, .init_time = r8a7790_timer_init,
Magnus Damm
maintainerPATCH 3/4 ARM: shmobile: Add r8a73a4 CMT10 clock event
In reply to Magnus DammFrom: Magnus Damm <[email protected]>
Add clock event support for CMT1 timer channel 0
to the r8a73a4 SoC code. The CMT is used together
with a 32KHz clock in this case.
---
arch/arm/mach-shmobile/clock-r8a73a4.c | 4 +++- arch/arm/mach-shmobile/setup-r8a73a4.c | 21 +++++++++++++++++++++ 2 files changed, 24 insertions(+), 1 deletion(-)
arch/arm/mach-shmobile/clock-r8a73a4.c +3 -1
@@ -505,7 +505,7 @@ static struct clk div6_clks[DIV6_NR] = {/* MSTP */ enum {MSTP217 ,MSTP216 ,MSTP207 ,MSTP206 ,MSTP204 ,MSTP203 , -MSTP323 ,MSTP318 ,MSTP317 ,MSTP316 , +MSTP329 ,MSTP323 ,MSTP318 ,MSTP317 ,MSTP316 ,MSTP315 ,MSTP314 ,MSTP313 ,MSTP312 ,MSTP305 ,MSTP300 ,MSTP411 ,MSTP410 ,MSTP409 ,MSTP522 ,MSTP515 ,
@@ -529,6 +529,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP317] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 17, 0), /* IIC7 */ [MSTP318] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* IIC0 */ [MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */ + [MSTP329] = SH_CLK_MSTP32(&extalr_clk, SMSTPCR3, 29, 0), /* CMT10 */ [MSTP409] = SH_CLK_MSTP32(&main_div2_clk, SMSTPCR4, 9, 0), /* IIC5 */ [MSTP410] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */ [MSTP411] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
@@ -593,6 +594,7 @@ static struct clk_lookup lookups[] = {CLKDEV_DEV_ID ("e6560000.i2c" , &mstp_clks[MSTP317 ]),CLKDEV_DEV_ID ("e6500000.i2c" , &mstp_clks[MSTP318 ]),CLKDEV_DEV_ID ("e6510000.i2c" , &mstp_clks[MSTP323 ]), +CLKDEV_DEV_ID ("sh_cmt.10" , &mstp_clks[MSTP329 ]),CLKDEV_DEV_ID ("e60b0000.i2c" , &mstp_clks[MSTP409 ]),CLKDEV_DEV_ID ("e6540000.i2c" , &mstp_clks[MSTP410 ]), CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]),
arch/arm/mach-shmobile/setup-r8a73a4.c +21 -0
@@ -23,6 +23,7 @@#include <linux/of_platform.h> #include <linux/platform_data/irq-renesas-irqc.h> #include <linux/serial_sci.h> +#include <linux/sh_timer.h> #include <mach/common.h> #include <mach/irqs.h> #include <mach/r8a73a4.h>
@@ -169,6 +170,25 @@ static const struct resource thermal0_re thermal0_resources, \ ARRAY_SIZE(thermal0_resources)) +static struct sh_timer_config cmt10_platform_data = { + .name ="CMT10" , + .timer_bit =0 , + .clockevent_rating =80 , +}; + +static struct resource cmt10_resources[] = { +DEFINE_RES_MEM (0xe6130010 ,0x0c ), +DEFINE_RES_MEM (0xe6130000 ,0x04 ), +DEFINE_RES_IRQ (gic_spi (120 )),/* CMT1_0 */ +}; + +#define r8a7790_register_cmt (idx) \ + platform_device_register_resndata(&platform_bus, "sh_cmt", \ + idx, cmt##idx##_resources, \ + ARRAY_SIZE(cmt##idx##_resources), \ + &cmt##idx##_platform_data, \ + sizeof(struct sh_timer_config)) +void __init r8a73a4_add_standard_devices (void ) {r8a73a4_register_scif (SCIFA0 );
@@ -180,6 +200,7 @@ void __init r8a73a4_add_standard_devicesr8a73a4_register_irqc (0 );r8a73a4_register_irqc (1 );r8a73a4_register_thermal (); +r8a7790_register_cmt (10 ); }#ifdef CONFIG_USE_OF
Magnus Damm
maintainerPATCH 4/4 ARM: shmobile: Make r8a73a4 Arch timer optional
In reply to Magnus DammFrom: Magnus Damm <[email protected]>
Update the r8a73a4 code to allow using other
timers than Arch timer for clock event
---
arch/arm/mach-shmobile/Kconfig | 1 - arch/arm/mach-shmobile/board-ape6evm.c | 1 + arch/arm/mach-shmobile/include/mach/r8a73a4.h | 1 + arch/arm/mach-shmobile/setup-r8a73a4.c | 8 ++++++++ 4 files changed, 10 insertions(+), 1 deletion(-)
arch/arm/mach-shmobile/Kconfig +0 -1
@@ -23,7 +23,6 @@ config ARCH_R8A73A4 select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_GIC select CPU_V7 - select ARM_ARCH_TIMER select SH_CLK_CPG select RENESAS_IRQC select ARCH_HAS_CPUFREQ
arch/arm/mach-shmobile/board-ape6evm.c +1 -0
@@ -102,6 +102,7 @@ static const char *ape6evm_boards_compat };DT_MACHINE_START (APE6EVM_DT ,"ape6evm" ) + .init_early = r8a73a4_init_delay, .init_irq = irqchip_init, .init_time = shmobile_timer_init, .init_machine = ape6evm_add_standard_devices,
arch/arm/mach-shmobile/include/mach/r8a73a4.h +1 -0
@@ -4,5 +4,6 @@void r8a73a4_add_standard_devices (void );void r8a73a4_clock_init (void );void r8a73a4_pinmux_init (void ); +void r8a73a4_init_delay (void );#endif /* __ASM_R8A73A4_H__ */
arch/arm/mach-shmobile/setup-r8a73a4.c +8 -0
@@ -203,6 +203,13 @@ void __init r8a73a4_add_standard_devicesr8a7790_register_cmt (10 ); } +void __init r8a73a4_init_delay (void ) +{ +#ifndef CONFIG_ARM_ARCH_TIMER +shmobile_setup_delay (1500 ,2 ,4 );/* Cortex-A15 @ 1500MHz */ +#endif +} +#ifdef CONFIG_USE_OF void __init r8a73a4_add_standard_devices_dt (void ) {
@@ -216,6 +223,7 @@ static const char *r8a73a4_boards_compat };DT_MACHINE_START (R8A73A4_DT ,"Generic R8A73A4 (Flattened Device Tree)" ) + .init_early = r8a73a4_init_delay, .init_irq = irqchip_init, .init_machine = r8a73a4_add_standard_devices_dt, .init_time = shmobile_timer_init,
cover ARM: shmobile: r8a73a4/r8a7790 CMT and Arch timer update
In reply to Magnus DammQuoted 23 lines · Magnus Damm
ARM: shmobile: r8a73a4/r8a7790 CMT and Arch timer update
[PATCH 01/04] ARM: shmobile: Add r8a7790 CMT00 clock event [PATCH 02/04] ARM: shmobile: Make r8a7790 Arch timer optional [PATCH 03/04] ARM: shmobile: Add r8a73a4 CMT10 clock event [PATCH 04/04] ARM: shmobile: Make r8a73a4 Arch timer optional
Add clock event support through a CMT timer channel for the SoCs r8a7790 and r8a73a4 as well as APE6EVM and Lager boards.
Also, to be able to test the CMT timers, make it possible to deselect Arch timer and instead rely on predefined values for
udelay()and instead of local timer for SMP use broadcast.A nice side effect of this is that high resolution timers now become available. The reason for the is that the Arch timer sets the C3STOP flag which in turn will tell the time keeping code to not allow high resolution timer without an additional clock event. So here they are.
Signed-off-by Magnus Damm <[email protected]>---
Quoted 7 lines
Written against renesas.git renesas-next-20130628 plus [PATCH] ARM: shmobile: Sort r8a7790 MSTP entries [PATCH 00/06] ARM: shmobile: Remove unused auxdata tables
For proper run time operation the following patch included in renesas-next-20130628 must be included in the CMT driver:
Thanks, Magnus.
I have queued these up in the soc branch.
I applied the first patch of the series manually as there was some conflicts for one reason or another. Please check that I applied it correctly.