clk: exynos5250: Add G2D gate clock

PATCH New Sachin Kamat 4 participants 13 messages Jul 5, 2013 – Jul 31, 2013

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Device tree bindings DRM drivers DRM misc Common clk +2 more subsystems

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Sachin Kamat

author

2013-07-05 08:42 UTC #0 lore raw

PATCH 1/3 clk: exynos5250: Add G2D gate clock

Adds gate clock for G2D IP for Exynos5250 SoC.

Signed-off-by Sachin Kamat <[email protected]>

Cc Mike Turquette <[email protected]>

---
This patch depends on the following patch:
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20581

---
 .../devicetree/bindings/clock/exynos5250-clock.txt |    1 +
 drivers/clk/samsung/clk-exynos5250.c               |    5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/clock/exynos5250-clock.txt +1 -0

index 1a05761..7e88242 100644
@@ -155,6 +155,7 @@ clock which they consume.
   dp			342
   mixer			343
   hdmi			344
+  g2d			345
 
 Example 1: An example of a clock controller node is listed below.

drivers/clk/samsung/clk-exynos5250.c +4 -1

index 6f767c5..3da0bdf 100644
@@ -62,6 +62,7 @@
 #define SRC_CDREX		0x20200
 #define PLL_DIV2_SEL		0x20a24
 #define GATE_IP_DISP1		0x10928
+#define GATE_IP_ACP		0x10000
 
 /*
  * Let each supported clock get a unique id. This id is used to lookup the clock

@@ -99,7 +100,7 @@ enum exynos5250_clks {
 	spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, hsi2c2,
 	hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, tzpc1,
 	tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct,
-	wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi,
+	wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d,
 
 	nr_clks,
 };

@@ -152,6 +153,7 @@ static __initdata unsigned long exynos5250_clk_regs[] = {
 	SRC_CDREX,
 	PLL_DIV2_SEL,
 	GATE_IP_DISP1,
+	GATE_IP_ACP,
 };
 
 /* list of all parent clock list */

@@ -463,6 +465,7 @@ struct samsung_gate_clock exynos5250_gate_clks[] __initdata = {
 	GATE(dp, "dp", "aclk200", GATE_IP_DISP1, 4, 0, 0),
 	GATE(mixer, "mixer", "aclk200", GATE_IP_DISP1, 5, 0, 0),
 	GATE(hdmi, "hdmi", "aclk200", GATE_IP_DISP1, 6, 0, 0),
+	GATE(g2d, "g2d", "aclk200", GATE_IP_ACP, 3, 0, 0),
 };
 
 static __initdata struct of_device_id ext_clk_match[] = {

Signature · 1 line

1.7.9.5

Sachin Kamat

author

2013-07-26 08:48 UTC #1 lore raw

PATCH 1/3 clk: exynos5250: Add G2D gate clock

Quoted 62 lines · Sachin Kamat

Adds gate clock for G2D IP for Exynos5250 SoC.

Signed-off-by Sachin Kamat <[email protected]>

Cc Mike Turquette <[email protected]>

---
This patch depends on the following patch:
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20581

---
 .../devicetree/bindings/clock/exynos5250-clock.txt |    1 +
 drivers/clk/samsung/clk-exynos5250.c               |    5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/clock/exynos5250-clock.txt +1 -0

index 1a05761..7e88242 100644
@@ -155,6 +155,7 @@ clock which they consume.
   dp                   342
   mixer                        343
   hdmi                 344
+  g2d                  345
 
 Example 1: An example of a clock controller node is listed below.

drivers/clk/samsung/clk-exynos5250.c +4 -2

index 6f767c5..3da0bdf 100644
@@ -62,6 +62,7 @@
 #define SRC_CDREX              0x20200
 #define PLL_DIV2_SEL           0x20a24
 #define GATE_IP_DISP1          0x10928
+#define GATE_IP_ACP            0x10000
 
 /*
  * Let each supported clock get a unique id. This id is used to lookup the clock

@@ -99,7 +100,7 @@ enum exynos5250_clks {
        spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, hsi2c2,
        hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, tzpc1,
        tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct,
-       wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi,
+       wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d,
 
        nr_clks,
 };

@@ -152,6 +153,7 @@ static __initdata unsigned long exynos5250_clk_regs[] = {
        SRC_CDREX,
        PLL_DIV2_SEL,
        GATE_IP_DISP1,
+       GATE_IP_ACP,
 };
 
 /* list of all parent clock list */

@@ -463,6 +465,7 @@ struct samsung_gate_clock exynos5250_gate_clks[] __initdata = {
        GATE(dp, "dp", "aclk200", GATE_IP_DISP1, 4, 0, 0),
        GATE(mixer, "mixer", "aclk200", GATE_IP_DISP1, 5, 0, 0),
        GATE(hdmi, "hdmi", "aclk200", GATE_IP_DISP1, 6, 0, 0),
+       GATE(g2d, "g2d", "aclk200", GATE_IP_ACP, 3, 0, 0),
 };
 
 static __initdata struct of_device_id ext_clk_match[] = {
--

Quoted 2 lines

1.7.9.5

Ping Mike.

Signature · 2 lines

With warm regards,
Sachin

Sachin Kamat

author

2013-07-05 08:42 UTC #2 lore raw

PATCH 2/3 of/documentation: Update G2D documentation

In reply to Sachin Kamat

Exynos5250 G2D IP requires only the gate clock. Update the binding documentation accordingly.

Signed-off-by Sachin Kamat <[email protected]>

Cc Inki Dae <[email protected]>

---
 .../devicetree/bindings/gpu/samsung-g2d.txt        |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/gpu/samsung-g2d.txt +3 -1

index 3f454ff..60ca631 100644
@@ -12,7 +12,9 @@ Required properties:
   - interrupts : G2D interrupt number to the CPU.
   - clocks : from common clock binding: handle to G2D clocks.
   - clock-names : from common clock binding: must contain "sclk_fimg2d" and
-		  "fimg2d", corresponding to entries in the clocks property.
+		  "fimg2d" for S5PV210 & Exynos4 based SoCs and "fimg2d" for
+		  Exynos5250 SoC, corresponding to entries in the clocks
+		  property.
 
 Example:
 	g2d at 12800000 {

Signature · 1 line

1.7.9.5

Tomasz Figa

2013-07-05 23:52 UTC #3 lore raw

PATCH 2/3 of/documentation: Update G2D documentation

Hi Sachin,

Quoted 18 lines · On Friday 05 of July 2013 14:12:28 Sachin Kamat wrote:

Exynos5250 G2D IP requires only the gate clock. Update the binding documentation accordingly.
Signed-off-by Sachin Kamat <[email protected]>
Cc Inki Dae <[email protected]>
---
 .../devicetree/bindings/gpu/samsung-g2d.txt        |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
(quoted diff) +0 -0
b/Documentation/devicetree/bindings/gpu/samsung-g2d.txt index 3f454ff..60ca631 100644
Documentation/devicetree/bindings/gpu/samsung-g2d.txt +0 -0
@@ -12,7 +12,9 @@ Required properties:
   - interrupts : G2D interrupt number to the CPU.
   - clocks : from common clock binding: handle to G2D clocks.
   - clock-names : from common clock binding: must contain "sclk_fimg2d"

Quoted 1 line

and - "fimg2d", corresponding to entries in the clocks

property. +

Documentation/devicetree/bindings/gpu/samsung-g2d.txt Required properties: · line 17

Quoted 3 lines

"fimg2d" for S5PV210 & Exynos4 based SoCs and "fimg2d" for +
Exynos5250 SoC, corresponding to entries in the clocks
Documentation/devicetree/bindings/gpu/samsung-g2d.txt +1 -0
+		  property.

I think this needs to be rephrased, because I can't get any sense from this sentence.

Maybe something like:

- clock-names : names of clocks listed in clocks property, in the same order, depending on SoC type:
- for S5PV210 and Exynos4 based SoCs : "fimg2d" and "sclk_fimg2d"
- for Exynos5250 SoC : "fimg2d".

What do you think?

Best regards,
Tomasz

Sachin Kamat

author

2013-07-08 06:36 UTC #4 lore raw

PATCH 2/3 of/documentation: Update G2D documentation

Hi Tomasz,

Quoted 30 lines · Tomasz Figa

Hi Sachin,
Quoted 18 lines · On Friday 05 of July 2013 14:12:28 Sachin Kamat wrote:
Exynos5250 G2D IP requires only the gate clock. Update the binding documentation accordingly.
Signed-off-by Sachin Kamat <[email protected]>
Cc Inki Dae <[email protected]>
---
 .../devicetree/bindings/gpu/samsung-g2d.txt        |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
(quoted diff) +0 -0
b/Documentation/devicetree/bindings/gpu/samsung-g2d.txt index 3f454ff..60ca631 100644
Documentation/devicetree/bindings/gpu/samsung-g2d.txt +0 -0
@@ -12,7 +12,9 @@ Required properties:
   - interrupts : G2D interrupt number to the CPU.
   - clocks : from common clock binding: handle to G2D clocks.
   - clock-names : from common clock binding: must contain "sclk_fimg2d"
Quoted 1 line
and - "fimg2d", corresponding to entries in the clocks
property. +
Quoted 3 lines
"fimg2d" for S5PV210 & Exynos4 based SoCs and "fimg2d" for +
Exynos5250 SoC, corresponding to entries in the clocks
+ property.
I think this needs to be rephrased, because I can't get any sense from this sentence.

Quoted 8 lines

Maybe something like:
- clock-names : names of clocks listed in clocks property, in the same order, depending on SoC type:
- for S5PV210 and Exynos4 based SoCs : "fimg2d" and "sclk_fimg2d"
- for Exynos5250 SoC : "fimg2d".
What do you think?

Sure. Will update and re-send.

Thanks for the review.

Signature · 2 lines

With warm regards,
Sachin

Sachin Kamat

author

2013-07-05 08:42 UTC #5 lore raw

PATCH 3/3 ARM: EXYNOS: Add G2D support to exynos5250

In reply to Sachin Kamat

Adds G2D node to exynos5250 DT file.

Signed-off-by Sachin Kamat <[email protected]>

---
 arch/arm/boot/dts/exynos5250.dtsi |    8 ++++++++
 1 file changed, 8 insertions(+)

arch/arm/boot/dts/exynos5250.dtsi +8 -0

index ef57277..6f356ce 100644
@@ -163,6 +163,14 @@
 		clock-names = "watchdog";
 	};
 
+	g2d at 10850000 {
+		compatible = "samsung,exynos5250-g2d";
+		reg = <0x10850000 0x1000>;
+		interrupts = <0 91 0>;
+		clocks = <&clock 345>;
+		clock-names = "fimg2d";
+	};
+
 	codec at 11000000 {
 		compatible = "samsung,mfc-v6";
 		reg = <0x11000000 0x10000>;

Signature · 1 line

1.7.9.5

Kukjin Kim

2013-07-31 05:52 UTC #6 lore raw

PATCH 3/3 ARM: EXYNOS: Add G2D support to exynos5250

Quoted 29 lines · Sachin Kamat

Adds G2D node to exynos5250 DT file.

Signed-off-by Sachin Kamat <[email protected]>

---
 arch/arm/boot/dts/exynos5250.dtsi |    8 ++++++++
 1 file changed, 8 insertions(+)

arch/arm/boot/dts/exynos5250.dtsi +8 -1

index ef57277..6f356ce 100644
@@ -163,6 +163,14 @@
 		clock-names = "watchdog";
 	};
 
+	g2d at 10850000 {
+		compatible = "samsung,exynos5250-g2d";
+		reg = <0x10850000 0x1000>;
+		interrupts = <0 91 0>;
+		clocks = <&clock 345>;
+		clock-names = "fimg2d";
+	};
+
 	codec at 11000000 {
 		compatible = "samsung,mfc-v6";
 		reg = <0x11000000 0x10000>;
--

Quoted 1 line

1.7.9.5

Looks ok to me, applied.

Thanks,
Kukjin

Mike Turquette

2013-07-26 20:18 UTC #7 lore raw

PATCH 1/3 clk: exynos5250: Add G2D gate clock

In reply to Sachin Kamat

Quoting Sachin Kamat (2013-07-05 01:42:27)

Quoted 4 lines

Adds gate clock for G2D IP for Exynos5250 SoC.
Signed-off-by Sachin Kamat <[email protected]>
Cc Mike Turquette <[email protected]>

I've taken patch #1 into clk-next.

Quoted 3 lines

---
This patch depends on the following patch:
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20581

I think I've gotten all three series you sent out, can you confirm?
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20581
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/20829
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/20582

Regards,
Mike

Quoted 56 lines

---
 .../devicetree/bindings/clock/exynos5250-clock.txt |    1 +
 drivers/clk/samsung/clk-exynos5250.c               |    5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/clock/exynos5250-clock.txt +1 -0

index 1a05761..7e88242 100644
@@ -155,6 +155,7 @@ clock which they consume.
   dp                   342
   mixer                        343
   hdmi                 344
+  g2d                  345
 
 Example 1: An example of a clock controller node is listed below.

drivers/clk/samsung/clk-exynos5250.c +4 -1

index 6f767c5..3da0bdf 100644
@@ -62,6 +62,7 @@
 #define SRC_CDREX              0x20200
 #define PLL_DIV2_SEL           0x20a24
 #define GATE_IP_DISP1          0x10928
+#define GATE_IP_ACP            0x10000
 
 /*
  * Let each supported clock get a unique id. This id is used to lookup the clock

@@ -99,7 +100,7 @@ enum exynos5250_clks {
        spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, hsi2c2,
        hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, tzpc1,
        tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct,
-       wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi,
+       wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d,
 
        nr_clks,
 };

@@ -152,6 +153,7 @@ static __initdata unsigned long exynos5250_clk_regs[] = {
        SRC_CDREX,
        PLL_DIV2_SEL,
        GATE_IP_DISP1,
+       GATE_IP_ACP,
 };
 
 /* list of all parent clock list */

@@ -463,6 +465,7 @@ struct samsung_gate_clock exynos5250_gate_clks[] __initdata = {
        GATE(dp, "dp", "aclk200", GATE_IP_DISP1, 4, 0, 0),
        GATE(mixer, "mixer", "aclk200", GATE_IP_DISP1, 5, 0, 0),
        GATE(hdmi, "hdmi", "aclk200", GATE_IP_DISP1, 6, 0, 0),
+       GATE(g2d, "g2d", "aclk200", GATE_IP_ACP, 3, 0, 0),
 };
 
 static __initdata struct of_device_id ext_clk_match[] = {

Signature · 1 line

1.7.9.5

Sachin Kamat

author

2013-07-27 13:29 UTC #8 lore raw

PATCH 1/3 clk: exynos5250: Add G2D gate clock

Quoted 7 lines · Mike Turquette

Quoting Sachin Kamat (2013-07-05 01:42:27)
Quoted 4 lines
Adds gate clock for G2D IP for Exynos5250 SoC.
Signed-off-by Sachin Kamat <[email protected]>
Cc Mike Turquette <[email protected]>
I've taken patch #1 into clk-next.

Thanks Mike.

Quoted 6 lines

Quoted 4 lines
---
This patch depends on the following patch:
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20581
I think I've gotten all three series you sent out, can you confirm?

I haven't seen any update in your tree [1] since quite some time. The last commit I see in clk-next branch is 45e3ec3784 ("clk: tegra: fix ifdef for tegra_periph_reset_assert inline"). I hope I am looking at the right tree?

[1] git://git.linaro.org/people/mturquette/linux.git

Signature · 2 lines

With warm regards,
Sachin

Mike Turquette

2013-07-30 06:48 UTC #9 lore raw

PATCH 1/3 clk: exynos5250: Add G2D gate clock

Quoting Sachin Kamat (2013-07-27 06:29:56)

Quoted 16 lines · Mike Turquette

Quoted 7 lines
Quoting Sachin Kamat (2013-07-05 01:42:27)
Quoted 4 lines
Adds gate clock for G2D IP for Exynos5250 SoC.
Signed-off-by Sachin Kamat <[email protected]>
Cc Mike Turquette <[email protected]>
I've taken patch #1 into clk-next.
Thanks Mike.
Quoted 5 lines
Quoted 4 lines
---
This patch depends on the following patch:
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20581

Quoted 6 lines

Quoted 1 line
I think I've gotten all three series you sent out, can you confirm?
I haven't seen any update in your tree [1] since quite some time. The last commit I see in clk-next branch is 45e3ec3784 ("clk: tegra: fix ifdef for tegra_periph_reset_assert inline"). I hope I am looking at the right tree?

You are, but I had not pushed to it since the merge window closed. It is now updated.

Regards,
Mike

Quoted 6 lines

[1] git://git.linaro.org/people/mturquette/linux.git
Signature · 2 lines
With warm regards,
Sachin

Sachin Kamat

author

2013-07-30 06:55 UTC #10 lore raw

PATCH 1/3 clk: exynos5250: Add G2D gate clock

Quoted 19 lines · Mike Turquette

Quoting Sachin Kamat (2013-07-27 06:29:56)
Quoted 18 lines · Mike Turquette
Quoted 7 lines
Quoting Sachin Kamat (2013-07-05 01:42:27)
Quoted 4 lines
Adds gate clock for G2D IP for Exynos5250 SoC.
Signed-off-by Sachin Kamat <[email protected]>
Cc Mike Turquette <[email protected]>
I've taken patch #1 into clk-next.
Thanks Mike.
Quoted 6 lines
Quoted 4 lines
---
This patch depends on the following patch:
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20581
I think I've gotten all three series you sent out, can you confirm?

Quoted 8 lines

Quoted 4 lines
I haven't seen any update in your tree [1] since quite some time. The last commit I see in clk-next branch is 45e3ec3784 ("clk: tegra: fix ifdef for tegra_periph_reset_assert inline"). I hope I am looking at the right tree?
You are, but I had not pushed to it since the merge window closed. It is now updated.

Thanks Mike. I confirm that all the three patch series that you mentioned are applied in your tree.
Please check the below one too.

http://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg20598.html

Signature · 2 lines

With warm regards,
Sachin

Mike Turquette

2013-07-31 03:42 UTC #11 lore raw

PATCH 1/3 clk: exynos5250: Add G2D gate clock

Quoting Sachin Kamat (2013-07-29 23:55:33)

Quoted 29 lines · Mike Turquette

Quoted 19 lines
Quoting Sachin Kamat (2013-07-27 06:29:56)
Quoted 18 lines · Mike Turquette
Quoted 7 lines
Quoting Sachin Kamat (2013-07-05 01:42:27)
Quoted 4 lines
Adds gate clock for G2D IP for Exynos5250 SoC.
Signed-off-by Sachin Kamat <[email protected]>
Cc Mike Turquette <[email protected]>
I've taken patch #1 into clk-next.
Thanks Mike.
Quoted 6 lines
Quoted 4 lines
---
This patch depends on the following patch:
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20581
I think I've gotten all three series you sent out, can you confirm?
Quoted 8 lines
Quoted 4 lines
I haven't seen any update in your tree [1] since quite some time. The last commit I see in clk-next branch is 45e3ec3784 ("clk: tegra: fix ifdef for tegra_periph_reset_assert inline"). I hope I am looking at the right tree?
You are, but I had not pushed to it since the merge window closed. It is now updated.

Quoted 5 lines

Thanks Mike. I confirm that all the three patch series that you mentioned are applied in your tree.
Please check the below one too.
http://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg20598.html

Ok, I picked that one up too.

Regards,
Mike

Quoted 4 lines

Signature · 3 lines
-- 
With warm regards,
Sachin

Sachin Kamat

author

2013-07-31 03:48 UTC #12 lore raw

PATCH 1/3 clk: exynos5250: Add G2D gate clock

Quoted 30 lines · Mike Turquette

Quoting Sachin Kamat (2013-07-29 23:55:33)
Quoted 29 lines · Mike Turquette
Quoted 27 lines
Quoting Sachin Kamat (2013-07-27 06:29:56)
Quoted 16 lines · Mike Turquette
Quoted 7 lines
Quoting Sachin Kamat (2013-07-05 01:42:27)
Quoted 4 lines
Adds gate clock for G2D IP for Exynos5250 SoC.
Signed-off-by Sachin Kamat <[email protected]>
Cc Mike Turquette <[email protected]>
I've taken patch #1 into clk-next.
Thanks Mike.
Quoted 5 lines
Quoted 4 lines
---
This patch depends on the following patch:
http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20581
Quoted 6 lines
Quoted 1 line
I think I've gotten all three series you sent out, can you confirm?
I haven't seen any update in your tree [1] since quite some time. The last commit I see in clk-next branch is 45e3ec3784 ("clk: tegra: fix ifdef for tegra_periph_reset_assert inline"). I hope I am looking at the right tree?
You are, but I had not pushed to it since the merge window closed. It is now updated.

Quoted 7 lines

Quoted 5 lines
Thanks Mike. I confirm that all the three patch series that you mentioned are applied in your tree.
Please check the below one too.
http://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg20598.html
Ok, I picked that one up too.

Thanks Mike.

Signature · 2 lines

With warm regards,
Sachin