powerpc: Remove SAVE_VSRU and REST_VSRU macros
PATCH 1/1 powerpc: Remove SAVE_VSRU and REST_VSRU macros
We always use VMX loads and stores to manage the high 32 VSRs. Remove these unused macros.
Signed-off-by Anton Blanchard <[email protected]>
---
arch/powerpc/include/asm/ppc_asm.h +0 -13
@@ -219,19 +219,6 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLP#define REST_8VSRS (n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base)#define REST_16VSRS (n,b,base) REST_8VSRS(n,b,base); REST_8VSRS(n+8,b,base)#define REST_32VSRS (n,b,base) REST_16VSRS(n,b,base); REST_16VSRS(n+16,b,base) -/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */ -#define SAVE_VSRU (n,b,base) li b,THREAD_VR0+(16*(n)); STXVD2X(n+32,R##base,R##b) -#define SAVE_2VSRSU (n,b,base) SAVE_VSRU(n,b,base); SAVE_VSRU(n+1,b,base) -#define SAVE_4VSRSU (n,b,base) SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n+2,b,base) -#define SAVE_8VSRSU (n,b,base) SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n+4,b,base) -#define SAVE_16VSRSU (n,b,base) SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n+8,b,base) -#define SAVE_32VSRSU (n,b,base) SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base) -#define REST_VSRU (n,b,base) li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,R##base,R##b) -#define REST_2VSRSU (n,b,base) REST_VSRU(n,b,base); REST_VSRU(n+1,b,base) -#define REST_4VSRSU (n,b,base) REST_2VSRSU(n,b,base); REST_2VSRSU(n+2,b,base) -#define REST_8VSRSU (n,b,base) REST_4VSRSU(n,b,base); REST_4VSRSU(n+4,b,base) -#define REST_16VSRSU (n,b,base) REST_8VSRSU(n,b,base); REST_8VSRSU(n+8,b,base) -#define REST_32VSRSU (n,b,base) REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base)/* * b = base register for addressing, o = base offset from register of 1st EVR
Quoted 5 lines · Anton Blanchard
We always use VMX loads and stores to manage the high 32 VSRs. Remove these unused macros.
Signed-off-by Anton Blanchard <[email protected]>
Acked-by Michael Neuling <[email protected]>
Quoted 27 lines
---
Index:
b/arch/powerpc/include/asm/ppc_asm.h
===================================================================arch/powerpc/include/asm/ppc_asm.h +0
-13@@ -219,19 +219,6 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLP#define REST_8VSRS (n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base)#define REST_16VSRS (n,b,base) REST_8VSRS(n,b,base); REST_8VSRS(n+8,b,base)#define REST_32VSRS (n,b,base) REST_16VSRS(n,b,base); REST_16VSRS(n+16,b,base) -/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */ -#define SAVE_VSRU (n,b,base) li b,THREAD_VR0+(16*(n)); STXVD2X(n+32,R##base,R##b) -#define SAVE_2VSRSU (n,b,base) SAVE_VSRU(n,b,base); SAVE_VSRU(n+1,b,base) -#define SAVE_4VSRSU (n,b,base) SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n+2,b,base) -#define SAVE_8VSRSU (n,b,base) SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n+4,b,base) -#define SAVE_16VSRSU (n,b,base) SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n+8,b,base) -#define SAVE_32VSRSU (n,b,base) SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base) -#define REST_VSRU (n,b,base) li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,R##base,R##b) -#define REST_2VSRSU (n,b,base) REST_VSRU(n,b,base); REST_VSRU(n+1,b,base) -#define REST_4VSRSU (n,b,base) REST_2VSRSU(n,b,base); REST_2VSRSU(n+2,b,base) -#define REST_8VSRSU (n,b,base) REST_4VSRSU(n,b,base); REST_4VSRSU(n+4,b,base) -#define REST_16VSRSU (n,b,base) REST_8VSRSU(n,b,base); REST_8VSRSU(n+8,b,base) -#define REST_32VSRSU (n,b,base) REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base)/* * b = base register for addressing, o = base offset from register of 1st EVR