Bring in new I2C framework
Subsystems (8)
v3 cover Bring in new I2C framework
It seems the timing is coming, to bring this finally in mainline and move boards over to the new i2c framework.
Changes for v3 series:
- Compiler collects the used i2c adapters in _u_boot_list_i2c, so no need for defining the used i2c adpaters in the board config file. -> drop CONFIG_SYS_NUM_I2C_ADAPTERS and CONFIG_SYS_I2C_ADAPTERS
- Some adaptions for the keymile boards, so we can drop CONFIG_I2C_MUX completely
- add ppc4xx_i2c driver, ported from Dirk Eibach
Serie compiles clean on arm and powerpc
Ported i2c drivers:soft_i2c : from me, tested on some arm and powerpc boardsfsl_i2c : from me, only compile testedtegra_i2c : ported from Simon Glassppc4xx_i2c: adapted from Dirk Eibach <[email protected]>
tested on (which board?) with 4 soft_i2c drivers and one ppc4x_i2c driver.
Dirk Eibach (1):
i2c, ppc4xx_i2c: switch to new multibus/multiadapter support
Heiko Schocher (6):
i2c: add i2c_core and prepare for new multibus support
i2c: common changes for multibus/multiadapter support i2c, soft-i2c: switch to new multibus/multiadapter support i2c, fsl_i2c: switch to new multibus/multiadapter support i2c, multibus: get rid of CONFIG_I2C_MUX
i2c, multibus, keymile: get rid of EEprom_ivm envvariable
Simon Glass (2):
tegra: i2c: Add function to know about current bus
tegra: i2c: Enable new CONFIG_SYS_I2C framework
README | 175 ++++++---- arch/arm/lib/board.c | 10 +- arch/blackfin/lib/board.c | 7 + arch/m68k/cpu/mcf5227x/cpu_init.c | 2 +- arch/m68k/cpu/mcf5227x/speed.c | 2 +- arch/m68k/cpu/mcf523x/cpu_init.c | 2 +- arch/m68k/cpu/mcf523x/speed.c | 2 +- arch/m68k/cpu/mcf52x2/cpu_init.c | 4 +- arch/m68k/cpu/mcf52x2/speed.c | 4 +- arch/m68k/cpu/mcf532x/cpu_init.c | 4 +- arch/m68k/cpu/mcf532x/speed.c | 2 +- arch/m68k/cpu/mcf5445x/speed.c | 2 +- arch/m68k/cpu/mcf547x_8x/cpu_init.c | 2 +- arch/m68k/cpu/mcf547x_8x/speed.c | 2 +- arch/m68k/include/asm/global_data.h | 2 +- arch/m68k/lib/board.c | 15 +- arch/mips/lib/board.c | 7 + arch/nds32/lib/board.c | 10 +- arch/powerpc/cpu/mpc8260/i2c.c | 14 - arch/powerpc/cpu/mpc8xx/video.c | 4 + arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c | 6 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c | 6 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 3 +- arch/powerpc/cpu/ppc4xx/cmd_chip_config.c | 2 +- arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c | 3 +- arch/powerpc/include/asm/ppc4xx-i2c.h | 18 - arch/powerpc/lib/board.c | 11 +- board/BuS/eb_cpux9k2/cpux9k2.c | 2 +- board/BuS/vl_ma2sc/vl_ma2sc.c | 2 +- board/atc/atc.c | 2 +- board/bluewater/snapper9260/snapper9260.c | 2 +- board/cm5200/cm5200.c | 4 +- board/cpu86/cpu86.c | 2 +- board/cpu87/cpu87.c | 2 +- board/csb272/csb272.c | 2 +- board/emk/top9000/top9000.c | 8 +- board/esd/du440/du440.c | 2 - board/esd/vme8349/vme8349.c | 6 +- board/eukrea/cpuat91/cpuat91.c | 2 +- board/freescale/m52277evb/README | 4 +- board/freescale/m53017evb/README | 4 +- board/freescale/m5373evb/README | 4 +- board/freescale/m54455evb/README | 4 +- board/freescale/m547xevb/README | 4 +- board/freescale/mpc8349itx/mpc8349itx.c | 3 +- board/freescale/mpc8349itx/pci.c | 2 +- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +- board/ids8247/ids8247.c | 2 +- board/keymile/common/ivm.c | 19 +- board/keymile/km83xx/km83xx.c | 15 - board/keymile/km_arm/km_arm.c | 8 +- board/lwmon/lwmon.c | 2 +- board/lwmon/pcmcia.c | 4 +- board/lwmon5/kbd.c | 2 +- board/mpl/pip405/pip405.c | 2 +- board/pm826/pm826.c | 2 +- board/pm828/pm828.c | 2 +- board/sacsng/ioconfig.h | 2 +- board/sandburst/common/ppc440gx_i2c.c | 510 ---------------------------- board/sandburst/common/ppc440gx_i2c.h | 60 ---- board/sandburst/common/sb_common.c | 103 +++--- board/sandburst/common/sb_common.h | 1 - board/sandburst/karef/Makefile | 3 +- board/sandburst/karef/karef.c | 6 - board/sandburst/metrobox/Makefile | 3 +- board/sandburst/metrobox/metrobox.c | 6 - board/tqc/tqm8260/tqm8260.c | 2 +- board/tqc/tqm8272/tqm8272.c | 2 +- board/tqc/tqm8272/tqm8272.h | 2 +- common/cmd_date.c | 9 + common/cmd_dtt.c | 9 + common/cmd_eeprom.c | 3 +- common/cmd_i2c.c | 350 +++++-------------- common/env_eeprom.c | 26 +- common/stdio.c | 13 +- drivers/i2c/Makefile | 9 +- drivers/i2c/fsl_i2c.c | 220 +++++------- drivers/i2c/i2c_core.c | 414 ++++++++++++++++++++++ drivers/i2c/ppc4xx_i2c.c | 193 ++++++----- drivers/i2c/soft_i2c.c | 104 +++--- drivers/i2c/tegra_i2c.c | 118 ++++--- include/asm-generic/global_data.h | 3 + include/configs/A3000.h | 4 +- include/configs/APC405.h | 9 +- include/configs/ASH405.h | 9 +- include/configs/B4860QDS.h | 16 +- include/configs/BSC9131RDB.h | 12 +- include/configs/BSC9132QDS.h | 17 +- include/configs/CANBT.h | 15 +- include/configs/CATcenter.h | 9 +- include/configs/CMS700.h | 9 +- include/configs/CPCI2DP.h | 9 +- include/configs/CPCI405.h | 9 +- include/configs/CPCI4052.h | 9 +- include/configs/CPCI405AB.h | 9 +- include/configs/CPCI405DT.h | 9 +- include/configs/CPCIISER4.h | 9 +- include/configs/CPU86.h | 7 +- include/configs/CPU87.h | 7 +- include/configs/CRAYL1.h | 9 +- include/configs/DP405.h | 9 +- include/configs/DU405.h | 9 +- include/configs/DU440.h | 19 +- include/configs/G2000.h | 9 +- include/configs/GEN860T.h | 39 ++- include/configs/HH405.h | 11 +- include/configs/HIDDEN_DRAGON.h | 9 +- include/configs/HUB405.h | 9 +- include/configs/HWW1U1A.h | 18 +- include/configs/ICU862.h | 13 +- include/configs/IDS8247.h | 9 +- include/configs/IP860.h | 9 +- include/configs/IPHASE4539.h | 11 +- include/configs/JSE.h | 10 +- include/configs/KAREF.h | 17 +- include/configs/KUP4K.h | 11 +- include/configs/KUP4X.h | 12 +- include/configs/M5208EVBE.h | 11 +- include/configs/M52277EVB.h | 11 +- include/configs/M5235EVB.h | 11 +- include/configs/M5253DEMO.h | 10 +- include/configs/M5271EVB.h | 11 +- include/configs/M5275EVB.h | 11 +- include/configs/M53017EVB.h | 11 +- include/configs/M5329EVB.h | 11 +- include/configs/M5373EVB.h | 11 +- include/configs/M54451EVB.h | 11 +- include/configs/M54455EVB.h | 11 +- include/configs/M5475EVB.h | 11 +- include/configs/M5485EVB.h | 11 +- include/configs/MERGERBOX.h | 15 +- include/configs/METROBOX.h | 17 +- include/configs/MHPC.h | 8 +- include/configs/MIP405.h | 9 +- include/configs/MPC8308RDB.h | 17 +- include/configs/MPC8313ERDB.h | 17 +- include/configs/MPC8315ERDB.h | 13 +- include/configs/MPC8323ERDB.h | 13 +- include/configs/MPC832XEMDS.h | 13 +- include/configs/MPC8349EMDS.h | 18 +- include/configs/MPC8349ITX.h | 24 +- include/configs/MPC8360EMDS.h | 14 +- include/configs/MPC8360ERDK.h | 18 +- include/configs/MPC837XEMDS.h | 14 +- include/configs/MPC837XERDB.h | 14 +- include/configs/MPC8536DS.h | 18 +- include/configs/MPC8540ADS.h | 13 +- include/configs/MPC8541CDS.h | 13 +- include/configs/MPC8544DS.h | 13 +- include/configs/MPC8548CDS.h | 13 +- include/configs/MPC8555CDS.h | 13 +- include/configs/MPC8560ADS.h | 13 +- include/configs/MPC8568MDS.h | 18 +- include/configs/MPC8569MDS.h | 18 +- include/configs/MPC8572DS.h | 18 +- include/configs/MPC8610HPCD.h | 13 +- include/configs/MPC8641HPCN.h | 13 +- include/configs/MVBLM7.h | 16 +- include/configs/OCRTC.h | 9 +- include/configs/ORSG.h | 9 +- include/configs/P1010RDB.h | 18 +- include/configs/P1022DS.h | 16 +- include/configs/P1023RDS.h | 16 +- include/configs/P1_P2_RDB.h | 19 +- include/configs/P2020COME.h | 17 +- include/configs/P2020DS.h | 17 +- include/configs/P2041RDB.h | 16 +- include/configs/PCI405.h | 9 +- include/configs/PIP405.h | 9 +- include/configs/PLU405.h | 9 +- include/configs/PM826.h | 8 +- include/configs/PM828.h | 8 +- include/configs/PMC405.h | 9 +- include/configs/PMC405DE.h | 9 +- include/configs/PMC440.h | 15 +- include/configs/PPChameleonEVB.h | 9 +- include/configs/R360MPI.h | 6 +- include/configs/RPXClassic.h | 16 +- include/configs/RPXlite.h | 30 ++ include/configs/RRvision.h | 12 +- include/configs/SIMPC8313.h | 17 +- include/configs/SXNI855T.h | 7 +- include/configs/Sandpoint8240.h | 15 +- include/configs/Sandpoint8245.h | 15 +- include/configs/TASREG.h | 28 +- include/configs/TK885D.h | 12 +- include/configs/TOP5200.h | 12 +- include/configs/TOP860.h | 10 +- include/configs/TQM8260.h | 8 +- include/configs/TQM8272.h | 12 +- include/configs/TQM834x.h | 11 +- include/configs/TQM855M.h | 12 +- include/configs/TQM866M.h | 11 +- include/configs/TQM885D.h | 12 +- include/configs/VOH405.h | 9 +- include/configs/VOM405.h | 9 +- include/configs/W7OLMC.h | 9 +- include/configs/W7OLMG.h | 9 +- include/configs/WUH405.h | 9 +- include/configs/acadia.h | 2 +- include/configs/alpr.h | 12 +- include/configs/amcc-common.h | 7 +- include/configs/aria.h | 1 - include/configs/astro_mcf5373l.h | 11 +- include/configs/bamboo.h | 2 +- include/configs/beaver.h | 5 +- include/configs/bf533-ezkit.h | 9 +- include/configs/bf533-stamp.h | 48 ++- include/configs/bf561-ezkit.h | 8 +- include/configs/bfin_adi_common.h | 2 +- include/configs/blackstamp.h | 3 +- include/configs/blackvme.h | 2 +- include/configs/bluestone.h | 2 +- include/configs/bubinga.h | 4 +- include/configs/canyonlands.h | 2 +- include/configs/cardhu.h | 3 +- include/configs/corenet_ds.h | 16 +- include/configs/cpuat91.h | 3 +- include/configs/csb272.h | 9 +- include/configs/csb472.h | 9 +- include/configs/dalmore.h | 3 +- include/configs/debris.h | 9 +- include/configs/dlvision-10g.h | 2 +- include/configs/dlvision.h | 2 +- include/configs/eXalion.h | 2 +- include/configs/eb_cpux9k2.h | 13 +- include/configs/ebony.h | 2 +- include/configs/ep8260.h | 13 +- include/configs/ethernut5.h | 8 +- include/configs/gdppc440etx.h | 2 +- include/configs/ibf-dsp561.h | 4 +- include/configs/icon.h | 3 +- include/configs/intip.h | 2 +- include/configs/io.h | 2 +- include/configs/io64.h | 2 +- include/configs/iocon.h | 10 +- include/configs/katmai.h | 3 +- include/configs/kilauea.h | 2 +- include/configs/km/keymile-common.h | 3 - include/configs/km/km83xx-common.h | 25 +- include/configs/km/km_arm.h | 23 +- include/configs/km82xx.h | 19 +- include/configs/km_kirkwood.h | 16 +- include/configs/korat.h | 10 +- include/configs/luan.h | 2 +- include/configs/lwmon.h | 12 +- include/configs/lwmon5.h | 10 +- include/configs/makalu.h | 2 +- include/configs/mecp5123.h | 1 - include/configs/mpc5121ads.h | 1 - include/configs/mpc8308_p1m.h | 15 +- include/configs/mpq101.h | 16 +- include/configs/neo.h | 2 +- include/configs/nhk8815.h | 7 +- include/configs/ocotea.h | 2 +- include/configs/otc570.h | 17 +- include/configs/p1_p2_rdb_pc.h | 19 +- include/configs/p3p440.h | 12 +- include/configs/pcs440ep.h | 10 +- include/configs/pdnb3.h | 10 +- include/configs/quad100hd.h | 10 +- include/configs/redwood.h | 4 +- include/configs/s5p_goni.h | 6 +- include/configs/s5pc210_universal.h | 6 +- include/configs/sacsng.h | 11 +- include/configs/sbc405.h | 10 +- include/configs/sbc8349.h | 18 +- include/configs/sbc8548.h | 11 +- include/configs/sbc8641d.h | 13 +- include/configs/sc3.h | 10 +- include/configs/seaboard.h | 5 +- include/configs/sequoia.h | 2 +- include/configs/snapper9260.h | 8 +- include/configs/socrates.h | 17 +- include/configs/spc1920.h | 12 +- include/configs/stxgp3.h | 12 +- include/configs/stxssa.h | 11 +- include/configs/t3corp.h | 2 +- include/configs/t4qds.h | 17 +- include/configs/taihu.h | 4 +- include/configs/taishan.h | 2 +- include/configs/top9000.h | 9 +- include/configs/trats.h | 6 +- include/configs/trimslice.h | 5 +- include/configs/u8500_href.h | 1 - include/configs/uc100.h | 12 +- include/configs/utx8245.h | 3 +- include/configs/vct.h | 11 +- include/configs/vl_ma2sc.h | 6 +- include/configs/vme8349.h | 20 +- include/configs/walnut.h | 2 +- include/configs/whistler.h | 5 +- include/configs/xpedite1000.h | 10 +- include/configs/xpedite517x.h | 15 +- include/configs/xpedite520x.h | 15 +- include/configs/xpedite537x.h | 16 +- include/configs/xpedite550x.h | 15 +- include/configs/yosemite.h | 2 +- include/configs/yucca.h | 4 +- include/configs/zeus.h | 10 +- include/i2c.h | 232 +++++++++++-- 301 Dateien ge?ndert, 2549 Zeilen hinzugef?gt(+), 2604 Zeilen entfernt(-) delete mode 100644 board/sandburst/common/ppc440gx_i2c.c delete mode 100644 board/sandburst/common/ppc440gx_i2c.h create mode 100644 drivers/i2c/i2c_core.c
Signature · 1 line
1.7.11.7
PATCH v3 1/9 i2c: add i2c_core and prepare for new multibus support
This Patch introduce the new i2c_core file, which holds the I2C core functions, for the rework of the multibus/ multiadapter support.
Also adds changes in i2c.h for the new I2C multibus/multiadapter support. This new support can be activated with the CONFIG_SYS_I2C define.
---
- changes against Simons patches
(see: http://www.mail-archive.com/u-boot at lists.denx.de/msg75530.html):
- gd->cur_i2c_adap now used as "struct i2c_bus_hose *"
- get rid of "i2c_cur_bus"
add comments from Mike Frysinger:
- renamed cur_adap to cur_i2c_adap
- use uintx_t types
- changes for v2:
- rebase against current mainline 178d0cc1a4c73c3341afbeb2a93b172de8c96bd1
- pass i2c_adapter struct to i2c_core callbacks
suggested by Stephen Warren and Simon Glass.
- add i2c_init_board() to i2c_init_all() as Simon found
in his tests.
- need CONFIG_SYS_I2C_BUSES only, if i2c muxes used
(Steven Warren suggested to get rid of this completely, now
we need this defines in a first step only in the case, we have i2c muxes)
- global data is now a int only
- move i2c_init_board() to drivers/i2c/i2c_core.c
- add correct license text to i2c_core.c
- changes for v3:
- introduce U_BOOT_I2C_ADAP_COMPLETE for adding an i2c adapter. Compiler collects the used i2c adapters in _u_boot_list_i2c, so no need for defining the used i2c adpaters in the board config file. -> drop CONFIG_SYS_NUM_I2C_ADAPTERS and CONFIG_SYS_I2C_ADAPTERS
--- drivers/i2c/Makefile | 1 + drivers/i2c/i2c_core.c | 414 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/global_data.h | 3 + include/i2c.h | 215 +++++++++++++++++++- 4 Dateien ge?ndert, 624 Zeilen hinzugef?gt(+), 9 Zeilen entfernt(-) create mode 100644 drivers/i2c/i2c_core.c
drivers/i2c/Makefile +1 -0
@@ -46,6 +46,7 @@ COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o COBJS-$(CONFIG_SH_I2C) += sh_i2c.o COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o +COBJS-$(CONFIG_SYS_I2C) += i2c_core.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c)
drivers/i2c/i2c_core.c new file +414 -0
414 lines not on this page · raw message
include/asm-generic/global_data.h +3 -0
@@ -85,6 +85,9 @@ typedef struct global_data {unsigned long fdt_size;/* Space reserved for relocated FDT */ void **jt;/* jump table */ char env_buf[32 ];/* buffer for getenv() before reloc. */ +#if defined(CONFIG_SYS_I2C ) +int cur_i2c_bus;/* current used i2c bus */ +#endif struct arch_global_data arch; /* architecture-specific data */ } gd_t;#endif
include/i2c.h +206 -9
244 lines not on this page · raw message
Signature · 1 line
1.7.11.7
PATCH v3 2/9 i2c: common changes for multibus/multiadapter support
In reply to Heiko Schocher---
- changes for v2:
add comment from Henrik Nordstr?m <[email protected]> remove wrong line in README
- rebase against current mainline 178d0cc1a4c73c3341afbeb2a93b172de8c96bd1
- changes for v3:
- adapt to the new introduced U_BOOT_I2C_ADAP_COMPLETE define
- fix Codingstyle issues
- adapt README
--- README | 74 ++++++++++++++++++++++++- arch/arm/lib/board.c | 7 ++- arch/blackfin/lib/board.c | 7 +++ arch/m68k/lib/board.c | 17 +++++- arch/mips/lib/board.c | 7 +++ arch/nds32/lib/board.c | 10 +++- arch/powerpc/cpu/mpc8xx/video.c | 4 ++ arch/powerpc/lib/board.c | 12 +++- common/cmd_date.c | 9 +++ common/cmd_dtt.c | 9 +++ common/cmd_i2c.c | 120 ++++++++++++++++++++++++++-------------- common/env_eeprom.c | 14 +++++ common/stdio.c | 13 ++++- include/i2c.h | 9 ---
14 Dateien ge?ndert, 251 Zeilen hinzugef?gt(+), 61 Zeilen entfernt(-)
README +71 -3
@@ -1884,9 +1884,77 @@ CBFS (Coreboot Filesystem) support on those systems that support this (optional) feature, like the TQM8xxL modules. -- I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C - - These enable I2C serial bus commands. Defining either of +- I2C Support: CONFIG_SYS_I2C + + This enable the NEW i2c subsystem, and will allow you to use + i2c commands at the u-boot command line (as long as you set + CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c + based realtime clock chips or other i2c devices. See + common/cmd_i2c.c for a description of the command line + interface. + + ported i2c driver to the new framework: + + additional defines: + + CONFIG_SYS_NUM_I2C_BUSES + Hold the number of i2c busses you want to use. If you + don't use/have i2c muxes on your i2c bus, this + is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can + omit this define. + + CONFIG_SYS_I2C_DIRECT_BUS + define this, if you don't use i2c muxes on your hardware. + if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can + omit this define. + + CONFIG_SYS_I2C_MAX_HOPS + define how many muxes are maximal consecutively connected + on one i2c bus. If you not use i2c muxes, omit this + define. + + CONFIG_SYS_I2C_BUSES + hold a list of busses you want to use, only used if + CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example + a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and + CONFIG_SYS_NUM_I2C_BUSES = 9: + + CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \ + {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \ + {1, {I2C_NULL_HOP}}, \ + {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \ + {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \ + } + + which defines + bus 0 on adapter 0 without a mux + bus 1 on adapter 0 without a PCA9547 on address 0x70 port 1 + bus 2 on adapter 0 without a PCA9547 on address 0x70 port 2 + bus 3 on adapter 0 without a PCA9547 on address 0x70 port 3 + bus 4 on adapter 0 without a PCA9547 on address 0x70 port 4 + bus 5 on adapter 0 without a PCA9547 on address 0x70 port 5 + bus 6 on adapter 1 without a mux + bus 7 on adapter 1 without a PCA9544 on address 0x72 port 1 + bus 8 on adapter 1 without a PCA9544 on address 0x72 port 2 + + If you do not have i2c muxes on your board, omit this define. + +- Legacy I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C + + NOTE: It is intended to move drivers to CONFIG_SYS_I2C which + provides the following compelling advantages: + + - more than one i2c adapter is usable + - approved multibus support + - better i2c mux support + + ** Please consider updating your I2C driver now. ** + + These enable legacy I2C serial bus commands. Defining either of (but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will include the appropriate I2C driver for the selected CPU.
arch/arm/lib/board.c +6 -1
@@ -69,7 +69,8 @@ extern void dataflash_print_info(void);#endif #if defined(CONFIG_HARD_I2C ) || \ - defined(CONFIG_SOFT_I2C ) + defined(CONFIG_SOFT_I2C ) || \ + defined(CONFIG_SYS_I2C )#include <i2c.h> #endif
@@ -169,7 +170,11 @@ static int display_dram_config(void)static int init_func_i2c (void ) {puts ("I2C: " ); +#ifdef CONFIG_SYS_I2C +i2c_init_all (); +#else i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +#endif puts ("ready\n" );return (0 ); }
arch/blackfin/lib/board.c +7 -0
@@ -37,6 +37,10 @@int post_flag;#endif +#if defined(CONFIG_SYS_I2C ) +#include <i2c.h> +#endif +DECLARE_GLOBAL_DATA_PTR ; __attribute__((always_inline))
@@ -385,6 +389,9 @@ void board_init_r(gd_t * id, ulong dest_addr)mmc_initialize (bd);#endif +#if defined(CONFIG_SYS_I2C ) +i2c_reloc_fixup (); +#endif /* relocate environment function pointers etc. */ env_relocate ();
arch/m68k/lib/board.c +14 -3
@@ -56,7 +56,7 @@#include <version.h> #if defined(CONFIG_HARD_I2C ) || \ - defined(CONFIG_SOFT_I2C ) + defined(CONFIG_SOFT_I2C )#include <i2c.h> #endif
@@ -142,11 +142,16 @@ static int init_func_ram (void)/***********************************************************************/ -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ + defined(CONFIG_SYS_I2C )static int init_func_i2c (void ) {puts ("I2C: " ); +#ifdef CONFIG_SYS_I2C +i2c_init_all (); +#else i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +#endif puts ("ready\n" );return (0 ); }
@@ -178,7 +183,8 @@ init_fnc_t *init_sequence[] = { display_options, checkcpu, checkboard, -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ + defined(CONFIG_SYS_I2C ) init_func_i2c,#endif #if defined(CONFIG_HARD_SPI )
@@ -501,6 +507,11 @@ void board_init_r (gd_t *id, ulong dest_addr)spi_init_r ();#endif +#if defined(CONFIG_SYS_I2C ) +/* Adjust I2C subsystem pointers after relocation */ +i2c_reloc_fixup (); +#endif +/* relocate environment function pointers etc. */ env_relocate ();
arch/mips/lib/board.c +7 -0
@@ -36,6 +36,9 @@#ifdef CONFIG_BITBANGMII #include <miiphy.h> #endif +#if defined(CONFIG_SYS_I2C ) +#include <i2c.h> +#endif DECLARE_GLOBAL_DATA_PTR ;
@@ -296,6 +299,10 @@ void board_init_r(gd_t *id, ulong dest_addr)onenand_init ();#endif +#if defined(CONFIG_SYS_I2C ) +i2c_reloc_fixup (); +#endif +/* relocate environment function pointers etc. */ env_relocate ();
arch/nds32/lib/board.c +9 -1
@@ -39,6 +39,10 @@DECLARE_GLOBAL_DATA_PTR ; +#if defined(CONFIG_SYS_I2C ) +#include <i2c.h> +#endif +ulong monitor_flash_len;/*
@@ -172,7 +176,7 @@ init_fnc_t *init_sequence[] = {#if defined(CONFIG_DISPLAY_BOARDINFO ) checkboard, /* display board info */#endif -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C ) init_func_i2c, #endif dram_init, /* configure available RAM banks */
@@ -346,6 +350,10 @@ void board_init_r(gd_t *id, ulong dest_addr)mmc_initialize (gd->bd);#endif +#if defined(CONFIG_SYS_I2C_ADAPTERS ) +i2c_reloc_fixup (); +#endif +/* initialize environment */ env_relocate ();
arch/powerpc/cpu/mpc8xx/video.c +4 -0
@@ -809,7 +809,11 @@ static void video_encoder_init (void)/* Initialize the I2C */ debug ("[VIDEO ENCODER] Initializing I2C bus...\n" ); +#ifdef CONFIG_SYS_I2C +i2c_init_all (); +#else i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +#endif #ifdef CONFIG_FADS /* Reset ADV7176 chip */
arch/powerpc/lib/board.c +9 -3
@@ -99,7 +99,7 @@ extern void sc3_read_eeprom(void);void doc_init (void );#endif #if defined(CONFIG_HARD_I2C ) || \ - defined(CONFIG_SOFT_I2C ) + defined(CONFIG_SOFT_I2C )#include <i2c.h> #endif #include <spi.h>
@@ -214,11 +214,16 @@ static int init_func_ram(void)/***********************************************************************/ -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ + defined(CONFIG_SYS_I2C )static int init_func_i2c (void ) {puts ("I2C: " ); +#ifdef CONFIG_SYS_I2C +i2c_init_all (); +#else i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +#endif puts ("ready\n" );return 0 ; }
@@ -310,7 +315,8 @@ static init_fnc_t *init_sequence[] = { misc_init_f, #endif INIT_FUNC_WATCHDOG_RESET -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ + defined(CONFIG_SYS_I2C ) init_func_i2c,#endif #if defined(CONFIG_HARD_SPI )
common/cmd_date.c +9 -0
@@ -50,8 +50,13 @@ static int do_date(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])int old_bus;/* switch to correct I2C bus */ +#ifdef CONFIG_SYS_I2C + old_bus =i2c_get_bus_num (); +i2c_set_bus_num (CONFIG_SYS_RTC_BUS_NUM ); +#else old_bus =I2C_GET_BUS ();I2C_SET_BUS (CONFIG_SYS_RTC_BUS_NUM ); +#endif switch (argc) {case 2 :/* set date & time */
@@ -97,7 +102,11 @@ static int do_date(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) }/* switch back to original I2C bus */ +#ifdef CONFIG_SYS_I2C +i2c_set_bus_num (old_bus); +#else I2C_SET_BUS (old_bus); +#endif return rcode; }
common/cmd_dtt.c +9 -0
@@ -73,8 +73,13 @@ int dtt_i2c(void)/* Force a compilation error, if there are more then 32 sensors */ BUILD_BUG_ON (sizeof (sensors) >32 );/* switch to correct I2C bus */ +#ifdef CONFIG_SYS_I2C + old_bus =i2c_get_bus_num (); +i2c_set_bus_num (CONFIG_SYS_DTT_BUS_NUM ); +#else old_bus =I2C_GET_BUS ();I2C_SET_BUS (CONFIG_SYS_DTT_BUS_NUM ); +#endif _initialize_dtt ();
@@ -86,8 +91,12 @@ int dtt_i2c(void)printf ("DTT%d: %i C\n" , i +1 ,dtt_get_temp (sensors[i]));/* switch back to original I2C bus */ +#ifdef CONFIG_SYS_I2C +i2c_set_bus_num (old_bus); +#else I2C_SET_BUS (old_bus);#endif +#endif return 0 ; }
common/cmd_i2c.c +80 -40
233 lines not on this page · raw message
common/env_eeprom.c +14 -0
@@ -49,6 +49,10 @@ static int eeprom_bus_read(unsigned dev_addr, unsigned offset, #if defined(CONFIG_I2C_ENV_EEPROM_BUS) int old_bus = i2c_get_bus_num(); +#if defined(CONFIG_SYS_I2C) + if (old_bus != CONFIG_I2C_ENV_EEPROM_BUS) + i2c_set_bus_num(CONFIG_I2C_ENV_EEPROM_BUS); +#else if (gd->flags & GD_FLG_RELOC) { if (env_eeprom_bus == -1) { I2C_MUX_DEVICE *dev = NULL;
@@ -68,11 +72,16 @@ static int eeprom_bus_read(unsigned dev_addr, unsigned offset, (uchar *)CONFIG_I2C_ENV_EEPROM_BUS); }#endif +#endif rcode =eeprom_read (dev_addr, offset, buffer, cnt);#if defined(CONFIG_I2C_ENV_EEPROM_BUS ) +#if defined(CONFIG_SYS_I2C ) +if (old_bus !=CONFIG_I2C_ENV_EEPROM_BUS ) +#else if (old_bus != env_eeprom_bus) +#endif i2c_set_bus_num (old_bus);#endif return rcode;
@@ -85,8 +94,13 @@ static int eeprom_bus_write(unsigned dev_addr, unsigned offset,#if defined(CONFIG_I2C_ENV_EEPROM_BUS )int old_bus =i2c_get_bus_num (); +#if defined(CONFIG_SYS_I2C ) +if (old_bus !=CONFIG_I2C_ENV_EEPROM_BUS ) +i2c_set_bus_num (CONFIG_I2C_ENV_EEPROM_BUS ); +#else rcode =i2c_mux_ident_muxstring_f ((uchar *)CONFIG_I2C_ENV_EEPROM_BUS );#endif +#endif rcode =eeprom_write (dev_addr, offset, buffer, cnt);#if defined(CONFIG_I2C_ENV_EEPROM_BUS )i2c_set_bus_num (old_bus);
common/stdio.c +12 -1
@@ -1,4 +1,8 @@/* +* Copyright (C) 2009 Sergey Kubushyn <[email protected]> +* +* Changes for multibus/multiadapter I2C support. +* * (C) Copyright 2000 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio at tin.it *
@@ -30,7 +34,8 @@#ifdef CONFIG_LOGBUFFER #include <logbuff.h> #endif -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ + defined(CONFIG_SYS_I2C_ADAPTERS )#include <i2c.h> #endif
@@ -210,9 +215,15 @@ int stdio_init (void)#ifdef CONFIG_ARM_DCC drv_arm_dcc_init ();#endif +#ifdef CONFIG_SYS_I2C +#ifdef CONFIG_SYS_I2C_ADAPTERS +i2c_init_all (); +#endif +#else #if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C )i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE );#endif +#endif #ifdef CONFIG_LCD drv_lcd_init ();#endif
include/i2c.h +0 -9
@@ -220,15 +220,6 @@ int i2c_mux_ident_muxstring_f (uchar *buf);#ifdef CONFIG_SYS_I2C /* -* Initialization, must be called once on start up, may be called -* repeatedly to change the speed and slave addresses. -*/ -void i2c_init (unsigned int speed,int slaveaddr); -#ifdef CONFIG_SYS_I2C_INIT_BOARD -void i2c_init_board (void ); -#endif - -/* * i2c_get_bus_num: * * Returns index of currently active I2C bus. Zero-based.
Signature · 1 line
1.7.11.7
PATCH v3 2/9 i2c: common changes for multibus/multiadapter support
2013/5/4 Heiko Schocher <[email protected]>
Quoted 31 lines
Signed-off-by Heiko Schocher <[email protected]>Signed-off-by Simon Glass <[email protected]>Cc Henrik Nordstr?m <[email protected]>---
- changes for v2:
add comment from Henrik Nordstr?m <[email protected]> remove wrong line in README
- rebase against current mainline178d0cc1a4c73c3341afbeb2a93b172de8c96bd1
- changes for v3:
- adapt to the new introducedU_BOOT_I2C_ADAP_COMPLETEdefine
- fix Codingstyle issues
- adapt README--- README | 74 ++++++++++++++++++++++++- arch/arm/lib/board.c | 7 ++- arch/blackfin/lib/board.c | 7 +++ arch/m68k/lib/board.c | 17 +++++- arch/mips/lib/board.c | 7 +++ arch/nds32/lib/board.c | 10 +++- arch/powerpc/cpu/mpc8xx/video.c | 4 ++ arch/powerpc/lib/board.c | 12 +++- common/cmd_date.c | 9 +++ common/cmd_dtt.c | 9 +++ common/cmd_i2c.c | 120 ++++++++++++++++++++++++++-------------- common/env_eeprom.c | 14 +++++ common/stdio.c | 13 ++++- include/i2c.h | 9 ---14 Dateien ge?ndert, 251 Zeilen hinzugef?gt(+), 61 Zeilen entfernt(-)
...
Quoted 17 lines
arch/mips/lib/board.c +3
-0@@ -36,6 +36,9 @@#ifdef CONFIG_BITBANGMII #include <miiphy.h> #endif +#if defined(CONFIG_SYS_I2C ) +#include <i2c.h> +#endif DECLARE_GLOBAL_DATA_PTR ;
arch/mips/lib/board.c void board_init_r(gd_t *id, ulong dest_addr) · line 306
Quoted 8 lines
arch/mips/lib/board.c +4
-0@@ -296,6 +299,10 @@ void board_init_r(gd_t *id, ulong dest_addr)onenand_init ();#endif +#if defined(CONFIG_SYS_I2C ) +i2c_reloc_fixup (); +#endif +
MIPS doesn't need manual relocation fixups anymore. So you could use i2c_init_all() here too.
--
Best regards,
Daniel
PATCH v3 2/9 i2c: common changes for multibus/multiadapter support
Hello Daniel,
Am 06.05.2013 18:39, schrieb Daniel Schwierzeck:
Quoted 53 lines
2013/5/4 Heiko Schocher <[email protected]>
Quoted 31 lines
Signed-off-by Heiko Schocher <[email protected]>Signed-off-by Simon Glass <[email protected]>Cc Henrik Nordstr?m <[email protected]>---
- changes for v2:
add comment from Henrik Nordstr?m <[email protected]> remove wrong line in README
- rebase against current mainline178d0cc1a4c73c3341afbeb2a93b172de8c96bd1
- changes for v3:
- adapt to the new introducedU_BOOT_I2C_ADAP_COMPLETEdefine
- fix Codingstyle issues
- adapt README--- README | 74 ++++++++++++++++++++++++- arch/arm/lib/board.c | 7 ++- arch/blackfin/lib/board.c | 7 +++ arch/m68k/lib/board.c | 17 +++++- arch/mips/lib/board.c | 7 +++ arch/nds32/lib/board.c | 10 +++- arch/powerpc/cpu/mpc8xx/video.c | 4 ++ arch/powerpc/lib/board.c | 12 +++- common/cmd_date.c | 9 +++ common/cmd_dtt.c | 9 +++ common/cmd_i2c.c | 120 ++++++++++++++++++++++++++-------------- common/env_eeprom.c | 14 +++++ common/stdio.c | 13 ++++- include/i2c.h | 9 ---14 Dateien ge?ndert, 251 Zeilen hinzugef?gt(+), 61 Zeilen entfernt(-)
...
Quoted 20 lines
arch/mips/lib/board.c +3
-0@@ -36,6 +36,9 @@#ifdef CONFIG_BITBANGMII #include <miiphy.h> #endif +#if defined(CONFIG_SYS_I2C ) +#include <i2c.h> +#endif DECLARE_GLOBAL_DATA_PTR ;@@ -296,6 +299,10 @@ void board_init_r(gd_t *id, ulong dest_addr)onenand_init ();#endif
Quoted 8 lines
arch/mips/lib/board.c void board_init_r(gd_t *id, ulong dest_addr) · line 306
Quoted 5 lines
arch/mips/lib/board.c +4
-0+#if defined(CONFIG_SYS_I2C ) +i2c_reloc_fixup (); +#endif +MIPS doesn't need manual relocation fixups anymore. So you could use
i2c_init_all()here too.
Ok, removed this ... Hmm.. can you test this changes on a mips board?
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 2/9 i2c: common changes for multibus/multiadapter support
In reply to Heiko SchocherHi Heiko,
Quoted 28 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Signed-off-by Simon Glass <[email protected]>Cc Henrik Nordstr?m <[email protected]>---
- changes for v2:
add comment from Henrik Nordstr?m <[email protected]> remove wrong line in README
- rebase against current mainline178d0cc1a4c73c3341afbeb2a93b172de8c96bd1
- changes for v3:
- adapt to the new introducedU_BOOT_I2C_ADAP_COMPLETEdefine
- fix Codingstyle issues
- adapt README--- README | 74 ++++++++++++++++++++++++- arch/arm/lib/board.c | 7 ++- arch/blackfin/lib/board.c | 7 +++ arch/m68k/lib/board.c | 17 +++++- arch/mips/lib/board.c | 7 +++ arch/nds32/lib/board.c | 10 +++- arch/powerpc/cpu/mpc8xx/video.c | 4 ++ arch/powerpc/lib/board.c | 12 +++- common/cmd_date.c | 9 +++ common/cmd_dtt.c | 9 +++ common/cmd_i2c.c | 120 ++++++++++++++++++++++++++-------------- common/env_eeprom.c | 14 +++++ common/stdio.c | 13 ++++- include/i2c.h | 9 ---
Quoted 1 line
14 Dateien ge?ndert, 251 Zeilen hinzugef?gt(+), 61 Zeilen entfernt(-)
Very happy to see this again.
Do you also need to change common/board_f.c or common/board_r.c?
Regards,
Simon
PATCH v3 2/9 i2c: common changes for multibus/multiadapter support
Hello Simon,
Am 11.05.2013 23:17, schrieb Simon Glass:
Quoted 33 lines
Hi Heiko,
Quoted 28 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Signed-off-by Simon Glass <[email protected]>Cc Henrik Nordstr?m <[email protected]>---
- changes for v2:
add comment from Henrik Nordstr?m <[email protected]> remove wrong line in README
- rebase against current mainline178d0cc1a4c73c3341afbeb2a93b172de8c96bd1
- changes for v3:
- adapt to the new introducedU_BOOT_I2C_ADAP_COMPLETEdefine
- fix Codingstyle issues
- adapt README--- README | 74 ++++++++++++++++++++++++- arch/arm/lib/board.c | 7 ++- arch/blackfin/lib/board.c | 7 +++ arch/m68k/lib/board.c | 17 +++++- arch/mips/lib/board.c | 7 +++ arch/nds32/lib/board.c | 10 +++- arch/powerpc/cpu/mpc8xx/video.c | 4 ++ arch/powerpc/lib/board.c | 12 +++- common/cmd_date.c | 9 +++ common/cmd_dtt.c | 9 +++ common/cmd_i2c.c | 120 ++++++++++++++++++++++++++-------------- common/env_eeprom.c | 14 +++++ common/stdio.c | 13 ++++- include/i2c.h | 9 ---Quoted 1 line
14 Dateien ge?ndert, 251 Zeilen hinzugef?gt(+), 61 Zeilen entfernt(-)
Quoted 3 lines
Very happy to see this again.
Do you also need to change
common/board_f.corcommon/board_r.c?
Uh.. yes, you are right, fix this!
Thanks!
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 2/9 i2c: common changes for multibus/multiadapter support
In reply to Heiko SchocherHi Heiko,
Quoted 30 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Signed-off-by Simon Glass <[email protected]>Cc Henrik Nordstr?m <[email protected]>---
- changes for v2:
add comment from Henrik Nordstr?m <[email protected]> remove wrong line in README
- rebase against current mainline178d0cc1a4c73c3341afbeb2a93b172de8c96bd1
- changes for v3:
- adapt to the new introducedU_BOOT_I2C_ADAP_COMPLETEdefine
- fix Codingstyle issues
- adapt README--- README | 74 ++++++++++++++++++++++++- arch/arm/lib/board.c | 7 ++- arch/blackfin/lib/board.c | 7 +++ arch/m68k/lib/board.c | 17 +++++- arch/mips/lib/board.c | 7 +++ arch/nds32/lib/board.c | 10 +++- arch/powerpc/cpu/mpc8xx/video.c | 4 ++ arch/powerpc/lib/board.c | 12 +++- common/cmd_date.c | 9 +++ common/cmd_dtt.c | 9 +++ common/cmd_i2c.c | 120 ++++++++++++++++++++++++++-------------- common/env_eeprom.c | 14 +++++ common/stdio.c | 13 ++++- include/i2c.h | 9 ---14 Dateien ge?ndert, 251 Zeilen hinzugef?gt(+), 61 Zeilen entfernt(-)
...
Quoted 16 lines
common/cmd_i2c.c +4
-0@@ -1508,16 +1543,21 @@ static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])*/ static int do_i2c_reset (cmd_tbl_t * cmdtp,int flag,int argc,char *const argv[]) { +#if defined(CONFIG_SYS_I2C ) +i2c_init (I2C_ADAP ->speed,I2C_ADAP ->slaveaddr); +#else i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +#endif return 0 ; }static cmd_tbl_t cmd_i2c_sub[] = {
common/cmd_i2c.c static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) · line 1561
Quoted 10 lines
common/cmd_i2c.c +4
-3-#if defined(CONFIG_I2C_MUX ) - U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_add_bus, "", ""), +#if defined(CONFIG_SYS_I2C ) + U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), #endif /* CONFIG_I2C_MUX */ U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), -#if defined(CONFIG_I2C_MULTI_BUS ) +#if defined(CONFIG_SYS_I2C ) || \ + defined(CONFIG_I2C_MULTI_BUS ) U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
If you are changing the condition here you should change the condition on the help also.
common/env_eeprom.c
Quoted 19 lines
common/cmd_i2c.c +3
-3#endif /* CONFIG_I2C_MULTI_BUS */ #if defined(CONFIG_I2C_EDID )@@ -1576,11 +1616,11 @@ static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])/***************************************************/ #ifdef CONFIG_SYS_LONGHELP static char i2c_help_text[] = -#if defined(CONFIG_I2C_MUX ) -"bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\ni2c " +#if defined(CONFIG_SYS_I2C ) +"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n" #endif /* CONFIG_I2C_MUX */ "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" -#if defined(CONFIG_I2C_MULTI_BUS ) +#if defined(CONFIG_SYS_I2C ) "i2c dev [dev] - show or set current I2C bus\n"#endif /* CONFIG_I2C_MULTI_BUS */ #if defined(CONFIG_I2C_EDID )common/env_eeprom.c +0
-0
I tested this on snow and it seems to disable every bus except bus 0. I will see if I can take a look.
Hopefully one of the Nvidia guys can test on seaboard as I don't have mind with me right now.
SMDK5250 # i2c dev 4
Invalid bus 4
Regards,
Simon
PATCH v3 2/9 i2c: common changes for multibus/multiadapter support
Hello Simon,
Am 11.05.2013 23:33, schrieb Simon Glass:
Quoted 50 lines
Hi Heiko,
Quoted 30 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Signed-off-by Simon Glass <[email protected]>Cc Henrik Nordstr?m <[email protected]>---
- changes for v2:
add comment from Henrik Nordstr?m <[email protected]> remove wrong line in README
- rebase against current mainline178d0cc1a4c73c3341afbeb2a93b172de8c96bd1
- changes for v3:
- adapt to the new introducedU_BOOT_I2C_ADAP_COMPLETEdefine
- fix Codingstyle issues
- adapt README--- README | 74 ++++++++++++++++++++++++- arch/arm/lib/board.c | 7 ++- arch/blackfin/lib/board.c | 7 +++ arch/m68k/lib/board.c | 17 +++++- arch/mips/lib/board.c | 7 +++ arch/nds32/lib/board.c | 10 +++- arch/powerpc/cpu/mpc8xx/video.c | 4 ++ arch/powerpc/lib/board.c | 12 +++- common/cmd_date.c | 9 +++ common/cmd_dtt.c | 9 +++ common/cmd_i2c.c | 120 ++++++++++++++++++++++++++-------------- common/env_eeprom.c | 14 +++++ common/stdio.c | 13 ++++- include/i2c.h | 9 ---14 Dateien ge?ndert, 251 Zeilen hinzugef?gt(+), 61 Zeilen entfernt(-)
...
Quoted 15 lines
common/cmd_i2c.c +4
-0@@ -1508,16 +1543,21 @@ static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])*/ static int do_i2c_reset (cmd_tbl_t * cmdtp,int flag,int argc,char *const argv[]) { +#if defined(CONFIG_SYS_I2C ) +i2c_init (I2C_ADAP ->speed,I2C_ADAP ->slaveaddr); +#else i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +#endif return 0 ; }
Quoted 14 lines
common/cmd_i2c.c static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) · line 1561
Quoted 11 lines
common/cmd_i2c.c +4
-3static cmd_tbl_t cmd_i2c_sub[] = { -#if defined(CONFIG_I2C_MUX) - U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_add_bus, "", ""), +#if defined(CONFIG_SYS_I2C) + U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), #endif /* CONFIG_I2C_MUX */ U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), -#if defined(CONFIG_I2C_MULTI_BUS) +#if defined(CONFIG_SYS_I2C) || \ + defined(CONFIG_I2C_MULTI_BUS) U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),If you are changing the condition here you should change the condition on the help also.
Fixed.
Quoted 14 lines
Quoted 14 lines
common/cmd_i2c.c +3
-3#endif /* CONFIG_I2C_MULTI_BUS */ #if defined(CONFIG_I2C_EDID )@@ -1576,11 +1616,11 @@ static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])/***************************************************/ #ifdef CONFIG_SYS_LONGHELP static char i2c_help_text[] = -#if defined(CONFIG_I2C_MUX ) -"bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\ni2c " +#if defined(CONFIG_SYS_I2C ) +"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n" #endif /* CONFIG_I2C_MUX */ "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" -#if defined(CONFIG_I2C_MULTI_BUS ) +#if defined(CONFIG_SYS_I2C )
Quoted 8 lines
common/env_eeprom.c
Quoted 5 lines
common/cmd_i2c.c +0
-0"i2c dev [dev] - show or set current I2C bus\n"#endif /* CONFIG_I2C_MULTI_BUS */ #if defined(CONFIG_I2C_EDID )common/env_eeprom.c +0
-0I tested this on snow and it seems to disable every bus except bus 0. I will see if I can take a look.
Bad news ... did you tried it with debug traces enabled?
Quoted 5 lines
Hopefully one of the Nvidia guys can test on seaboard as I don't have mind with me right now.
SMDK5250 # i2c dev 4
Invalid bus 4
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 3/9 i2c, soft-i2c: switch to new multibus/multiadapter support
In reply to Heiko Schocher- added to soft_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
---
- changes for v2:
- fix EEprom_ivm setting for km82xx boards
- adapted README
- rebase against current mainline 178d0cc1a4c73c3341afbeb2a93b172de8c96bd1
- pass i2c_adapter struct to i2c_core callbacks
suggested by Stephen Warren and Simon Glass.
- changes for v3:
- adapt to the new introduced U_BOOT_I2C_ADAP_COMPLETE define
- added README entry
- patch has 2 different checkpatch warnings:
WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt +# define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = \
WARNING: Avoid CamelCase: <pFIO_DIR>
+#define I2C_INIT (*pFIO_DIR |= PF_SCL); asm("ssync;")
This should be fixed in a seperate step, as it affects a lot
of boards...
--- README | 45 +++++++------ arch/arm/lib/board.c | 5 +- arch/m68k/lib/board.c | 8 +-- arch/powerpc/lib/board.c | 9 +-- board/BuS/eb_cpux9k2/cpux9k2.c | 2 +- board/BuS/vl_ma2sc/vl_ma2sc.c | 2 +- board/atc/atc.c | 2 +- board/bluewater/snapper9260/snapper9260.c | 2 +- board/cm5200/cm5200.c | 4 +- board/cpu86/cpu86.c | 2 +- board/cpu87/cpu87.c | 2 +- board/emk/top9000/top9000.c | 8 +-- board/eukrea/cpuat91/cpuat91.c | 2 +- board/freescale/m52277evb/README | 2 +- board/freescale/m53017evb/README | 2 +- board/freescale/m5373evb/README | 2 +- board/freescale/m54455evb/README | 2 +- board/freescale/m547xevb/README | 2 +- board/ids8247/ids8247.c | 2 +- board/keymile/common/ivm.c | 6 +- board/keymile/km_arm/km_arm.c | 8 +-- board/lwmon/lwmon.c | 2 +- board/lwmon/pcmcia.c | 4 +- board/pm826/pm826.c | 2 +- board/pm828/pm828.c | 2 +- board/sacsng/ioconfig.h | 2 +- board/sandburst/karef/karef.c | 1 - board/tqc/tqm8260/tqm8260.c | 2 +- board/tqc/tqm8272/tqm8272.c | 2 +- board/tqc/tqm8272/tqm8272.h | 2 +- common/cmd_eeprom.c | 3 +- common/stdio.c | 8 +-- drivers/i2c/Makefile | 2 +- drivers/i2c/soft_i2c.c | 104 ++++++++++++++++-------------- include/configs/A3000.h | 4 +- include/configs/BSC9131RDB.h | 1 - include/configs/CANBT.h | 1 + include/configs/CPU86.h | 7 +- include/configs/CPU87.h | 7 +- include/configs/DU440.h | 1 - include/configs/GEN860T.h | 39 ++++++----- include/configs/HIDDEN_DRAGON.h | 9 ++- include/configs/ICU862.h | 13 ++-- include/configs/IDS8247.h | 9 ++- include/configs/IP860.h | 9 ++- include/configs/IPHASE4539.h | 11 ++-- include/configs/JSE.h | 1 - include/configs/KAREF.h | 1 - include/configs/KUP4K.h | 11 ++-- include/configs/KUP4X.h | 12 ++-- include/configs/M5208EVBE.h | 1 - include/configs/M52277EVB.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5271EVB.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/M54451EVB.h | 1 - include/configs/M54455EVB.h | 1 - include/configs/M5475EVB.h | 1 - include/configs/M5485EVB.h | 1 - include/configs/METROBOX.h | 1 - include/configs/MHPC.h | 8 +-- include/configs/MPC8323ERDB.h | 1 - include/configs/MPC832XEMDS.h | 1 - include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349ITX.h | 2 - include/configs/MPC8360EMDS.h | 1 - include/configs/MPC8360ERDK.h | 1 - include/configs/MPC837XEMDS.h | 1 - include/configs/MPC837XERDB.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8540ADS.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 1 - include/configs/MPC8548CDS.h | 3 +- include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8569MDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/P1023RDS.h | 1 - include/configs/P1_P2_RDB.h | 1 - include/configs/P2020COME.h | 1 - include/configs/PM826.h | 8 +-- include/configs/PM828.h | 8 +-- include/configs/PMC440.h | 1 - include/configs/R360MPI.h | 6 +- include/configs/RPXClassic.h | 16 +++-- include/configs/RPXlite.h | 30 +++++++++ include/configs/RRvision.h | 12 ++-- include/configs/SXNI855T.h | 7 +- include/configs/Sandpoint8240.h | 15 +++-- include/configs/Sandpoint8245.h | 15 +++-- include/configs/TASREG.h | 28 ++++---- include/configs/TK885D.h | 12 ++-- include/configs/TOP5200.h | 12 ++-- include/configs/TOP860.h | 10 +-- include/configs/TQM8260.h | 8 +-- include/configs/TQM8272.h | 12 ++-- include/configs/TQM834x.h | 1 - include/configs/TQM855M.h | 12 ++-- include/configs/TQM866M.h | 11 ++-- include/configs/TQM885D.h | 12 ++-- include/configs/alpr.h | 1 - include/configs/aria.h | 1 - include/configs/astro_mcf5373l.h | 1 - include/configs/bf533-ezkit.h | 9 ++- include/configs/bf533-stamp.h | 48 ++++++++++++-- include/configs/bf561-ezkit.h | 8 ++- include/configs/bfin_adi_common.h | 2 +- include/configs/blackstamp.h | 3 +- include/configs/blackvme.h | 2 +- include/configs/cpuat91.h | 3 +- include/configs/debris.h | 9 ++- include/configs/eXalion.h | 2 +- include/configs/eb_cpux9k2.h | 13 ++-- include/configs/ep8260.h | 13 ++-- include/configs/ethernut5.h | 8 ++- include/configs/ibf-dsp561.h | 4 +- include/configs/iocon.h | 10 +-- include/configs/km/keymile-common.h | 3 - include/configs/km/km83xx-common.h | 3 + include/configs/km/km_arm.h | 24 +++++-- include/configs/km82xx.h | 18 ++++-- include/configs/km_kirkwood.h | 16 ++--- include/configs/korat.h | 1 - include/configs/lwmon.h | 12 ++-- include/configs/lwmon5.h | 1 - include/configs/mecp5123.h | 1 - include/configs/mpc5121ads.h | 1 - include/configs/nhk8815.h | 7 +- include/configs/otc570.h | 17 +++-- include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p3p440.h | 1 - include/configs/pcs440ep.h | 1 - include/configs/pdnb3.h | 10 ++- include/configs/quad100hd.h | 1 - include/configs/s5p_goni.h | 6 +- include/configs/s5pc210_universal.h | 6 +- include/configs/sacsng.h | 11 ++-- include/configs/sbc405.h | 1 - include/configs/sbc8349.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8641d.h | 1 - include/configs/sc3.h | 1 - include/configs/snapper9260.h | 8 +-- include/configs/socrates.h | 1 - include/configs/spc1920.h | 12 ++-- include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - include/configs/top9000.h | 9 +-- include/configs/trats.h | 6 +- include/configs/u8500_href.h | 1 - include/configs/uc100.h | 12 ++-- include/configs/utx8245.h | 3 +- include/configs/vct.h | 11 ++-- include/configs/vl_ma2sc.h | 6 +- include/configs/vme8349.h | 1 - include/configs/zeus.h | 1 - include/i2c.h | 9 +++
165 Dateien ge?ndert, 548 Zeilen hinzugef?gt(+), 492 Zeilen entfernt(-)
README +27 -18
@@ -1894,6 +1894,19 @@ CBFS (Coreboot Filesystem) support interface. ported i2c driver to the new framework: + - drivers/i2c/soft_i2c.c: + - activate first bus with CONFIG_SYS_I2C_SOFT define + CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE + for defining speed and slave address + - activate second bus with I2C_SOFT_DECLARATIONS2 define + CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2 + for defining speed and slave address + - activate third bus with I2C_SOFT_DECLARATIONS3 define + CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3 + for defining speed and slave address + - activate fourth bus with I2C_SOFT_DECLARATIONS4 define + CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4 + for defining speed and slave address additional defines:
@@ -1932,18 +1945,18 @@ CBFS (Coreboot Filesystem) support which defines bus 0 on adapter 0 without a mux - bus 1 on adapter 0 without a PCA9547 on address 0x70 port 1 - bus 2 on adapter 0 without a PCA9547 on address 0x70 port 2 - bus 3 on adapter 0 without a PCA9547 on address 0x70 port 3 - bus 4 on adapter 0 without a PCA9547 on address 0x70 port 4 - bus 5 on adapter 0 without a PCA9547 on address 0x70 port 5 + bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1 + bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2 + bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3 + bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4 + bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5 bus 6 on adapter 1 without a mux - bus 7 on adapter 1 without a PCA9544 on address 0x72 port 1 - bus 8 on adapter 1 without a PCA9544 on address 0x72 port 2 + bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1 + bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2 If you do not have i2c muxes on your board, omit this define. -- Legacy I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C +- Legacy I2C Support: CONFIG_HARD_I2C NOTE: It is intended to move drivers to CONFIG_SYS_I2C which provides the following compelling advantages:
@@ -1954,9 +1967,9 @@ CBFS (Coreboot Filesystem) support ** Please consider updating your I2C driver now. ** - These enable legacy I2C serial bus commands. Defining either of - (but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will - include the appropriate I2C driver for the selected CPU. + These enable legacy I2C serial bus commands. Defining + CONFIG_HARD_I2C will include the appropriate I2C driver + for the selected CPU. This will allow you to use i2c commands at the u-boot command line (as long as you set CONFIG_CMD_I2C in
@@ -1966,12 +1979,8 @@ CBFS (Coreboot Filesystem) support CONFIG_HARD_I2C selects a hardware I2C controller. - CONFIG_SOFT_I2C configures u-boot to use a software (aka - bit-banging) driver instead of CPM or similar hardware - support for I2C. - There are several other quantities that must also be - defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C. + defined when you define CONFIG_HARD_I2C. In both cases you will need to define CONFIG_SYS_I2C_SPEED to be the frequency (in Hz) at which you wish your i2c bus
@@ -1993,7 +2002,7 @@ CBFS (Coreboot Filesystem) support That's all that's required for CONFIG_HARD_I2C. - If you use the software i2c interface (CONFIG_SOFT_I2C) + If you use the software i2c interface (CONFIG_SYS_I2C_SOFT) then the following macros need to be defined (examples are from include/configs/lwmon.h):
@@ -3556,7 +3565,7 @@ to save the current settings. I2C muxes, you can define here, how to reach this EEPROM. For example: - #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0" + #define CONFIG_I2C_ENV_EEPROM_BUS 1 EEPROM which holds the environment, is reached over a pca9547 i2c mux with address 0x70, channel 3.
arch/arm/lib/board.c +2 -3
@@ -69,7 +69,6 @@ extern void dataflash_print_info(void);#endif #if defined(CONFIG_HARD_I2C ) || \ - defined(CONFIG_SOFT_I2C ) || \ defined(CONFIG_SYS_I2C )#include <i2c.h> #endif
@@ -166,7 +165,7 @@ static int display_dram_config(void)return (0 ); } -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C )static int init_func_i2c (void ) {puts ("I2C: " );
@@ -273,7 +272,7 @@ init_fnc_t *init_sequence[] = {#if defined(CONFIG_DISPLAY_BOARDINFO ) checkboard, /* display board info */#endif -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C ) init_func_i2c, #endif dram_init, /* configure available RAM banks */
arch/m68k/lib/board.c +3 -5
@@ -56,7 +56,7 @@#include <version.h> #if defined(CONFIG_HARD_I2C ) || \ - defined(CONFIG_SOFT_I2C ) + defined(CONFIG_SYS_I2C )#include <i2c.h> #endif
@@ -142,8 +142,7 @@ static int init_func_ram (void)/***********************************************************************/ -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ - defined(CONFIG_SYS_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C )static int init_func_i2c (void ) {puts ("I2C: " );
@@ -183,8 +182,7 @@ init_fnc_t *init_sequence[] = { display_options, checkcpu, checkboard, -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ - defined(CONFIG_SYS_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C ) init_func_i2c,#endif #if defined(CONFIG_HARD_SPI )
arch/powerpc/lib/board.c +3 -6
@@ -98,8 +98,7 @@ extern void sc3_read_eeprom(void);#if defined(CONFIG_CMD_DOC )void doc_init (void );#endif -#if defined(CONFIG_HARD_I2C ) || \ - defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C )#include <i2c.h> #endif #include <spi.h>
@@ -214,8 +213,7 @@ static int init_func_ram(void)/***********************************************************************/ -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ - defined(CONFIG_SYS_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C )static int init_func_i2c (void ) {puts ("I2C: " );
@@ -315,8 +313,7 @@ static init_fnc_t *init_sequence[] = { misc_init_f, #endif INIT_FUNC_WATCHDOG_RESET -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ - defined(CONFIG_SYS_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C ) init_func_i2c,#endif #if defined(CONFIG_HARD_SPI )
board/BuS/eb_cpux9k2/cpux9k2.c +1 -1
@@ -288,7 +288,7 @@ int drv_video_init(void) }#endif -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT void i2c_init_board (void ) {
board/BuS/vl_ma2sc/vl_ma2sc.c +1 -1
@@ -323,7 +323,7 @@ int board_eth_init(bd_t *bis)return rc; } -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT void i2c_init_board (void ) {u32 pin;
board/atc/atc.c +1 -1
@@ -170,7 +170,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else
board/bluewater/snapper9260/snapper9260.c +1 -1
@@ -145,7 +145,7 @@ int board_init(void)/* Initialise peripherals */ at91_seriald_hw_init (); -i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +i2c_set_bus_num (0 );nand_hw_init ();macb_hw_init ();
board/cm5200/cm5200.c +2 -2
@@ -325,7 +325,7 @@ int board_early_init_r(void)#ifdef CONFIG_MISC_INIT_R int misc_init_r (void ) { -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C_SOFT )uchar buf[6 ];char str[18 ];char hostname[MODULE_NAME_MAXLEN ];
@@ -348,7 +348,7 @@ int misc_init_r(void)" device at address %02X:%04X\n" ,CONFIG_SYS_I2C_EEPROM , CONFIG_MAC_OFFSET); } -#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */ +#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) */ if (!getenv ("ethaddr" ))printf (LOG_PREFIX "MAC address not set, networking is not " "operational\n" );
board/cpu86/cpu86.c +1 -1
@@ -161,7 +161,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else
board/cpu87/cpu87.c +1 -1
@@ -163,7 +163,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else
board/emk/top9000/top9000.c +4 -4
@@ -245,7 +245,7 @@ int board_eth_init(bd_t *bis)* However i2c_get_bus_num() cannot be called before * relocation. */ -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT void iic_init (void ) {/* ports are now initialized in board_early_init_f() */
@@ -253,7 +253,7 @@ void iic_init(void)int iic_read (void ) { -switch ((gd->flags &GD_FLG_RELOC ) ?i2c_get_bus_num () :0 ) { +switch (I2C_ADAP_HWNR ) {case 0 :return at91_get_pio_value (I2C0_PORT ,SDA0_PIN );case 1 :
@@ -264,7 +264,7 @@ int iic_read(void)void iic_sda (int bit) { -switch ((gd->flags &GD_FLG_RELOC ) ?i2c_get_bus_num () :0 ) { +switch (I2C_ADAP_HWNR ) {case 0 :at91_set_pio_value (I2C0_PORT ,SDA0_PIN , bit);break ;
@@ -276,7 +276,7 @@ void iic_sda(int bit)void iic_scl (int bit) { -switch ((gd->flags &GD_FLG_RELOC ) ?i2c_get_bus_num () :0 ) { +switch (I2C_ADAP_HWNR ) {case 0 :at91_set_pio_value (I2C0_PORT ,SCL0_PIN , bit);break ;
board/eukrea/cpuat91/cpuat91.c +1 -1
@@ -73,7 +73,7 @@ int board_eth_init(bd_t *bis) }#endif -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT void i2c_init_board (void ) {u32 pin;
board/freescale/m52277evb/README +1 -1
@@ -84,7 +84,7 @@ CONFIG_MCFPIT -- define to use PIT timer CONFIG_FSL_I2C -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
board/freescale/m53017evb/README +1 -1
@@ -92,7 +92,7 @@ CONFIG_MCFPIT -- define to use PIT timer CONFIG_FSL_I2C -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
board/freescale/m5373evb/README +1 -1
@@ -91,7 +91,7 @@ CONFIG_MCFPIT -- define to use PIT timer CONFIG_FSL_I2C -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
board/freescale/m54455evb/README +1 -1
@@ -114,7 +114,7 @@ CONFIG_MCFPIT -- define to use PIT timer CONFIG_FSL_I2C -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
board/freescale/m547xevb/README +1 -1
@@ -99,7 +99,7 @@ CONFIG_SLTTMR -- define to use SLT timer CONFIG_FSL_I2C -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
board/ids8247/ids8247.c +1 -1
@@ -51,7 +51,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */ /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */ /* PA25 */ { 0, 0, 0, 0, 1, 0 }, /* 8247_P0 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PA24 */ { 1, 0, 0, 0, 1, 1 }, /* I2C_SDA2 */ /* PA23 */ { 1, 0, 0, 1, 1, 1 }, /* I2C_SCL2 */ #else /* normal I/O port pins */
board/keymile/common/ivm.c +5 -1
@@ -318,10 +318,14 @@ int ivm_read_eeprom(void)I2C_MUX_DEVICE *dev =NULL ;#endif uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN ]; -uchar *buf; +char *buf;unsigned long dev_addr =CONFIG_SYS_IVM_EEPROM_ADR ;int ret; +#if defined(CONFIG_SYS_I2C ) + buf =getenv ("EEprom_ivm" ); +i2c_set_bus_num (buf ? (int )simple_strtol (buf,NULL ,10 ) :0 ); +#else #if defined(CONFIG_I2C_MUX )/* First init the Bus, select the Bus */ buf = (unsigned char *)getenv ("EEprom_ivm" );
board/keymile/km_arm/km_arm.c +4 -4
@@ -63,7 +63,7 @@ static const u32 kwmpp_config[] = { MPP5_NF_IO7, MPP6_SYSRST_OUTn, MPP7_PEX_RST_OUTn, -#if defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_SYS_I2C_SOFT ) MPP8_GPIO, /* SDA */ MPP9_GPIO, /* SCL */#endif
@@ -234,7 +234,7 @@ int misc_init_r(void)int board_early_init_f (void ) { -#if defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_SYS_I2C_SOFT )u32 tmp;/* set the 2 bitbang i2c pins as output gpios */
@@ -260,7 +260,7 @@ int board_init(void)kw_gpio_set_valid (KM_FLASH_GPIO_PIN ,1 );kw_gpio_direction_output (KM_FLASH_GPIO_PIN ,1 ); -#if defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_SYS_I2C_SOFT )/* * Reinit the GPIO for I2C Bitbang driver so that the now * available gpio framework is consistent. The calls to
@@ -440,7 +440,7 @@ int hush_init_var(void) }#endif -#if defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_SYS_I2C_SOFT )void set_sda (int state) {I2C_ACTIVE ;
board/lwmon/lwmon.c +1 -1
@@ -480,7 +480,7 @@ static void kbd_init (void)uchar val, errcd;int i; -i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +i2c_set_bus_num (0 ); gd->arch.kbd_status =0 ;
board/lwmon/pcmcia.c +2 -2
@@ -104,7 +104,7 @@ int pcmcia_hardware_enable(int slot)/* switch VCC on */ val |=MAX1604_OP_SUS |MAX1604_VCCBON ; -i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +i2c_set_bus_num (0 );i2c_write (CONFIG_SYS_I2C_POWER_A_ADDR ,0 ,0 , &val,1 );udelay (500000 );
@@ -193,7 +193,7 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp)*/ debug ("PCMCIA power OFF\n" ); val =MAX1604_VCCBHIZ |MAX1604_VPPBHIZ ; -i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +i2c_set_bus_num (0 );i2c_write (CONFIG_SYS_I2C_POWER_A_ADDR ,0 ,0 , &val,1 ); val =0 ;
board/pm826/pm826.c +1 -1
@@ -169,7 +169,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else
board/pm828/pm828.c +1 -1
@@ -169,7 +169,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else
board/sacsng/ioconfig.h +1 -1
@@ -187,7 +187,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD17 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* SPI_MOSI */ /* PD16 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* SPI_MISO */ #endif -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { CONF, GPIO, 0, DOUT, OPEN, 1 }, /* I2C_SDA */ /* PD14 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* I2C_SCL */ #else
board/sandburst/karef/karef.c +0 -1
@@ -32,7 +32,6 @@#include <spd_sdram.h> #include <i2c.h> #include "../common/sb_common.h" -#include "../common/ppc440gx_i2c.h" #if defined(CONFIG_HAS_ETH0 ) || defined(CONFIG_HAS_ETH1 ) || \ defined(CONFIG_HAS_ETH2 ) || defined(CONFIG_HAS_ETH3 )#include <net.h>
board/tqc/tqm8260/tqm8260.c +1 -1
@@ -160,7 +160,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else
board/tqc/tqm8272/tqm8272.c +1 -1
@@ -180,7 +180,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else
board/tqc/tqm8272/tqm8272.h +1 -1
@@ -50,4 +50,4 @@ typedef struct{static HWIB_INFO hwinf = {0 ,0 ,1 ,0 ,1 ,0 ,0 ,0 ,0 ,8272 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 }; -#endif +#endif /* __CONFIG_H */
common/cmd_eeprom.c +1 -2
@@ -406,8 +406,7 @@ void eeprom_init (void)#if defined(CONFIG_SPI ) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C )spi_init_f ();#endif -#if defined(CONFIG_HARD_I2C ) || \ - defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C_SOFT )i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE );#endif }
common/stdio.c +3 -5
@@ -34,8 +34,8 @@#ifdef CONFIG_LOGBUFFER #include <logbuff.h> #endif -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) || \ - defined(CONFIG_SYS_I2C_ADAPTERS ) + +#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C )#include <i2c.h> #endif
@@ -216,11 +216,9 @@ int stdio_init (void)drv_arm_dcc_init ();#endif #ifdef CONFIG_SYS_I2C -#ifdef CONFIG_SYS_I2C_ADAPTERS i2c_init_all (); -#endif #else -#if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_HARD_I2C )i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE );#endif #endif
drivers/i2c/Makefile +1 -1
@@ -40,13 +40,13 @@ COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o -COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o COBJS-$(CONFIG_TEGRA_I2C) += tegra_i2c.o COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o COBJS-$(CONFIG_SH_I2C) += sh_i2c.o COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o COBJS-$(CONFIG_SYS_I2C) += i2c_core.o +COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c)
drivers/i2c/soft_i2c.c +57 -47
162 lines not on this page · raw message
include/configs/A3000.h +2 -2
@@ -86,8 +86,8 @@* PCI stuff *----------------------------------------------------------------------- */ -#define CONFIG_HARD_I2C 1/* To enable I2C support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ +#define CONFIG_HARD_I2C 1/* To enable I2C support */ +#undef CONFIG_SYS_I2C_SOFT/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/BSC9131RDB.h +0 -1
@@ -241,7 +241,6 @@ extern unsigned long get_sdram_size(void);#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_I2C_CMD_TREE #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address*/
include/configs/CANBT.h +1 -0
@@ -180,6 +180,7 @@/*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC08) for environment */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1/* Bytes of address */ #define CONFIG_HARD_I2C /* I2C with hardware support */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */
include/configs/CPU86.h +4 -3
@@ -129,10 +129,11 @@/*----------------------------------------------------------------------- * I2C/EEPROM/RTC configuration */ -#define CONFIG_SOFT_I2C /* Software I2C support enabled */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE -# define CONFIG_SYS_I2C_SPEED 50000 -# define CONFIG_SYS_I2C_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
include/configs/CPU87.h +4 -3
@@ -133,10 +133,11 @@/*----------------------------------------------------------------------- * I2C/EEPROM/RTC configuration */ -#define CONFIG_SOFT_I2C /* Software I2C support enabled */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE -# define CONFIG_SYS_I2C_SPEED 50000 -# define CONFIG_SYS_I2C_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
include/configs/DU440.h +0 -1
@@ -171,7 +171,6 @@* I2C */ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 100000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/GEN860T.h +23 -16
@@ -158,26 +158,33 @@/* * Enable I2C and select the hardware/software driver */ -#define CONFIG_HARD_I2C 1/* CPM based I2C */ -#undef CONFIG_SOFT_I2C/* Bit-banged I2C */ +#define CONFIG_HARD_I2C 1/* CPM based I2C */ +#undef CONFIG_SYS_I2C_SOFT/* Bit-banged I2C */ #ifdef CONFIG_HARD_I2C -#define CONFIG_SYS_I2C_SPEED 100000/* clock speed in Hz */ -#define CONFIG_SYS_I2C_SLAVE 0xFE/* I2C slave address */ +#define CONFIG_SYS_I2C_SPEED 100000/* clock speed in Hz */ +#define CONFIG_SYS_I2C_SLAVE 0xFE/* I2C slave address */ #endif -#ifdef CONFIG_SOFT_I2C -#define PB_SCL 0x00000020/* PB 26 */ -#define PB_SDA 0x00000010/* PB 27 */ -#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) -#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) -#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) -#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) -#define I2C_SDA (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ - else immr->im_cpm.cp_pbdat &= ~PB_SDA -#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ - else immr->im_cpm.cp_pbdat &= ~PB_SCL -#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ +#ifdef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE +#define PB_SCL 0x00000020/* PB 26 */ +#define PB_SDA 0x00000010/* PB 27 */ +#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) +#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) +#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) +#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) +#define I2C_SDA (bit) if (bit) \ + immr->im_cpm.cp_pbdat |= PB_SDA; \ + else \ + immr->im_cpm.cp_pbdat &= ~PB_SDA +#define I2C_SCL (bit) if (bit) \ + immr->im_cpm.cp_pbdat |= PB_SCL; \ + else \ + immr->im_cpm.cp_pbdat &= ~PB_SCL +#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ #endif /*
include/configs/HIDDEN_DRAGON.h +6 -3
@@ -168,12 +168,15 @@* configuration items that the driver uses to drive the port pins. */ #define CONFIG_HARD_I2C 1/* To enable I2C support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ +#undef CONFIG_SYS_I2C_SOFT/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT #error "Soft I2C is not configured properly. Please review!" +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE#define I2C_PORT 3/* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000)#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
@@ -183,7 +186,7 @@#define I2C_SCL (bit) if(bit) iop->pdat |= 0x00020000; \ else iop->pdat &= ~0x00020000#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ +#endif /* CONFIG_SYS_I2C_SOFT */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57/* EEPROM IS24C02 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1/* Bytes of address */
include/configs/ICU862.h +7 -6
@@ -106,12 +106,10 @@#define CONFIG_DOS_PARTITION /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ -# define CONFIG_SYS_I2C_SPEED 50000 -# define CONFIG_SYS_I2C_SLAVE 0xFE -# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1/* Bytes of address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -133,6 +131,9 @@#define CONFIG_RTC_MPC8xx/* use internal RTC of MPC8xx */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1/* Bytes of address */ +/* * Command line configuration.
include/configs/IDS8247.h +4 -5
@@ -73,11 +73,10 @@#define CONFIG_MISC_INIT_R 1/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 400000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F/* * Software (bit-bang) I2C driver configuration */
include/configs/IP860.h +4 -5
@@ -62,8 +62,10 @@/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -80,9 +82,6 @@ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ - -# define CONFIG_SYS_I2C_SPEED 50000 -# define CONFIG_SYS_I2C_SLAVE 0xFE# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM X24C16 */ # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1/* bytes of address */ /* mask of address bits that overflow into the "EEPROM chip address" */
include/configs/IPHASE4539.h +4 -7
@@ -110,15 +110,13 @@* If the software driver is chosen, there are some additional * configuration items that the driver uses to drive the port pins. */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 400000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F/* * Software (bit-bang) I2C driver configuration */ -#ifdef CONFIG_SOFT_I2C #define I2C_PORT 3/* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000)#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
@@ -128,7 +126,6 @@#define I2C_SCL (bit) if(bit) iop->pdat |= 0x00020000; \ else iop->pdat &= ~0x00020000#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ /*
include/configs/JSE.h +0 -1
@@ -211,7 +211,6 @@#define CONFIG_SYS_HZ 1000/* decrementer freq: 1 ms ticks */ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/KAREF.h +0 -1
@@ -134,7 +134,6 @@* I2C *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1/* I2C hardware support */ -#undef CONFIG_SOFT_I2C/* I2C !bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed 400kHz */ #define CONFIG_SYS_I2C_SLAVE 0x7F/* I2C slave address */
include/configs/KUP4K.h +4 -7
@@ -106,13 +106,11 @@/* * enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 93000/* 93 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE -#define CONFIG_SYS_I2C_SPEED 93000/* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C /* * Software (bit-bang) I2C driver configuration */
@@ -128,7 +126,6 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ /*----------------------------------------------------------------------- * I2C Configuration
include/configs/KUP4X.h +6 -6
@@ -114,13 +114,13 @@/* * enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 93000/* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE +#ifdef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C_SOFT_SPEED 93000/* 93 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE -#ifdef CONFIG_SOFT_I2C /* * Software (bit-bang) I2C driver configuration */
@@ -136,7 +136,7 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ +#endif /* CONFIG_SYS_I2C_SOFT */ /*-----------------------------------------------------------------------
include/configs/M5208EVBE.h +0 -1
@@ -84,7 +84,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x58000
include/configs/M52277EVB.h +0 -1
@@ -147,7 +147,6 @@/* I2c */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x58000
include/configs/M5235EVB.h +0 -1
@@ -101,7 +101,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x00000300
include/configs/M5271EVB.h +0 -1
@@ -111,7 +111,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x00000300
include/configs/M5275EVB.h +0 -1
@@ -111,7 +111,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C#define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x00000300
include/configs/M53017EVB.h +0 -1
@@ -103,7 +103,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x58000
include/configs/M5329EVB.h +0 -1
@@ -97,7 +97,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x58000
include/configs/M5373EVB.h +0 -1
@@ -97,7 +97,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x58000
include/configs/M54451EVB.h +0 -1
@@ -158,7 +158,6 @@/* I2c */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x58000
include/configs/M54455EVB.h +0 -1
@@ -191,7 +191,6 @@/* I2c */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x58000
include/configs/M5475EVB.h +0 -1
@@ -122,7 +122,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x00008F00
include/configs/M5485EVB.h +0 -1
@@ -119,7 +119,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x00008F00
include/configs/METROBOX.h +0 -1
@@ -196,7 +196,6 @@* I2C *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1/* I2C hardware support */ -#undef CONFIG_SOFT_I2C/* I2C !bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed 400kHz */ #define CONFIG_SYS_I2C_SLAVE 0x7F/* I2C slave address */
include/configs/MHPC.h +4 -4
@@ -73,8 +73,10 @@#undef CONFIG_UCODE_PATCH/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -91,8 +93,6 @@ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ -#define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0xFE#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM X24C04 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1/* bytes of address */ /* mask of address bits that overflow into the "EEPROM chip address" */
include/configs/MPC8323ERDB.h +0 -1
@@ -234,7 +234,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/MPC832XEMDS.h +0 -1
@@ -327,7 +327,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/MPC8349EMDS.h +0 -1
@@ -355,7 +355,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */
include/configs/MPC8349ITX.h +0 -2
@@ -131,8 +131,6 @@#define I2C_8574_PCI66 0x20/* 0=33MHz PCI, 1=66MHz PCI */ #define I2C_8574_FLASHSIDE 0x40/* 0=Reset vector from U4, 1=from U7*/ -#undef CONFIG_SOFT_I2C -#endif /* Compact Flash */
include/configs/MPC8360EMDS.h +0 -1
@@ -424,7 +424,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/MPC8360ERDK.h +0 -1
@@ -288,7 +288,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */
include/configs/MPC837XEMDS.h +0 -1
@@ -342,7 +342,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/MPC837XERDB.h +0 -1
@@ -368,7 +368,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/MPC8536DS.h +0 -1
@@ -435,7 +435,6 @@*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/MPC8540ADS.h +0 -1
@@ -261,7 +261,6 @@*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */
include/configs/MPC8541CDS.h +0 -1
@@ -284,7 +284,6 @@ extern unsigned long get_clock_freq(void);*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */
include/configs/MPC8544DS.h +0 -1
@@ -233,7 +233,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);/* I2C */ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57#define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/MPC8548CDS.h +1 -2
@@ -359,8 +359,7 @@ extern unsigned long get_clock_freq(void);*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SPEED 400000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ #define CONFIG_SYS_I2C_OFFSET 0x3000
include/configs/MPC8555CDS.h +0 -1
@@ -282,7 +282,6 @@ extern unsigned long get_clock_freq(void);*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */
include/configs/MPC8560ADS.h +0 -1
@@ -255,7 +255,6 @@*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */
include/configs/MPC8568MDS.h +0 -1
@@ -267,7 +267,6 @@ extern unsigned long get_clock_freq(void);*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
include/configs/MPC8569MDS.h +0 -1
@@ -303,7 +303,6 @@ extern unsigned long get_clock_freq(void);*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/MPC8572DS.h +0 -1
@@ -432,7 +432,6 @@/* I2C */ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
include/configs/MPC8610HPCD.h +0 -1
@@ -253,7 +253,6 @@*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */
include/configs/MPC8641HPCN.h +0 -1
@@ -300,7 +300,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */
include/configs/P1010RDB.h +0 -1
@@ -477,7 +477,6 @@ extern unsigned long get_sdram_size(void);#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_I2C_CMD_TREE #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address*/
include/configs/P1023RDS.h +0 -1
@@ -314,7 +314,6 @@ extern unsigned long get_clock_freq(void);/* I2C */ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
include/configs/P1_P2_RDB.h +0 -1
@@ -368,7 +368,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);/* I2C */ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_I2C_CMD_TREE #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address*/
include/configs/P2020COME.h +0 -1
@@ -226,7 +226,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);/* I2C */ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_I2C_CMD_TREE #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address*/
include/configs/PM826.h +4 -4
@@ -57,10 +57,10 @@ "bootm"/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ -# define CONFIG_SYS_I2C_SPEED 50000 -# define CONFIG_SYS_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
include/configs/PM828.h +4 -4
@@ -57,10 +57,10 @@ "bootm"/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ -# define CONFIG_SYS_I2C_SPEED 50000 -# define CONFIG_SYS_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
include/configs/PMC440.h +0 -1
@@ -226,7 +226,6 @@* I2C *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/R360MPI.h +5 -1
@@ -97,10 +97,13 @@#define CONFIG_RTC_MPC8xx/* use internal RTC of MPC8xx */ #define CONFIG_HARD_I2C 1/* To I2C with hardware support */ -#undef CONFIG_SORT_I2C/* To I2C with software support */ +#undef CONFIG_SYS_I2C_SOFT/* To I2C with software support */ #define CONFIG_SYS_I2C_SPEED 4700/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F +#if defined(CONFIG_SYS_I2C_SOFT ) +#define CONFIG_SYS_SYS_I2C_SOFT_SPEED 4700/* I2C speed and slave address */ +#define CONFIG_SYS_SYS_I2C_SOFT_SLAVE 0x7F/* * Software (bit-bang) I2C driver configuration */
@@ -116,6 +119,7 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(50) +#endif /* #define(CONFIG_SYS_I2C_SOFT) */ #define CONFIG_SYS_I2C_LCD_ADDR 0x8/* LCD Control */ #define CONFIG_SYS_I2C_KEY_ADDR 0x9/* Keyboard coprocessor */
include/configs/RPXClassic.h +10 -6
@@ -148,14 +148,16 @@* I2C Configuration *----------------------------------------------------------------------------- */ -#define CONFIG_I2C 1 -#define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0x34 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0x34/* enable I2C and select the hardware/software driver */ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ +#undef CONFIG_SYS_I2C_SOFT/* I2C bit-banged */ + +#if defined(CONFIG_SYS_I2C_SOFT ) +#define CONFIG_SYS_I2C 1/* * Software (bit-bang) I2C driver configuration */
@@ -170,8 +172,10 @@#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ -# define CONFIG_SYS_I2C_SPEED 50000 -# define CONFIG_SYS_I2C_SLAVE 0x34 +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x34 +#endif +# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM X24C16 */ # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1/* bytes of address */ /* mask of address bits that overflow into the "EEPROM chip address" */
include/configs/RPXlite.h +30 -0
@@ -62,6 +62,36 @@#undef CONFIG_SYS_LOADS_BAUD_CHANGE/* don't allow baudrate change */ #define CONFIG_BZIP2 /* Include support for bzip2 compressed images */ + +/* enable I2C and select the hardware/software driver */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 40000/* 40 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE +/* Software (bit-bang) I2C driver configuration */ +#define PB_SCL 0x00000020/* PB 26 */ +#define PB_SDA 0x00000010/* PB 27 */ + +#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) +#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) +#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) +#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) +#define I2C_SDA (bit) if (bit) \ + immr->im_cpm.cp_pbdat |= PB_SDA; \ + else \ + immr->im_cpm.cp_pbdat &= ~PB_SDA +#define I2C_SCL (bit) if (bit) \ + immr->im_cpm.cp_pbdat |= PB_SCL; \ + else \ + immr->im_cpm.cp_pbdat &= ~PB_SCL +#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ + +/* M41T11 Serial Access Timekeeper(R) SRAM */ +#define CONFIG_RTC_M41T11 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +/* play along with the linux driver */ +#define CONFIG_SYS_M41T11_BASE_YEAR 1900 +#undef CONFIG_WATCHDOG/* watchdog disabled */ /*
include/configs/RRvision.h +4 -8
@@ -122,13 +122,10 @@#endif /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C /* I2C bit-banged */ - -# define CONFIG_SYS_I2C_SPEED 50000/* 50 kHz is supposed to work */ -# define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -144,7 +141,6 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(1)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ /*
include/configs/SXNI855T.h +4 -3
@@ -121,7 +121,10 @@#define CONFIG_RTC_DS1306 /* Dallas 1306 real time clock */ -#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -138,8 +141,6 @@ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ -# define CONFIG_SYS_I2C_SPEED 50000 -# define CONFIG_SYS_I2C_SLAVE 0xFE# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* Atmel 24C64 */ # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2/* two byte address */
include/configs/Sandpoint8240.h +9 -6
@@ -201,13 +201,16 @@* If the software driver is chosen, there are some additional * configuration items that the driver uses to drive the port pins. */ -#define CONFIG_HARD_I2C 1/* To enable I2C support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_HARD_I2C 1/* To enable I2C support */ +#undef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_SPEED 400000 -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT #error "Soft I2C is not configured properly. Please review!" +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE#define I2C_PORT 3/* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000)#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
@@ -217,7 +220,7 @@#define I2C_SCL (bit) if(bit) iop->pdat |= 0x00020000; \ else iop->pdat &= ~0x00020000#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ +#endif /* CONFIG_SYS_I2C_SOFT */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57/* EEPROM IS24C02 */
include/configs/Sandpoint8245.h +9 -6
@@ -171,13 +171,16 @@* If the software driver is chosen, there are some additional * configuration items that the driver uses to drive the port pins. */ -#define CONFIG_HARD_I2C 1/* To enable I2C support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_HARD_I2C 1/* To enable I2C support */ +#undef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x7F -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT #error "Soft I2C is not configured properly. Please review!" +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE#define I2C_PORT 3/* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000)#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
@@ -187,7 +190,7 @@#define I2C_SCL (bit) if(bit) iop->pdat |= 0x00020000; \ else iop->pdat &= ~0x00020000#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ +#endif /* CONFIG_SYS_I2C_SOFT */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57/* EEPROM IS24C02 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1/* Bytes of address */
include/configs/TASREG.h +15 -13
@@ -136,19 +136,11 @@/*----------------------------------------------------------------------- * I2C */ -#define CONFIG_SOFT_I2C -#define CONFIG_SYS_I2C_SPEED 100000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM CAT28WC32 */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2/* Bytes of address */ -/* mask of address bits that overflow into the "EEPROM chip address" */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x01 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5/* The Catalyst CAT24WC32 has */ -/* 32 byte page write mode using*/ -/* last 5 bits of the address */ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10/* and takes up to 10 msec */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 100000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F -#if defined (CONFIG_SOFT_I2C )#if 0 /* push-pull */ #define SDA 0x00800000#define SCL 0x00000008
@@ -182,7 +174,17 @@#define I2C_ACTIVE {DIR1|=SDA;}#define I2C_TRISTATE {DIR1&=~SDA;}#endif -#endif + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM CAT28WC32 */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2/* Bytes of address */ +/* mask of address bits that overflow into the "EEPROM chip address" */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x01 +/* +* The Catalyst CAT24WC32 has 32 byte page write mode using +* last 5 bits of the address +*/ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10/* and takes up to 10 msec */ /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM)
include/configs/TK885D.h +4 -8
@@ -104,13 +104,10 @@#undef CONFIG_CAN_DRIVER/* CAN Driver support disabled */ /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000/* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 93000/* 93 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -126,7 +123,6 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM AT24C?? */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2/* two byte address */
include/configs/TOP5200.h +7 -5
@@ -200,10 +200,13 @@#define CONFIG_ENV_OVERWRITE #define CONFIG_MISC_INIT_R -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C with softwate support */ +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ -#if defined (CONFIG_SOFT_I2C ) +#if defined(CONFIG_SYS_I2C_SOFT ) +# define CONFIG_SYS_I2C +# define CONFIG_SYS_I2C_SOFT_SPEED 100000 +# define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F +/**/ # define SDA0 0x40# define SCL0 0x80# define GPIOE0 *((volatile uchar*)(CONFIG_SYS_MBAR+0x0c00))
@@ -218,8 +221,7 @@# define I2C_DELAY {udelay(5);}# define I2C_ACTIVE {DDR0|=SDA0;}# define I2C_TRISTATE {DDR0&=~SDA0;} -# define CONFIG_SYS_I2C_SPEED 100000 -# define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57#define CONFIG_SYS_I2C_FACT_ADDR 0x57#endif
include/configs/TOP860.h +5 -5
@@ -159,7 +159,6 @@* Environment handler * only the first 6k in EEPROM are available for user. Of that we use 256b */ -#define CONFIG_SOFT_I2C #define CONFIG_ENV_IS_IN_EEPROM 1/* turn on EEPROM env feature */ #define CONFIG_ENV_OFFSET 0x1000#define CONFIG_ENV_SIZE 0x0700
@@ -170,13 +169,15 @@#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2#define CONFIG_SYS_EEPROM_SIZE 0x2000 -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0xFE#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 12#define CONFIG_ENV_OVERWRITE #define CONFIG_MISC_INIT_R -#if defined (CONFIG_SOFT_I2C ) +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 100000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE +/**/ #define SDA 0x00010#define SCL 0x00020#define __I2C_DIR immr->im_cpm.cp_pbdir
@@ -193,7 +194,6 @@#define I2C_DELAY { udelay(5); }#define I2C_ACTIVE { __I2C_DIR |= SDA; }#define I2C_TRISTATE { __I2C_DIR &= ~SDA; } -#endif #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
include/configs/TQM8260.h +4 -4
@@ -89,10 +89,10 @@#define CONFIG_BOOTCOMMAND "run flash_self"/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 400000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F/* * Software (bit-bang) I2C driver configuration
include/configs/TQM8272.h +6 -6
@@ -97,11 +97,10 @@#if CONFIG_I2C /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 400000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F/* * Software (bit-bang) I2C driver configuration */
@@ -135,8 +134,9 @@#define CONFIG_SYS_DTT_HYSTERESIS 3#else +#undef CONFIG_SYS_I2C#undef CONFIG_HARD_I2C -#undef CONFIG_SOFT_I2C +#undef CONFIG_SYS_I2C_SOFT#endif /*
include/configs/TQM834x.h +0 -1
@@ -188,7 +188,6 @@* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed: 400KHz */ #define CONFIG_SYS_I2C_SLAVE 0x7F/* slave address */
include/configs/TQM855M.h +4 -8
@@ -93,13 +93,10 @@#undef CONFIG_CAN_DRIVER/* CAN Driver support disabled */ /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000/* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 93000/* 93 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -115,7 +112,6 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM AT24C64 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2/* two byte address */
include/configs/TQM866M.h +4 -7
@@ -107,13 +107,11 @@#undef CONFIG_CAN_DRIVER/* CAN Driver support disabled */ /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 93000/* 93 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE -#define CONFIG_SYS_I2C_SPEED 93000/* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C /* * Software (bit-bang) I2C driver configuration */
@@ -129,7 +127,6 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM AT24C256 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2/* two byte address */
include/configs/TQM885D.h +4 -8
@@ -101,13 +101,10 @@#undef CONFIG_CAN_DRIVER/* CAN Driver support disabled */ /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000/* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 93000/* 93 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -123,7 +120,6 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* EEPROM AT24C?? */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2/* two byte address */
include/configs/alpr.h +0 -1
@@ -122,7 +122,6 @@* I2C *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 100000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/aria.h +0 -1
@@ -370,7 +370,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* so disable bit-banged I2C */ #define CONFIG_I2C_MULTI_BUS /* I2C speed and slave address */
include/configs/astro_mcf5373l.h +0 -1
@@ -118,7 +118,6 @@/* I2C */ #define CONFIG_FSL_I2C #define CONFIG_HARD_I2C /* I2C with hw support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 80000#define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x58000
include/configs/bf533-ezkit.h +7 -2
@@ -94,10 +94,15 @@/* * I2C Settings */ -#define CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C_SOFT +#ifdef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1 - +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0 +#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ +#endif /* * Misc Settings
include/configs/bf533-stamp.h +43 -5
80 lines not on this page · raw message
include/configs/bf561-ezkit.h +6 -2
@@ -88,10 +88,14 @@/* * I2C Settings */ -#define CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C_SOFT +#ifdef CONFIG_SYS_I2C_SOFT #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1 - +#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0 +#endif /* * Misc Settings
include/configs/bfin_adi_common.h +1 -1
@@ -71,7 +71,7 @@# ifdef CONFIG_SPI_FLASH # define CONFIG_CMD_SF # endif -# if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SOFT_I2C ) +# if defined(CONFIG_HARD_I2C ) || defined(CONFIG_SYS_I2C_SOFT )# define CONFIG_CMD_I2C # define CONFIG_SOFT_I2C_READ_REPEATED_START # endif
include/configs/blackstamp.h +1 -2
@@ -40,7 +40,6 @@#define SHARED_RESOURCES 1/* Is I2C bit-banged? */ -#undef CONFIG_SOFT_I2/* * Clock Settings
@@ -115,7 +114,7 @@# undef CONFIG_CMD_NET#endif -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT # define CONFIG_CMD_I2C #endif
include/configs/blackvme.h +1 -1
@@ -224,7 +224,7 @@* Soft I2C settings (BF561 does not have hard I2C) * PF12,13 on SPI connector 0. */ -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT # define CONFIG_CMD_I2C # define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF12# define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF13
include/configs/cpuat91.h +1 -2
@@ -92,7 +92,6 @@#define CONFIG_USART_ID 0/* ignored in arm */ #undef CONFIG_HARD_I2C -#undef CONFIG_SOFT_I2C#define AT91_PIN_SDA (1<<25)#define AT91_PIN_SCL (1<<26)
@@ -139,7 +138,7 @@#undef CONFIG_CMD_NFS#undef CONFIG_CMD_DHCP -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C #endif
include/configs/debris.h +6 -3
@@ -272,12 +272,15 @@* configuration items that the driver uses to drive the port pins. */ #define CONFIG_HARD_I2C 1/* To enable I2C support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ +#undef CONFIG_SYS_I2C_SOFT/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT #error "Soft I2C is not configured properly. Please review!" +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F#define I2C_PORT 3/* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000)#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
@@ -287,7 +290,7 @@#define I2C_SCL (bit) if(bit) iop->pdat |= 0x00020000; \ else iop->pdat &= ~0x00020000#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ +#endif /* CONFIG_SYS_I2C_SOFT */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57/* EEPROM IS24C02 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1/* Bytes of address */
include/configs/eXalion.h +1 -1
@@ -223,7 +223,7 @@* configuration items that the driver uses to drive the port pins. */ #define CONFIG_HARD_I2C 1/* To enable I2C support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ +#undef CONFIG_SYS_I2C_SOFT/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/eb_cpux9k2.h +5 -8
@@ -223,11 +223,10 @@* I2C-Bus */ -#define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0/* not used */ - -#ifndef CONFIG_HARD_I2C -#define CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0/* Software I2C driver configuration */
@@ -251,9 +250,7 @@ else \ writel(ATMEL_PMX_AA_TWCK, &pio->pioa.codr); -#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SPEED) - -#endif /* CONFIG_HARD_I2C */ +#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SOFT_SPEED)/* I2C-RTC */
include/configs/ep8260.h +8 -5
@@ -227,15 +227,18 @@* If the software driver is chosen, there are some additional * configuration items that the driver uses to drive the port pins. */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_SLAVE 0x7F/* This is for HARD, must go */ /* * Software (bit-bang) I2C driver configuration */ -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE#define I2C_PORT 3/* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000)#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
@@ -245,7 +248,7 @@#define I2C_SCL (bit) if(bit) iop->pdat |= 0x00020000; \ else iop->pdat &= ~0x00020000#define I2C_DELAY udelay(5)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ +#endif /* CONFIG_SYS_I2C_SOFT */ /* #define CONFIG_RTC_DS174x */
include/configs/ethernut5.h +5 -3
@@ -210,10 +210,12 @@/* I2C */ #define CONFIG_SYS_MAX_I2C_BUS 1 -#define CONFIG_SYS_I2C_SLAVE 0 -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 100000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0 +#define I2C_SOFT_DECLARATIONS #define GPIO_I2C_SCL AT91_PIO_PORTA, 24
include/configs/ibf-dsp561.h +2 -2
@@ -105,11 +105,11 @@/* * I2C Settings */ -#define CONFIG_SOFT_I2C 1 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1 -/* * Misc Settings */
include/configs/iocon.h +5 -5
@@ -110,11 +110,11 @@/* * I2C stuff */ -#define CONFIG_SYS_I2C_SPEED 400000 - -/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ +#undef CONFIG_HARD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 400000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration
include/configs/km/keymile-common.h +0 -3
@@ -78,10 +78,7 @@#define CONFIG_LOADS_ECHO #define CONFIG_SYS_LOADS_BAUD_CHANGE -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_MAX_I2C_BUS 1#define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_I2C_MUX /* Support the IVM EEprom */ #define CONFIG_SYS_IVM_EEPROM_ADR 0x50
include/configs/km/km83xx-common.h +3 -0
@@ -209,6 +209,9 @@#define CONFIG_SYS_I2C_SPEED 200000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_MAX_I2C_BUS 1 +#define CONFIG_I2C_MUX /* I2C SYSMON (LM75, AD7414 is almost compatible) */ #define CONFIG_DTT_LM75 /* ON Semi's LM75 */
include/configs/km/km_arm.h +20 -4
@@ -58,7 +58,6 @@#define CONFIG_CMD_NAND #define CONFIG_CMD_SF -#define CONFIG_SOFT_I2C /* I2C bit-banged */ /* SPI NOR Flash default params, used by sf commands */ #define CONFIG_SF_DEFAULT_SPEED 8100000
@@ -187,8 +186,23 @@/* * I2C related stuff */ +#undef CONFIG_I2C_MVTWSI +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ -#if defined(CONFIG_SOFT_I2C ) +#if defined(CONFIG_SYS_I2C_SOFT ) + +#define CONFIG_SYS_NUM_I2C_BUSES 6 +#define CONFIG_SYS_I2C_MAX_HOPS 1 +#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ + } +#ifndef __ASSEMBLY__#include <asm/arch-kirkwood/gpio.h> extern void __set_direction (unsigned pin,int high);
@@ -211,6 +225,8 @@ int get_scl(void);#define I2C_DELAY udelay(1)#define I2C_SOFT_DECLARATIONS +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x0 +#define CONFIG_SYS_I2C_SOFT_SPEED 100000#endif /* EEprom support 24C128, 24C256 valid for environment eeprom */
@@ -240,7 +256,7 @@ int get_scl(void);#define CONFIG_SYS_EEPROM_WREN #define CONFIG_ENV_OFFSET 0x0/* no bracets! */ #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) -#define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS "\0" +#define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS#define CONFIG_ENV_OFFSET_REDUND 0x2000/* no bracets! */ #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)#endif
@@ -293,7 +309,7 @@ int get_scl(void);CONFIG_KM_DEF_ENV \ CONFIG_KM_NEW_ENV \"arch=arm\0" \ -"EEprom_ivm=" KM_IVM_BUS "\0" \ + "EEprom_ivm=" __stringify(KM_IVM_BUS) "\0" \ ""#if defined(CONFIG_SYS_NO_FLASH )
include/configs/km82xx.h +12 -6
@@ -212,7 +212,7 @@#define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_KM_BOARD_EXTRA_ENV \ CONFIG_KM_DEF_ENV \ - "EEprom_ivm=pca9544a:70:4 \0" \ + "EEprom_ivm=1\0" \ "unlock=yes\0" \ "newenv=" \ "prot off 0xFE0C0000 +0x40000 && " \
@@ -242,10 +242,16 @@#endif /* CONFIG_ENV_IS_IN_FLASH */ /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 50000/* I2C speed */ -#define CONFIG_SYS_I2C_SLAVE 0x7F/* I2C slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_NUM_I2C_BUSES 3 +#define CONFIG_SYS_I2C_MAX_HOPS 1 +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SOFT_SPEED +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F +#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \ + {0, {{I2C_MUX_PCA9542, 0x70, 0} } }, \ + {0, {{I2C_MUX_PCA9542, 0x70, 1} } } }/* * Software (bit-bang) I2C driver configuration
@@ -282,7 +288,7 @@ int get_scl(void);#define CONFIG_SYS_DTT_MAX_TEMP 70#define CONFIG_SYS_DTT_LOW_TEMP -30#define CONFIG_SYS_DTT_HYSTERESIS 3 -#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) +#define CONFIG_SYS_DTT_BUS_NUM 2#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
include/configs/km_kirkwood.h +8 -8
@@ -42,18 +42,18 @@#define CONFIG_IDENT_STRING "\nKeymile Kirkwood"#define CONFIG_HOSTNAME km_kirkwood#define CONFIG_KM_DISABLE_PCIE -#define KM_IVM_BUS "pca9544a:70:9"/* I2C2 (Mux-Port 1)*/ +#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ /* KM_KIRKWOOD_PCI */ #elif defined(CONFIG_KM_KIRKWOOD_PCI )#define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI"#define CONFIG_HOSTNAME km_kirkwood_pci -#define KM_IVM_BUS "pca9544a:70:9"/* I2C2 (Mux-Port 1)*/ +#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_FPGA_CONFIG /* KM_NUSA */ #elif defined(CONFIG_KM_NUSA ) -#define KM_IVM_BUS "pca9547:70:9"/* I2C2 (Mux-Port 1)*/ +#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #define CONFIG_IDENT_STRING "\nKeymile NUSA"#define CONFIG_HOSTNAME kmnusa#undef CONFIG_SYS_KWD_CONFIG
@@ -69,7 +69,7 @@#elif defined(CONFIG_KM_MGCOGE3UN )#define CONFIG_IDENT_STRING "\nKeymile COGE3UN"#define CONFIG_HOSTNAME mgcoge3un -#define KM_IVM_BUS "pca9547:70:9"/* I2C2 (Mux-Port 1)*/ +#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #undef CONFIG_SYS_KWD_CONFIG#define CONFIG_SYS_KWD_CONFIG \ $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
@@ -81,7 +81,7 @@/* KMCOGE5UN */ #elif defined(CONFIG_KM_COGE5UN )#define CONFIG_IDENT_STRING "\nKeymile COGE5UN" -#define KM_IVM_BUS "pca9547:70:9"/* I2C2 (Mux-Port 1)*/ +#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #undef CONFIG_SYS_KWD_CONFIG#define CONFIG_SYS_KWD_CONFIG \ $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
@@ -95,12 +95,12 @@#elif defined(CONFIG_KM_PORTL2 )#define CONFIG_IDENT_STRING "\nKeymile Port-L2"#define CONFIG_HOSTNAME portl2 -#define KM_IVM_BUS "pca9544a:70:9"/* I2C2 (Mux-Port 1)*/ +#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_PIGGY4_88E6061 /* KM_SUV31 */ #elif defined(CONFIG_KM_SUV31 ) -#define KM_IVM_BUS "pca9547:70:9"/* I2C2 (Mux-Port 1)*/ +#define CONFIG_KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #define CONFIG_IDENT_STRING "\nKeymile SUV31"#define CONFIG_HOSTNAME kmsuv31#define CONFIG_KM_ENV_IS_IN_SPI_NOR
@@ -114,7 +114,7 @@#include "km/km_arm.h" #ifndef CONFIG_KM_ENV_IS_IN_SPI_NOR -#define KM_ENV_BUS "pca9544a:70:d"/* I2C2 (Mux-Port 5)*/ +#define KM_ENV_BUS 5/* I2C2 (Mux-Port 5)*/ #endif #if defined(CONFIG_KM_PIGGY4_88E6352 )
include/configs/korat.h +0 -1
@@ -156,7 +156,6 @@* I2C */ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/lwmon.h +4 -8
@@ -146,13 +146,10 @@#undef CONFIG_STATUS_LED/* Status LED disabled */ /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000/* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 93000/* 93 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -168,7 +165,6 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ #define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
include/configs/lwmon5.h +0 -1
@@ -299,7 +299,6 @@* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 100000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/mecp5123.h +0 -1
@@ -267,7 +267,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* so disable bit-banged I2C */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed */ #define CONFIG_SYS_I2C_SLAVE 0x7F/* slave address */
include/configs/mpc5121ads.h +0 -1
@@ -359,7 +359,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* so disable bit-banged I2C */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 100000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/nhk8815.h +5 -2
@@ -109,8 +109,11 @@#ifndef __ASSEMBLY__#include <asm/arch/gpio.h> #define CONFIG_CMD_I2C -#define CONFIG_SOFT_I2C -#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT 1/* I2C bit-banged */ +#define I2C_SOFT_DEFS +#define CONFIG_SYS_I2C_SOFT_SPEED 400000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F#define __SDA 63#define __SCL 62#define I2C_SDA (x) nmk_gpio_set(__SDA, x)
include/configs/otc570.h +8 -9
@@ -115,14 +115,13 @@/* RTC and I2C stuff */ #define CONFIG_RTC_DS1338 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#undef CONFIG_HARD_I2C -#define CONFIG_SOFT_I2C -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0x7F - -#ifdef CONFIG_SOFT_I2C -# define CONFIG_I2C_CMD_TREE -# define CONFIG_I2C_MULTI_BUS + +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#ifdef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C_SOFT_SPEED 100000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F +/* Configure data and clock pins for pio */ # define I2C_INIT { \ at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
@@ -140,7 +139,7 @@/* Set clock pin */ # define I2C_SCL (bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)# define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ +#endif /* CONFIG_SYS_I2C_SOFT */ /* * BOOTP options
include/configs/p1_p2_rdb_pc.h +0 -1
@@ -535,7 +535,6 @@/* I2C */ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_I2C_CMD_TREE #define CONFIG_SYS_I2C_SPEED 400000/* I2C spd and slave address */
include/configs/p3p440.h +0 -1
@@ -98,7 +98,6 @@* I2C *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 100000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/pcs440ep.h +0 -1
@@ -140,7 +140,6 @@* I2C *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 100000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/pdnb3.h +4 -6
@@ -281,12 +281,10 @@*/ /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 83000/* 83 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 83000/* 83 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
include/configs/quad100hd.h +0 -1
@@ -153,7 +153,6 @@* I2C *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/s5p_goni.h +4 -2
@@ -226,8 +226,10 @@#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get_nr(j4, 3)#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get_nr(j4, 0) -#define CONFIG_SOFT_I2C 1 -#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F#define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_MAX_I2C_BUS 7#define CONFIG_USB_GADGET
include/configs/s5pc210_universal.h +4 -2
@@ -250,9 +250,11 @@#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6) -#define CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0#define CONFIG_SOFT_I2C_READ_REPEATED_START -#define CONFIG_SYS_I2C_SPEED 50000#define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_MAX_I2C_BUS 7
include/configs/sacsng.h +4 -7
@@ -296,15 +296,13 @@* If the software driver is chosen, there are some additional * configuration items that the driver uses to drive the port pins. */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 400000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F/* * Software (bit-bang) I2C driver configuration */ -#ifdef CONFIG_SOFT_I2C #define I2C_PORT 3/* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000)#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
@@ -314,7 +312,6 @@#define I2C_SCL (bit) if(bit) iop->pdat |= 0x00020000; \ else iop->pdat &= ~0x00020000#define I2C_DELAY udelay(20)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ /* Define this to reserve an entire FLASH sector for * environment variables. Otherwise, the environment will be
include/configs/sbc405.h +0 -1
@@ -169,7 +169,6 @@#define CONFIG_SYS_RX_ETH_BUFFER 16/* use 16 rx buffer on 405 emac */ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/sbc8349.h +0 -1
@@ -305,7 +305,6 @@/* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/sbc8548.h +0 -1
@@ -445,7 +445,6 @@*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50#define CONFIG_SYS_I2C_SLAVE 0x7F
include/configs/sbc8641d.h +0 -1
@@ -290,7 +290,6 @@*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */
include/configs/sc3.h +0 -1
@@ -247,7 +247,6 @@*----------------------------------------------------------------------- */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define I2C_INIT
include/configs/snapper9260.h +4 -4
@@ -106,11 +106,11 @@#define CONFIG_SYS_PROMPT "Snapper> "/* I2C - Bit-bashed */ -#define CONFIG_SOFT_I2C -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 100000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F#define CONFIG_SOFT_I2C_READ_REPEATED_START -#define CONFIG_I2C_MULTI_BUS #define I2C_INIT do { \ at91_set_gpio_output(AT91_PIN_PA23, 1); \ at91_set_gpio_output(AT91_PIN_PA24, 1); \
include/configs/socrates.h +0 -1
@@ -236,7 +236,6 @@*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 102124/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#define CONFIG_SYS_I2C_OFFSET 0x3000
include/configs/spc1920.h +4 -8
@@ -207,13 +207,10 @@*/ #if defined(CONFIG_CMD_I2C )/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000/* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 93000/* 93 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -229,7 +226,6 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ #endif /*-----------------------------------------------------------------------
include/configs/stxgp3.h +0 -1
@@ -180,7 +180,6 @@*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#if 0
include/configs/stxssa.h +0 -1
@@ -199,7 +199,6 @@*/ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F#undef CONFIG_SYS_I2C_NOPROBES
include/configs/top9000.h +5 -4
@@ -201,11 +201,12 @@#define CONFIG_CMD_USB /* I2C support must always be enabled */ -#define CONFIG_SOFT_I2C #define CONFIG_CMD_I2C -#define CONFIG_SYS_I2C_SPEED 400000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 400000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F +#define I2C0_PORT AT91_PIO_PORTA#define SDA0_PIN 23#define SCL0_PIN 24
include/configs/trats.h +4 -2
@@ -269,10 +269,12 @@#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)#define CONFIG_SYS_CACHELINE_SIZE 32 -#define CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE#define CONFIG_SOFT_I2C_READ_REPEATED_START #define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_SYS_I2C_SPEED 50000#define CONFIG_I2C_MULTI_BUS #define CONFIG_SOFT_I2C_MULTI_BUS #define CONFIG_SYS_MAX_I2C_BUS 15
include/configs/u8500_href.h +0 -1
@@ -166,7 +166,6 @@*/ #define CONFIG_U8500_I2C #undef CONFIG_HARD_I2C/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_SYS_I2C_SLAVE 0/* slave addr of controller */
include/configs/uc100.h +4 -8
@@ -464,13 +464,10 @@*/ /* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1/* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000/* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 93000/* 93 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE/* * Software (bit-bang) I2C driver configuration */
@@ -486,7 +483,6 @@#define I2C_SCL (bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY udelay(2)/* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ /*----------------------------------------------------------------------- * I2C EEPROM (24C164)
include/configs/utx8245.h +1 -2
@@ -234,8 +234,7 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"*------------------------------------------------------------------*/ #if 1 #define CONFIG_HARD_I2C 1/* To enable I2C support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SPEED 400000#define CONFIG_SYS_I2C_SLAVE 0x7F#endif
include/configs/vct.h +5 -6
@@ -245,11 +245,10 @@/* * I2C/EEPROM */ -#undef CONFIG_HARD_I2C/* I2C with hardware support */ -#define CONFIG_SOFT_I2C /* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 83000/* 83 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0x7f +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED 83000/* 83 kHz is supposed to work */ +#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f/* * Software (bit-bang) I2C driver configuration
@@ -337,7 +336,7 @@ int vct_gpio_get(int pin);#undef CONFIG_CMD_USB#undef CONFIG_SMC911X -#undef CONFIG_SOFT_I2C +#undef CONFIG_SYS_I2C_SOFT#undef CONFIG_SOURCE#undef CONFIG_SYS_LONGHELP#undef CONFIG_TIMESTAMP
include/configs/vl_ma2sc.h +4 -2
@@ -147,10 +147,12 @@#define CONFIG_SYS_I2C_SLAVE 0/* not used */ #ifndef CONFIG_HARD_I2C -#define CONFIG_SOFT_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED +#define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE/* Software I2C driver configuration */ -#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SPEED)#define AT91_PIN_SDA (1<<4)/* AT91C_PIO_PB4 */
include/configs/vme8349.h +0 -1
@@ -239,7 +239,6 @@/* I2C */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_FSL_I2C #define CONFIG_I2C_CMD_TREE #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */
include/configs/zeus.h +0 -1
@@ -169,7 +169,6 @@* I2C *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1/* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F
include/i2c.h +9 -0
@@ -305,6 +305,15 @@ unsigned int i2c_get_bus_speed(void);* Adjusts I2C pointers after U-Boot is relocated to DRAM */ void i2c_reloc_fixup (void ); +#if defined(CONFIG_SYS_I2C_SOFT ) +void i2c_soft_init (void ); +void i2c_soft_active (void ); +void i2c_soft_tristate (void ); +int i2c_soft_read (void ); +void i2c_soft_sda (int bit); +void i2c_soft_scl (int bit); +void i2c_soft_delay (void ); +#endif #else /*
Signature · 1 line
1.7.11.7
PATCH v3 4/9 i2c, fsl_i2c: switch to new multibus/multiadapter support
In reply to Heiko Schocher- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
---
- changes for v2:
new in v2
- changes for v3:
- adapt to the new introduced U_BOOT_I2C_ADAP_COMPLETE define
- adapt README
--- README | 17 ++- arch/m68k/cpu/mcf5227x/cpu_init.c | 2 +- arch/m68k/cpu/mcf5227x/speed.c | 2 +- arch/m68k/cpu/mcf523x/cpu_init.c | 2 +- arch/m68k/cpu/mcf523x/speed.c | 2 +- arch/m68k/cpu/mcf52x2/cpu_init.c | 4 +- arch/m68k/cpu/mcf52x2/speed.c | 4 +- arch/m68k/cpu/mcf532x/cpu_init.c | 4 +- arch/m68k/cpu/mcf532x/speed.c | 2 +- arch/m68k/cpu/mcf5445x/speed.c | 2 +- arch/m68k/cpu/mcf547x_8x/cpu_init.c | 2 +- arch/m68k/cpu/mcf547x_8x/speed.c | 2 +- arch/m68k/include/asm/global_data.h | 2 +- board/esd/vme8349/vme8349.c | 6 +- board/freescale/m52277evb/README | 2 +- board/freescale/m53017evb/README | 2 +- board/freescale/m5373evb/README | 2 +- board/freescale/m54455evb/README | 2 +- board/freescale/m547xevb/README | 2 +- board/freescale/mpc8349itx/mpc8349itx.c | 3 +- board/freescale/mpc8349itx/pci.c | 2 +- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +- board/keymile/common/ivm.c | 16 -- board/keymile/km83xx/km83xx.c | 15 -- drivers/i2c/Makefile | 2 +- drivers/i2c/fsl_i2c.c | 220 +++++++++++----------------- include/configs/B4860QDS.h | 16 +- include/configs/BSC9131RDB.h | 11 +- include/configs/BSC9132QDS.h | 17 +-- include/configs/HWW1U1A.h | 18 +-- include/configs/M5208EVBE.h | 10 +- include/configs/M52277EVB.h | 10 +- include/configs/M5235EVB.h | 10 +- include/configs/M5253DEMO.h | 10 +- include/configs/M5271EVB.h | 10 +- include/configs/M5275EVB.h | 10 +- include/configs/M53017EVB.h | 10 +- include/configs/M5329EVB.h | 10 +- include/configs/M5373EVB.h | 10 +- include/configs/M54451EVB.h | 10 +- include/configs/M54455EVB.h | 10 +- include/configs/M5475EVB.h | 10 +- include/configs/M5485EVB.h | 10 +- include/configs/MERGERBOX.h | 15 +- include/configs/MPC8308RDB.h | 17 ++- include/configs/MPC8313ERDB.h | 17 ++- include/configs/MPC8315ERDB.h | 13 +- include/configs/MPC8323ERDB.h | 12 +- include/configs/MPC832XEMDS.h | 12 +- include/configs/MPC8349EMDS.h | 17 ++- include/configs/MPC8349ITX.h | 22 +-- include/configs/MPC8360EMDS.h | 13 +- include/configs/MPC8360ERDK.h | 17 ++- include/configs/MPC837XEMDS.h | 13 +- include/configs/MPC837XERDB.h | 13 +- include/configs/MPC8536DS.h | 17 ++- include/configs/MPC8540ADS.h | 12 +- include/configs/MPC8541CDS.h | 12 +- include/configs/MPC8544DS.h | 12 +- include/configs/MPC8548CDS.h | 12 +- include/configs/MPC8555CDS.h | 12 +- include/configs/MPC8560ADS.h | 12 +- include/configs/MPC8568MDS.h | 17 ++- include/configs/MPC8569MDS.h | 17 ++- include/configs/MPC8572DS.h | 17 ++- include/configs/MPC8610HPCD.h | 12 +- include/configs/MPC8641HPCN.h | 12 +- include/configs/MVBLM7.h | 16 +- include/configs/P1010RDB.h | 17 ++- include/configs/P1022DS.h | 16 +- include/configs/P1023RDS.h | 15 +- include/configs/P1_P2_RDB.h | 18 +-- include/configs/P2020COME.h | 16 +- include/configs/P2020DS.h | 17 ++- include/configs/P2041RDB.h | 16 +- include/configs/SIMPC8313.h | 17 ++- include/configs/TQM834x.h | 10 +- include/configs/astro_mcf5373l.h | 10 +- include/configs/corenet_ds.h | 16 +- include/configs/km/km83xx-common.h | 27 ++-- include/configs/mpc8308_p1m.h | 15 +- include/configs/mpq101.h | 16 +- include/configs/p1_p2_rdb_pc.h | 18 +-- include/configs/sbc8349.h | 17 ++- include/configs/sbc8548.h | 10 +- include/configs/sbc8641d.h | 12 +- include/configs/socrates.h | 16 +- include/configs/stxgp3.h | 11 +- include/configs/stxssa.h | 10 +- include/configs/t4qds.h | 17 ++- include/configs/vme8349.h | 19 ++- include/configs/xpedite517x.h | 15 +- include/configs/xpedite520x.h | 15 +- include/configs/xpedite537x.h | 16 +- include/configs/xpedite550x.h | 15 +-
95 Dateien ge?ndert, 622 Zeilen hinzugef?gt(+), 671 Zeilen entfernt(-)
README +12 -5
@@ -1908,6 +1908,18 @@ CBFS (Coreboot Filesystem) support CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4 for defining speed and slave address + - drivers/i2c/fsl_i2c.c: + - activate i2c driver with CONFIG_SYS_I2C_FSL + define CONFIG_SYS_FSL_I2C_OFFSET for setting the register + offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and + CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first + bus. + - If your board supports a second fsl i2c bus, define + CONFIG_SYS_FSL_I2C2_OFFSET for the register offset + CONFIG_SYS_FSL_I2C2_SPEED for the speed and + CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the + second bus. + additional defines: CONFIG_SYS_NUM_I2C_BUSES
@@ -2153,11 +2165,6 @@ CBFS (Coreboot Filesystem) support If not defined, then U-Boot uses predefined value for specified DTT device. - CONFIG_FSL_I2C - - Define this option if you want to use Freescale's I2C driver in - drivers/i2c/fsl_i2c.c. - CONFIG_I2C_MUX Define this option if you have I2C devices reached over 1 .. n
arch/m68k/cpu/mcf5227x/cpu_init.c +1 -1
@@ -105,7 +105,7 @@ void cpu_init_f(void)out_be32 (&fbcs->csmr5,CONFIG_SYS_CS5_MASK );#endif -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL out_8 (&gpio->par_i2c,GPIO_PAR_I2C_SCL_SCL |GPIO_PAR_I2C_SDA_SDA );#endif
arch/m68k/cpu/mcf5227x/speed.c +1 -1
@@ -134,7 +134,7 @@ int get_clocks(void) gd->bus_clk = gd->arch.flb_clk; } -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL gd->arch.i2c1_clk = gd->bus_clk;#endif
arch/m68k/cpu/mcf523x/cpu_init.c +1 -1
@@ -115,7 +115,7 @@ void cpu_init_f(void)out_be32 (&fbcs->csmr7,CONFIG_SYS_CS7_MASK );#endif -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL CONFIG_SYS_I2C_PINMUX_REG &=CONFIG_SYS_I2C_PINMUX_CLR ;CONFIG_SYS_I2C_PINMUX_REG |=CONFIG_SYS_I2C_PINMUX_SET ;#endif
arch/m68k/cpu/mcf523x/speed.c +1 -1
@@ -47,7 +47,7 @@ int get_clocks(void) gd->bus_clk =CONFIG_SYS_CLK ; gd->cpu_clk = (gd->bus_clk *2 ); -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL gd->arch.i2c1_clk = gd->bus_clk;#endif
arch/m68k/cpu/mcf52x2/cpu_init.c +2 -2
@@ -228,7 +228,7 @@ void cpu_init_f(void)/* FlexBus Chipselect */ init_fbcs (); -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL CONFIG_SYS_I2C_PINMUX_REG =CONFIG_SYS_I2C_PINMUX_REG &CONFIG_SYS_I2C_PINMUX_CLR ;CONFIG_SYS_I2C_PINMUX_REG |=CONFIG_SYS_I2C_PINMUX_SET ;
@@ -498,7 +498,7 @@ void cpu_init_f(void)init_fbcs ();#endif /* #ifndef CONFIG_MONITOR_IS_IN_RAM */ -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL CONFIG_SYS_I2C_PINMUX_REG &=CONFIG_SYS_I2C_PINMUX_CLR ;CONFIG_SYS_I2C_PINMUX_REG |=CONFIG_SYS_I2C_PINMUX_SET ;#endif
arch/m68k/cpu/mcf52x2/speed.c +2 -2
@@ -90,9 +90,9 @@ int get_clocks (void) gd->bus_clk = gd->cpu_clk;#endif -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL gd->arch.i2c1_clk = gd->bus_clk; -#ifdef CONFIG_SYS_I2C2_OFFSET +#ifdef CONFIG_SYS_I2C2_FSL_OFFSET gd->arch.i2c2_clk = gd->bus_clk;#endif #endif
arch/m68k/cpu/mcf532x/cpu_init.c +2 -2
@@ -98,7 +98,7 @@ void cpu_init_f(void)out_be32 (&fbcs->csmr5,CONFIG_SYS_CS5_MASK );#endif -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL out_8 (&gpio->par_feci2c,GPIO_PAR_FECI2C_SDA_SDA |GPIO_PAR_FECI2C_SCL_SCL );#endif
@@ -292,7 +292,7 @@ void cpu_init_f(void)out_be32 (&fbcs->csmr5,CONFIG_SYS_CS5_MASK );#endif -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL out_8 (&gpio->par_feci2c,GPIO_PAR_FECI2C_SCL_SCL |GPIO_PAR_FECI2C_SDA_SDA );#endif
arch/m68k/cpu/mcf532x/speed.c +1 -1
@@ -270,7 +270,7 @@ int get_clocks(void) gd->bus_clk =clock_pll (CONFIG_SYS_CLK /1000 ,0 ) *1000 ; gd->cpu_clk = (gd->bus_clk *3 ); -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL gd->arch.i2c1_clk = gd->bus_clk;#endif
arch/m68k/cpu/mcf5445x/speed.c +1 -1
@@ -273,7 +273,7 @@ void setup_5445x_clocks(void)#endif } -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL gd->arch.i2c1_clk = gd->bus_clk;#endif }
arch/m68k/cpu/mcf547x_8x/cpu_init.c +1 -1
@@ -95,7 +95,7 @@ void cpu_init_f(void)out_be32 (&fbcs->csmr5,CONFIG_SYS_CS5_MASK );#endif -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL out_be16 (&gpio->par_feci2cirq,GPIO_PAR_FECI2CIRQ_SCL |GPIO_PAR_FECI2CIRQ_SDA );#endif
arch/m68k/cpu/mcf547x_8x/speed.c +1 -1
@@ -40,7 +40,7 @@ int get_clocks(void) gd->bus_clk =CONFIG_SYS_CLK ; gd->cpu_clk = (gd->bus_clk *2 ); -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL gd->arch.i2c1_clk = gd->bus_clk;#endif
arch/m68k/include/asm/global_data.h +1 -1
@@ -26,7 +26,7 @@/* Architecture-specific global data */ struct arch_global_data { -#ifdef CONFIG_FSL_I2C +#ifdef CONFIG_SYS_I2C_FSL unsigned long i2c1_clk;unsigned long i2c2_clk;#endif
board/esd/vme8349/vme8349.c +3 -3
@@ -186,11 +186,11 @@ static spd_eeprom_t default_spd_eeprom = {int vme8349_read_spd (uchar chip,uint addr,int alen,uchar *buffer,int len) { -int old_bus =I2C_GET_BUS (); +int old_bus =i2c_get_bus_num ();unsigned int l, sum;int valid =0 ; -I2C_SET_BUS (0 ); +i2c_set_bus_num (0 );if (i2c_read (chip, addr, alen, buffer, len) ==0 )if (memcmp (&buffer[64 ], &default_spd_eeprom.mid[0 ],8 ) ==0 ) {
@@ -215,7 +215,7 @@ int vme8349_read_spd(uchar chip, uint addr, int alen, uchar *buffer, int len) buffer[63 ] = sum; } -I2C_SET_BUS (old_bus); +i2c_set_bus_num (old_bus);return 0 ; }
board/freescale/m52277evb/README +1 -1
@@ -82,7 +82,7 @@ CONFIG_CMD_DATE -- enable to use date feature in u-boot CONFIG_MCFTMR -- define to use DMA timer CONFIG_MCFPIT -- define to use PIT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed
board/freescale/m53017evb/README +1 -1
@@ -90,7 +90,7 @@ MCFFEC_TOUT_LOOP -- set FEC timeout loop CONFIG_MCFTMR -- define to use DMA timer CONFIG_MCFPIT -- define to use PIT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed
board/freescale/m5373evb/README +1 -1
@@ -89,7 +89,7 @@ MCFFEC_TOUT_LOOP -- set FEC timeout loop CONFIG_MCFTMR -- define to use DMA timer CONFIG_MCFPIT -- define to use PIT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed
board/freescale/m54455evb/README +1 -1
@@ -112,7 +112,7 @@ _IO_BASE -- define for IO base address CONFIG_MCFTMR -- define to use DMA timer CONFIG_MCFPIT -- define to use PIT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_FSL_I2C -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed
board/freescale/m547xevb/README +1 -1
@@ -97,7 +97,7 @@ CONFIG_DOS_PARTITION -- enable DOS read/write CONFIG_SLTTMR -- define to use SLT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed
board/freescale/mpc8349itx/mpc8349itx.c +1 -2
@@ -263,8 +263,7 @@ int misc_init_r(void) {int rc =0 ; -#ifdef CONFIG_HARD_I2C - +#if defined(CONFIG_SYS_I2C )unsigned int orig_bus =i2c_get_bus_num ();u8 i2c_data;
board/freescale/mpc8349itx/pci.c +1 -1
@@ -87,7 +87,7 @@ void pci_init_board(void)#endif u8 reg8; -#ifdef CONFIG_HARD_I2C +#if defined(CONFIG_SYS_I2C )i2c_set_bus_num (1 );/* Read the PCI_M66EN jumper setting */ if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0) ||
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +1 -1
@@ -231,7 +231,7 @@ int checkboard(void) in_8(&cpld_data->pcba_rev) & 0x0F);/* Initialize i2c early for rom_loc and flash bank information */ -i2c_init (CONFIG_SYS_I2C_SPEED ,CONFIG_SYS_I2C_SLAVE ); +i2c_set_bus_num (CONFIG_SYS_SPD_BUS_NUM ); if (i2c_read(CONFIG_SYS_I2C_PCA9557_ADDR, 0, 1, &in, 1) < 0 || i2c_read(CONFIG_SYS_I2C_PCA9557_ADDR, 1, 1, &out, 1) < 0 ||
board/keymile/common/ivm.c +0 -16
@@ -314,29 +314,13 @@ int ivm_analyze_eeprom(unsigned char *buf, int len)int ivm_read_eeprom (void ) { -#if defined(CONFIG_I2C_MUX ) -I2C_MUX_DEVICE *dev =NULL ; -#endif uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN ];char *buf;unsigned long dev_addr =CONFIG_SYS_IVM_EEPROM_ADR ;int ret; -#if defined(CONFIG_SYS_I2C ) buf =getenv ("EEprom_ivm" );i2c_set_bus_num (buf ? (int )simple_strtol (buf,NULL ,10 ) :0 ); -#else -#if defined(CONFIG_I2C_MUX ) -/* First init the Bus, select the Bus */ - buf = (unsigned char *)getenv ("EEprom_ivm" ); -if (buf !=NULL ) - dev =i2c_mux_ident_muxstring (buf); -if (dev ==NULL ) { -printf ("Error couldnt add Bus for IVM\n" ); -return -1 ; - } -i2c_set_bus_num (dev->busid); -#endif /* add deblocking here */ i2c_make_abort ();
board/keymile/km83xx/km83xx.c +0 -15
@@ -95,19 +95,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {0, 0, 0, 0, QE_IOP_TAB_END}, }; -static int board_init_i2c_busses (void ) -{ -I2C_MUX_DEVICE *dev =NULL ; -uchar *dtt_bus = (uchar *)"pca9547:70:a" ; - -/* Set up the Bus for the DTTs */ - dev =i2c_mux_ident_muxstring (dtt_bus); -if (dev ==NULL ) -printf ("Error couldn't add Bus for DTT\n" ); - -return 0 ; -} -#if defined(CONFIG_SUVD3 )const uint upma_table[] = { 0x1ffedc00, 0x0ffcdc80, 0x0ffcdc80, 0x0ffcdc04, /* Words 0 to 3 */
@@ -206,8 +193,6 @@ int board_early_init_r(void)int misc_init_r (void ) { -/* add board specific i2c busses */ -board_init_i2c_busses ();return 0 ; }
drivers/i2c/Makefile +1 -1
@@ -28,7 +28,6 @@ LIB := $(obj)libi2c.o COBJS-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o COBJS-$(CONFIG_DW_I2C) += designware_i2c.o -COBJS-$(CONFIG_FSL_I2C) += fsl_i2c.o COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o COBJS-$(CONFIG_I2C_MV) += mv_i2c.o COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
@@ -46,6 +45,7 @@ COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o COBJS-$(CONFIG_SH_I2C) += sh_i2c.o COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o COBJS-$(CONFIG_SYS_I2C) += i2c_core.o +COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o COBJS := $(COBJS-y)
drivers/i2c/fsl_i2c.c +86 -134
371 lines not on this page · raw message
include/configs/B4860QDS.h +8 -8
@@ -447,14 +447,14 @@ unsigned long get_board_ddr_clk(void);#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ /* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed in Hz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x118000 -#define CONFIG_SYS_I2C2_OFFSET 0x119000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ +#define CONFIG_SYS_FSL_I2C_SPEED 400000/* I2C speed in Hz */ +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_SPEED 400000/* I2C speed in Hz */ +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000/* * RTC configuration
include/configs/BSC9131RDB.h +5 -6
@@ -239,12 +239,11 @@ extern unsigned long get_sdram_size(void);#define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address*/ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000/* I2C EEPROM */ #define CONFIG_CMD_EEPROM
include/configs/BSC9132QDS.h +8 -9
@@ -402,15 +402,14 @@ combinations. this should be removed later#define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C/* I2C bit-banged */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400800/* I2C speed and slave address*/ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400800/* I2C speed and slave address*/ +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_SPEED 400800/* I2C speed and slave address*/ +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* I2C EEPROM */ #define CONFIG_ID_EEPROM
include/configs/HWW1U1A.h +9 -9
@@ -217,16 +217,16 @@/* -------------------------------------------------------------------- */ /* Generic FreeScale hardware I2C support */ -#define CONFIG_HARD_I2C -#define CONFIG_FSL_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }#define CONFIG_CMD_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 - -/* I2C bus configuration */ -#define CONFIG_SYS_I2C_SPEED 400000 -#define CONFIG_SYS_I2C_SLAVE 0x7F/* DDR2 SO-RDIMM SPD EEPROM is at I2C0-0x51 */ #define CONFIG_SYS_SPD_BUS_NUM 0
include/configs/M5208EVBE.h +5 -5
@@ -82,11 +82,11 @@#undef CONFIG_MCFPIT/* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR#define CONFIG_BOOTDELAY 1/* autoboot after 5 seconds */
include/configs/M52277EVB.h +5 -5
@@ -145,11 +145,11 @@#undef CONFIG_MCFPIT/* I2c */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 80000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR/* DSPI and Serial Flash */
include/configs/M5235EVB.h +5 -5
@@ -99,11 +99,11 @@#undef CONFIG_MCFPIT/* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x00000300 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_i2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR#define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi)#define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
include/configs/M5253DEMO.h +5 -5
@@ -114,11 +114,11 @@#define CONFIG_HOSTNAME M5253DEMO/* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x00000280 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000280#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR#define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C))#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF)
include/configs/M5271EVB.h +5 -5
@@ -109,11 +109,11 @@#endif /* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x00000300 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR#define CONFIG_BOOTDELAY 1/* autoboot after 1 seconds */
include/configs/M5275EVB.h +5 -5
@@ -109,11 +109,11 @@#endif /* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x00000300 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
include/configs/M53017EVB.h +5 -5
@@ -101,11 +101,11 @@#undef CONFIG_MCFPIT/* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR#define CONFIG_BOOTDELAY 1/* autoboot after 5 seconds */
include/configs/M5329EVB.h +5 -5
@@ -95,11 +95,11 @@#undef CONFIG_MCFPIT/* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR#define CONFIG_BOOTDELAY 1/* autoboot after 5 seconds */
include/configs/M5373EVB.h +5 -5
@@ -95,11 +95,11 @@#undef CONFIG_MCFPIT/* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR#define CONFIG_BOOTDELAY 1/* autoboot after 5 seconds */
include/configs/M54451EVB.h +5 -5
@@ -156,11 +156,11 @@#undef CONFIG_MCFPIT/* I2c */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 80000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR/* DSPI and Serial Flash */
include/configs/M54455EVB.h +5 -5
@@ -189,11 +189,11 @@#undef CONFIG_MCFPIT/* I2c */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 80000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSLI2C_OFFSET 0x58000#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR/* DSPI and Serial Flash */
include/configs/M5475EVB.h +5 -5
@@ -120,11 +120,11 @@#endif /* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x00008F00 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x00008F00#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR/* PCI */
include/configs/M5485EVB.h +5 -5
@@ -117,11 +117,11 @@#endif /* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x00008F00 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x00008F00#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR/* PCI */
include/configs/MERGERBOX.h +8 -7
@@ -223,13 +223,14 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 120000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* * General PCI
include/configs/MPC8308RDB.h +9 -8
@@ -350,14 +350,15 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} }/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} }/* * SPI on header J8
include/configs/MPC8313ERDB.h +9 -8
@@ -402,14 +402,15 @@#define CONFIG_SYS_HUSH_PARSER /* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* * General PCI
include/configs/MPC8315ERDB.h +6 -7
@@ -347,13 +347,12 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave addr */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x51}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} }/* * Board info - revision and where boot from
include/configs/MPC8323ERDB.h +6 -6
@@ -233,12 +233,12 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x51}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} }/* * Config on-board EEPROM
include/configs/MPC832XEMDS.h +6 -6
@@ -326,12 +326,12 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x51}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} }/* * Config on-board RTC
include/configs/MPC8349EMDS.h +9 -8
@@ -354,14 +354,15 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* SPI */ #define CONFIG_MPC8XXX_SPI
include/configs/MPC8349ITX.h +11 -11
@@ -90,7 +90,7 @@#define CONFIG_PCI #define CONFIG_RTC_DS1337 -#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C #define CONFIG_TSEC_ENET /* TSEC Ethernet support */ /*
@@ -98,12 +98,15 @@*/ /* I2C */ -#ifdef CONFIG_HARD_I2C +#ifdef CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100#define CONFIG_SYS_SPD_BUS_NUM 1/* The I2C bus for SPD */ #define CONFIG_SYS_RTC_BUS_NUM 1/* The I2C bus for RTC */
@@ -115,9 +118,6 @@#define CONFIG_SYS_I2C_RTC_ADDR 0x68/* I2C1, DS1339 RTC*/ #define SPD_EEPROM_ADDRESS 0x51/* I2C1, DDR */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -/* Don't probe these addresses: */ #define CONFIG_SYS_I2C_NOPROBES { {1, CONFIG_SYS_I2C_8574_ADDR1}, \ {1, CONFIG_SYS_I2C_8574_ADDR2}, \
@@ -197,7 +197,7 @@#define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)256 << 20) -#ifdef CONFIG_HARD_I2C +#ifdef CONFIG_SYS_I2C #define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/ #endif
@@ -542,7 +542,7 @@ boards, we say we have two, but don't display a message if we find only one. */#define CONFIG_CMD_PCI #endif -#ifdef CONFIG_HARD_I2C +#ifdef CONFIG_SYS_I2C #define CONFIG_CMD_I2C #endif
include/configs/MPC8360EMDS.h +6 -7
@@ -423,13 +423,12 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x52}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x52} }/* * Config on-board RTC
include/configs/MPC8360ERDK.h +9 -8
@@ -287,14 +287,15 @@#define CONFIG_OF_STDOUT_VIA_ALIAS /* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x52} }/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x52} }/* * General PCI
include/configs/MPC837XEMDS.h +6 -7
@@ -341,13 +341,12 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x51}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} }/* * Config on-board RTC
include/configs/MPC837XERDB.h +6 -7
@@ -367,13 +367,12 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x51}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} }/* * Config on-board RTC
include/configs/MPC8536DS.h +9 -8
@@ -433,14 +433,15 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {{0, 0x29}}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }/* * I2C2 EEPROM
include/configs/MPC8540ADS.h +6 -6
@@ -259,12 +259,12 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* RapidIO MMU */ #define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000/* base address */
include/configs/MPC8541CDS.h +6 -6
@@ -282,12 +282,12 @@ extern unsigned long get_clock_freq(void);/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* EEPROM */ #define CONFIG_ID_EEPROM
include/configs/MPC8544DS.h +6 -6
@@ -231,13 +231,13 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3100/* * General PCI
include/configs/MPC8548CDS.h +6 -6
@@ -357,12 +357,12 @@ extern unsigned long get_clock_freq(void);/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* EEPROM */ #define CONFIG_ID_EEPROM
include/configs/MPC8555CDS.h +6 -6
@@ -280,12 +280,12 @@ extern unsigned long get_clock_freq(void);/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* EEPROM */ #define CONFIG_ID_EEPROM
include/configs/MPC8560ADS.h +6 -6
@@ -253,12 +253,12 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* RapidIO MMU */ #define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000/* base address */
include/configs/MPC8568MDS.h +9 -8
@@ -265,15 +265,16 @@ extern unsigned long get_clock_freq(void);/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100/* * General PCI
include/configs/MPC8569MDS.h +9 -8
@@ -301,14 +301,15 @@ extern unsigned long get_clock_freq(void);/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* * I2C2 EEPROM
include/configs/MPC8572DS.h +9 -8
@@ -430,15 +430,16 @@#define CONFIG_FIT_VERBOSE 1/* enable fit_format_{error,warning}() */ /* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {{0,0x29}}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100/* * I2C2 EEPROM
include/configs/MPC8610HPCD.h +6 -6
@@ -251,12 +251,12 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* * General PCI
include/configs/MPC8641HPCN.h +6 -6
@@ -298,12 +298,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* * RapidIO MMU
include/configs/MVBLM7.h +8 -8
@@ -43,7 +43,6 @@#define CONFIG_PCI #define CONFIG_PCI_SKIP_HOST_BRIDGE -#define CONFIG_HARD_I2C #define CONFIG_TSEC_ENET #define CONFIG_MPC8XXX_SPI #define CONFIG_HARD_SPI
@@ -51,13 +50,14 @@#define CONFIG_MISC_INIT_R /* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 - -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 100000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 100000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* * DDR Setup
include/configs/P1010RDB.h +9 -8
@@ -475,14 +475,15 @@ extern unsigned long get_sdram_size(void);#define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address*/ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +/* I2C */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* I2C EEPROM */ #undef CONFIG_ID_EEPROM
include/configs/P1022DS.h +8 -8
@@ -257,15 +257,15 @@#define CONFIG_FIT_VERBOSE /* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000 -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100#define CONFIG_SYS_I2C_NOPROBES {{0, 0x29}} -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100/* * I2C2 EEPROM
include/configs/P1023RDS.h +8 -7
@@ -312,14 +312,15 @@ extern unsigned long get_clock_freq(void);#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ /* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100/* * I2C2 EEPROM
include/configs/P1_P2_RDB.h +9 -9
@@ -366,15 +366,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);#define CONFIG_FIT_VERBOSE 1/* enable fit_format_{error,warning}() */ /* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address*/ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {{0,0x29}}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }/* * I2C2 EEPROM
include/configs/P2020COME.h +8 -8
@@ -224,15 +224,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);#define CONFIG_FIT_VERBOSE 1/* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address*/ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100/* * I2C2 EEPROM
include/configs/P2020DS.h +9 -8
@@ -386,15 +386,16 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {{0,0x29}}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }/* * I2C2 EEPROM
include/configs/P2041RDB.h +8 -8
@@ -366,14 +366,14 @@ unsigned long get_board_sys_clk(unsigned long dummy);#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ /* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x118000 -#define CONFIG_SYS_I2C2_OFFSET 0x118100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* * RapidIO
include/configs/SIMPC8313.h +9 -8
@@ -244,14 +244,15 @@#define CONFIG_SYS_HUSH_PARSER /* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* * General PCI
include/configs/TQM834x.h +5 -5
@@ -187,11 +187,11 @@/* * I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed: 400KHz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F/* slave address */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000/* I2C EEPROM, configuration for onboard EEPROMs 24C256 and 24C32 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* 1010000x */
include/configs/astro_mcf5373l.h +5 -5
@@ -116,11 +116,11 @@#undef CONFIG_MCFPIT/* I2C */ -#define CONFIG_FSL_I2C -#define CONFIG_HARD_I2C /* I2C with hw support */ -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x58000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 80000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR/*
include/configs/corenet_ds.h +8 -8
@@ -360,14 +360,14 @@#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ /* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x118000 -#define CONFIG_SYS_I2C2_OFFSET 0x118100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100/* * RapidIO
include/configs/km/km83xx-common.h +17 -10
@@ -204,14 +204,21 @@#endif /* CFG_SYS_RAMBOOT */ /* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 200000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_MAX_I2C_BUS 1 -#define CONFIG_I2C_MUX +#define CONFIG_SYS_I2C +#define CONFIG_SYS_NUM_I2C_BUSES 4 +#define CONFIG_SYS_I2C_MAX_HOPS 1 +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 200000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 200000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ + {1, {I2C_NULL_HOP} } }/* I2C SYSMON (LM75, AD7414 is almost compatible) */ #define CONFIG_DTT_LM75 /* ON Semi's LM75 */
@@ -219,7 +226,7 @@#define CONFIG_SYS_DTT_MAX_TEMP 70#define CONFIG_SYS_DTT_LOW_TEMP -30#define CONFIG_SYS_DTT_HYSTERESIS 3 -#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) +#define CONFIG_SYS_DTT_BUS_NUM 1#if defined(CONFIG_CMD_NAND )#define CONFIG_NAND_KMETER1
@@ -315,7 +322,7 @@#define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_KM_DEF_ENV \ CONFIG_KM_DEF_ARCH \ - "EEprom_ivm=pca9547:70:9\0" \ + "EEprom_ivm=2\0" \ "newenv=" \ "prot off 0xF00C0000 +0x40000 && " \ "era 0xF00C0000 +0x40000\0" \
include/configs/mpc8308_p1m.h +8 -7
@@ -327,13 +327,14 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* * General PCI
include/configs/mpq101.h +9 -7
@@ -221,13 +221,15 @@/* * I2C buses and peripherals */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7f -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* I2C RTC - M41T81 */ #define CONFIG_RTC_M41T62
include/configs/p1_p2_rdb_pc.h +9 -9
@@ -533,16 +533,16 @@#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ /* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400000/* I2C spd and slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {{0, 0x29}}/* Don't probe this addr */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100#define CONFIG_SYS_SPD_BUS_NUM 1/* For rom_loc and flash bank */ /*
include/configs/sbc8349.h +9 -8
@@ -304,14 +304,15 @@#define CONFIG_OF_STDOUT_VIA_ALIAS 1/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C1_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C2_OFFSET +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69}, {1, 0x69} }/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */ /* TSEC */
include/configs/sbc8548.h +5 -5
@@ -443,12 +443,12 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000/* * General PCI
include/configs/sbc8641d.h +6 -6
@@ -288,12 +288,12 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69}/* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* * RapidIO MMU
include/configs/socrates.h +8 -8
@@ -234,14 +234,14 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 102124/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 - -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 102124 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 102124 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* I2C RTC */ #define CONFIG_RTC_RX8025 /* Use Epson rx8025 rtc via i2c */
include/configs/stxgp3.h +6 -5
@@ -178,17 +178,18 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#if 0 #define CONFIG_SYS_I2C_NOPROBES {0x00}/* Don't probe these addrs */ #else /* I did the 'if 0' so we could keep the syntax above if ever needed. */ #undef CONFIG_SYS_I2C_NOPROBES#endif -#define CONFIG_SYS_I2C_OFFSET 0x3000/* RapdIO Map configuration, mapped 1:1. */
include/configs/stxssa.h +5 -5
@@ -197,12 +197,12 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000#undef CONFIG_SYS_I2C_NOPROBES -#define CONFIG_SYS_I2C_OFFSET 0x3000/* I2C RTC */ #define CONFIG_RTC_DS1337 /* This is really a DS1339 RTC */
include/configs/t4qds.h +9 -8
@@ -433,14 +433,15 @@ unsigned long get_board_ddr_clk(void);#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ /* I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 100000/* I2C speed */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x118000 -#define CONFIG_SYS_I2C2_OFFSET 0x118100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 100000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 +#define CONFIG_SYS_FSL_I2C2_SPEED 100000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#define I2C_MUX_PCA_ADDR_PRI 0x77/* I2C bus multiplexer,primary */ #define I2C_MUX_PCA_ADDR_SEC 0x76/* I2C bus multiplexer,secondary */
include/configs/vme8349.h +9 -10
@@ -237,16 +237,15 @@#define CONFIG_OF_STDOUT_VIA_ALIAS /* I2C */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* Don't probe these addrs */ -#define CONFIG_SYS_I2C1_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C1_OFFSET +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */ #define CONFIG_SYS_I2C_8574_ADDR2 0x20/* I2C1, PCF8574 */
include/configs/xpedite517x.h +8 -7
@@ -257,13 +257,14 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 100000/* M41T00 only supports 100 KHz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 100000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 100000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* PEX8518 slave I2C interface */ #define CONFIG_SYS_I2C_PEX8518_ADDR 0x70
include/configs/xpedite520x.h +8 -7
@@ -219,13 +219,14 @@/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* I2C EEPROM */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
include/configs/xpedite537x.h +9 -7
@@ -257,13 +257,15 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }/* PEX8518 slave I2C interface */ #define CONFIG_SYS_I2C_PEX8518_ADDR 0x70
include/configs/xpedite550x.h +8 -7
@@ -248,13 +248,14 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);/* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 400000/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100/* I2C DS7505 temperature sensor */ #define CONFIG_DTT_LM75
Signature · 1 line
1.7.11.7
PATCH v3 5/9 i2c, multibus: get rid of CONFIG_I2C_MUX
In reply to Heiko SchocherCONFIG_I2C_MUX is replaced through the new i2c multibus/multiadapter framework, configured through CONFIG_SYS_I2C. As CONFIG_I2C_MUX is only used on the keymile boards, and they are now completely moved to the new framework, remove CONFIG_I2C_MUX.
---
- changes for v2:
new in v2
--- README | 47 --------- arch/powerpc/cpu/mpc8260/i2c.c | 14 --- common/cmd_i2c.c | 234 +---------------------------------------- common/env_eeprom.c | 32 +----- include/i2c.h | 21 ----
5 Dateien ge?ndert, 6 Zeilen hinzugef?gt(+), 342 Zeilen entfernt(-)
README +0 -47
@@ -2165,53 +2165,6 @@ CBFS (Coreboot Filesystem) support If not defined, then U-Boot uses predefined value for specified DTT device. - CONFIG_I2C_MUX - - Define this option if you have I2C devices reached over 1 .. n - I2C Muxes like the pca9544a. This option addes a new I2C - Command "i2c bus [muxtype:muxaddr:muxchannel]" which adds a - new I2C Bus to the existing I2C Busses. If you select the - new Bus with "i2c dev", u-bbot sends first the commandos for - the muxes to activate this new "bus". - - CONFIG_I2C_MULTI_BUS must be also defined, to use this - feature! - - Example: - Adding a new I2C Bus reached over 2 pca9544a muxes - The First mux with address 70 and channel 6 - The Second mux with address 71 and channel 4 - - => i2c bus pca9544a:70:6:pca9544a:71:4 - - Use the "i2c bus" command without parameter, to get a list - of I2C Busses with muxes: - - => i2c bus - Busses reached over muxes: - Bus ID: 2 - reached over Mux(es): - pca9544a at 70 ch: 4 - Bus ID: 3 - reached over Mux(es): - pca9544a at 70 ch: 6 - pca9544a at 71 ch: 4 - => - - If you now switch to the new I2C Bus 3 with "i2c dev 3" - u-boot first sends the command to the mux at 70 to enable - channel 6, and then the command to the mux at 71 to enable - the channel 4. - - After that, you can use the "normal" i2c commands as - usual to communicate with your I2C devices behind - the 2 muxes. - - This option is actually implemented for the bitbanging - algorithm in common/soft_i2c.c and for the Hardware I2C - Bus on the MPC8260. But it should be not so difficult - to add this option to other architectures. - CONFIG_SOFT_I2C_READ_REPEATED_START defining this will force the i2c_read() function in
arch/powerpc/cpu/mpc8260/i2c.c +0 -14
@@ -746,23 +746,9 @@ unsigned int i2c_get_bus_num(void)int i2c_set_bus_num (unsigned int bus) { -#if defined(CONFIG_I2C_MUX ) -if (bus <CONFIG_SYS_MAX_I2C_BUS ) { - i2c_bus_num = bus; - }else { -int ret; - - ret =i2x_mux_select_mux (bus); -if (ret ==0 ) - i2c_bus_num = bus; -else -return ret; - } -#else if (bus >=CONFIG_SYS_MAX_I2C_BUS )return -1 ; i2c_bus_num = bus; -#endif return 0 ; }
common/cmd_i2c.c +3 -231
261 lines not on this page · raw message
common/env_eeprom.c +3 -29
@@ -49,41 +49,17 @@ static int eeprom_bus_read(unsigned dev_addr, unsigned offset,#if defined(CONFIG_I2C_ENV_EEPROM_BUS )int old_bus =i2c_get_bus_num (); -#if defined(CONFIG_SYS_I2C )if (old_bus !=CONFIG_I2C_ENV_EEPROM_BUS )i2c_set_bus_num (CONFIG_I2C_ENV_EEPROM_BUS ); -#else -if (gd->flags &GD_FLG_RELOC ) { -if (env_eeprom_bus ==-1 ) { -I2C_MUX_DEVICE *dev =NULL ; - dev =i2c_mux_ident_muxstring ( - (uchar *)CONFIG_I2C_ENV_EEPROM_BUS ); -if (dev !=NULL ) - env_eeprom_bus = dev->busid; -else -printf ("error adding env eeprom bus.\n" ); - } -if (old_bus != env_eeprom_bus) { -i2c_set_bus_num (env_eeprom_bus); - old_bus = env_eeprom_bus; - } - }else { - rcode =i2c_mux_ident_muxstring_f ( - (uchar *)CONFIG_I2C_ENV_EEPROM_BUS ); - } -#endif #endif rcode =eeprom_read (dev_addr, offset, buffer, cnt);#if defined(CONFIG_I2C_ENV_EEPROM_BUS ) -#if defined(CONFIG_SYS_I2C ) -if (old_bus !=CONFIG_I2C_ENV_EEPROM_BUS ) -#elseif (old_bus != env_eeprom_bus) -#endif i2c_set_bus_num (old_bus);#endif +return rcode; }
@@ -94,14 +70,12 @@ static int eeprom_bus_write(unsigned dev_addr, unsigned offset,#if defined(CONFIG_I2C_ENV_EEPROM_BUS )int old_bus =i2c_get_bus_num (); -#if defined(CONFIG_SYS_I2C )if (old_bus !=CONFIG_I2C_ENV_EEPROM_BUS )i2c_set_bus_num (CONFIG_I2C_ENV_EEPROM_BUS ); -#else - rcode =i2c_mux_ident_muxstring_f ((uchar *)CONFIG_I2C_ENV_EEPROM_BUS ); -#endif #endif + rcode =eeprom_write (dev_addr, offset, buffer, cnt); +#if defined(CONFIG_I2C_ENV_EEPROM_BUS )i2c_set_bus_num (old_bus);#endif
include/i2c.h +0 -21
@@ -197,27 +197,6 @@ void i2c_init_board(void);void i2c_board_late_init (void );#endif -#if defined(CONFIG_I2C_MUX ) - -typedef struct _mux { -uchar chip; -uchar channel; -char *name; -struct _mux *next; -}I2C_MUX ; - -typedef struct _mux_device { -int busid; -I2C_MUX *mux;/* List of muxes, to reach the device */ -struct _mux_device *next; -}I2C_MUX_DEVICE ; - -I2C_MUX_DEVICE *i2c_mux_search_device (int id); -I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf); -int i2x_mux_select_mux (int bus); -int i2c_mux_ident_muxstring_f (uchar *buf); -#endif -#ifdef CONFIG_SYS_I2C /* * i2c_get_bus_num:
Signature · 1 line
1.7.11.7
PATCH v3 5/9 i2c, multibus: get rid of CONFIG_I2C_MUX
Quoted 11 lines · Heiko Schocher
CONFIG_I2C_MUXis replaced through the new i2c multibus/multiadapter framework, configured throughCONFIG_SYS_I2C. AsCONFIG_I2C_MUXis only used on the keymile boards, and they are now completely moved to the new framework, removeCONFIG_I2C_MUX.Signed-off-by Heiko Schocher <[email protected]>Cc Holger Brunck <[email protected]>---
- changes for v2:
new in v2
Tested on mgcoge (MPC8247) and km_kirkwood (Kirkwood), feel free to add my:
Regards
Holger
PATCH v3 5/9 i2c, multibus: get rid of CONFIG_I2C_MUX
Hello Holger,
Am 06.05.2013 14:23, schrieb Holger Brunck:
Quoted 9 lines · Heiko Schocher
Quoted 8 lines
CONFIG_I2C_MUXis replaced through the new i2c multibus/multiadapter framework, configured throughCONFIG_SYS_I2C. AsCONFIG_I2C_MUXis only used on the keymile boards, and they are now completely moved to the new framework, removeCONFIG_I2C_MUX.Signed-off-by Heiko Schocher <[email protected]>Cc Holger Brunck <[email protected]>
Quoted 7 lines
Quoted 3 lines
---
- changes for v2:
new in v2Tested on mgcoge (MPC8247) and
km_kirkwood(Kirkwood), feel free to add my:Tested-by Holger Brunck <[email protected]>
Thanks for testing!
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 6/9 i2c, multibus, keymile: get rid of EEprom_ivm envvariable
In reply to Heiko Schocheras the keymile boards use now the new i2c multibus/multiadapter framework, remove the EEprom_ivm Environmentvar, as not longer needed.
---
- changes for v2:
new in v2
--- board/keymile/common/ivm.c | 7 ++----- include/configs/km/km83xx-common.h | 3 ++- include/configs/km/km_arm.h | 1 - include/configs/km82xx.h | 3 ++- include/configs/km_kirkwood.h | 12 ++++++------
5 Dateien ge?ndert, 12 Zeilen hinzugef?gt(+), 14 Zeilen entfernt(-)
board/keymile/common/ivm.c +2 -5
@@ -315,16 +315,13 @@ int ivm_analyze_eeprom(unsigned char *buf, int len)int ivm_read_eeprom (void ) {uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN ]; -char *buf; -unsigned long dev_addr =CONFIG_SYS_IVM_EEPROM_ADR ;int ret; - buf =getenv ("EEprom_ivm" ); -i2c_set_bus_num (buf ? (int )simple_strtol (buf,NULL ,10 ) :0 ); +i2c_set_bus_num (CONFIG_KM_IVM_BUS );/* add deblocking here */ i2c_make_abort (); - ret =i2c_read (dev_addr,0 ,1 , i2c_buffer, + ret =i2c_read (CONFIG_SYS_IVM_EEPROM_ADR ,0 ,1 , i2c_buffer,CONFIG_SYS_IVM_EEPROM_MAX_LEN );if (ret !=0 ) {printf ("Error reading EEprom\n" );
include/configs/km/km83xx-common.h +2 -1
@@ -220,6 +220,8 @@ {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ {1, {I2C_NULL_HOP} } } +#define CONFIG_KM_IVM_BUS 2/* I2C2 (Mux-Port 1)*/ +/* I2C SYSMON (LM75, AD7414 is almost compatible) */ #define CONFIG_DTT_LM75 /* ON Semi's LM75 */ #define CONFIG_DTT_SENSORS {0, 1, 2, 3}/* Sensor addresses */
@@ -322,7 +324,6 @@#define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_KM_DEF_ENV \ CONFIG_KM_DEF_ARCH \ - "EEprom_ivm=2\0" \ "newenv=" \ "prot off 0xF00C0000 +0x40000 && " \ "era 0xF00C0000 +0x40000\0" \
include/configs/km/km_arm.h +0 -1
@@ -309,7 +309,6 @@ int get_scl(void);CONFIG_KM_DEF_ENV \ CONFIG_KM_NEW_ENV \"arch=arm\0" \ - "EEprom_ivm=" __stringify(KM_IVM_BUS) "\0" \ ""#if defined(CONFIG_SYS_NO_FLASH )
include/configs/km82xx.h +2 -1
@@ -212,7 +212,6 @@#define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_KM_BOARD_EXTRA_ENV \ CONFIG_KM_DEF_ENV \ - "EEprom_ivm=1\0" \ "unlock=yes\0" \ "newenv=" \ "prot off 0xFE0C0000 +0x40000 && " \
@@ -253,6 +252,8 @@ {0, {{I2C_MUX_PCA9542, 0x70, 0} } }, \ {0, {{I2C_MUX_PCA9542, 0x70, 1} } } } +#define CONFIG_KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ +/* * Software (bit-bang) I2C driver configuration */
include/configs/km_kirkwood.h +6 -6
@@ -42,18 +42,18 @@#define CONFIG_IDENT_STRING "\nKeymile Kirkwood"#define CONFIG_HOSTNAME km_kirkwood#define CONFIG_KM_DISABLE_PCIE -#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ +#define CONFIG_KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ /* KM_KIRKWOOD_PCI */ #elif defined(CONFIG_KM_KIRKWOOD_PCI )#define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI"#define CONFIG_HOSTNAME km_kirkwood_pci -#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ +#define CONFIG_KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_FPGA_CONFIG /* KM_NUSA */ #elif defined(CONFIG_KM_NUSA ) -#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ +#define CONFIG_KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #define CONFIG_IDENT_STRING "\nKeymile NUSA"#define CONFIG_HOSTNAME kmnusa#undef CONFIG_SYS_KWD_CONFIG
@@ -69,7 +69,7 @@#elif defined(CONFIG_KM_MGCOGE3UN )#define CONFIG_IDENT_STRING "\nKeymile COGE3UN"#define CONFIG_HOSTNAME mgcoge3un -#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ +#define CONFIG_KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #undef CONFIG_SYS_KWD_CONFIG#define CONFIG_SYS_KWD_CONFIG \ $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
@@ -81,7 +81,7 @@/* KMCOGE5UN */ #elif defined(CONFIG_KM_COGE5UN )#define CONFIG_IDENT_STRING "\nKeymile COGE5UN" -#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ +#define CONFIG_KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #undef CONFIG_SYS_KWD_CONFIG#define CONFIG_SYS_KWD_CONFIG \ $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
@@ -95,7 +95,7 @@#elif defined(CONFIG_KM_PORTL2 )#define CONFIG_IDENT_STRING "\nKeymile Port-L2"#define CONFIG_HOSTNAME portl2 -#define KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ +#define CONFIG_KM_IVM_BUS 1/* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_PIGGY4_88E6061 /* KM_SUV31 */
Signature · 1 line
1.7.11.7
PATCH v3 6/9 i2c, multibus, keymile: get rid of EEprom_ivm envvariable
Quoted 7 lines · Heiko Schocher
as the keymile boards use now the new i2c multibus/multiadapter framework, remove the
EEprom_ivmEnvironmentvar, as not longer needed.Signed-off-by Heiko Schocher <[email protected]>Cc Holger Brunck <[email protected]>
Tested on mgcoge (MPC8247) and km_kirkwood (Kirkwood), feel free to add my:
Regards
Holger
PATCH v3 6/9 i2c, multibus, keymile: get rid of EEprom_ivm envvariable
Hello Holger,
Am 06.05.2013 14:24, schrieb Holger Brunck:
Quoted 5 lines · Heiko Schocher
Quoted 4 lines
as the keymile boards use now the new i2c multibus/multiadapter framework, remove the
EEprom_ivmEnvironmentvar, as not longer needed.
Quoted 8 lines
Quoted 3 lines
Signed-off-by Heiko Schocher <[email protected]>Cc Holger Brunck <[email protected]>Tested on mgcoge (MPC8247) and
km_kirkwood(Kirkwood), feel free to add my:Tested-by Holger Brunck <[email protected]>
Thanks for testing!
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 7/9 tegra: i2c: Add function to know about current bus
In reply to Heiko SchocherFrom: Simon Glass <[email protected]>
Rather than using a variable in various places, add a single function, tegra_i2c_get_bus(), which returns a pointer to information about a bus.
This will make it easier to move to the new i2c framework.
---
- changes for v2:
new in v2
posted from Simon Glass here:
http://patchwork.ozlabs.org/patch/195569/
added to this patchserie, just rebased to current head
--- drivers/i2c/tegra_i2c.c | 78 ++++++++++++++++++++++++++++++++++++++-----------
1 Datei ge?ndert, 61 Zeilen hinzugef?gt(+), 17 Zeilen entfernt(-)
drivers/i2c/tegra_i2c.c +61 -17
@@ -284,7 +284,8 @@ exit:return error; } -static int tegra_i2c_write_data (u32 addr,u8 *data,u32 len) +static int tegra_i2c_write_data (struct i2c_bus *bus,u32 addr,u8 *data, +u32 len) {int error;struct i2c_trans_info trans_info;
@@ -295,14 +296,15 @@ static int tegra_i2c_write_data(u32 addr, u8 *data, u32 len) trans_info.num_bytes = len; trans_info.is_10bit_address =0 ; - error =send_recv_packets (&i2c_controllers[i2c_bus_num], &trans_info); + error =send_recv_packets (bus, &trans_info);if (error)debug ("tegra_i2c_write_data: Error (%d) !!!\n" , error);return error; } -static int tegra_i2c_read_data (u32 addr,u8 *data,u32 len) +static int tegra_i2c_read_data (struct i2c_bus *bus,u32 addr,u8 *data, +u32 len) {int error;struct i2c_trans_info trans_info;
@@ -313,7 +315,7 @@ static int tegra_i2c_read_data(u32 addr, u8 *data, u32 len) trans_info.num_bytes = len; trans_info.is_10bit_address =0 ; - error =send_recv_packets (&i2c_controllers[i2c_bus_num], &trans_info); + error =send_recv_packets (bus, &trans_info);if (error)debug ("tegra_i2c_read_data: Error (%d) !!!\n" , error);
@@ -324,18 +326,48 @@ static int tegra_i2c_read_data(u32 addr, u8 *data, u32 len)#error "Please enable device tree support to use this driver"#endif +/** +* Check that a bus number is valid and return a pointer to it +* +* @param bus_num Bus number to check / return +* @return pointer to bus, if valid, else NULL +*/ +static struct i2c_bus *tegra_i2c_get_bus (unsigned int bus_num) +{ +struct i2c_bus *bus; + +if (bus_num >=TEGRA_I2C_NUM_CONTROLLERS ) { +debug ("%s: Invalid bus number %u\n" , __func__, bus_num); +return NULL ; + } + bus = &i2c_controllers[bus_num]; +if (!bus->inited) { +debug ("%s: Bus %u not available\n" , __func__, bus_num); +return NULL ; + } + +return bus; +} +unsigned int i2c_get_bus_speed (void ) { -return i2c_controllers[i2c_bus_num].speed; +struct i2c_bus *bus; + + bus =tegra_i2c_get_bus (i2c_bus_num); +if (!bus) +return 0 ; +return bus->speed; }int i2c_set_bus_speed (unsigned int speed) { -struct i2c_bus *i2c_bus; +struct i2c_bus *bus; - i2c_bus = &i2c_controllers[i2c_bus_num]; - i2c_bus->speed = speed; -i2c_init_controller (i2c_bus); + bus =tegra_i2c_get_bus (i2c_bus_num); +if (!bus) +return 0 ; + bus->speed = speed; +i2c_init_controller (bus);return 0 ; }
@@ -458,7 +490,7 @@ void i2c_init(int speed, int slaveaddr) }/* i2c write version without the register address */ -int i2c_write_data (uchar chip,uchar *buffer,int len) +int i2c_write_data (struct i2c_bus *bus,uchar chip,uchar *buffer,int len) {int rc;
@@ -470,7 +502,7 @@ int i2c_write_data(uchar chip, uchar *buffer, int len)debug ("\n" );/* Shift 7-bit address over for lower-level i2c functions */ - rc =tegra_i2c_write_data (chip <<1 , buffer, len); + rc =tegra_i2c_write_data (bus, chip <<1 , buffer, len);if (rc)debug ("i2c_write_data(): rc=%d\n" , rc);
@@ -478,13 +510,13 @@ int i2c_write_data(uchar chip, uchar *buffer, int len) }/* i2c read version without the register address */ -int i2c_read_data (uchar chip,uchar *buffer,int len) +int i2c_read_data (struct i2c_bus *bus,uchar chip,uchar *buffer,int len) {int rc;debug ("inside i2c_read_data():\n" );/* Shift 7-bit address over for lower-level i2c functions */ - rc =tegra_i2c_read_data (chip <<1 , buffer, len); + rc =tegra_i2c_read_data (bus, chip <<1 , buffer, len);if (rc) {debug ("i2c_read_data(): rc=%d\n" , rc);return rc;
@@ -502,12 +534,16 @@ int i2c_read_data(uchar chip, uchar *buffer, int len)/* Probe to see if a chip is present. */ int i2c_probe (uchar chip) { +struct i2c_bus *bus;int rc;uchar reg;debug ("i2c_probe: addr=0x%x\n" , chip); + bus =tegra_i2c_get_bus (i2c_get_bus_num ()); +if (!bus) +return 1 ; reg =0 ; - rc =i2c_write_data (chip, ®,1 ); + rc =i2c_write_data (bus, chip, ®,1 );if (rc) {debug ("Error probing 0x%x.\n" , chip);return 1 ;
@@ -524,11 +560,15 @@ static int i2c_addr_ok(const uint addr, const int alen)/* Read bytes */ int i2c_read (uchar chip,uint addr,int alen,uchar *buffer,int len) { +struct i2c_bus *bus;uint offset;int i;debug ("i2c_read: chip=0x%x, addr=0x%x, len=0x%x\n" , chip, addr, len); + bus =tegra_i2c_get_bus (i2c_bus_num); +if (!bus) +return 1 ;if (!i2c_addr_ok (addr, alen)) {debug ("i2c_read: Bad address %x.%d.\n" , addr, alen);return 1 ;
@@ -540,13 +580,13 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) data[alen - i -1 ] = (addr + offset) >> (8 * i); } -if (i2c_write_data (chip, data, alen)) { +if (i2c_write_data (bus, chip, data, alen)) {debug ("i2c_read: error sending (0x%x)\n" , addr);return 1 ; } } -if (i2c_read_data (chip, buffer + offset,1 )) { +if (i2c_read_data (bus, chip, buffer + offset,1 )) {debug ("i2c_read: error reading (0x%x)\n" , addr);return 1 ; }
@@ -558,11 +598,15 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)/* Write bytes */ int i2c_write (uchar chip,uint addr,int alen,uchar *buffer,int len) { +struct i2c_bus *bus;uint offset;int i;debug ("i2c_write: chip=0x%x, addr=0x%x, len=0x%x\n" , chip, addr, len); + bus =tegra_i2c_get_bus (i2c_bus_num); +if (!bus) +return 1 ;if (!i2c_addr_ok (addr, alen)) {debug ("i2c_write: Bad address %x.%d.\n" , addr, alen);return 1 ;
@@ -572,7 +616,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)for (i =0 ; i < alen; i++) data[alen - i -1 ] = (addr + offset) >> (8 * i); data[alen] = buffer[offset]; -if (i2c_write_data (chip, data, alen +1 )) { +if (i2c_write_data (bus, chip, data, alen +1 )) {debug ("i2c_write: error sending (0x%x)\n" , addr);return 1 ; }
Signature · 1 line
1.7.11.7
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Heiko SchocherFrom: Simon Glass <[email protected]>
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra i2c driver to support this.
---
- changes for v2:
new in v2
posted from Simon Glass here:
http://patchwork.ozlabs.org/patch/195568/
added to this patchserie, changes:
- rebased to current head
- add "struct i2c_adapter *adap" to the i2c adapter functions.
- rework tegra_i2c_get_bus()
- add missing adapters in tegra_i2c_adap[]
- replace CONFIG_SYS_MAX_I2C_BUS through TEGRA_I2C_NUM_CONTROLLERS
- rename CONFIG_TEGRA_I2C to CONFIG_SYS_I2C_TEGRA
- changes for v3:
- adapt to the new introduced U_BOOT_I2C_ADAP_COMPLETE define
- add changes for dalmore and cardhu boards
- adapt README
- adapt commit message
- patch has 1 checkpatch warning:
WARNING: Avoid CamelCase: <get_OPB_freq>
#1274: FILE: drivers/i2c/ppc4xx_i2c.c:128:
+ divisor = (get_OPB_freq() - 1) / 10000000;
This should be fixed in a seperate step, as it affects a lot of boards...
--- README | 5 +++ drivers/i2c/Makefile | 2 +- drivers/i2c/tegra_i2c.c | 80 ++++++++++++++++++--------------------------- include/configs/beaver.h | 5 ++- include/configs/cardhu.h | 3 +- include/configs/dalmore.h | 3 +- include/configs/seaboard.h | 5 ++- include/configs/trimslice.h | 5 ++- include/configs/whistler.h | 5 ++-
9 Dateien ge?ndert, 50 Zeilen hinzugef?gt(+), 63 Zeilen entfernt(-)
README +5 -0
@@ -1920,6 +1920,11 @@ CBFS (Coreboot Filesystem) support CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the second bus. + - drivers/i2c/tegra_i2c.c: + - activate this driver with CONFIG_SYS_I2C_TEGRA + - This driver adds 4 i2c buses with a fix speed from + 100000 and the slave addr 0! + additional defines: CONFIG_SYS_NUM_I2C_BUSES
drivers/i2c/Makefile +1 -1
@@ -39,7 +39,6 @@ COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o -COBJS-$(CONFIG_TEGRA_I2C) += tegra_i2c.o COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o COBJS-$(CONFIG_SH_I2C) += sh_i2c.o
@@ -47,6 +46,7 @@ COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o COBJS-$(CONFIG_SYS_I2C) += i2c_core.o COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o +COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c)
drivers/i2c/tegra_i2c.c +32 -48
160 lines not on this page · raw message
include/configs/beaver.h +2 -3
@@ -41,12 +41,11 @@#define CONFIG_BOARD_EARLY_INIT_F /* I2C */ -#define CONFIG_TEGRA_I2C +#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C /* SD/MMC */ #define CONFIG_MMC
include/configs/cardhu.h +2 -1
@@ -40,12 +40,13 @@#define CONFIG_BOARD_EARLY_INIT_F /* I2C */ -#define CONFIG_TEGRA_I2C +#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_INIT_BOARD #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C /* SD/MMC */ #define CONFIG_MMC
include/configs/dalmore.h +2 -1
@@ -43,12 +43,13 @@#define CONFIG_BOARD_EARLY_INIT_F /* I2C */ -#define CONFIG_TEGRA_I2C +#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_INIT_BOARD #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C /* SD/MMC */ #define CONFIG_MMC
include/configs/seaboard.h +2 -3
@@ -57,12 +57,11 @@#define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */ /* I2C */ -#define CONFIG_TEGRA_I2C +#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_MAX_I2C_BUS 4#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C /* SD/MMC */ #define CONFIG_MMC
include/configs/trimslice.h +2 -3
@@ -54,12 +54,11 @@#define CONFIG_CMD_SF /* I2C */ -#define CONFIG_TEGRA_I2C +#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_MAX_I2C_BUS 4#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C /* SD/MMC */ #define CONFIG_MMC
include/configs/whistler.h +2 -3
@@ -46,12 +46,11 @@#define CONFIG_BOARD_EARLY_INIT_F /* I2C */ -#define CONFIG_TEGRA_I2C +#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_MAX_I2C_BUS 4#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C /* SD/MMC */ #define CONFIG_MMC
Signature · 1 line
1.7.11.7
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 11 lines · Heiko Schocher
From: Simon Glass <[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra i2c driver to support this.include/configs/beaver.h | 5 ++- include/configs/cardhu.h | 3 +- include/configs/dalmore.h | 3 +- include/configs/seaboard.h | 5 ++- include/configs/trimslice.h | 5 ++- include/configs/whistler.h | 5 ++-
There are a lot more Tegra boards than just those. Shouldn't they all be updated? You also didn't Cc the Tegra maintainer - I have done on this mail.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2Cframework
Hi,
Am Montag, 6. Mai 2013, 13:08:31 schrieb Stephen Warren:
Quoted 13 lines · Heiko Schocher
Quoted 11 lines
From: Simon Glass <[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra i2c driver to support this.include/configs/beaver.h | 5 ++- include/configs/cardhu.h | 3 +- include/configs/dalmore.h | 3 +- include/configs/seaboard.h | 5 ++- include/configs/trimslice.h | 5 ++- include/configs/whistler.h | 5 ++-
Quoted 2 lines
There are a lot more Tegra boards than just those. Shouldn't they all be updated? You also didn't Cc the Tegra maintainer - I have done on this mail.
not all boards use I2C up to now, to the patch seems to change only the boards which do. So this is ok for now. The question is if CONFIG_SYS_I2C could be moved to tegra_common or so because the device-tree disables I2C be default.
Marc
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2Cframework
Quoted 16 lines · Marc Dietrich
Hi,
Am Montag, 6. Mai 2013, 13:08:31 schrieb Stephen Warren:
Quoted 13 lines · Heiko Schocher
Quoted 11 lines
From: Simon Glass <[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra i2c driver to support this.include/configs/beaver.h | 5 ++- include/configs/cardhu.h | 3 +- include/configs/dalmore.h | 3 +- include/configs/seaboard.h | 5 ++- include/configs/trimslice.h | 5 ++- include/configs/whistler.h | 5 ++-
Quoted 6 lines
Quoted 2 lines
There are a lot more Tegra boards than just those. Shouldn't they all be updated? You also didn't Cc the Tegra maintainer - I have done on this mail.
not all boards use I2C up to now, to the patch seems to change only the boards which do. So this is ok for now. The question is if
CONFIG_SYS_I2Ccould be moved totegra_commonor so because the device-tree disables I2C be default.
Yes, we should do that for all the devices that are now instantiated/configured using device tree. But, we can do that as a separate patch series after this.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2Cframework
Hi,
Quoted 20 lines · Stephen Warren
Quoted 19 lines · Marc Dietrich
Hi,
Am Montag, 6. Mai 2013, 13:08:31 schrieb Stephen Warren:
Quoted 15 lines · Heiko Schocher
Quoted 11 lines
From: Simon Glass <[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra i2c driver to support this.include/configs/beaver.h | 5 ++- include/configs/cardhu.h | 3 +- include/configs/dalmore.h | 3 +- include/configs/seaboard.h | 5 ++- include/configs/trimslice.h | 5 ++- include/configs/whistler.h | 5 ++-There are a lot more Tegra boards than just those. Shouldn't they all be updated? You also didn't Cc the Tegra maintainer - I have done on this mail.
Quoted 7 lines
Quoted 3 lines
not all boards use I2C up to now, to the patch seems to change only the boards which do. So this is ok for now. The question is if
CONFIG_SYS_I2Ccould be moved totegra_commonor so because the device-tree disables I2C be default.Yes, we should do that for all the devices that are now instantiated/configured using device tree. But, we can do that as a separate patch series after this.
I don't have anything to add to this - I did the Tegra patch a long time ago when this was last posted, and it was tested on Seaboard at the time.
I'll make time to review and test the series at least on snow.
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2Cframework
In reply to Stephen WarrenHello Stephen,
Am 07.05.2013 16:55, schrieb Stephen Warren:
Quoted 20 lines · Marc Dietrich
Quoted 19 lines
Hi,
Am Montag, 6. Mai 2013, 13:08:31 schrieb Stephen Warren:
Quoted 15 lines · Heiko Schocher
Quoted 11 lines
From: Simon Glass <[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra i2c driver to support this.include/configs/beaver.h | 5 ++- include/configs/cardhu.h | 3 +- include/configs/dalmore.h | 3 +- include/configs/seaboard.h | 5 ++- include/configs/trimslice.h | 5 ++- include/configs/whistler.h | 5 ++-There are a lot more Tegra boards than just those. Shouldn't they all be updated? You also didn't Cc the Tegra maintainer - I have done on this mail.
Quoted 7 lines
Quoted 3 lines
not all boards use I2C up to now, to the patch seems to change only the boards which do. So this is ok for now. The question is if
CONFIG_SYS_I2Ccould be moved totegra_commonor so because the device-tree disables I2C be default.Yes, we should do that for all the devices that are now instantiated/configured using device tree. But, we can do that as a separate patch series after this.
Yes, that makes sense.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Stephen WarrenHello Stephen,
Am 06.05.2013 21:08, schrieb Stephen Warren:
Quoted 13 lines · Heiko Schocher
Quoted 11 lines
From: Simon Glass <[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra i2c driver to support this.include/configs/beaver.h | 5 ++- include/configs/cardhu.h | 3 +- include/configs/dalmore.h | 3 +- include/configs/seaboard.h | 5 ++- include/configs/trimslice.h | 5 ++- include/configs/whistler.h | 5 ++-
Quoted 2 lines
There are a lot more Tegra boards than just those. Shouldn't they all be updated? You also didn't Cc the Tegra maintainer - I have done on this mail.
I got no compiler warnings ... Hmm.. maybe Simon Glass can help here more (added to cc), as he did this patch ... Simon?
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
A message that is not in the archive (sent off-list or not yet received): [email protected]
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Tom,
Am 06.05.2013 21:39, schrieb Tom Warren:
Quoted 23 lines
Thanks, Stephen. Adding Yen, who wrote the original Tegra I2C driver.
Quoted 21 lines
-----Original Message-----
From: Stephen Warren [mailto:swarren at wwwdotorg.org]
Sent: Monday, May 06, 2013 12:09 PM
To: Heiko Schocher
Cc: u-boot at lists.denx.de; Tom Warren
Subject: Re: [U-Boot] [PATCH v3 8/9] tegra: i2c: Enable newCONFIG_SYS_I2CframeworkQuoted 11 lines · Heiko Schocher
From: Simon Glass <[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra i2c driver to support this.include/configs/beaver.h | 5 ++- include/configs/cardhu.h | 3 +- include/configs/dalmore.h | 3 +- include/configs/seaboard.h | 5 ++- include/configs/trimslice.h | 5 ++- include/configs/whistler.h | 5 ++-
Quoted 4 lines
Quoted 2 lines
There are a lot more Tegra boards than just those. Shouldn't they all be updated? You also didn't Cc the Tegra maintainer - I have done on this mail.
Heiko - please explain what the new
CONFIG_SYS_I2C_TEGRAswitch does, what it adds to/improves upon for the extant Tegra I2C driver, and what testing you did.
It just convert the existing i2c driver to the new i2c multibus/ multiadapter framework, see the description in the README for this new define. I add Simon Glass to this, as he did this patch for the tegra i2c driver. I did only compile tests ... IIRC Simon did some tests on real HW.
Quoted 1 line
The boards listed are the only ones w/CONFIG_TEGRA_I2C currently enabled, so I don't think any others need it, until such time as their maintainers need to add I2C support.
Yes, I think so too, as I get no compilerwarning/error when doing a "MAKEALL arm" ...
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Heiko SchocherQuoted 4 lines · Heiko Schocher
From: Simon Glass <[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra i2c driver to support this.
Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git bisect" points at this patch. Olof reported the issue to me.
Can you take a look at the code and see what might be wrong? Thanks.
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)
TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2
-----
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Some later commit causes the hang to happen right after printing "I2C:", without printing the "bad clock" message. I didn't investigate that, since I'm assuming the root-cause is the same. Most likely some later commit causes the uninitialized data to be a valid clock, yet not the actual I2C clock, so the I2C clock still isn't turned on, and touching HW (i.e. reading/writing the I2C registers) without a running clock on Tegra caused hard hangs.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 7 lines · Heiko Schocher
Quoted 4 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git
:-(
Could you enable debug printf?
Quoted 1 line
bisect" points at this patch. Olof reported the issue to me.
Thanks!
Quoted 1 line
Can you take a look at the code and see what might be wrong? Thanks.
Yep.
Quoted 7 lines
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)
Quoted 7 lines
TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
@Simon: Do you have an idea?
just found some wrong settings for tegra30:
In include/configs/tegra30-common.h:
/* Total I2C ports on Tegra30 */
#define TEGRA_I2C_NUM_CONTROLLERS 5
README says:
- drivers/i2c/tegra_i2c.c:
- activate this driver with CONFIG_SYS_I2C_TEGRA
- This driver adds 4 i2c buses with a fix speed from 100000 and the slave addr 0!
end yes, in the i2c driver are only 4 ports activated ... this should be changed ... but I think, this has nothing to do with your problem ... but try to add in the i2c driver one more i2c adapter for the case TEGRA_I2C_NUM_CONTROLLERS > 4
Quoted 7 lines
Some later commit causes the hang to happen right after printing "I2C:", without printing the "bad clock" message. I didn't investigate that, since I'm assuming the root-cause is the same. Most likely some later commit causes the uninitialized data to be a valid clock, yet not the actual I2C clock, so the I2C clock still isn't turned on, and touching HW (i.e. reading/writing the I2C registers) without a running clock on Tegra caused hard hangs.
digging deeper, the above "bad clock" message
is a result from calling this function from the i2c driver:./drivers/i2c/tegra_i2c.c:
static void i2c_init_controller(struct i2c_bus *i2c_bus)
{
/*
* Use PLLP - DP-04508-001_v06 datasheet indicates a divisor of 8
* here, in section 23.3.1, but in fact we seem to need a factor of
* 16 to get the right frequency.
*/
clock_start_periph_pll(i2c_bus->periph_id, CLOCK_ID_PERIPH,
i2c_bus->speed * 2 * 8);Please enable debug printfs and look from where i2c_init_controller() is called. You should see the following debug printf if it go the right way (Just reading code, I have no HW ...)
process_nodes():
debug("%s: controller bus %d at %p, periph_id %d, speed %d: ",
is_dvc ? "dvc" : "i2c", i, i2c_bus->regs,
i2c_bus->periph_id, i2c_bus->speed);called from i2c_init_board in this driver.
This should be called from drivers/i2c/i2c_core.c i2c_init_all() called from arch/arm/lib/board.c init_func_i2c()
I think i2c_bus->periph_id ("periph=-49") is not setup right ... do you have the correct dt?
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Heiko,
Quoted 106 lines · Heiko Schocher
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 10 lines · Heiko Schocher
Quoted 7 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra
i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git
:-(
Could you enable debug printf?
bisect" points at this patch. Olof reported the issue to me.
Quoted 1 line
Thanks!
Can you take a look at the code and see what might be wrong? Thanks.
Quoted 1 line
Yep.
I suspect some kind of initialization ordering issue, since the boot
Quoted 6 lines
messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)Quoted 8 lines
TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
@Simon: Do you have an idea?
just found some wrong settings for tegra30:
In
include/configs/tegra30-**common.h:
/* Total I2C ports on Tegra30 */
#defineTEGRA_I2C_NUM_CONTROLLERS5README says:
-drivers/i2c/tegra_i2c.c:- activate this driver with
CONFIG_SYS_I2C_TEGRA
- This driver adds 4 i2c buses with a fix speed from 100000 and the slave addr 0!end yes, in the i2c driver are only 4 ports activated ... this should be changed ... but I think, this has nothing to do with your problem ... but try to add in the i2c driver one more i2c adapter for the case
TEGRA_I2C_NUM_CONTROLLERS> 4Some later commit causes the hang to happen right after printing "I2C:",
Quoted 7 lines
without printing the "bad clock" message. I didn't investigate that, since I'm assuming the root-cause is the same. Most likely some later commit causes the uninitialized data to be a valid clock, yet not the actual I2C clock, so the I2C clock still isn't turned on, and touching HW (i.e. reading/writing the I2C registers) without a running clock on Tegra caused hard hangs.
digging deeper, the above "bad clock" message
is a result from calling this function from the i2c driver:
./drivers/i2c/tegra_i2c.c:
static voidi2c_init_controller(struct i2c_bus *i2c_bus){ /* * Use PLLP - DP-04508-001_v06 datasheet indicates a divisor of 8 * here, in section 23.3.1, but in fact we seem to need a factor of * 16 to get the right frequency. */ clock_start_periph_pll(i2c_**bus->periph_id, CLOCK_ID_PERIPH, i2c_bus->speed * 2 * 8);Please enable debug printfs and look from where
i2c_init_controller()is called. You should see the following debug printf if it go the right way (Just reading code, I have no HW ...)
process_nodes():
debug("%s: controller bus %d at %p,periph_id%d, speed
%d: ",is_dvc ? "dvc" : "i2c", i, i2c_bus->regs, i2c_bus->periph_id, i2c_bus->speed);
Quoted 7 lines
called from
i2c_init_boardin this driver.This should be called from
drivers/i2c/i2c_core.ci2c_init_all()called fromarch/arm/lib/board.cinit_func_i2c()I think
i2c_bus->periph_id("periph=-49") is not setup right ... do you have the correct dt?
I am not sure what is wrong here - Stephen if you have a board and can debug please do, otherwise I might be able to dig one out.
49 looks to be PERIPH_ID_TVO.
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Heiko SchocherQuoted 51 lines · Heiko Schocher
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 8 lines · Heiko Schocher
Quoted 5 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra
i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git
:-(
Could you enable debug printf?
Quoted 1 line
bisect" points at this patch. Olof reported the issue to me.
Thanks!
Quoted 1 line
Can you take a look at the code and see what might be wrong? Thanks.
Yep.
Quoted 7 lines
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)Quoted 8 lines
TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
@Simon: Do you have an idea?
just found some wrong settings for tegra30:
In
include/configs/tegra30-common.h:
/* Total I2C ports on Tegra30 */
#defineTEGRA_I2C_NUM_CONTROLLERS5
Quoted 5 lines
README says:
-drivers/i2c/tegra_i2c.c:
- activate this driver withCONFIG_SYS_I2C_TEGRA
- This driver adds 4 i2c buses with a fix speed from 100000 and the slave addr 0!
I think that's just stale documentation; Tegra20 had just 4 I2C controllers, and the docs probably weren't updated for Tegra30 which has 5.
Quoted 1 line
end yes, in the i2c driver are only 4 ports activated ... this
I don't see any limit in the driver; everything seems to use TEGRA_I2C_NUM_CONTROLLERS.
Quoted 3 lines
should be changed ... but I think, this has nothing to do with your problem ... but try to add in the i2c driver one more i2c adapter for the case
TEGRA_I2C_NUM_CONTROLLERS> 4
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Stephen
Am 30.07.2013 20:56, schrieb Stephen Warren:
Quoted 58 lines · Heiko Schocher
Quoted 51 lines
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 8 lines · Heiko Schocher
Quoted 5 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra
i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git
:-(
Could you enable debug printf?
Quoted 1 line
bisect" points at this patch. Olof reported the issue to me.
Thanks!
Quoted 1 line
Can you take a look at the code and see what might be wrong? Thanks.
Yep.
Quoted 7 lines
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)Quoted 8 lines
TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
@Simon: Do you have an idea?
just found some wrong settings for tegra30:
In
include/configs/tegra30-common.h:
/* Total I2C ports on Tegra30 */
#defineTEGRA_I2C_NUM_CONTROLLERS5Quoted 5 lines
README says:
-drivers/i2c/tegra_i2c.c:
- activate this driver withCONFIG_SYS_I2C_TEGRA
- This driver adds 4 i2c buses with a fix speed from 100000 and the slave addr 0!
Quoted 11 lines
I think that's just stale documentation; Tegra20 had just 4 I2C controllers, and the docs probably weren't updated for Tegra30 which has 5.
Quoted 1 line
end yes, in the i2c driver are only 4 ports activated ... this
I don't see any limit in the driver; everything seems to use
TEGRA_I2C_NUM_CONTROLLERS.Quoted 3 lines
should be changed ... but I think, this has nothing to do with your problem ... but try to add in the i2c driver one more i2c adapter for the case
TEGRA_I2C_NUM_CONTROLLERS> 4
As I wrote here, add (at the end of the file):
#if TEGRA_I2C_NUM_CONTROLLERS > 4 U_BOOT_I2C_ADAP_COMPLETE(tegra4, tegra_i2c_init, tegra_i2c_probe,
tegra_i2c_read, tegra_i2c_write,
tegra_i2c_set_bus_speed, 100000, 0, 4)#endif
bye,
Heiko
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Heiko SchocherQuoted 26 lines · Heiko Schocher
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 23 lines · Heiko Schocher
Quoted 5 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra
i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git bisect" points at this patch. Olof reported the issue to me. Can you take a look at the code and see what might be wrong? Thanks.
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
Quoted 6 lines
Quoted 3 lines
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
Yes, there's some initialization order issue; before this patch, I see the I2C controller initialization, followed by some usage of it:
----------
U-Boot SPL 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47) U-Boot 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47)
TEGRA30
Board: NVIDIA Beaver DRAM: 2 GiB i2c: controller bus 0 at 7000d000, periph_id 47, speed 100000: ok i2c: controller bus 1 at 7000c000, periph_id 12, speed 100000: ok i2c: controller bus 2 at 7000c400, periph_id 54, speed 100000: ok i2c: controller bus 3 at 7000c500, periph_id 67, speed 100000: ok i2c: controller bus 4 at 7000c700, periph_id 103, speed 100000: ok MMC: i2c_write: chip=0x2d, addr=0x32, len=0x1
----------
However with this patch applied, something starts using the controller immediately, without it having been "probed" from device-tree:
----------
U-Boot SPL 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28) U-Boot 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28)
TEGRA30
Board: NVIDIA Beaver I2C: i2c_init(speed=100000, slaveaddr=0xfe)
----------
i2c_init touches HW, but since process_nodes() hasn't run, none of the parameters like register address or clock ID are yet known.
I think this call comes from init_sequence_f[] -> init_func_i2c() -> i2c_init() -> i2c_init() == __i2c_init() -> i2c_init_bus() -> I2C_ADAP->init(), although I didn't validate that in the running code, just by code inspection.
The issue here is that the I2C core and/or Tegra driver seems to be statically registering the I2C device objects, even though they should be dynamically registered from device tree.
Should Tegra move its call of i2c_init_board() out of board_init() to board_init_f(), and/or override __i2c_init() to call i2c_init_board()?
I think when init_sequence_f[] is running, there may be no serial console to report errors. If so, moving the I2C initialization to that early point sounds like a really bad idea.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 64 lines · Stephen Warren
Quoted 26 lines · Heiko Schocher
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 23 lines · Heiko Schocher
Quoted 5 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra
i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git bisect" points at this patch. Olof reported the issue to me. Can you take a look at the code and see what might be wrong? Thanks.
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
Quoted 6 lines
Quoted 3 lines
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
Yes, there's some initialization order issue; before this patch, I see the I2C controller initialization, followed by some usage of it:
----------
U-Boot SPL 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47) U-Boot 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47)TEGRA30
Board: NVIDIA Beaver DRAM: 2 GiB i2c: controller bus 0 at 7000d000, periph_id 47, speed 100000: ok i2c: controller bus 1 at 7000c000, periph_id 12, speed 100000: ok i2c: controller bus 2 at 7000c400, periph_id 54, speed 100000: ok i2c: controller bus 3 at 7000c500, periph_id 67, speed 100000: ok i2c: controller bus 4 at 7000c700, periph_id 103, speed 100000: ok MMC: i2c_write: chip=0x2d, addr=0x32, len=0x1----------
However with this patch applied, something starts using the controller immediately, without it having been "probed" from device-tree:
----------
U-Boot SPL 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28) U-Boot 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28)TEGRA30
Board: NVIDIA Beaver I2C: i2c_init(speed=100000, slaveaddr=0xfe)----------
Quoted 7 lines
i2c_inittouches HW, but sinceprocess_nodes()hasn't run, none of the parameters like register address or clock ID are yet known.I think this call comes from init_sequence_f[] ->
init_func_i2c()->i2c_init()->i2c_init()==__i2c_init()->i2c_init_bus()->I2C_ADAP->init(), although I didn't validate that in the running code, just by code inspection.
Oh, with the options Tegra has enabled, perhaps the call sequence is:
board_init_f() (which uses init_sequence_f[]) -> init_func_i2c() -> i2c_init_all(), which then calls:
* i2c_init_board(), which is supposed to parse DT
* i2c_set_bus_num(), which will call I2C_ADAP->init
However, according to the comments near the top of arch/arm/lib/crt0.S, board_init_f() is called in an environment where variable data (.data, .bss) is not available, hence i2c_init_board() cannot possibly operate correctly since its whole purpose is to fill in variable data structures from DT.
I think the only way to solve this is not to use DT to instantiate devices, or to move the I2C initialization after relocation etc., although the latter won't work on boards that need I2C up in order to initialize DRAM.
It seems like much of U-Boot's initialization architecture simply wasn't designed to accommodate dynamically initializing devices from DT.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Stephen,
Quoted 78 lines · Stephen Warren
Quoted 64 lines · Stephen Warren
Quoted 26 lines · Heiko Schocher
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 23 lines · Heiko Schocher
Quoted 5 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra
i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git bisect" points at this patch. Olof reported the issue to me. Can you take a look at the code and see what might be wrong? Thanks.
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
Quoted 6 lines
Quoted 3 lines
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
Yes, there's some initialization order issue; before this patch, I see the I2C controller initialization, followed by some usage of it:
----------
U-Boot SPL 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47) U-Boot 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47)TEGRA30
Board: NVIDIA Beaver DRAM: 2 GiB i2c: controller bus 0 at 7000d000, periph_id 47, speed 100000: ok i2c: controller bus 1 at 7000c000, periph_id 12, speed 100000: ok i2c: controller bus 2 at 7000c400, periph_id 54, speed 100000: ok i2c: controller bus 3 at 7000c500, periph_id 67, speed 100000: ok i2c: controller bus 4 at 7000c700, periph_id 103, speed 100000: ok MMC: i2c_write: chip=0x2d, addr=0x32, len=0x1----------
However with this patch applied, something starts using the controller immediately, without it having been "probed" from device-tree:
----------
U-Boot SPL 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28) U-Boot 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28)TEGRA30
Board: NVIDIA Beaver I2C: i2c_init(speed=100000, slaveaddr=0xfe)----------
Quoted 7 lines
i2c_inittouches HW, but sinceprocess_nodes()hasn't run, none of the parameters like register address or clock ID are yet known.I think this call comes from init_sequence_f[] ->
init_func_i2c()->i2c_init()->i2c_init()==__i2c_init()->i2c_init_bus()->I2C_ADAP->init(), although I didn't validate that in the running code, just by code inspection.Oh, with the options Tegra has enabled, perhaps the call sequence is:
board_init_f()(which uses init_sequence_f[]) ->init_func_i2c()->i2c_init_all(), which then calls:
Quoted 9 lines
*
i2c_init_board(), which is supposed to parse DT
*i2c_set_bus_num(), which will callI2C_ADAP->initHowever, according to the comments near the top of
arch/arm/lib/crt0.S,board_init_f()is called in an environment where variable data (.data, .bss) is not available, hencei2c_init_board()cannot possibly operate correctly since its whole purpose is to fill in variable data structures from DT.
I suppose you could mark i2c_controllers so that it is in the data section with __attribute__((section(".data"))). That's what eynos does, for example. It is valid since SPL or BCT has set up the SDRAM.
Quoted 9 lines
I think the only way to solve this is not to use DT to instantiate devices, or to move the I2C initialization after relocation etc., although the latter won't work on boards that need I2C up in order to initialize DRAM.
It seems like much of U-Boot's initialization architecture simply wasn't designed to accommodate dynamically initializing devices from DT.
True, although remember that very little init happens before relocation. Here, I2C has moved to pre-reloc. But the vast majority of it happens after reloc, so the actual impact of this problem is small, and there is a workaround (above).
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 2 lines · Simon Glass
On Tue, Jul 30, 2013 at 2:00 PM, Stephen Warren <[email protected] <mailto:[email protected]>> wrote:
...
Quoted 15 lines
Oh, with the options Tegra has enabled, perhaps the call sequence is:
board_init_f()(which uses init_sequence_f[]) ->init_func_i2c()->i2c_init_all(), which then calls:*
i2c_init_board(), which is supposed to parse DT
*i2c_set_bus_num(), which will callI2C_ADAP->initHowever, according to the comments near the top of
arch/arm/lib/crt0.S,board_init_f()is called in an environment where variable data (.data, .bss) is not available, hencei2c_init_board()cannot possibly operate correctly since its whole purpose is to fill in variable data structures from DT.
Quoted 3 lines
I suppose you could mark
i2c_controllersso that it is in the data section with __attribute__((section(".data"))). That's what eynos does, for example. It is valid since SPL or BCT has set up the SDRAM.
Neither .data nor .bss is available. Only .rodata and .text are.
In practice, perhaps we can assume that it will work on Tegra because we know the DRAM is already set up, but then that makes Tegra work in some strange special-case way, and completely violates the constraints described in crt0.S. We should be striving to unify how all the different chips work, rather than adding yet more strange special-cases to the initialization sequence to hack around systemic problems.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 20 lines · Stephen Warren
Quoted 2 lines · Simon Glass
On Tue, Jul 30, 2013 at 2:00 PM, Stephen Warren <[email protected] <mailto:[email protected]>> wrote:
...
Quoted 9 lines
Oh, with the options Tegra has enabled, perhaps the call sequence is:
board_init_f()(which uses init_sequence_f[]) ->init_func_i2c()->i2c_init_all(), which then calls:*
i2c_init_board(), which is supposed to parse DT
*i2c_set_bus_num(), which will callI2C_ADAP->initHowever, according to the comments near the top of
arch/arm/lib/crt0.S,Quoted 1 line
board_init_f()is called in an environment where variable data(.data,
Quoted 1 line
.bss) is not available, hence
i2c_init_board()cannot possiblyoperate
Quoted 1 line
correctly since its whole purpose is to fill in variable data
structures
Quoted 9 lines
Quoted 6 lines
from DT.
I suppose you could mark
i2c_controllersso that it is in the data section with __attribute__((section(".data"))). That's what eynos does, for example. It is valid since SPL or BCT has set up the SDRAM.Neither .data nor .bss is available. Only .rodata and .text are.
.data is available, honest. We rely on it. During relocation it gets copied.
Quoted 8 lines
In practice, perhaps we can assume that it will work on Tegra because we know the DRAM is already set up, but then that makes Tegra work in some strange special-case way, and completely violates the constraints described in
crt0.S. We should be striving to unify how all the different chips work, rather than adding yet more strange special-cases to the initialization sequence to hack around systemic problems.
Sure, this is up to you. I was just suggesting something that works and requires little effort. It isn't pure, agreed.
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 34 lines · Simon Glass
On Tue, Jul 30, 2013 at 3:32 PM, Stephen Warren <[email protected] <mailto:[email protected]>> wrote:
On 07/30/2013 03:21 PM, Simon Glass wrote:
> On Tue, Jul 30, 2013 at 2:00 PM, Stephen Warren
<swarren at wwwdotorg.org <mailto:[email protected]>
> <mailto:swarren at wwwdotorg.org <mailto:[email protected]>>> wrote:
...
> Oh, with the options Tegra has enabled, perhaps the call
sequence is:
>
>board_init_f()(which uses init_sequence_f[]) ->
init_func_i2c()->
>i2c_init_all(), which then calls:
>
> *i2c_init_board(), which is supposed to parse DT
> *i2c_set_bus_num(), which will callI2C_ADAP->init
>
> However, according to the comments near the top of
arch/arm/lib/crt0.S,
>board_init_f()is called in an environment where variable data
(.data,
> .bss) is not available, hencei2c_init_board()cannot possibly
operate
> correctly since its whole purpose is to fill in variable data
structures
> from DT.
>
>
> I suppose you could marki2c_controllersso that it is in the data > section with __attribute__((section(".data"))). That's what eynos does,
> for example. It is valid since SPL or BCT has set up the SDRAM.
Quoted 4 lines
Neither .data nor .bss is available. Only .rodata and .text are.
.data is available, honest. We rely on it. During relocation it gets copied.
It gets copied so that it ends up in RAM. It is assumed that before relocation, all .text/.rodata/.data is in ROM and can't be modified, and .bss in inaccessible. Technically that means we could read .data before relocation, but certainly not write to it.
Now in practice yes, it does work to write to .data before relocation on platforms where the U-Boot binary isn't actually in flash, but is already in ROM. However as I mention, code cannot rely on that.
If any of this isn't true, then the documentation in crt0.S is wrong. I'm CC'ing Albert to see if that's the case.
Quoted 10 lines
In practice, perhaps we can assume that it will work on Tegra because we know the DRAM is already set up, but then that makes Tegra work in some strange special-case way, and completely violates the constraints described in
crt0.S. We should be striving to unify how all the different chips work, rather than adding yet more strange special-cases to the initialization sequence to hack around systemic problems.Sure, this is up to you. I was just suggesting something that works and requires little effort. It isn't pure, agreed.
The simplest approach is probably to revert the patch in question, since it clearly violates how U-Boot is supposed to work.
It's not really up to me; I think someone like Albert should make the decision since he controls the ARM U-Boot architecture, or Tom as Tegra maintainer, or perhaps you as your patch broke the code.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Stephen,
Quoted 47 lines · Stephen Warren
Quoted 7 lines · Simon Glass
On Tue, Jul 30, 2013 at 3:32 PM, Stephen Warren <[email protected] <mailto:[email protected]>> wrote:
On 07/30/2013 03:21 PM, Simon Glass wrote:
> On Tue, Jul 30, 2013 at 2:00 PM, Stephen Warren <swarren at wwwdotorg.org <mailto:[email protected]> > <mailto:swarren at wwwdotorg.org <mailto:[email protected]>>>Quoted 27 lines · wrote:
...
> Oh, with the options Tegra has enabled, perhaps the call
sequence is:
>
>board_init_f()(which uses init_sequence_f[]) ->
init_func_i2c()->
>i2c_init_all(), which then calls:
>
> *i2c_init_board(), which is supposed to parse DT
> *i2c_set_bus_num(), which will callI2C_ADAP->init
>
> However, according to the comments near the top of
arch/arm/lib/crt0.S,
>board_init_f()is called in an environment where variable data
(.data,
> .bss) is not available, hencei2c_init_board()cannot possibly
operate
> correctly since its whole purpose is to fill in variable data
structures
> from DT.
>
>
> I suppose you could marki2c_controllersso that it is in the data > section with __attribute__((section(".data"))). That's what eynos does,
> for example. It is valid since SPL or BCT has set up the SDRAM.Quoted 4 lines
Neither .data nor .bss is available. Only .rodata and .text are.
.data is available, honest. We rely on it. During relocation it gets
copied.
It gets copied so that it ends up in RAM. It is assumed that before relocation, all .text/.rodata/.data is in ROM and can't be modified, and .bss in inaccessible. Technically that means we could read .data before relocation, but certainly not write to it.
Quoted 7 lines
Now in practice yes, it does work to write to .data before relocation on platforms where the U-Boot binary isn't actually in flash, but is already in ROM. However as I mention, code cannot rely on that.
If any of this isn't true, then the documentation in
crt0.Sis wrong. I'm CC'ing Albert to see if that's the case.
In practice in the SPL case (which tegra sort-of uses) there is earlier step before U-Boot which sets up SDRAM, so it is (I think) always true that U-Boot is running from RAM. I guess the longer term plan is to allow some sort of pre-reloc malloc(), which would work for any machine, but I'm not sure if anyone is working on it.
Quoted 15 lines
Quoted 2 lines
In practice, perhaps we can assume that it will work on Tegra
because we
Quoted 1 line
know the DRAM is already set up, but then that makes Tegra work in
some
Quoted 3 lines
strange special-case way, and completely violates the constraints described in
crt0.S. We should be striving to unify how all the different chips work, rather than adding yet more strangespecial-cases
Quoted 5 lines
to the initialization sequence to hack around systemic problems.
Sure, this is up to you. I was just suggesting something that works and requires little effort. It isn't pure, agreed.
Quoted 7 lines
The simplest approach is probably to revert the patch in question, since it clearly violates how U-Boot is supposed to work.
It's not really up to me; I think someone like Albert should make the decision since he controls the ARM U-Boot architecture, or Tom as Tegra maintainer, or perhaps you as your patch broke the code.
My '(just for illustration, please don't merge)' patch from last October? :-)
I did offer to look at this for seaboard if it helps, once we agree on a solution, but if you have a solution in mind, please go ahead.
Regards,
SImon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Simon,
Am 31.07.2013 00:05, schrieb Simon Glass:
Quoted 13 lines
Hi Stephen,
Quoted 9 lines · Stephen Warren
Quoted 7 lines · Simon Glass
On Tue, Jul 30, 2013 at 3:32 PM, Stephen Warren<[email protected] <mailto:[email protected]>> wrote:
On 07/30/2013 03:21 PM, Simon Glass wrote:
> On Tue, Jul 30, 2013 at 2:00 PM, Stephen Warren <swarren at wwwdotorg.org<mailto:[email protected]> > <mailto:swarren at wwwdotorg.org<mailto:[email protected]>>>wrote:
[...]
Quoted 17 lines
Quoted 17 lines
Quoted 1 line
In practice, perhaps we can assume that it will work on Tegra
because we
Quoted 1 line
know the DRAM is already set up, but then that makes Tegra work in
some
Quoted 3 lines
strange special-case way, and completely violates the constraints described in
crt0.S. We should be striving to unify how all the different chips work, rather than adding yet more strangespecial-cases
Quoted 5 lines
to the initialization sequence to hack around systemic problems.
Sure, this is up to you. I was just suggesting something that works and requires little effort. It isn't pure, agreed.
The simplest approach is probably to revert the patch in question, since it clearly violates how U-Boot is supposed to work.
Quoted 7 lines
Quoted 4 lines
It's not really up to me; I think someone like Albert should make the decision since he controls the ARM U-Boot architecture, or Tom as Tegra maintainer, or perhaps you as your patch broke the code.
My '(just for illustration, please don't merge)' patch from last October? :-)
:-(
I thought you are testing the tegra plattforms with this patchset, as you triggered a few times, when this will go to mainline ...
Quoted 2 lines
I did offer to look at this for seaboard if it helps, once we agree on a solution, but if you have a solution in mind, please go ahead.
Yes, lets go ahead.
A goal of the i2c rework is to get rid of all i2c_init* calls around the code, and only use i2c_set_bus_num() before accessing the i2c subsystem (which looks if it needs to switch to this bus, is it initialized, muxes setup, ... ) ... maybe add the "bus" parameter as a second step to the i2c api, and i2c_set_bus_num() is no longer needed, just internal in the i2c subsystem ...
Maybe we can make i2c_init_func() weak (in the CONFIG_SYS_I2C case), and define it only on such boards, which need i2c so early? (Or remove it for the CONFIG_SYS_I2C completely, so boards which
need early i2c access and switch to the new framework would add a i2c_set_bus_num() where they need it ...)
Hmm.. each i2c adapter has its own init function ... why the tegra driver do not use it? And do the necessary inits in it? So we initialize an adapater only if we use it, which is also a rule for u-boot ...
I have no hw, but it should be possible to add to process_nodes() a parameter "controller_number" and call process_nodes(controller_number, ...) from the i2c drivers init function ...
So I see two steps:
- make i2c_init_func weak, and define this function only on boards which need i2c so early, or remove it completely ... and see which boards fail.
- change i2c tegra driver as described above
Maybe this is a way to go?
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
On 07/30/2013 11:46 PM, Heiko Schocher wrote:
...
Quoted 9 lines
Hmm.. each i2c adapter has its own init function ... why the tegra driver do not use it? And do the necessary inits in it? So we initialize an adapater only if we use it, which is also a rule for u-boot ...
I have no hw, but it should be possible to add to
process_nodes()a parameter "controller_number" and callprocess_nodes(controller_number, ...)from the i2c drivers init function ...
There are two steps to initializing I2C on a Tegra system:
1) Parsing the DT to determine which/how-many I2C adapters exist in the SoC. This will yield information such as the register address of the I2C adapters, which clock/reset signal they rely on, perhaps the max bus clock rate, etc.
This is a single global operation that needs to happen one single time before anything else.
This stage initializes the i2c_controllers[] array, since that's what stores all the data parsed from DT.
2) Actually initializing or using the I2C HW. That could certainly be part of the per-I2C-controller init() function you mention.
Now, I think the big disconnect here is that historically, the U-Boot binary has hard-coded all the details that step (1) above parses out of DT, so that step (1) did not need to exist.
However, Simon has been pushing Tegra towards not hard-coding any of this information, but instead having a single binary that can work on arbitrary Tegra boards and even across different Tegra SoCs which have a different number of I2C controllers at different register addresses. This is quite fundamentally different to how U-Boot has worked in the past, and evidently has some problems fitting into the typical U-Boot initialization sequence.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Stephen,
Am 31.07.2013 21:31, schrieb Stephen Warren:
Quoted 14 lines · Heiko Schocher
...
Quoted 9 lines
Hmm.. each i2c adapter has its own init function ... why the tegra driver do not use it? And do the necessary inits in it? So we initialize an adapater only if we use it, which is also a rule for u-boot ...
I have no hw, but it should be possible to add to
process_nodes()a parameter "controller_number" and callprocess_nodes(controller_number, ...)from the i2c drivers init function ...There are two steps to initializing I2C on a Tegra system:
Quoted 7 lines
1) Parsing the DT to determine which/how-many I2C adapters exist in the SoC. This will yield information such as the register address of the I2C adapters, which clock/reset signal they rely on, perhaps the max bus clock rate, etc.
This is a single global operation that needs to happen one single time before anything else.
Why?
Quoted 5 lines
This stage initializes the i2c_controllers[] array, since that's what stores all the data parsed from DT.
2) Actually initializing or using the I2C HW. That could certainly be part of the per-I2C-controller
init()function you mention.
For that purpose is the i2c_init function.
And why we could not do step 1 when we do step 2? Why doing step 1 for hw we later do not use?
saying something like this (just as an example, should be tested):
drivers/i2c/tegra_i2c.c +48 -38
@@ -378,81 +378,91 @@ static int i2c_get_config(const void *blob, int node, struct i2c_bus *i2c_bus)* @param is_scs 1 if this HW uses a single clock source (T114+) * @return 0 if ok, -1 on error */ -static int process_nodes (const void *blob,int node_list[],int count, +static int process_nodes (const void *blob,int node_list[], +struct i2c_adapter *adap,int count,int is_dvc,int is_scs) {struct i2c_bus *i2c_bus; -int i; - -/* build the i2c_controllers[] for each controller */ -for (i =0 ; i < count; i++) { -int node = node_list[i]; +int node = node_list[i]; -if (node <=0 ) -continue ; + bus = &i2c_controllers[adap->hwadapnr]; + i2c_bus->id = adap->hwadapnr; - i2c_bus = &i2c_controllers[i]; - i2c_bus->id = i; +if (node <=0 ) +continue ; -if (i2c_get_config (blob, node, i2c_bus)) { -printf ("i2c_init_board: failed to decode bus %d\n" , i); -return -1 ; - } +if (i2c_get_config (blob, node, i2c_bus)) { +printf ("i2c_init_board: failed to decode bus %d\n" , i); +return -1 ; + } - i2c_bus->is_scs = is_scs; + i2c_bus->is_scs = is_scs; - i2c_bus->is_dvc = is_dvc; -if (is_dvc) { - i2c_bus->control = - &((struct dvc_ctlr *)i2c_bus->regs)->control; - }else { - i2c_bus->control = &i2c_bus->regs->control; - } -debug ("%s: controller bus %d at %p, periph_id %d, speed %d: " , - is_dvc ?"dvc" :"i2c" , i, i2c_bus->regs, - i2c_bus->periph_id, i2c_bus->speed); -i2c_init_controller (i2c_bus); -debug ("ok\n" ); - i2c_bus->inited =1 ; - -/* Mark position as used */ - node_list[i] =-1 ; + i2c_bus->is_dvc = is_dvc; +if (is_dvc) { + i2c_bus->control = + &((struct dvc_ctlr *)i2c_bus->regs)->control; + }else { + i2c_bus->control = &i2c_bus->regs->control; } +debug ("%s: controller bus %d at %p, periph_id %d, speed %d: " , + is_dvc ?"dvc" :"i2c" , i, i2c_bus->regs, + i2c_bus->periph_id, i2c_bus->speed); +i2c_init_controller (i2c_bus); +debug ("ok\n" ); + i2c_bus->inited =1 ; + +/* Mark position as used */ + node_list[i] =-1 ;return 0 ; }/* Sadly there is no error return from this function */ -void i2c_init_board (void ) +static int tegra_i2c_init_board (struct i2c_adapter *adap) { +struct i2c_bus *i2c_bus;int node_list[TEGRA_I2C_NUM_CONTROLLERS ];const void *blob = gd->fdt_blob;int count; + bus =tegra_i2c_get_bus (adap); +if (bus) +return 0 ; +/* First check for newer (T114+) I2C ports */ count =fdtdec_find_aliases_for_id (blob,"i2c" ,COMPAT_NVIDIA_TEGRA114_I2C , node_list,TEGRA_I2C_NUM_CONTROLLERS ); -if (process_nodes (blob, node_list, count,0 ,1 )) -return ; +if (process_nodes (blob, node_list, adap, count,0 ,1 )) +return -1 ;/* Now get the older (T20/T30) normal I2C ports */ count =fdtdec_find_aliases_for_id (blob,"i2c" ,COMPAT_NVIDIA_TEGRA20_I2C , node_list,TEGRA_I2C_NUM_CONTROLLERS ); -if (process_nodes (blob, node_list, count,0 ,0 )) -return ; +if (process_nodes (blob, node_list, adap, count,0 ,0 )) +return -1 ;/* Now look for dvc ports */ count =fdtdec_add_aliases_for_id (blob,"i2c" ,COMPAT_NVIDIA_TEGRA20_DVC , node_list,TEGRA_I2C_NUM_CONTROLLERS ); -if (process_nodes (blob, node_list, count,1 ,0 )) -return ; +if (process_nodes (blob, node_list, adap, count,1 ,0 )) +return -1 ; + +return 0 ; }static void tegra_i2c_init (struct i2c_adapter *adap,int speed,int slaveaddr) { +int ret; + + ret =tegra_i2c_init_board (adap); +if (ret) { +printf ("Could not decode bus: %d\n" , adap->hwadapnr); +return ; + }/* This will override the speed selected in the fdt for that port */ debug ("i2c_init(speed=%u, slaveaddr=0x%x)\n" , speed, slaveaddr);i2c_set_bus_speed (speed);
Which will call process_nodes() from the i2c_init function, which only is called, when i2c bus get used ...
Quoted 11 lines
Now, I think the big disconnect here is that historically, the U-Boot binary has hard-coded all the details that step (1) above parses out of DT, so that step (1) did not need to exist.
However, Simon has been pushing Tegra towards not hard-coding any of this information, but instead having a single binary that can work on arbitrary Tegra boards and even across different Tegra SoCs which have a different number of I2C controllers at different register addresses. This is quite fundamentally different to how U-Boot has worked in the past, and evidently has some problems fitting into the typical U-Boot initialization sequence.
Yes ... but again, if we parse the DT in the moment we need to init a hw, it would fit again (at least for the dt case). But we have a problem, if we need to write (like the i2c_controllers[] array) before relocation. So I2C and DT usage is not possible before relocation. (And not only i2c in conjunction with dt I think)
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 22 lines · Heiko Schocher
Hello Stephen,
Am 31.07.2013 21:31, schrieb Stephen Warren:
Quoted 19 lines · Heiko Schocher
...
Quoted 9 lines
Hmm.. each i2c adapter has its own init function ... why the tegra driver do not use it? And do the necessary inits in it? So we initialize an adapater only if we use it, which is also a rule for u-boot ...
I have no hw, but it should be possible to add to
process_nodes()a parameter "controller_number" and callprocess_nodes(controller_number, ...)from the i2c drivers init function ...There are two steps to initializing I2C on a Tegra system:
1) Parsing the DT to determine which/how-many I2C adapters exist in the SoC. This will yield information such as the register address of the I2C adapters, which clock/reset signal they rely on, perhaps the max bus clock rate, etc.
Quoted 4 lines
Quoted 2 lines
This is a single global operation that needs to happen one single time before anything else.
Why?
That's simply the way the code is written.
Quoted 10 lines
Quoted 5 lines
This stage initializes the i2c_controllers[] array, since that's what stores all the data parsed from DT.
2) Actually initializing or using the I2C HW. That could certainly be part of the per-I2C-controller
init()function you mention.For that purpose is the
i2c_initfunction.And why we could not do step 1 when we do step 2? Why doing step 1 for hw we later do not use?
I suppose you could. It seems conceptually /far/ simpler to just scan the DT once up-front rather than having to defer all this stuff until you actually use an I2C bus. If you do that, how can you know how many I2C buses exist without trying to use every possible one and seeing which fail? Also, the mapping from I2C bus number to register address is only created by actually scanning the whole DT; there's no need to every I2C DT node to have a /aliases entry that dictates its U-Boot device ID, so you really do have to scan everything completely up-front before you can determine which registers to use.
Quoted 13 lines
saying something like this (just as an example, should be tested):
drivers/i2c/tegra_i2c.c +1
-1@@ -378,81 +378,91 @@ static int i2c_get_config(const void *blob, intnode, struct i2c_bus *i2c_bus) * @param is_scs 1 if this HW uses a single clock source (T114+) * @return 0 if ok, -1 on error */ -static int process_nodes(const void *blob, int node_list[], int count, +static int process_nodes(const void *blob, int node_list[],
drivers/i2c/tegra_i2c.c static int i2c_get_config(const void *blob, int · line 387
Quoted 10 lines
drivers/i2c/tegra_i2c.c +2
-5+ struct i2c_adapter *adap, int count, int is_dvc, int is_scs) { struct i2c_bus *i2c_bus; -int i; - -/* build the i2c_controllers[] for each controller */ -for (i =0 ; i < count; i++) { -int node = node_list[i]; +int node = node_list[i];
How do you determine i here? There's no guarantee that all I2C DT nodes end up being processed in a single call to process_nodes(); there might be some "Tegra20 I2C", some "Tegra20 I2C DVC", some "Tegra30 I2C" modules in the same SoC.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Stephen,
Am 01.08.2013 07:39, schrieb Stephen Warren:
Quoted 23 lines · Heiko Schocher
Quoted 22 lines
Hello Stephen,
Am 31.07.2013 21:31, schrieb Stephen Warren:
Quoted 19 lines · Heiko Schocher
...
Quoted 9 lines
Hmm.. each i2c adapter has its own init function ... why the tegra driver do not use it? And do the necessary inits in it? So we initialize an adapater only if we use it, which is also a rule for u-boot ...
I have no hw, but it should be possible to add to
process_nodes()a parameter "controller_number" and callprocess_nodes(controller_number, ...)from the i2c drivers init function ...There are two steps to initializing I2C on a Tegra system:
1) Parsing the DT to determine which/how-many I2C adapters exist in the SoC. This will yield information such as the register address of the I2C adapters, which clock/reset signal they rely on, perhaps the max bus clock rate, etc.
Quoted 6 lines
Quoted 4 lines
Quoted 2 lines
This is a single global operation that needs to happen one single time before anything else.
Why?
That's simply the way the code is written.
Ok.
Quoted 6 lines
Quoted 6 lines
Quoted 5 lines
This stage initializes the i2c_controllers[] array, since that's what stores all the data parsed from DT.
2) Actually initializing or using the I2C HW. That could certainly be part of the per-I2C-controller
init()function you mention.
Quoted 7 lines
Quoted 4 lines
For that purpose is the
i2c_initfunction.And why we could not do step 1 when we do step 2? Why doing step 1 for hw we later do not use?
I suppose you could. It seems conceptually /far/ simpler to just scan the DT once up-front rather than having to defer all this stuff until
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Quoted 2 lines
you actually use an I2C bus. If you do that, how can you know how many I2C buses exist without trying to use every possible one and seeing
Do I really need to know that?
Quoted 1 line
which fail? Also, the mapping from I2C bus number to register address is
Hmm.. there are max TEGRA_I2C_NUM_CONTROLLERS. If one gets used, it scans the dt ... if only 1 adapter is used, only one is activated through i2c_init ...
Quoted 4 lines
only created by actually scanning the whole DT; there's no need to every I2C DT node to have a /aliases entry that dictates its U-Boot device ID, so you really do have to scan everything completely up-front before you can determine which registers to use.
But the i2c bus number is coded static all over the u-boot code (Should be changed) in the code. Saying a board has an i2c eeprom on bus "2", it calls i2c_set_bus_number(2) ... this "2" must be somewhere in the dt or?
If this "2" is used on different boards with the same u-boot code only different in dt, bus 2 maybe not exist ...
or if you change the order of i2c nodes in the dt "2" is no longer "2" ... or?
Quoted 17 lines
Quoted 17 lines
saying something like this (just as an example, should be tested):
drivers/i2c/tegra_i2c.c +2
-1@@ -378,81 +378,91 @@ static int i2c_get_config(const void *blob, intnode, struct i2c_bus *i2c_bus) * @param is_scs 1 if this HW uses a single clock source (T114+) * @return 0 if ok, -1 on error */ -static int process_nodes (const void *blob,int node_list[],int count, +static int process_nodes (const void *blob,int node_list[], +struct i2c_adapter *adap,int count,int is_dvc,int is_scs) {struct i2c_bus *i2c_bus;
Quoted 8 lines
drivers/i2c/tegra_i2c.c static int i2c_get_config(const void *blob, int node, struct i2c_bus *i2c_bus) · line 386
Quoted 6 lines
drivers/i2c/tegra_i2c.c +1
-5-int i; - -/* build the i2c_controllers[] for each controller */ -for (i =0 ; i< count; i++) { -int node = node_list[i]; +int node = node_list[i];How do you determine i here? There's no guarantee that all I2C DT nodes
adap->hwadapnr
as in drivers/i2c/tegra_i2c.c:
static struct i2c_bus *tegra_i2c_get_bus(struct i2c_adapter *adap)
{
struct i2c_bus *bus;
bus = &i2c_controllers[adap->hwadapnr];[...]
Quoted 3 lines
end up being processed in a single call to
process_nodes(); there might be some "Tegra20 I2C", some "Tegra20 I2C DVC", some "Tegra30 I2C" modules in the same SoC.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Heiko,
Quoted 6 lines · Heiko Schocher
Quoted 2 lines
I suppose you could. It seems conceptually /far/ simpler to just scan the DT once up-front rather than having to defer all this stuff until
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Scanning all of DT seems to imply it has no strict or standard ordering. Could we mandate, suggest, of make it so that all entries in the DT needed at _f time are put first, and even maybe place an "end of _f" custom marker in DT to delimit them? (I assume that, for the sake of Postel-ism, anything in DT which is not understandable is skipped, so other users of the DT than us would not even be annoyed by such a marker)
This way, we'd avoid wasting time scanning most of the DT in this case.
Note: I confess I don't even know at the moment how DT is structured, so I may have talked complete nonsense above. If so, please forgive me and point me to some DT 101 course for me to avoid shame (at least on this topic) in the future.
Quoted 2 lines
bye,
Heiko
Amicalement,
Signature · 1 line
Albert.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Albert,
Am 01.08.2013 08:53, schrieb Albert ARIBAUD:
Quoted 7 lines
Hi Heiko,
Quoted 3 lines · Heiko Schocher
Quoted 2 lines
I suppose you could. It seems conceptually /far/ simpler to just scan the DT once up-front rather than having to defer all this stuff until
Quoted 8 lines
Quoted 3 lines
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Scanning all of DT seems to imply it has no strict or standard ordering. Could we mandate, suggest, of make it so that all entries in the DT needed at _f time are put first, and even maybe place an "end of _f" custom marker in DT to delimit them? (I assume that, for the sake of
I do not know, if this is possible, as I think the DT used in U-Boot should be the same as used in linux ... or?
Quoted 5 lines
Postel-ism, anything in DT which is not understandable is skipped, so other users of the DT than us would not even be annoyed by such a marker)
This way, we'd avoid wasting time scanning most of the DT in this case.
Hmm.. why should we introduce such things, instead of scanning the node only if we need it?
We have "only" the problem, that we could not write to data at this moment ... but this problem should be solved in a seperate topic. I2C is usable before relocation, the problem is in conjunction with dt, that we can not save for example the base address of the controller, which we get from the DT ... If I understand it correct!
So we need an option when using dt, that we have (small ram) in which we can write some parameters parsed from dt ...
I think this problem have all subsystems used before relocation. (for example: environment on a spi flash?)
As Wolfgang said:
"Agreed - actually we're entering an area hear that smells pretty strong like device model reorganization :-)"
BTW: How is this problem solved with the device model approach?
Quoted 4 lines
Note: I confess I don't even know at the moment how DT is structured, so I may have talked complete nonsense above. If so, please forgive me and point me to some DT 101 course for me to avoid shame (at least on this topic) in the future.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi,
Quoted 43 lines · Heiko Schocher
Hello Albert,
Am 01.08.2013 08:53, schrieb Albert ARIBAUD:
Hi Heiko,
Quoted 12 lines · Heiko Schocher
I suppose you could. It seems conceptually /far/ simpler to just scan
Quoted 7 lines
Quoted 2 lines
the DT once up-front rather than having to defer all this stuff until
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Quoted 5 lines
Scanning all of DT seems to imply it has no strict or standard ordering. Could we mandate, suggest, of make it so that all entries in the DT needed at _f time are put first, and even maybe place an "end of _f" custom marker in DT to delimit them? (I assume that, for the sake of
I do not know, if this is possible, as I think the DT used in U-Boot should be the same as used in linux ... or?
Postel-ism, anything in DT which is not understandable is skipped, so
Quoted 5 lines
other users of the DT than us would not even be annoyed by such a marker)
This way, we'd avoid wasting time scanning most of the DT in this case.
Hmm.. why should we introduce such things, instead of scanning the node only if we need it?
We have "only" the problem, that we could not write to data at this moment ... but this problem should be solved in a seperate topic. I2C is usable before relocation, the problem is in conjunction with dt, that we can not save for example the base address of the controller, which we get from the DT ... If I understand it correct!
Quoted 7 lines
So we need an option when using dt, that we have (small ram) in which we can write some parameters parsed from dt ...
I think this problem have all subsystems used before relocation. (for example: environment on a spi flash?)
I think using a small RAM is a good approach. At least it is better than pretending there is no RAM at all. We currently have no facility to allocate RAM before relocation, other than to use the .data section. We can use global_data but that won't scale well for many drivers adding their own stuff in there. Samsung's driver uses .data, I don't think it is a big deal.
One option I should mention is to decode the I2C FDT nodes each time it is needed prior to relocation (i.e. to the stack), use it for the transaction, and throw it away. This is quite painful IMO this it involves putting calls in the driver to check if we are pre-reloc and have a stack space used every time. On tegra20 this would be 130 bytes or so. I mention it because console working this way for a while (decoding the console again on every byte).
Options as I see it:
- just fudge it for now and use .data (deal with it later with driver model)
- change the meaning of board_init_f() such that memory may be available (e.g. if run from SPL)
- decode the FDT nodes every time we need them (ick)
- adjust the ordering so that I2C normally happens post reloc except for specific platforms with a CONFIG defined (Heiko, the difference as I understand it is that with your patch CONFIG_HARD_I2C or CONFIG_SOFT_I2C are now defined, and so I2C happens prior to reloc now)
Quoted 6 lines
As Wolfgang said:
"Agreed - actually we're entering an area hear that smells pretty strong like device model reorganization :-)"BTW: How is this problem solved with the device model approach?
More that we need to solve it, probably with a limited malloc() pre-reloc.
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Simon,
Am 01.08.2013 16:22, schrieb Simon Glass:
Quoted 68 lines
Hi,
Quoted 43 lines · Heiko Schocher
Hello Albert,
Am 01.08.2013 08:53, schrieb Albert ARIBAUD:
Hi Heiko,
Quoted 12 lines · Heiko Schocher
I suppose you could. It seems conceptually /far/ simpler to just scan
Quoted 7 lines
Quoted 2 lines
the DT once up-front rather than having to defer all this stuff until
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Quoted 5 lines
Scanning all of DT seems to imply it has no strict or standard ordering. Could we mandate, suggest, of make it so that all entries in the DT needed at _f time are put first, and even maybe place an "end of _f" custom marker in DT to delimit them? (I assume that, for the sake of
I do not know, if this is possible, as I think the DT used in U-Boot should be the same as used in linux ... or?
Postel-ism, anything in DT which is not understandable is skipped, so
Quoted 5 lines
other users of the DT than us would not even be annoyed by such a marker)
This way, we'd avoid wasting time scanning most of the DT in this case.
Hmm.. why should we introduce such things, instead of scanning the node only if we need it?
We have "only" the problem, that we could not write to data at this moment ... but this problem should be solved in a seperate topic. I2C is usable before relocation, the problem is in conjunction with dt, that we can not save for example the base address of the controller, which we get from the DT ... If I understand it correct!
Quoted 7 lines
So we need an option when using dt, that we have (small ram) in which we can write some parameters parsed from dt ...
I think this problem have all subsystems used before relocation. (for example: environment on a spi flash?)
I think using a small RAM is a good approach. At least it is better than pretending there is no RAM at all. We currently have no facility to allocate RAM before relocation, other than to use the .data section. We can use
global_databut that won't scale well for many drivers adding their own stuff in there. Samsung's driver uses .data, I don't think it is a big deal.One option I should mention is to decode the I2C FDT nodes each time it is needed prior to relocation (i.e. to the stack), use it for the transaction, and throw it away. This is quite painful IMO this it involves putting calls in the driver to check if we are pre-reloc and have a stack space used every time. On tegra20 this would be 130 bytes or so. I mention it because console working this way for a while (decoding the console again on every byte).
Quoted 6 lines
Options as I see it:
- just fudge it for now and use .data (deal with it later with driver model)
- change the meaning ofboard_init_f()such that memory may be available (e.g. if run from SPL)
- decode the FDT nodes every time we need them (ick)
Why? after relocation it is needed exactly once. You can do something like that in the i2c_init function:
+ bus = tegra_i2c_get_bus(adap);
+ if (bus)
+ return 0;
If you get a bus with tegra_i2c_get_bus(adap), it is "fdt initialized"
If you not get a bus ... init it ... only once
The problem before relocation could be solved with .data or later with the driver model ...
Quoted 4 lines
- adjust the ordering so that I2C normally happens post reloc except for specific platforms with a CONFIG defined (Heiko, the difference as I understand it is that with your patch
CONFIG_HARD_I2CorCONFIG_SOFT_I2Care now defined, and so I2C happens prior to reloc now)
Hmm.. BTW: CONFIG_SOFT_I2C is no longer in the code :-)
And there are a lot of boards that use i2c before relocation, that is not a new feature.
The problem pop up, because in arch/arm/lib/board.c at init_func_i2c() the new code calls i2c_init_all() instead i2c_init() ... This i2c_init_all() was introduced to init fix the SPD EEPROM bus and call i2c_init_board() before it...
So we can call here again i2c_init() I think ... but, i2c_init() also calls i2c_init_bus() and this i2c_init from the tegra driver, which sets speed and return 0 ... what is not really clean, it just works, because tegra_i2c_set_bus_speed() checks if the bus is valid, if not only returns ...
but i2c_init_board is not called so early, which is the cause for our problem with the tegra driver and the new framework, as i2c_init_board() hysterically was introduced to unblock blocked i2c busses (Correct me, if I am wrong)
My prefered way is still:
- replace i2c_init_all() through i2c_init() in arch/arm/lib/board.c at init_func_i2c()
to get tegra again working
In the long term when all i2c drivers use the new framework init_func_i2c() will no longer necessary :-)
As the goal is to change the i2c api, so all i2c functions pass "bus" as a parameter, and i2c_set_bus_num() get a static function in drivers/i2c/i2c_core.c
no need longer for storing the old bus, setting the new bus, doing i2c work, set the old bus, as this sequence is spread over the hole u-boot code.
- decoding fdt node in tegra_i2c_init, as I think
it is the right place for it. optional more or less, but to prevent in future again such "order" problems ...
Quoted 8 lines
Quoted 5 lines
As Wolfgang said:
"Agreed - actually we're entering an area hear that smells pretty strong like device model reorganization :-)"BTW: How is this problem solved with the device model approach?
More that we need to solve it, probably with a limited
malloc()pre-reloc.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Simon GlassHi Simon,
Quoted 54 lines · Simon Glass
Hi,
Quoted 43 lines · Heiko Schocher
Hello Albert,
Am 01.08.2013 08:53, schrieb Albert ARIBAUD:
Hi Heiko,
Quoted 12 lines · Heiko Schocher
I suppose you could. It seems conceptually /far/ simpler to just scan
Quoted 7 lines
Quoted 2 lines
the DT once up-front rather than having to defer all this stuff until
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Quoted 5 lines
Scanning all of DT seems to imply it has no strict or standard ordering. Could we mandate, suggest, of make it so that all entries in the DT needed at _f time are put first, and even maybe place an "end of _f" custom marker in DT to delimit them? (I assume that, for the sake of
I do not know, if this is possible, as I think the DT used in U-Boot should be the same as used in linux ... or?
Postel-ism, anything in DT which is not understandable is skipped, so
Quoted 5 lines
other users of the DT than us would not even be annoyed by such a marker)
This way, we'd avoid wasting time scanning most of the DT in this case.
Hmm.. why should we introduce such things, instead of scanning the node only if we need it?
We have "only" the problem, that we could not write to data at this moment ... but this problem should be solved in a seperate topic. I2C is usable before relocation, the problem is in conjunction with dt, that we can not save for example the base address of the controller, which we get from the DT ... If I understand it correct!
Quoted 7 lines
So we need an option when using dt, that we have (small ram) in which we can write some parameters parsed from dt ...
I think this problem have all subsystems used before relocation. (for example: environment on a spi flash?)
Quoted 5 lines
I think using a small RAM is a good approach. At least it is better than pretending there is no RAM at all. We currently have no facility to allocate RAM before relocation, other than to use the .data section. We can use
global_databut that won't scale well for many drivers adding their own stuff in there. Samsung's driver uses .data, I don't think it is a big deal.
What about targets which do not have such a small RAM available?
Quoted 25 lines
One option I should mention is to decode the I2C FDT nodes each time it is needed prior to relocation (i.e. to the stack), use it for the transaction, and throw it away. This is quite painful IMO this it involves putting calls in the driver to check if we are pre-reloc and have a stack space used every time. On tegra20 this would be 130 bytes or so. I mention it because console working this way for a while (decoding the console again on every byte).
Options as I see it:
- just fudge it for now and use .data (deal with it later with driver model)
- change the meaning ofboard_init_f()such that memory may be available (e.g. if run from SPL)
- decode the FDT nodes every time we need them (ick)
- adjust the ordering so that I2C normally happens post reloc except for specific platforms with a CONFIG defined (Heiko, the difference as I understand it is that with your patchCONFIG_HARD_I2CorCONFIG_SOFT_I2Care now defined, and so I2C happens prior to reloc now)Quoted 5 lines
As Wolfgang said:
"Agreed - actually we're entering an area hear that smells pretty strong like device model reorganization :-)"
Quoted 7 lines
Quoted 1 line
BTW: How is this problem solved with the device model approach?
More that we need to solve it, probably with a limited
malloc()pre-reloc.Regards,
Simon
Amicalement,
Signature · 1 line
Albert.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Albert,
Quoted 67 lines · Albert ARIBAUD
Hi Simon,
Quoted 11 lines · Simon Glass
Hi,
Quoted 7 lines · Heiko Schocher
Hello Albert,
Am 01.08.2013 08:53, schrieb Albert ARIBAUD:
Hi Heiko,
Quoted 2 lines
On Thu, 01 Aug 2013 08:02:42 +0200, Heiko Schocher<[email protected]>
Quoted 3 lines · wrote:
Quoted 3 lines
Quoted 3 lines
I suppose you could. It seems conceptually /far/ simpler to just scan
Quoted 1 line
Quoted 1 line
the DT once up-front rather than having to defer all this stuff
until
Quoted 10 lines
Quoted 10 lines
Quoted 10 lines
Quoted 6 lines
Quoted 1 line
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Scanning all of DT seems to imply it has no strict or standard ordering. Could we mandate, suggest, of make it so that all entries in the DT needed at _f time are put first, and even maybe place an "end
of
Quoted 1 line
Quoted 1 line
Quoted 1 line
_f" custom marker in DT to delimit them? (I assume that, for the sake
of
Quoted 11 lines
Quoted 11 lines
Quoted 1 line
I do not know, if this is possible, as I think the DT used in U-Boot should be the same as used in linux ... or?
Postel-ism, anything in DT which is not understandable is skipped, so
Quoted 4 lines
other users of the DT than us would not even be annoyed by such a marker)
This way, we'd avoid wasting time scanning most of the DT in this
case.
Quoted 9 lines
Quoted 9 lines
Quoted 1 line
Hmm.. why should we introduce such things, instead of scanning the node only if we need it?
We have "only" the problem, that we could not write to data at this moment ... but this problem should be solved in a seperate topic. I2C is usable before relocation, the problem is in conjunction with dt, that we can not save for example the base address of the
controller,
Quoted 5 lines
Quoted 5 lines
which we get from the DT ... If I understand it correct!
So we need an option when using dt, that we have (small ram) in which we can write some parameters parsed from dt ...
Quoted 7 lines
Quoted 4 lines
I think this problem have all subsystems used before relocation. (for example: environment on a spi flash?)
I think using a small RAM is a good approach. At least it is better than pretending there is no RAM at all. We currently have no facility to allocate RAM before relocation, other than to use the .data section. We
Quoted 8 lines
can
Quoted 1 line
use
global_databut that won't scale well for many drivers adding theirown
Quoted 1 line
stuff in there. Samsung's driver uses .data, I don't think it is a big
deal.
What about targets which do not have such a small RAM available?
Presumably such targets do not use SPL, and perhaps don't use FDT at present?
Quoted 31 lines
Quoted 2 lines
One option I should mention is to decode the I2C FDT nodes each time it
is
Quoted 1 line
needed prior to relocation (i.e. to the stack), use it for the
transaction,
Quoted 1 line
and throw it away. This is quite painful IMO this it involves putting
calls
Quoted 2 lines
in the driver to check if we are pre-reloc and have a stack space used every time. On tegra20 this would be 130 bytes or so. I mention it
because
Quoted 6 lines
console working this way for a while (decoding the console again on every byte).
Options as I see it:
- just fudge it for now and use .data (deal with it later with driver
model)
Quoted 14 lines
- change the meaning of
board_init_f()such that memory may be available (e.g. if run from SPL)
- decode the FDT nodes every time we need them (ick)
- adjust the ordering so that I2C normally happens post reloc except for specific platforms with a CONFIG defined (Heiko, the difference as I understand it is that with your patchCONFIG_HARD_I2CorCONFIG_SOFT_I2Care now defined, and so I2C happens prior to reloc now)Quoted 5 lines
As Wolfgang said:
"Agreed - actually we're entering an area hear that smells pretty strong like device model reorganization :-)"
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
BTW: How is this problem solved with the device model approach?
More that we need to solve it, probably with a limited
malloc()pre-reloc.
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Heiko SchocherHi Heiko,
Quoted 22 lines · Heiko Schocher
Hello Albert,
Am 01.08.2013 08:53, schrieb Albert ARIBAUD:
Quoted 7 lines
Hi Heiko,
Quoted 3 lines · Heiko Schocher
Quoted 2 lines
I suppose you could. It seems conceptually /far/ simpler to just scan the DT once up-front rather than having to defer all this stuff until
Quoted 8 lines
Quoted 3 lines
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Scanning all of DT seems to imply it has no strict or standard ordering. Could we mandate, suggest, of make it so that all entries in the DT needed at _f time are put first, and even maybe place an "end of _f" custom marker in DT to delimit them? (I assume that, for the sake of
I do not know, if this is possible, as I think the DT used in U-Boot should be the same as used in linux ... or?
Quoted 8 lines
Quoted 5 lines
Postel-ism, anything in DT which is not understandable is skipped, so other users of the DT than us would not even be annoyed by such a marker)
This way, we'd avoid wasting time scanning most of the DT in this case.
Hmm.. why should we introduce such things, instead of scanning the node only if we need it?
From the "we want to scan a complete dt with maybe a lot of nodes, we do not want to use?" above, I inferred that one problem here was having to waste time going through the whole DT looking only for info needed at _f stage. This is why I made the suggestion above for that problem. Sorry if I did not understand this properly.
Quoted 18 lines
We have "only" the problem, that we could not write to data at this moment ... but this problem should be solved in a seperate topic. I2C is usable before relocation, the problem is in conjunction with dt, that we can not save for example the base address of the controller, which we get from the DT ... If I understand it correct!
So we need an option when using dt, that we have (small ram) in which we can write some parameters parsed from dt ...
I think this problem have all subsystems used before relocation. (for example: environment on a spi flash?)
As Wolfgang said:
"Agreed - actually we're entering an area hear that smells pretty strong like device model reorganization :-)"BTW: How is this problem solved with the device model approach?
Quoted 7 lines
Quoted 4 lines
Note: I confess I don't even know at the moment how DT is structured, so I may have talked complete nonsense above. If so, please forgive me and point me to some DT 101 course for me to avoid shame (at least on this topic) in the future.
bye,
Heiko
Amicalement,
Signature · 1 line
Albert.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Albert ARIBAUDQuoted 11 lines · Albert ARIBAUD
Hi Heiko,
Quoted 6 lines · Heiko Schocher
Quoted 2 lines
I suppose you could. It seems conceptually /far/ simpler to just scan the DT once up-front rather than having to defer all this stuff until
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Quoted 7 lines
Scanning all of DT seems to imply it has no strict or standard ordering. Could we mandate, suggest, of make it so that all entries in the DT needed at _f time are put first, and even maybe place an "end of _f" custom marker in DT to delimit them? (I assume that, for the sake of Postel-ism, anything in DT which is not understandable is skipped, so other users of the DT than us would not even be annoyed by such a marker)
DT nodes are explicitly unordered, and there is and should be no guaranteed correlation between the order of entries in DT and when drivers that handle them are probed.
In particular, for the Tegra DTs, nodes are supposed to be sorted by register address to keep things neat.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Heiko SchocherQuoted 4 lines · Heiko Schocher
Am 01.08.2013 07:39, schrieb Stephen Warren:
Quoted 3 lines · Heiko Schocher
Quoted 2 lines
Am 31.07.2013 21:31, schrieb Stephen Warren:
Quoted 1 line · Heiko Schocher
...
Quoted 11 lines
Quoted 10 lines
Quoted 7 lines
Quoted 2 lines
2) Actually initializing or using the I2C HW. That could certainly be part of the per-I2C-controller
init()function you mention.For that purpose is the
i2c_initfunction.And why we could not do step 1 when we do step 2? Why doing step 1 for hw we later do not use?
I suppose you could. It seems conceptually /far/ simpler to just scan the DT once up-front rather than having to defer all this stuff until
Quoted 8 lines
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Quoted 2 lines
you actually use an I2C bus. If you do that, how can you know how many I2C buses exist without trying to use every possible one and seeing
Do I really need to know that?
Well, with the recent patches, U-Boot prints out a list of valid I2C adapters at boot. So, I suppose someone must have thought it a good idea!
Perhaps the most relevant reason: why on earth wouldn't a user want to run e.g. "i2c list" or "i2c dev" and get back a list of valid I2C adapters, as opposed to poking around in the dark to see which exist?
Quoted 11 lines
Quoted 1 line
which fail? Also, the mapping from I2C bus number to register address is
Hmm.. there are max
TEGRA_I2C_NUM_CONTROLLERS. If one gets used, it scans the dt ... if only 1 adapter is used, only one is activated throughi2c_init...Quoted 4 lines
only created by actually scanning the whole DT; there's no need to every I2C DT node to have a /aliases entry that dictates its U-Boot device ID, so you really do have to scan everything completely up-front before you can determine which registers to use.
Quoted 4 lines
But the i2c bus number is coded static all over the u-boot code (Should be changed) in the code. Saying a board has an i2c eeprom on bus "2", it calls
i2c_set_bus_number(2)... this "2" must be somewhere in the dt or?
Yes, the "2" must come from DT, or DT is pointless. We simply have to get rid of all the hard-coding. If we can't do that, then I'd strongly prefer to revert all the DT mess, and put the list of HW modules back into the source code. DT isn't adding anything at all unless we can actually use it exclusively.
Given how long this discussion is going on, can we please just revert the commit so that the code works for everyone who's trying to use it, then fix the problem later?
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Stephen,
Am 01.08.2013 22:32, schrieb Stephen Warren:
Quoted 21 lines · Heiko Schocher
Quoted 4 lines
Am 01.08.2013 07:39, schrieb Stephen Warren:
Quoted 3 lines · Heiko Schocher
Quoted 2 lines
Am 31.07.2013 21:31, schrieb Stephen Warren:
Quoted 1 line · Heiko Schocher
...
Quoted 15 lines
Quoted 10 lines
Quoted 7 lines
Quoted 2 lines
2) Actually initializing or using the I2C HW. That could certainly be part of the per-I2C-controller
init()function you mention.For that purpose is the
i2c_initfunction.And why we could not do step 1 when we do step 2? Why doing step 1 for hw we later do not use?
I suppose you could. It seems conceptually /far/ simpler to just scan the DT once up-front rather than having to defer all this stuff until
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Quoted 6 lines
Quoted 4 lines
Quoted 2 lines
you actually use an I2C bus. If you do that, how can you know how many I2C buses exist without trying to use every possible one and seeing
Do I really need to know that?
Well, with the recent patches, U-Boot prints out a list of valid I2C
which patches? I am trying current U-Boot on some boards, I do not see such a list ... you mean on tegra based boards?
Quoted 1 line
adapters at boot. So, I suppose someone must have thought it a good idea!
Ok, but then, printing this "list" should done after relocation.
And the me known "I2C: ready" print on U-Boot boot, comes frominit_func_i2c() ... which is ancient code from powerpc times ...
Quoted 3 lines
Perhaps the most relevant reason: why on earth wouldn't a user want to run e.g. "i2c list" or "i2c dev" and get back a list of valid I2C adapters, as opposed to poking around in the dark to see which exist?
Didn't you need also a list of devices on each i2c bus, if you use this argument?
But for this reason we have in the new framework the "i2c bus" command, which shows all busses. This could be adapted in the DT case, to look, which buses really exist and print them. No need to do this at boottime!
Also, in an old version of the multibus/multiadapter approach I made a option to add dynamically new i2c buses for example from the environment or from the "i2c bus" command ... maybe it is worth to think about such an option in the DT case?
see here:
http://git.denx.de/?p=u-boot/u-boot-i2c.git;a=commit;h=ccb680c8cf9002232bc459e4003e3b47db5e1bf4
Patches welcome ;-)
Quoted 11 lines
Quoted 11 lines
Quoted 1 line
which fail? Also, the mapping from I2C bus number to register address is
Hmm.. there are max
TEGRA_I2C_NUM_CONTROLLERS. If one gets used, it scans the dt ... if only 1 adapter is used, only one is activated throughi2c_init...Quoted 4 lines
only created by actually scanning the whole DT; there's no need to every I2C DT node to have a /aliases entry that dictates its U-Boot device ID, so you really do have to scan everything completely up-front before you can determine which registers to use.
Quoted 6 lines
Quoted 4 lines
But the i2c bus number is coded static all over the u-boot code (Should be changed) in the code. Saying a board has an i2c eeprom on bus "2", it calls
i2c_set_bus_number(2)... this "2" must be somewhere in the dt or?Yes, the "2" must come from DT, or DT is pointless. We simply have to
Ok, puuh...
Quoted 8 lines
get rid of all the hard-coding. If we can't do that, then I'd strongly prefer to revert all the DT mess, and put the list of HW modules back into the source code. DT isn't adding anything at all unless we can actually use it exclusively.
Given how long this discussion is going on, can we please just revert the commit so that the code works for everyone who's trying to use it, then fix the problem later?
Yes, but not reverting the hole commit, please just remove the i2c_init_board() call in i2c_init_all() and test it, and send a new patch, thanks!
drivers/i2c/i2c_core.c +0 -1
@@ -246,7 +246,6 @@ void i2c_init_board(void)*/ void i2c_init_all (void ) { -i2c_init_board ();i2c_set_bus_num (CONFIG_SYS_SPD_BUS_NUM );return ; }
Or we make the "init_func_i2c()" function weak, and as the first step it is a dummy function, and boards which really need it, currently fail and must code it in board code? I would prefer this way, as it is anyway the goal to get rid of this function if all boards are using the new framework ...)
Can you or Simon try this?
@Simon:
Hmm... just looking in an older version of the new framework... i2c_init_board() was from the beginning in i2c_init_all()... why didn't this poped up when you tested the tegra patches? Are there some changes in the DT/tegra code in the meantime?
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Heiko,
Quoted 139 lines · Heiko Schocher
Hello Stephen,
Am 01.08.2013 22:32, schrieb Stephen Warren:
Quoted 29 lines · Heiko Schocher
Quoted 29 lines
Am 01.08.2013 07:39, schrieb Stephen Warren:
Quoted 7 lines · Heiko Schocher
Quoted 6 lines
Am 31.07.2013 21:31, schrieb Stephen Warren:
Quoted 2 lines · Heiko Schocher
...
2) Actually initializing or using the I2C HW. That could certainly be
Quoted 12 lines
Quoted 8 lines
Quoted 2 lines
part of the per-I2C-controller
init()function you mention.For that purpose is the
i2c_initfunction.And why we could not do step 1 when we do step 2? Why doing step 1 for hw we later do not use?
I suppose you could. It seems conceptually /far/ simpler to just scan the DT once up-front rather than having to defer all this stuff until
on the other hand we ring for every ms boot time ... and here we want to scan a complete dt with maybe a lot of nodes, we do not want to use?
Quoted 9 lines
Quoted 6 lines
you actually use an I2C bus. If you do that, how can you know how many
Quoted 2 lines
I2C buses exist without trying to use every possible one and seeing
Do I really need to know that?
Well, with the recent patches, U-Boot prints out a list of valid I2C
which patches? I am trying current U-Boot on some boards, I do not see such a list ... you mean on tegra based boards?
adapters at boot. So, I suppose someone must have thought it a good idea!
Quoted 1 line
Ok, but then, printing this "list" should done after relocation.
And the me known "I2C: ready" print on U-Boot boot, comes frominit_func_i2c()... which is ancient code from powerpc times ...Perhaps the most relevant reason: why on earth wouldn't a user want to
Quoted 3 lines
run e.g. "i2c list" or "i2c dev" and get back a list of valid I2C adapters, as opposed to poking around in the dark to see which exist?
Didn't you need also a list of devices on each i2c bus, if you use this argument?
But for this reason we have in the new framework the "i2c bus" command, which shows all busses. This could be adapted in the DT case, to look, which buses really exist and print them. No need to do this at boottime!
Also, in an old version of the multibus/multiadapter approach I made a option to add dynamically new i2c buses for example from the environment or from the "i2c bus" command ... maybe it is worth to think about such an option in the DT case?
see here:
http://git.denx.de/?p=u-boot/**u-boot-i2c.git;a=commit;h=**
ccb680c8cf9002232bc459e4003e3b**47db5e1bf4<http://git.denx.de/?p=u-boot/u-boot-i2c.git;a=commit;h=ccb680c8cf9002232bc459e4003e3b47db5e1bf4>Patches welcome ;-)
which fail? Also, the mapping from I2C bus number to register address is
Quoted 12 lines
Quoted 12 lines
Quoted 1 line
Hmm.. there are max
TEGRA_I2C_NUM_CONTROLLERS. If one gets used, it scans the dt ... if only 1 adapter is used, only one is activated throughi2c_init...only created by actually scanning the whole DT; there's no need to every
Quoted 4 lines
I2C DT node to have a /aliases entry that dictates its U-Boot device ID, so you really do have to scan everything completely up-front before you can determine which registers to use.
Quoted 8 lines
Quoted 5 lines
But the i2c bus number is coded static all over the u-boot code (Should be changed) in the code. Saying a board has an i2c eeprom on bus "2", it calls
i2c_set_bus_number(2)... this "2" must be somewhere in the dt or?Yes, the "2" must come from DT, or DT is pointless. We simply have to
Ok, puuh...
get rid of all the hard-coding. If we can't do that, then I'd strongly
Quoted 8 lines
prefer to revert all the DT mess, and put the list of HW modules back into the source code. DT isn't adding anything at all unless we can actually use it exclusively.
Given how long this discussion is going on, can we please just revert the commit so that the code works for everyone who's trying to use it, then fix the problem later?
Yes, but not reverting the hole commit, please just remove the
i2c_init_board()call ini2c_init_all()and test it, and send a new patch, thanks!drivers/i2c/i2c_core.c +0
-1@@ -246,7 +246,6 @@ void i2c_init_board(void)*/ void i2c_init_all (void ) { -i2c_init_board ();i2c_set_bus_num (CONFIG_SYS_ **SPD_BUS_NUM );return ; }Or we make the "
init_func_i2c()" function weak, and as the first step it is a dummy function, and boards which really need it, currently fail and must code it in board code? I would prefer this way, as it is anyway the goal to get rid of this function if all boards are using the new framework ...)
Quoted 7 lines
Can you or Simon try this?
@Simon:
Hmm... just looking in an older version of the new framework...i2c_init_board()was from the beginning ini2c_init_all()... why didn't this poped up when you tested the tegra patches? Are there some changes in the DT/tegra code in the meantime?
I don't remember it listing all the devices. It was a very long time ago, but when I sent my patch everything seemed to work find on Seaboard. Time is not my friend at the moment but I will see if I can make time this weekend to try this out and come up with a patch.
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Heiko SchocherQuoted 1 line · Heiko Schocher
Am 01.08.2013 22:32, schrieb Stephen Warren:
...
Quoted 13 lines
Quoted 3 lines
Given how long this discussion is going on, can we please just revert the commit so that the code works for everyone who's trying to use it, then fix the problem later?
Yes, but not reverting the hole commit, please just remove the
i2c_init_board()call ini2c_init_all()and test it, and send a new patch, thanks!drivers/i2c/i2c_core.c +0
-0
drivers/i2c/i2c_core.c void i2c_init_board(void) · line 251
Quoted 7 lines
drivers/i2c/i2c_core.c +0
-1@@ -246,7 +246,6 @@ void i2c_init_board(void)*/ void i2c_init_all (void ) { -i2c_init_board ();i2c_set_bus_num (CONFIG_SYS_SPD_BUS_NUM );return ; }
That change doesn't work. Instead of hanging immediately after printing "I2C:", it hangs after printing:
I2C: Caller requested bad clock: periph=-49, parent=2
I guess now various data is simply uninitialized since DT parsing hasn't been run at all?
This is exactly why I suggest a full revert of the problematic patch. If we do that, it should immediately allow all Tegra boards to actually work again. Right now, nobody can use or test u-boot.git/master is completely blocked by this issue. This is dangerous, since it could easily allow all manner of other problems to appear in other areas without anyone being able to notice. It's my opinion we should immediately unblock them by a revert, and then later work out how to resolve the issues.
For the record, "git revert 1f2ba722ac06393d6abe6d4734824d3b98ea9108" has one simple conflict in README, and certainly allows at least Beaver to work without issue.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Stephen,
Am 02.08.2013 23:43, schrieb Stephen Warren:
Quoted 27 lines · Heiko Schocher
Quoted 1 line
Am 01.08.2013 22:32, schrieb Stephen Warren:
...
Quoted 13 lines
Quoted 3 lines
Given how long this discussion is going on, can we please just revert the commit so that the code works for everyone who's trying to use it, then fix the problem later?
Yes, but not reverting the hole commit, please just remove the
i2c_init_board()call ini2c_init_all()and test it, and send a new patch, thanks!drivers/i2c/i2c_core.c +0
-0drivers/i2c/i2c_core.c void i2c_init_board(void) · line 251
Quoted 7 lines
drivers/i2c/i2c_core.c +0
-1@@ -246,7 +246,6 @@ void i2c_init_board(void)*/ void i2c_init_all (void ) { -i2c_init_board ();i2c_set_bus_num (CONFIG_SYS_SPD_BUS_NUM );return ; }That change doesn't work. Instead of hanging immediately after printing "I2C:", it hangs after printing:
Quoted 4 lines
I2C: Caller requested bad clock: periph=-49, parent=2
I guess now various data is simply uninitialized since DT parsing hasn't been run at all?
I do not know this ... and what happen if you make init_func_i2c() weak and default just dummy?
Quoted 3 lines
This is exactly why I suggest a full revert of the problematic patch. If we do that, it should immediately allow all Tegra boards to actually work again. Right now, nobody can use or test u-boot.git/master is
nobody = only tegra boards ... I am working fine with current mainline on other arm targets ...
Quoted 9 lines
completely blocked by this issue. This is dangerous, since it could easily allow all manner of other problems to appear in other areas without anyone being able to notice. It's my opinion we should immediately unblock them by a revert, and then later work out how to resolve the issues.
For the record, "git revert
1f2ba722ac06393d6abe6d4734824d3b98ea9108" has one simple conflict in README, and certainly allows at least Beaver to work without issue.
Ah, you mean only the switch from the tegra i2c driver to the new framework ... Hmm.. Ok, but I would prefer the way fixing the current problem ... as I think, nobody want to do this work again ...
But it is alberts descicion on the end, and if nobody has currently time for searching the real reason, the best way.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi,
Quoted 66 lines · Heiko Schocher
Hello Stephen,
Am 02.08.2013 23:43, schrieb Stephen Warren:
Quoted 31 lines · Heiko Schocher
Quoted 3 lines
Am 01.08.2013 22:32, schrieb Stephen Warren:
...
Quoted 15 lines
Given how long this discussion is going on, can we please just revert
Quoted 3 lines
the commit so that the code works for everyone who's trying to use it, then fix the problem later?
Yes, but not reverting the hole commit, please just remove the
i2c_init_board()call ini2c_init_all()and test it, and send a new patch, thanks!drivers/i2c/i2c_core.c +0
-0drivers/i2c/i2c_core.c void i2c_init_board(void) · line 251
Quoted 7 lines
drivers/i2c/i2c_core.c +0
-1@@ -246,7 +246,6 @@ void i2c_init_board(void)*/ void i2c_init_all (void ) { -i2c_init_board ();i2c_set_bus_num (CONFIG_SYS_ **SPD_BUS_NUM );return ; }That change doesn't work. Instead of hanging immediately after printing "I2C:", it hangs after printing:
Quoted 5 lines
I2C: Caller requested bad clock: periph=-49, parent=2
I guess now various data is simply uninitialized since DT parsing hasn't been run at all?
I do not know this ... and what happen if you make
init_func_i2c()weak and default just dummy?This is exactly why I suggest a full revert of the problematic patch. If
Quoted 3 lines
we do that, it should immediately allow all Tegra boards to actually work again. Right now, nobody can use or test u-boot.git/master is
nobody = only tegra boards ... I am working fine with current mainline on other arm targets ...
completely blocked by this issue. This is dangerous, since it could
Quoted 9 lines
easily allow all manner of other problems to appear in other areas without anyone being able to notice. It's my opinion we should immediately unblock them by a revert, and then later work out how to resolve the issues.
For the record, "git revert 1f2ba722ac06393d6abe6d4734824d**3b98ea9108" has one simple conflict in README, and certainly allows at least Beaver to work without issue.
Quoted 6 lines
Ah, you mean only the switch from the tegra i2c driver to the new framework ... Hmm.. Ok, but I would prefer the way fixing the current problem ... as I think, nobody want to do this work again ...
But it is alberts descicion on the end, and if nobody has currently time for searching the real reason, the best way.
Yes I think we should fix the problem properly rather than just revert. I will take a look.
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
On 08/05/2013 09:40 AM, Simon Glass wrote:
...
Quoted 2 lines
Yes I think we should fix the problem properly rather than just revert. I will take a look.
How long will fixing it properly take?
I've already received at least a couple reports from people outside NVIDIA and a couple from people inside NVIDIA who have been hit by this bug. Surely a revert-first-so-people-can-do-other-work approach is better so as to reduce the impact of this bug, unless you're planning on providing the fix in the same time-scale as a revert would take? (and the window on doing that has *long* gone). This is certainly the approach we use internally at NVIDIA for serious regressions like this. Reverting the revert once the real fix is available is trivial with git.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Stephen,
Quoted 7 lines · Stephen Warren
On 08/05/2013 09:40 AM, Simon Glass wrote:
...Quoted 2 lines
Yes I think we should fix the problem properly rather than just revert. I will take a look.
How long will fixing it properly take?
I expect to have a patch tomorrow.
Quoted 10 lines
I've already received at least a couple reports from people outside NVIDIA and a couple from people inside NVIDIA who have been hit by this bug. Surely a revert-first-so-people-can-do-other-work approach is better so as to reduce the impact of this bug, unless you're planning on providing the fix in the same time-scale as a revert would take? (and the window on doing that has *long* gone). This is certainly the approach we use internally at NVIDIA for serious regressions like this. Reverting the revert once the real fix is available is trivial with git.
Fair enough. My concern is that the I2C refactor has been a long time coming and it would be nice if it could stick :-)
How about a revert tomorrow if I don't come up with some sort of patch?
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 12 lines · Simon Glass
Hi Stephen,
On Mon, Aug 5, 2013 at 11:28 AM, Stephen Warren <[email protected] <mailto:[email protected]>> wrote:
On 08/05/2013 09:40 AM, Simon Glass wrote:
...
> Yes I think we should fix the problem properly rather than just revert.
> I will take a look.
Quoted 4 lines
How long will fixing it properly take?
I expect to have a patch tomorrow.
OK, that sounds fine.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Heiko SchocherQuoted 38 lines · Heiko Schocher
Hello Stephen,
Am 02.08.2013 23:43, schrieb Stephen Warren:
Quoted 27 lines · Heiko Schocher
Quoted 1 line
Am 01.08.2013 22:32, schrieb Stephen Warren:
...
Quoted 13 lines
Quoted 3 lines
Given how long this discussion is going on, can we please just revert the commit so that the code works for everyone who's trying to use it, then fix the problem later?
Yes, but not reverting the hole commit, please just remove the
i2c_init_board()call ini2c_init_all()and test it, and send a new patch, thanks!drivers/i2c/i2c_core.c +0
-0drivers/i2c/i2c_core.c void i2c_init_board(void) · line 251
Quoted 7 lines
drivers/i2c/i2c_core.c +0
-1@@ -246,7 +246,6 @@ void i2c_init_board(void)*/ void i2c_init_all (void ) { -i2c_init_board ();i2c_set_bus_num (CONFIG_SYS_SPD_BUS_NUM );return ; }That change doesn't work. Instead of hanging immediately after printing "I2C:", it hangs after printing:
Quoted 4 lines
I2C: Caller requested bad clock: periph=-49, parent=2
I guess now various data is simply uninitialized since DT parsing hasn't been run at all?
I do not know this ... and what happen if you make
init_func_i2c()weak and default just dummy?
Quoted 6 lines
Quoted 3 lines
This is exactly why I suggest a full revert of the problematic patch. If we do that, it should immediately allow all Tegra boards to actually work again. Right now, nobody can use or test u-boot.git/master is
nobody = only tegra boards ... I am working fine with current mainline on other arm targets ...
Sure, that is a valid distinction.
However, just because the problem doesn't affect all boards, that surely doesn't make it any more acceptable?
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Stephen WarrenHi Stephen,
Quoted 38 lines · Stephen Warren
Quoted 37 lines · Simon Glass
On Tue, Jul 30, 2013 at 3:32 PM, Stephen Warren <[email protected] <mailto:[email protected]>> wrote:
On 07/30/2013 03:21 PM, Simon Glass wrote:
> On Tue, Jul 30, 2013 at 2:00 PM, Stephen Warren
<swarren at wwwdotorg.org <mailto:[email protected]>
> <mailto:swarren at wwwdotorg.org <mailto:[email protected]>>> wrote:
...
> Oh, with the options Tegra has enabled, perhaps the call
sequence is:
>
>board_init_f()(which uses init_sequence_f[]) ->
init_func_i2c()->
>i2c_init_all(), which then calls:
>
> *i2c_init_board(), which is supposed to parse DT
> *i2c_set_bus_num(), which will callI2C_ADAP->init
>
> However, according to the comments near the top of
arch/arm/lib/crt0.S,
>board_init_f()is called in an environment where variable data
(.data,
> .bss) is not available, hencei2c_init_board()cannot possibly
operate
> correctly since its whole purpose is to fill in variable data
structures
> from DT.
>
>
> I suppose you could marki2c_controllersso that it is in the data > section with __attribute__((section(".data"))). That's what eynos does,
> for example. It is valid since SPL or BCT has set up the SDRAM.Neither .data nor .bss is available. Only .rodata and .text are.
Quoted 6 lines
Quoted 1 line
.data is available, honest. We rely on it. During relocation it gets copied.
It gets copied so that it ends up in RAM. It is assumed that before relocation, all .text/.rodata/.data is in ROM and can't be modified, and .bss in inaccessible. Technically that means we could read .data before relocation, but certainly not write to it.
Indeed, initialized data happens to be readable before relocation, but writing to data, on the other hand, is strictly forbidden. Before relocation, that is, while within board_init_f() the only writable area is GD.
Quoted 3 lines
Now in practice yes, it does work to write to .data before relocation on platforms where the U-Boot binary isn't actually in flash, but is already in ROM. However as I mention, code cannot rely on that.
Already in RAM, not ROM -- and indeed, one should not rely on this.
Quoted 14 lines
If any of this isn't true, then the documentation in
crt0.Sis wrong. I'm CC'ing Albert to see if that's the case.Quoted 10 lines
In practice, perhaps we can assume that it will work on Tegra because we know the DRAM is already set up, but then that makes Tegra work in some strange special-case way, and completely violates the constraints described in
crt0.S. We should be striving to unify how all the different chips work, rather than adding yet more strange special-cases to the initialization sequence to hack around systemic problems.Sure, this is up to you. I was just suggesting something that works and requires little effort. It isn't pure, agreed.
Quoted 6 lines
The simplest approach is probably to revert the patch in question, since it clearly violates how U-Boot is supposed to work.
It's not really up to me; I think someone like Albert should make the decision since he controls the ARM U-Boot architecture, or Tom as Tegra maintainer, or perhaps you as your patch broke the code.
board_init_f() is supposed to initialize just enough of the system to allow relocation. Is initializing i2c necessary in this context?
Amicalement,
Signature · 1 line
Albert.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Albert,
Quoted 86 lines · Albert ARIBAUD
Hi Stephen,
Quoted 8 lines · Stephen Warren
Quoted 7 lines · Simon Glass
On Tue, Jul 30, 2013 at 3:32 PM, Stephen Warren <[email protected] <mailto:[email protected]>> wrote:
On 07/30/2013 03:21 PM, Simon Glass wrote:
> On Tue, Jul 30, 2013 at 2:00 PM, Stephen Warren <swarren at wwwdotorg.org <mailto:[email protected]> > <mailto:swarren at wwwdotorg.org <mailto:[email protected]>>>Quoted 8 lines · wrote:
Quoted 8 lines
... > Oh, with the options Tegra has enabled, perhaps the call sequence is: > > board_init_f() (which uses init_sequence_f[]) -> init_func_i2c() -> > i2c_init_all(), which then calls: >Quoted 6 lines
Quoted 6 lines
Quoted 4 lines
*
i2c_init_board(), which is supposed to parse DT
*i2c_set_bus_num(), which will callI2C_ADAP->initHowever, according to the comments near the top of
arch/arm/lib/crt0.S,
>board_init_f()is called in an environment where variabledata
Quoted 2 lines
Quoted 2 lines
(.data,
> .bss) is not available, hencei2c_init_board()cannotpossibly
Quoted 7 lines
Quoted 7 lines
operate
> correctly since its whole purpose is to fill in variable data
structures
> from DT.
>
>
> I suppose you could marki2c_controllersso that it is in thedata
Quoted 8 lines
Quoted 8 lines
Quoted 1 line
section with __attribute__((section(".data"))). That's what eynos
does,
> for example. It is valid since SPL or BCT has set up the SDRAM.Neither .data nor .bss is available. Only .rodata and .text are.
.data is available, honest. We rely on it. During relocation it gets
copied.
Quoted 5 lines
It gets copied so that it ends up in RAM. It is assumed that before relocation, all .text/.rodata/.data is in ROM and can't be modified, and .bss in inaccessible. Technically that means we could read .data before relocation, but certainly not write to it.
Indeed, initialized data happens to be readable before relocation, but writing to data, on the other hand, is strictly forbidden. Before relocation, that is, while within
board_init_f()the only writable area is GD.Quoted 3 lines
Now in practice yes, it does work to write to .data before relocation on platforms where the U-Boot binary isn't actually in flash, but is already in ROM. However as I mention, code cannot rely on that.
Already in RAM, not ROM -- and indeed, one should not rely on this.
Quoted 4 lines
If any of this isn't true, then the documentation in
crt0.Sis wrong. I'm CC'ing Albert to see if that's the case.Quoted 1 line
In practice, perhaps we can assume that it will work on Tegra
because we
Quoted 1 line
Quoted 1 line
know the DRAM is already set up, but then that makes Tegra work in
some
Quoted 3 lines
Quoted 3 lines
strange special-case way, and completely violates the constraints described in
crt0.S. We should be striving to unify how all the different chips work, rather than adding yet more strangespecial-cases
Quoted 9 lines
Quoted 5 lines
to the initialization sequence to hack around systemic problems.
Sure, this is up to you. I was just suggesting something that works and requires little effort. It isn't pure, agreed.
The simplest approach is probably to revert the patch in question, since it clearly violates how U-Boot is supposed to work.
Quoted 7 lines
Quoted 3 lines
It's not really up to me; I think someone like Albert should make the decision since he controls the ARM U-Boot architecture, or Tom as Tegra maintainer, or perhaps you as your patch broke the code.
board_init_f()is supposed to initialize just enough of the system to allow relocation. Is initializing i2c necessary in this context?
I'm not sure. There must be some reason for those i2c_init calls in board_init_f() - or are they purely historical?
Quoted 5 lines
Amicalement,
--
Albert.
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Albert ARIBAUDDear Albert ARIBAUD,
Quoted 3 lines · In message <20130731000921.724f5c71@lilith> you wrote:
board_init_f()is supposed to initialize just enough of the system to allow relocation. Is initializing i2c necessary in this context?
On some boards, yes. For example, if they store the environment in an I2C attached EEPROM. Then you need I2C support early, before console, to read for example the baudrate setting.
Best regards,
Wolfgang Denk
Signature · 4 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Every time history repeats itself the price goes up.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Wolfgang,
Am 31.07.2013 07:18, schrieb Wolfgang Denk:
Quoted 10 lines
Dear Albert ARIBAUD,
Quoted 3 lines · In message<20130731000921.724f5c71@lilith> you wrote:
board_init_f()is supposed to initialize just enough of the system to allow relocation. Is initializing i2c necessary in this context?On some boards, yes. For example, if they store the environment in an I2C attached EEPROM. Then you need I2C support early, before console, to read for example the baudrate setting.
Ah, yes. Hmm.. how did in such a case the puts() call in init_func_i2c() work?
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Wolfgang DenkHi Wolfgang,
Quoted 10 lines · Wolfgang Denk
Dear Albert ARIBAUD,
Quoted 3 lines · In message <20130731000921.724f5c71@lilith> you wrote:
board_init_f()is supposed to initialize just enough of the system to allow relocation. Is initializing i2c necessary in this context?On some boards, yes. For example, if they store the environment in an I2C attached EEPROM. Then you need I2C support early, before console, to read for example the baudrate setting.
Thanks, so some I2C reads are needed. Next question: on these boards, do these I2C reads require DT reads? Maybe a few hard-coded low level I2C reads are enough. I guess DT writes are completely unneeded at that point. Also, why exactly do I2C and, as the case may be, DT, need to write to .data?
More generally, while I think the board_init_f() part of U-Boot should be as short and compact as possible, I understand and admit that it might have to read from just about any (local) storage resource, be it environment or DT or any stored information it needs.
On the other hand, it may be hard to immediately know what functions throughout U-boot are safe to call from within board_init_f(); maybe we should start thinking about checking and marking these, the simplest way being to suffix them with "_f" once we have made sure they are safe to call from within board_init_f().
But we should strictly limit the scope of board_init_f() or we'll find the board_init_f()/board_init_r() pair following a patch similar to the SPL/U-Boot pair, where SPL started out as a tiny helper piece of code and ending up a resizeable (and, I dare to say, sizeable as well) kind of U-boot. If we let too many features slip in board_init_f(), it'll blur into a board_init_r() like and before we know it, it'll *require* DDR, and write access to it too...
So, board_init_() should *strictly* be limited to setting up a console (for information purposes) and giving access to DDR while in the same time never writing to it itself. Bonus points if it can limit itself to *enabling* and postpone any *optimizing*(I am thinking of DDR settings here and no, I don't have specific existing cases in mind; just sayin').
In the present instance, I'd rather we either:
- removed dependency on DT etc. by using "hard-coded" low level I2C reads for those boards that need it (I assume that for each of these boards the I2C slave, offset, and length to read are constant) in _f phase, or
- parsed the _f phase looking for offending functions or calls which write to .data or .bss and fix them, suffixing them with _f; in essence, that amounts to starting the implementation of my suggestion above alongside fixing the issue at hand.
The first approach is rather "let's bring the thing back up first", so it does not have my preference, but I would understand the need to quickly fix things.
The second approach seems to be going in the same direction as Heiko's proposal of 07:52 +0200, which I thus second provided it is applicable to all the boards Wolfgang had in mind.
Quoted 3 lines
Best regards,
Wolfgang Denk
Amicalement,
Signature · 1 line
Albert.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Albert,
Am 31.07.2013 09:06, schrieb Albert ARIBAUD:
Quoted 11 lines
Hi Wolfgang,
Quoted 7 lines · Wolfgang Denk
Dear Albert ARIBAUD,
Quoted 3 lines · In message<20130731000921.724f5c71@lilith> you wrote:
board_init_f()is supposed to initialize just enough of the system to allow relocation. Is initializing i2c necessary in this context?
Quoted 6 lines
Quoted 3 lines
On some boards, yes. For example, if they store the environment in an I2C attached EEPROM. Then you need I2C support early, before console, to read for example the baudrate setting.
Thanks, so some I2C reads are needed. Next question: on these boards, do these I2C reads require DT reads? Maybe a few hard-coded low level
If I understand the tegra driver, dt reads are needed for init the i2c driver ... but this should be done in the i2c driver init function ... and this should be possible without writes
Quoted 3 lines
I2C reads are enough. I guess DT writes are completely unneeded at that point. Also, why exactly do I2C and, as the case may be, DT, need to write to .data?
I2c do not write before relocation (I hope so), see:drivers/i2c/i2c_core.c
All writes to internal i2c structs are (should be) protected by a:
if (gd->flags & GD_FLG_RELOC) {
but using i2c write/reads are possible.
Quoted 10 lines
More generally, while I think the
board_init_f()part of U-Boot should be as short and compact as possible, I understand and admit that it might have to read from just about any (local) storage resource, be it environment or DT or any stored information it needs.On the other hand, it may be hard to immediately know what functions throughout U-boot are safe to call from within
board_init_f(); maybe we should start thinking about checking and marking these, the simplest way being to suffix them with "_f" once we have made sure they are safe to call from withinboard_init_f().
Hmmm... Maybe instead we should think (also in thinking common bring up for all boards) about:
getting rid of board_init_f in u-boot code, instead use for all boards spl code to init needed things and copy and relocate u-boot to ram in spl code ... so we have in u-boot no longer such restictions ... but thats just an idea which whirs in my head ... without thinking to deep in it.
But this approach would have some advantages ...
Quoted 14 lines
But we should strictly limit the scope of
board_init_f()or we'll find the board_init_f()/board_init_r() pair following a patch similar to the SPL/U-Boot pair, where SPL started out as a tiny helper piece of code and ending up a resizeable (and, I dare to say, sizeable as well) kind of U-boot. If we let too many features slip inboard_init_f(), it'll blur into aboard_init_r()like and before we know it, it'll *require* DDR, and write access to it too...So,
board_init_()should *strictly* be limited to setting up a console (for information purposes) and giving access to DDR while in the same time never writing to it itself. Bonus points if it can limit itself to *enabling* and postpone any *optimizing*(I am thinking of DDR settings here and no, I don't have specific existing cases in mind; just sayin').
Quoted 6 lines
In the present instance, I'd rather we either:
- removed dependency on DT etc. by using "hard-coded" low level I2C reads for those boards that need it (I assume that for each of these boards the I2C slave, offset, and length to read are constant) in _f phase, or
But DT is used for initializing the i2c driver in tegra ...
Quoted 8 lines
- parsed the _f phase looking for offending functions or calls which write to .data or .bss and fix them, suffixing them with _f; in essence, that amounts to starting the implementation of my suggestion above alongside fixing the issue at hand.
The first approach is rather "let's bring the thing back up first", so it does not have my preference, but I would understand the need to quickly fix things.
Yes.
Quoted 3 lines
The second approach seems to be going in the same direction as Heiko's proposal of 07:52 +0200, which I thus second provided it is applicable to all the boards Wolfgang had in mind.
Lets do us this step as fixup ;-)
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Heiko,
Quoted 9 lines · Heiko Schocher
Quoted 5 lines
On the other hand, it may be hard to immediately know what functions throughout U-boot are safe to call from within
board_init_f(); maybe we should start thinking about checking and marking these, the simplest way being to suffix them with "_f" once we have made sure they are safe to call from withinboard_init_f().Hmmm... Maybe instead we should think (also in thinking common bring up for all boards) about:
Quoted 7 lines
getting rid of
board_init_fin u-boot code, instead use for all boards spl code to init needed things and copy and relocate u-boot to ram in spl code ... so we have in u-boot no longer such restictions ... but thats just an idea which whirs in my head ... without thinking to deep in it.But this approach would have some advantages ...
Well, the original SPL was basically board_init_f() plus some code to copy U-Boot from wherever it was to DDR, so it was tightly linked to board_init_f(). But... first, SPL has evolved into a "U-Boot lite" where much can happen beyond board_init_f() -- think Falcon mode, for instance -- and second, there are boards which do not have SPL at all, and their board_init_f() can thus not be "moved to SPL".
So no, I don't think we can move U-Boot's design from "_f/_r" to "SPL/U-Boot".
Quoted 14 lines
Quoted 14 lines
But we should strictly limit the scope of
board_init_f()or we'll find the board_init_f()/board_init_r() pair following a patch similar to the SPL/U-Boot pair, where SPL started out as a tiny helper piece of code and ending up a resizeable (and, I dare to say, sizeable as well) kind of U-boot. If we let too many features slip inboard_init_f(), it'll blur into aboard_init_r()like and before we know it, it'll *require* DDR, and write access to it too...So,
board_init_()should *strictly* be limited to setting up a console (for information purposes) and giving access to DDR while in the same time never writing to it itself. Bonus points if it can limit itself to *enabling* and postpone any *optimizing*(I am thinking of DDR settings here and no, I don't have specific existing cases in mind; just sayin').
Quoted 8 lines
Quoted 6 lines
In the present instance, I'd rather we either:
- removed dependency on DT etc. by using "hard-coded" low level I2C reads for those boards that need it (I assume that for each of these boards the I2C slave, offset, and length to read are constant) in _f phase, or
But DT is used for initializing the i2c driver in tegra ...
Alright, out goes this proposal. Anyway, I didn't like it best. :)
Quoted 9 lines
Quoted 8 lines
- parsed the _f phase looking for offending functions or calls which write to .data or .bss and fix them, suffixing them with _f; in essence, that amounts to starting the implementation of my suggestion above alongside fixing the issue at hand.
The first approach is rather "let's bring the thing back up first", so it does not have my preference, but I would understand the need to quickly fix things.
Quoted 7 lines
Yes.
Quoted 3 lines
The second approach seems to be going in the same direction as Heiko's proposal of 07:52 +0200, which I thus second provided it is applicable to all the boards Wolfgang had in mind.
Lets do us this step as fixup ;-)
Alright too. :)
Quoted 2 lines
bye,
Heiko
Amicalement,
Signature · 1 line
Albert.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Albert,
Am 31.07.2013 10:16, schrieb Albert ARIBAUD:
Quoted 19 lines
Hi Heiko,
Quoted 15 lines · Heiko Schocher
Quoted 5 lines
On the other hand, it may be hard to immediately know what functions throughout U-boot are safe to call from within
board_init_f(); maybe we should start thinking about checking and marking these, the simplest way being to suffix them with "_f" once we have made sure they are safe to call from withinboard_init_f().Hmmm... Maybe instead we should think (also in thinking common bring up for all boards) about:
getting rid of
board_init_fin u-boot code, instead use for all boards spl code to init needed things and copy and relocate u-boot to ram in spl code ... so we have in u-boot no longer such restictions ... but thats just an idea which whirs in my head ... without thinking to deep in it.
Quoted 8 lines
Quoted 1 line
But this approach would have some advantages ...
Well, the original SPL was basically
board_init_f()plus some code to copy U-Boot from wherever it was to DDR, so it was tightly linked toboard_init_f(). But... first, SPL has evolved into a "U-Boot lite" where much can happen beyondboard_init_f()-- think Falcon mode, for instance -- and second, there are boards which do not have SPL at all, and theirboard_init_f()can thus not be "moved to SPL".
Hmm... all boards use board_init_f ... and spl do pieces from board_init_f So why should it not be possible to do all init things in spl code? Code beyond board_init_f is optional ...
And yes, there are a lot of boards, which have no spl, but they can execute spl code (thinking of the lof of powerpc boards which booting from nor flash ... spl code can also run from nor ... and copy the u-boot piece of the image to ram, relocate it ...)
And yes, a side effect could be, that all boards can use Falcon boot mode.
;-)
Quoted 2 lines
So no, I don't think we can move U-Boot's design from "_f/_r" to "SPL/U-Boot".
I am not sure ...
Quoted 16 lines
Quoted 16 lines
Quoted 16 lines
But we should strictly limit the scope of
board_init_f()or we'll find the board_init_f()/board_init_r() pair following a patch similar to the SPL/U-Boot pair, where SPL started out as a tiny helper piece of code and ending up a resizeable (and, I dare to say, sizeable as well) kind of U-boot. If we let too many features slip inboard_init_f(), it'll blur into aboard_init_r()like and before we know it, it'll *require* DDR, and write access to it too...So,
board_init_()should *strictly* be limited to setting up a console (for information purposes) and giving access to DDR while in the same time never writing to it itself. Bonus points if it can limit itself to *enabling* and postpone any *optimizing*(I am thinking of DDR settings here and no, I don't have specific existing cases in mind; just sayin').In the present instance, I'd rather we either:
Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
- removed dependency on DT etc. by using "hard-coded" low level I2C reads for those boards that need it (I assume that for each of these boards the I2C slave, offset, and length to read are constant) in _f phase, or
But DT is used for initializing the i2c driver in tegra ...
Alright, out goes this proposal. Anyway, I didn't like it best. :)
Yes.
Quoted 11 lines
Quoted 11 lines
Quoted 8 lines
- parsed the _f phase looking for offending functions or calls which write to .data or .bss and fix them, suffixing them with _f; in essence, that amounts to starting the implementation of my suggestion above alongside fixing the issue at hand.
The first approach is rather "let's bring the thing back up first", so it does not have my preference, but I would understand the need to quickly fix things.
Yes.
Quoted 7 lines
Quoted 5 lines
Quoted 3 lines
The second approach seems to be going in the same direction as Heiko's proposal of 07:52 +0200, which I thus second provided it is applicable to all the boards Wolfgang had in mind.
Lets do us this step as fixup ;-)
Alright too. :)
Ok.
@Stephen, Simon: Could anyone from you do this 2 steps?
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi Heiko,
Quoted 31 lines · Heiko Schocher
Hello Albert,
Am 31.07.2013 10:16, schrieb Albert ARIBAUD:
Quoted 19 lines
Hi Heiko,
Quoted 15 lines · Heiko Schocher
Quoted 5 lines
On the other hand, it may be hard to immediately know what functions throughout U-boot are safe to call from within
board_init_f(); maybe we should start thinking about checking and marking these, the simplest way being to suffix them with "_f" once we have made sure they are safe to call from withinboard_init_f().Hmmm... Maybe instead we should think (also in thinking common bring up for all boards) about:
getting rid of
board_init_fin u-boot code, instead use for all boards spl code to init needed things and copy and relocate u-boot to ram in spl code ... so we have in u-boot no longer such restictions ... but thats just an idea which whirs in my head ... without thinking to deep in it.Quoted 8 lines
Quoted 1 line
But this approach would have some advantages ...
Well, the original SPL was basically
board_init_f()plus some code to copy U-Boot from wherever it was to DDR, so it was tightly linked toboard_init_f(). But... first, SPL has evolved into a "U-Boot lite" where much can happen beyondboard_init_f()-- think Falcon mode, for instance -- and second, there are boards which do not have SPL at all, and theirboard_init_f()can thus not be "moved to SPL".
Quoted 3 lines
Hmm... all boards use
board_init_f... and spl do pieces fromboard_init_fSo why should it not be possible to do all init things in spl code? Code beyondboard_init_fis optional ...
It is, in the original "SPL is just board_init_f plus some copying" view. In the current "SPL is U-boot only not full-featured", it becomes false.
Quoted 5 lines
And yes, there are a lot of boards, which have no spl, but they can execute spl code (thinking of the lof of powerpc boards which booting from nor flash ... spl code can also run from nor ... and copy the u-boot piece of the image to ram, relocate it ...)
Quoted 8 lines
And yes, a side effect could be, that all boards can use Falcon boot mode.
;-)
Quoted 2 lines
So no, I don't think we can move U-Boot's design from "_f/_r" to "SPL/U-Boot".
I am not sure ...
I see this approach of likening SPL to _f and U-boot to _r as forcing a dual-binary model onto all boards whereas not all boards require it. I prefer a model where _f can exist, _r can exist, and for each target, the maintainer decides which binaries are built and for each one, whether _f and/or _r is present and what _r does.
Amicalement,
Signature · 1 line
Albert.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hi,
Quoted 59 lines · Albert ARIBAUD
Hi Heiko,
Quoted 9 lines · Heiko Schocher
Hello Albert,
Am 31.07.2013 10:16, schrieb Albert ARIBAUD:
Quoted 6 lines
Hi Heiko,
Quoted 2 lines · Heiko Schocher
Quoted 2 lines
On the other hand, it may be hard to immediately know what functions throughout U-boot are safe to call from within
board_init_f(); maybewe
Quoted 2 lines
Quoted 2 lines
Quoted 2 lines
Quoted 2 lines
should start thinking about checking and marking these, the simplest way being to suffix them with "_f" once we have made sure they are
safe
Quoted 13 lines
Quoted 13 lines
Quoted 12 lines
Quoted 1 line
to call from within
board_init_f().Hmmm... Maybe instead we should think (also in thinking common bring up for all boards) about:
getting rid of
board_init_fin u-boot code, instead use for all boards spl code to init needed things and copy and relocate u-boot to ram in spl code ... so we have in u-boot no longer such restictions ... but thats just an idea which whirs in my head ... without thinking to deep in it.But this approach would have some advantages ...
Quoted 8 lines
Quoted 6 lines
Well, the original SPL was basically
board_init_f()plus some code to copy U-Boot from wherever it was to DDR, so it was tightly linked toboard_init_f(). But... first, SPL has evolved into a "U-Boot lite" where much can happen beyondboard_init_f()-- think Falcon mode, for instance -- and second, there are boards which do not have SPL at all, and theirboard_init_f()can thus not be "moved to SPL".Hmm... all boards use
board_init_f... and spl do pieces from
board_init_fQuoted 2 lines
So why should it not be possible to do all init things in spl code? Code beyond
board_init_fis optional ...It is, in the original "SPL is just
board_init_fplus some copying" view. In the current "SPL is U-boot only not full-featured", it becomes false.Quoted 6 lines
And yes, there are a lot of boards, which have no spl, but they can execute spl code (thinking of the lof of powerpc boards which booting from nor flash ... spl code can also run from nor ... and copy the u-boot piece of the image to ram, relocate it ...)
And yes, a side effect could be, that all boards can use Falcon boot
mode.
Quoted 6 lines
;-)
Quoted 2 lines
So no, I don't think we can move U-Boot's design from "_f/_r" to "SPL/U-Boot".
Quoted 8 lines
Quoted 1 line
I am not sure ...
I see this approach of likening SPL to _f and U-boot to _r as forcing a dual-binary model onto all boards whereas not all boards require it. I prefer a model where _f can exist, _r can exist, and for each target, the maintainer decides which binaries are built and for each one, whether _f and/or _r is present and what _r does.
I am not really any clearer as to what should be done here.
Previously on ARM i2c init generally happened in board_init_r(). This has changed now, and so boards which need to do some init (e.g. reading and storing DT information) to make i2c work are going to have problems if they cannot access any memory (yes we could put it in global_data I suppose).
It sounds like the need for early i2c is rare, so we could perhaps create an option like CONFIG_SYS_EARLY_I2C to enable this?
While I agree that minimising code in board_init_f() is a great idea, if we have one case that needs it, then we need to deal with the problem.
Although did I mention that it does seem silly to me to solve what is an entirely hypothetical problem on Tegra and (I think) any other modern ARM SOC that uses SPL? After all, SDRAM is fully available on these SOCs and in fact setting that up and getting U-Boot loaded into RAM is the purpose of the SPL stage! To my mind, SPL has taken over this responsibility of board_init_f(). Thoughts? Maybe a minor rethink of SPL/board_init_f()/board_init_r() is in order?
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Simon,
Am 31.07.2013 14:30, schrieb Simon Glass:
Quoted 73 lines
Hi,
Quoted 59 lines · Albert ARIBAUD
Hi Heiko,
Quoted 9 lines · Heiko Schocher
Hello Albert,
Am 31.07.2013 10:16, schrieb Albert ARIBAUD:
Quoted 6 lines
Hi Heiko,
Quoted 2 lines · Heiko Schocher
Quoted 2 lines
On the other hand, it may be hard to immediately know what functions throughout U-boot are safe to call from within
board_init_f(); maybewe
Quoted 2 lines
Quoted 2 lines
Quoted 2 lines
Quoted 2 lines
should start thinking about checking and marking these, the simplest way being to suffix them with "_f" once we have made sure they are
safe
Quoted 13 lines
Quoted 13 lines
Quoted 12 lines
Quoted 1 line
to call from within
board_init_f().Hmmm... Maybe instead we should think (also in thinking common bring up for all boards) about:
getting rid of
board_init_fin u-boot code, instead use for all boards spl code to init needed things and copy and relocate u-boot to ram in spl code ... so we have in u-boot no longer such restictions ... but thats just an idea which whirs in my head ... without thinking to deep in it.But this approach would have some advantages ...
Quoted 8 lines
Quoted 6 lines
Well, the original SPL was basically
board_init_f()plus some code to copy U-Boot from wherever it was to DDR, so it was tightly linked toboard_init_f(). But... first, SPL has evolved into a "U-Boot lite" where much can happen beyondboard_init_f()-- think Falcon mode, for instance -- and second, there are boards which do not have SPL at all, and theirboard_init_f()can thus not be "moved to SPL".Hmm... all boards use
board_init_f... and spl do pieces from
board_init_fQuoted 2 lines
So why should it not be possible to do all init things in spl code? Code beyond
board_init_fis optional ...It is, in the original "SPL is just
board_init_fplus some copying" view. In the current "SPL is U-boot only not full-featured", it becomes false.Quoted 6 lines
And yes, there are a lot of boards, which have no spl, but they can execute spl code (thinking of the lof of powerpc boards which booting from nor flash ... spl code can also run from nor ... and copy the u-boot piece of the image to ram, relocate it ...)
And yes, a side effect could be, that all boards can use Falcon boot
mode.
Quoted 6 lines
;-)
Quoted 2 lines
So no, I don't think we can move U-Boot's design from "_f/_r" to "SPL/U-Boot".
Quoted 8 lines
Quoted 1 line
I am not sure ...
I see this approach of likening SPL to _f and U-boot to _r as forcing a dual-binary model onto all boards whereas not all boards require it. I prefer a model where _f can exist, _r can exist, and for each target, the maintainer decides which binaries are built and for each one, whether _f and/or _r is present and what _r does.
Quoted 3 lines
I am not really any clearer as to what should be done here.
Previously on ARM i2c init generally happened in
board_init_r(). This has
really? The init_func_i2c() call is not introduced through the i2c multibus approach ...
Quoted 9 lines
changed now, and so boards which need to do some init (e.g. reading and storing DT information) to make i2c work are going to have problems if they cannot access any memory (yes we could put it in
global_dataI suppose).It sounds like the need for early i2c is rare, so we could perhaps create an option like
CONFIG_SYS_EARLY_I2Cto enable this?While I agree that minimising code in
board_init_f()is a great idea, if we have one case that needs it, then we need to deal with the problem.
From my side, yes. But this different to powerpc!
Quoted 7 lines
Although did I mention that it does seem silly to me to solve what is an entirely hypothetical problem on Tegra and (I think) any other modern ARM SOC that uses SPL? After all, SDRAM is fully available on these SOCs and in fact setting that up and getting U-Boot loaded into RAM is the purpose of the SPL stage! To my mind, SPL has taken over this responsibility of
board_init_f(). Thoughts? Maybe a minor rethink of SPL/board_init_f()/board_init_r() is in order?
Yes, but board_init_f is used in spl code, or? And it is not only ram settings, maybe read baudrate setting in an i2c epprom ...
We can make init_func_i2c() weak, and in the first step a dummy function and see, which boards really need it.
Nevertheless, why the tegra i2c driver do not call process_node() from the i2c_init function? This must be fixed I think, as it is not good to do some setup needed for i2c in board_init() and other in i2c_init to have a working i2c adapter ...
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Heiko SchocherQuoted 2 lines · Heiko Schocher
Am 31.07.2013 10:16, schrieb Albert ARIBAUD:
Quoted 1 line · Heiko Schocher
...
Quoted 31 lines
Quoted 9 lines
Quoted 9 lines
Quoted 8 lines
In the present instance, I'd rather we either:
- removed dependency on DT etc. by using "hard-coded" low level I2C reads for those boards that need it (I assume that for each of
these
boards the I2C slave, offset, and length to read are constant)
in _f
phase, orQuoted 3 lines
Quoted 1 line
But DT is used for initializing the i2c driver in tegra ...
Alright, out goes this proposal. Anyway, I didn't like it best. :)
Yes.
Quoted 16 lines
Quoted 16 lines
Quoted 9 lines
- parsed the _f phase looking for offending functions or calls which write to .data or .bss and fix them, suffixing them with _f; in essence, that amounts to starting the implementation of my
suggestion
above alongside fixing the issue at hand.The first approach is rather "let's bring the thing back up first", so it does not have my preference, but I would understand the need to quickly fix things.
Yes.
Quoted 3 lines
The second approach seems to be going in the same direction as Heiko's proposal of 07:52 +0200, which I thus second provided it is applicable to all the boards Wolfgang had in mind.
Quoted 7 lines
Quoted 3 lines
Quoted 1 line
Lets do us this step as fixup ;-)
Alright too. :)
Ok.
@Stephen, Simon: Could anyone from you do this 2 steps?
Sorry, I really can't tell which 2 steps you mean? I don't see any email in any timezone with minutes==:52...
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Hello Stephen,
Am 31.07.2013 21:41, schrieb Stephen Warren:
Quoted 37 lines · Heiko Schocher
Quoted 2 lines
Am 31.07.2013 10:16, schrieb Albert ARIBAUD:
Quoted 1 line · Heiko Schocher
...
Quoted 33 lines
Quoted 9 lines
Quoted 9 lines
Quoted 8 lines
In the present instance, I'd rather we either:
- removed dependency on DT etc. by using "hard-coded" low level I2C reads for those boards that need it (I assume that for each of
these
boards the I2C slave, offset, and length to read are constant)
in _f
phase, orQuoted 3 lines
Quoted 1 line
But DT is used for initializing the i2c driver in tegra ...
Alright, out goes this proposal. Anyway, I didn't like it best. :)
Yes.
Quoted 18 lines
Quoted 17 lines
Quoted 9 lines
- parsed the _f phase looking for offending functions or calls which write to .data or .bss and fix them, suffixing them with _f; in essence, that amounts to starting the implementation of my
suggestion
above alongside fixing the issue at hand.The first approach is rather "let's bring the thing back up first", so it does not have my preference, but I would understand the need to quickly fix things.
Yes.
Quoted 3 lines
The second approach seems to be going in the same direction as Heiko's proposal of 07:52 +0200, which I thus second provided it is applicable to all the boards Wolfgang had in mind.
Lets do us this step as fixup ;-)
Quoted 8 lines
Quoted 5 lines
Quoted 1 line
Alright too. :)
Ok.
@Stephen, Simon: Could anyone from you do this 2 steps?
Sorry, I really can't tell which 2 steps you mean? I don't see any email in any timezone with minutes==:52...
http://lists.denx.de/pipermail/u-boot/2013-July/159853.html
(you were also on Cc ...)
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Albert ARIBAUDDear Albert,
Quoted 10 lines · In message <20130731090644.2b4ce215@lilith> you wrote:
Quoted 4 lines
On some boards, yes. For example, if they store the environment in an I2C attached EEPROM. Then you need I2C support early, before console, to read for example the baudrate setting.
Thanks, so some I2C reads are needed. Next question: on these boards, do these I2C reads require DT reads? Maybe a few hard-coded low level I2C reads are enough. I guess DT writes are completely unneeded at that point. Also, why exactly do I2C and, as the case may be, DT, need to write to .data?
A quick check shows that it's actually more than 50 boards that store the env in EEPROM (I'm surprised myself about this large number, given the disadvantages of such an approach), but AFAICT none of these needs to access the DT that early.
Quoted 4 lines
More generally, while I think the
board_init_f()part of U-Boot should be as short and compact as possible, I understand and admit that it might have to read from just about any (local) storage resource, be it environment or DT or any stored information it needs.
Agreed - actually we're entering an area hear that smells pretty strong like device model reorganization ;-)
Quoted 5 lines
So,
board_init_()should *strictly* be limited to setting up a console (for information purposes) and giving access to DDR while in the same time never writing to it itself. Bonus points if it can limit itself to *enabling* and postpone any *optimizing*(I am thinking of DDR settings here and no, I don't have specific existing cases in mind; just sayin').
Agreed!
Best regards,
Wolfgang Denk
Signature · 5 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
A good marriage would be between a blind wife and deaf husband.
-- Michel de MontaignePATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Albert ARIBAUDHello Albert,
Am 31.07.2013 00:09, schrieb Albert ARIBAUD:
Quoted 50 lines
Hi Stephen,
Quoted 38 lines · Stephen Warren
Quoted 37 lines · Simon Glass
On Tue, Jul 30, 2013 at 3:32 PM, Stephen Warren<[email protected] <mailto:[email protected]>> wrote:
On 07/30/2013 03:21 PM, Simon Glass wrote:
> On Tue, Jul 30, 2013 at 2:00 PM, Stephen Warren
<swarren at wwwdotorg.org<mailto:[email protected]>
> <mailto:swarren at wwwdotorg.org<mailto:[email protected]>>> wrote:
...
> Oh, with the options Tegra has enabled, perhaps the call
sequence is:
>
>board_init_f()(which uses init_sequence_f[]) ->
init_func_i2c()->
>i2c_init_all(), which then calls:
>
> *i2c_init_board(), which is supposed to parse DT
> *i2c_set_bus_num(), which will callI2C_ADAP->init
>
> However, according to the comments near the top of
arch/arm/lib/crt0.S,
>board_init_f()is called in an environment where variable data
(.data,
> .bss) is not available, hencei2c_init_board()cannot possibly
operate
> correctly since its whole purpose is to fill in variable data
structures
> from DT.
>
>
> I suppose you could marki2c_controllersso that it is in the data > section with __attribute__((section(".data"))). That's what eynos does,
> for example. It is valid since SPL or BCT has set up the SDRAM.Neither .data nor .bss is available. Only .rodata and .text are.
Quoted 6 lines
Quoted 1 line
.data is available, honest. We rely on it. During relocation it gets copied.
It gets copied so that it ends up in RAM. It is assumed that before relocation, all .text/.rodata/.data is in ROM and can't be modified, and .bss in inaccessible. Technically that means we could read .data before relocation, but certainly not write to it.
Quoted 4 lines
Indeed, initialized data happens to be readable before relocation, but writing to data, on the other hand, is strictly forbidden. Before relocation, that is, while within
board_init_f()the only writable area is GD.
Yes.
Quoted 23 lines
Quoted 3 lines
Now in practice yes, it does work to write to .data before relocation on platforms where the U-Boot binary isn't actually in flash, but is already in ROM. However as I mention, code cannot rely on that.
Already in RAM, not ROM -- and indeed, one should not rely on this.
Quoted 17 lines
If any of this isn't true, then the documentation in
crt0.Sis wrong. I'm CC'ing Albert to see if that's the case.Quoted 10 lines
In practice, perhaps we can assume that it will work on Tegra because we know the DRAM is already set up, but then that makes Tegra work in some strange special-case way, and completely violates the constraints described in
crt0.S. We should be striving to unify how all the different chips work, rather than adding yet more strange special-cases to the initialization sequence to hack around systemic problems.Sure, this is up to you. I was just suggesting something that works and requires little effort. It isn't pure, agreed.
The simplest approach is probably to revert the patch in question, since it clearly violates how U-Boot is supposed to work.
Quoted 6 lines
Quoted 3 lines
It's not really up to me; I think someone like Albert should make the decision since he controls the ARM U-Boot architecture, or Tom as Tegra maintainer, or perhaps you as your patch broke the code.
board_init_f()is supposed to initialize just enough of the system to allow relocation. Is initializing i2c necessary in this context?
Not on tegra I think. It is needed for example for reading ram setup data from an eeprom ...
maybe we should do here:
- remove init_func_i2c() completly from board_init_f, as a goal from the new i2c framework is, to get rid of i2c_init* calls all over the code. If boards fail, they should add i2c_set_bus_num() where they need it
- or at least make init_func_i2c() weak, and define it only on boards, which need it.
- adapt i2c tegra driver:
each i2c adapter has its own init function. Do the necessary inits there for the i2c tegra driver.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Stephen WarrenHello Stephen,
Am 30.07.2013 22:00, schrieb Stephen Warren:
Quoted 78 lines · Stephen Warren
Quoted 64 lines · Heiko Schocher
Quoted 26 lines
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 23 lines · Heiko Schocher
Quoted 5 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra
i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git bisect" points at this patch. Olof reported the issue to me. Can you take a look at the code and see what might be wrong? Thanks.
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
Quoted 6 lines
Quoted 3 lines
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
Yes, there's some initialization order issue; before this patch, I see the I2C controller initialization, followed by some usage of it:
----------
U-Boot SPL 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47) U-Boot 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47)TEGRA30
Board: NVIDIA Beaver DRAM: 2 GiB i2c: controller bus 0 at 7000d000, periph_id 47, speed 100000: ok i2c: controller bus 1 at 7000c000, periph_id 12, speed 100000: ok i2c: controller bus 2 at 7000c400, periph_id 54, speed 100000: ok i2c: controller bus 3 at 7000c500, periph_id 67, speed 100000: ok i2c: controller bus 4 at 7000c700, periph_id 103, speed 100000: ok MMC: i2c_write: chip=0x2d, addr=0x32, len=0x1----------
However with this patch applied, something starts using the controller immediately, without it having been "probed" from device-tree:
----------
U-Boot SPL 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28) U-Boot 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28)TEGRA30
Board: NVIDIA Beaver I2C: i2c_init(speed=100000, slaveaddr=0xfe)----------
Quoted 7 lines
i2c_inittouches HW, but sinceprocess_nodes()hasn't run, none of the parameters like register address or clock ID are yet known.I think this call comes from init_sequence_f[] ->
init_func_i2c()->i2c_init()->i2c_init()==__i2c_init()->i2c_init_bus()->I2C_ADAP->init(), although I didn't validate that in the running code, just by code inspection.Oh, with the options Tegra has enabled, perhaps the call sequence is:
board_init_f()(which uses init_sequence_f[]) ->init_func_i2c()->i2c_init_all(), which then calls:
Quoted 8 lines
*
i2c_init_board(), which is supposed to parse DT
*i2c_set_bus_num(), which will callI2C_ADAP->initHowever, according to the comments near the top of
arch/arm/lib/crt0.S,board_init_f()is called in an environment where variable data (.data, .bss) is not available, hencei2c_init_board()cannot possibly operate correctly since its whole purpose is to fill in variable data structures from DT.
Yes, you are right, this would not work on tegra.
Quoted 4 lines
I think the only way to solve this is not to use DT to instantiate devices, or to move the I2C initialization after relocation etc., although the latter won't work on boards that need I2C up in order to initialize DRAM.
Yes.
Quoted 2 lines
It seems like much of U-Boot's initialization architecture simply wasn't designed to accommodate dynamically initializing devices from DT.
Yes.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Stephen WarrenOn 07/30/2013 02:00 PM, Stephen Warren wrote:
...
(discussion of instantiating/initializing I2C devices from device tree, and the fact U-Boot attempts to do that before .data or malloc can be touched/used, which doesn't work)
...
Quoted 2 lines
It seems like much of U-Boot's initialization architecture simply wasn't designed to accommodate dynamically initializing devices from DT.
I thought about this a little over the weekend. I think the solution here may be to break up U-Boot initialization steps more explicitly, even into more separate binaries.
There are at least the following separate things going on right now (admittedly some of these are slightly loosely defined, and some are currently lumped into the main image's _f _r steps/tables):
* Basic CPU initialization.
* Initializing SDRAM controller (not required on Tegra; boot ROM already does this). This is what the SPL is typically used for.
* Tegra-specific: Run code on the AVP (boot) CPU which starts the main CPU complex running. On Tegra, we've hijacked the SPL to do this separate step.
* Copying U-Boot to SDRAM now it's available and/or performing initialization steps that require SDRAM.
* Sizing SDRAM, perhaps by
* Relocating the U-Boot binary to top of RAM (at least if relocation is enabled).
* The main U-Boot binary.
Some more steps I've probably forgotten while I write this email!
Now, obviously some of those steps run in a very restricted environment.
For example, on systems where the boot ROM doesn't exist or doesn't enable SDRAM, then steps before U-Boot initializes it can't touch .data/malloc etc.
It's probably not a good idea to make the code that initializes and probes SDRAM have to retrieve information about the SPD I2C controller (if one exists) from DT; it'd probably be better to hard-code the I2C controller information into that part of U-Boot, and defer any complex dynamic stuff to later. This is at least partially fallout from the previous point.
The order of some of those bullet points above might even vary a little depending on the SoC.
For example, on Tegra, we have to do basic CPU initialization on two different CPUs; once on the AVP when we first start running any code at all, and separately on the main CPU complex after it has been booted. Those two CPUs are different ARM architectures too. And on Tegra we don't have to initialize SDRAM at all; the boot ROM does it.
So, I wonder if it wouldn't be worth splitting U-Boot up into more separate binaries for these steps, so that any restrictions on the steps can be much better defined and segregated. Then, the final U-Boot binary can be constructed not just by:
cat spl.bin u-boot.bin
But perhaps more like:
cat sdram-init.bin relocater.bin u-boot.bin
or something like that?
Everything in sdram-init.bin would use no .data (the linker script could enforce this) and hard-coded devices. Everything in u-boot.bin could immediately assume that SDRAM and .data was available, and use DT for everything, and not need any pointer relocation fixup phase, since there would be nothing in .data to fix up.
Each board or SoC could define a list of the steps they need, their order, and the restrictions on their execution (e.g. no .data, ROMable code, hard-coded vs. dynamic devices possibly from DT, etc.)
Another thing that made me think of this: I briefly experimented with getting Tegra's U-Boot SPL to jump directly to a Linux zImage. A few things were missing, since Tegra's SPL runs on the AVP CPU not the main CPU, and hence never initializes anything on the main CPU, leaving that responsibility to the main U-Boot binary). Hence, some main-CPU cache setup was missing from Tegra's SPL. Solving this issue requires 3 separate binaries:
1) AVP boot code, to start the main CPU complex
2) Main CPU low-level initialization
3) Main U-Boot binary
To boot U-Boot, all 3 steps would be used.
To directly boot a zImage, only steps (1) and (2) would be needed.
Right now, we need to hack up a separate binary for (2) for the boot-a-zImage-directly case, and hence concatenate SPL, CPU init, zImage. It'd be nice if the "CPU init" part of that set of binaries was something we could easily pull out of the U-Boot build process, rather than something custom.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 6 lines · Stephen Warren
On 07/30/2013 02:00 PM, Stephen Warren wrote:
...
(discussion of instantiating/initializing I2C devices from device tree, and the fact U-Boot attempts to do that before .data or malloc can be touched/used, which doesn't work)
...
Quoted 6 lines
Quoted 2 lines
It seems like much of U-Boot's initialization architecture simply wasn't designed to accommodate dynamically initializing devices from DT.
I thought about this a little over the weekend. I think the solution here may be to break up U-Boot initialization steps more explicitly, even into more separate binaries.
Have you seen the 'TPL' code Freescale has been posting? That might be a handy concept, but I'm concerned we're going to be heading towards N separate little programs, and that's possibly a big complex (and thus fragile) web.
[snip]
Quoted 14 lines
Another thing that made me think of this: I briefly experimented with getting Tegra's U-Boot SPL to jump directly to a Linux zImage. A few things were missing, since Tegra's SPL runs on the AVP CPU not the main CPU, and hence never initializes anything on the main CPU, leaving that responsibility to the main U-Boot binary). Hence, some main-CPU cache setup was missing from Tegra's SPL. Solving this issue requires 3 separate binaries:
1) AVP boot code, to start the main CPU complex
2) Main CPU low-level initialization
3) Main U-Boot binaryTo boot U-Boot, all 3 steps would be used.
Quoted 7 lines
To directly boot a zImage, only steps (1) and (2) would be needed.
Right now, we need to hack up a separate binary for (2) for the boot-a-zImage-directly case, and hence concatenate SPL, CPU init, zImage. It'd be nice if the "CPU init" part of that set of binaries was something we could easily pull out of the U-Boot build process, rather than something custom.
So I guess you're trying to do something that's not quite falcon mode here?
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PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 9 lines · Tom Rini
Quoted 8 lines · Stephen Warren
On 07/30/2013 02:00 PM, Stephen Warren wrote: ... (discussion of instantiating/initializing I2C devices from device tree, and the fact U-Boot attempts to do that before .data or malloc can be touched/used, which doesn't work) ...
Quoted 3 lines
It seems like much of U-Boot's initialization architecture simply wasn't designed to accommodate dynamically initializing devices from DT.
Quoted 8 lines
Quoted 3 lines
I thought about this a little over the weekend. I think the solution here may be to break up U-Boot initialization steps more explicitly, even into more separate binaries.
Have you seen the 'TPL' code Freescale has been posting? That might be a handy concept, but I'm concerned we're going to be heading towards N separate little programs, and that's possibly a big complex (and thus fragile) web.
No, I'll go try and find it and take a look.
Quoted 17 lines
[snip]
Quoted 16 lines
Another thing that made me think of this: I briefly experimented with getting Tegra's U-Boot SPL to jump directly to a Linux zImage. A few things were missing, since Tegra's SPL runs on the AVP CPU not the main CPU, and hence never initializes anything on the main CPU, leaving that responsibility to the main U-Boot binary). Hence, some main-CPU cache setup was missing from Tegra's SPL. Solving this issue requires 3 separate binaries:
1) AVP boot code, to start the main CPU complex 2) Main CPU low-level initialization 3) Main U-Boot binary
To boot U-Boot, all 3 steps would be used.
To directly boot a zImage, only steps (1) and (2) would be needed.
Quoted 8 lines
Quoted 5 lines
Right now, we need to hack up a separate binary for (2) for the boot-a-zImage-directly case, and hence concatenate SPL, CPU init, zImage. It'd be nice if the "CPU init" part of that set of binaries was something we could easily pull out of the U-Boot build process, rather than something custom.
So I guess you're trying to do something that's not quite falcon mode here?
I thought it was very similar to falcon mode, but reading doc/README.falcon, it's actually pretty different.
My use-case is that as a kernel developer, I want to repeatedly boot new kernels. I can do the following now:
* Copy new kernel to SD card, put it in the target system, reboot it
* Copy new kernel to TFTP server, reboot target
Either of these are slower than I'd like either due to swapping SD cards about, or slow TFTP transfers. Tegra at least has another boot
option: When the system boots, it can immediately go into special mode whereby a USB-hosted protocol can be used download arbitrary code to SDRAM and execute it. I want to make that downloaded code be the zImage, perhaps with some stuff concatenated on the front to do a little basic initialization first, e.g. setting up caches, setting r2 to point at a DTB, etc.
Now, I was hoping to re-use some code from U-Boot as the stuff I concatenate with the zImage, so I wouldn't have to maintain it separately. The bits I need area almost just the SPL, although since our SPL and main U-Boot run on different CPUs, I also need a bit extra CPU initialization, so for now I hacked up a very simple stub to do this.
Finally, I was then hoping to be able to burn that concatenated image into flash and have the system always boot it. This is the part that's most similar to falcon mode, I think.
My use case here is for that flashed kernel/initrd be able to choose a boot target (SD, TFTP, ...), get a kernel from there, and kexec it. That would make the kernel+initrd replace the main U-Boot binary. Then I can write bash/... scripts and use kernel features for my boot menu, rather than U-Boot scripts.
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Tom RiniQuoted 9 lines · Tom Rini
Quoted 8 lines · Stephen Warren
On 07/30/2013 02:00 PM, Stephen Warren wrote: ... (discussion of instantiating/initializing I2C devices from device tree, and the fact U-Boot attempts to do that before .data or malloc can be touched/used, which doesn't work) ...
Quoted 3 lines
It seems like much of U-Boot's initialization architecture simply wasn't designed to accommodate dynamically initializing devices from DT.
Quoted 8 lines
Quoted 3 lines
I thought about this a little over the weekend. I think the solution here may be to break up U-Boot initialization steps more explicitly, even into more separate binaries.
Have you seen the 'TPL' code Freescale has been posting? That might be a handy concept, but I'm concerned we're going to be heading towards N separate little programs, and that's possibly a big complex (and thus fragile) web.
TPL is certainly similar, but the implementation is pretty different.
On Tegra, the boot ROM initializes SDRAM, so there aren't any max size requirements on SPL/U-Boot; they're concatenated together in flash and both placed into SDRAM by the boot ROM in all cases. SPL+U-Boot is just one big binary as far as our boot ROM is concerned, but just happens to be made out of a few chunks that are concatenated together as far as the U-Boot build process is concerned.
So, my proposal to further split up the U-Boot binary was more to allow:
a) A more obvious boundary for various restrictions, such as lack of .data access, to applied or lifted.
b) Re-using some of the component parts of U-Boot to build other things.
Freescale's TPL patches are all about limitations on the size of the various components. Hence, each of SPL, TPL is a separate entity in flash too, and each contains a flash driver to read the next component in the chain.
I suppose the two concepts could be unified by simply having SPL/TPL on Tegra not contain any flash drivers, and both use the "jump to hard-coded address" method of dispatching to the next binary just as we do today for the SPL->u-boot.bin handoff. However, I'd still rather explicitly call out what each component binary is for with a per-board/soc list, rather than re-using the names SPL/TPL to do different things on different systems.
Not that I likely have any time to actually implement any of this:-(
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Stephen WarrenHi Stephen,
Quoted 72 lines · Stephen Warren
Quoted 26 lines · Heiko Schocher
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 23 lines · Heiko Schocher
Quoted 5 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra
i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git bisect" points at this patch. Olof reported the issue to me. Can you take a look at the code and see what might be wrong? Thanks.
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
Quoted 6 lines
Quoted 3 lines
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
Yes, there's some initialization order issue; before this patch, I see the I2C controller initialization, followed by some usage of it:
----------
U-Boot SPL 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47) U-Boot 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47)TEGRA30
Board: NVIDIA Beaver DRAM: 2 GiB i2c: controller bus 0 at 7000d000, periph_id 47, speed 100000: ok i2c: controller bus 1 at 7000c000, periph_id 12, speed 100000: ok i2c: controller bus 2 at 7000c400, periph_id 54, speed 100000: ok i2c: controller bus 3 at 7000c500, periph_id 67, speed 100000: ok i2c: controller bus 4 at 7000c700, periph_id 103, speed 100000: ok MMC: i2c_write: chip=0x2d, addr=0x32, len=0x1----------
However with this patch applied, something starts using the controller immediately, without it having been "probed" from device-tree:
----------
U-Boot SPL 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28) U-Boot 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28)TEGRA30
Board: NVIDIA Beaver I2C: i2c_init(speed=100000, slaveaddr=0xfe)----------
i2c_inittouches HW, but sinceprocess_nodes()hasn't run, none of the parameters like register address or clock ID are yet known.I think this call comes from init_sequence_f[] ->
init_func_i2c()->i2c_init()->i2c_init()==__i2c_init()->i2c_init_bus()->I2C_ADAP->init(), although I didn't validate that in the running code, just by code inspection.
Quoted 6 lines
The issue here is that the I2C core and/or Tegra driver seems to be statically registering the I2C device objects, even though they should be dynamically registered from device tree.
Should Tegra move its call of
i2c_init_board()out ofboard_init()toboard_init_f(), and/or override__i2c_init()to calli2c_init_board()?
Something like that. We need i2c_init_board() to be called earlier, now that the init sequence is doing i2c on ARM.
Quoted 5 lines
I think when init_sequence_f[] is running, there may be no serial console to report errors. If so, moving the I2C initialization to that early point sounds like a really bad idea.
Not really - when you see the U-Boot banner the console is working, and we clearly see the U-Boot banner before i2c init happens.
Regards,
Simon
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 4 lines · Simon Glass
Hi Stephen,
On Tue, Jul 30, 2013 at 1:22 PM, Stephen Warren <[email protected] <mailto:[email protected]>> wrote:
...
Quoted 7 lines
I think when init_sequence_f[] is running, there may be no serial console to report errors. If so, moving the I2C initialization to that early point sounds like a really bad idea.
Not really - when you see the U-Boot banner the console is working, and we clearly see the U-Boot banner before i2c init happens.
I thought it got buffered up and only actually sent to the UART much later, and not in the case when something failed since U-Boot wouldn't get that far? Or, did that proposal get shot down?
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
Quoted 12 lines · Stephen Warren
Quoted 4 lines · Simon Glass
Hi Stephen,
On Tue, Jul 30, 2013 at 1:22 PM, Stephen Warren <[email protected] <mailto:[email protected]>> wrote:
...
Quoted 2 lines
I think when init_sequence_f[] is running, there may be no serial console to report errors. If so, moving the I2C initialization to
that
Quoted 3 lines
early point sounds like a really bad idea.
Quoted 7 lines
Quoted 2 lines
Not really - when you see the U-Boot banner the console is working, and we clearly see the U-Boot banner before i2c init happens.
I thought it got buffered up and only actually sent to the UART much later, and not in the case when something failed since U-Boot wouldn't get that far? Or, did that proposal get shot down?
There is an option to buffer output until console_init_f() is called, but that is called very early...
PATCH v3 8/9 tegra: i2c: Enable new CONFIG_SYS_I2C framework
In reply to Stephen WarrenHello Stephen,
Am 30.07.2013 21:22, schrieb Stephen Warren:
Quoted 31 lines · Heiko Schocher
Quoted 30 lines
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
Quoted 26 lines · Heiko Schocher
Quoted 5 lines
From: Simon Glass<[email protected]>
This enables
CONFIG_SYS_I2Con Tegra, updating existing boards and the Tegra
i2c driver to support this.Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git bisect" points at this patch. Olof reported the issue to me. Can you take a look at the code and see what might be wrong? Thanks.
I suspect some kind of initialization ordering issue, since the boot messages are:
-----
U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37)TEGRA30
Board: NVIDIA Beaver I2C: Caller requested bad clock: periph=-49, parent=2-----
... and that "bad clock" message implies to me that the I2C driver is initializing before it has parsed the correct clock ID out of device tree.
Quoted 5 lines
Quoted 2 lines
Hmm... looking in the patch ... I can see nothing which changes some initializing order ...
Yes, there's some initialization order issue; before this patch, I see the I2C controller initialization, followed by some usage of it:
Ok, great!
Quoted 13 lines
----------
U-Boot SPL 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47) U-Boot 2013.07-rc3-00036-gd84eb85-dirty (Jul 30 2013 - 13:04:47)TEGRA30
Board: NVIDIA Beaver DRAM: 2 GiB i2c: controller bus 0 at 7000d000, periph_id 47, speed 100000: ok i2c: controller bus 1 at 7000c000, periph_id 12, speed 100000: ok i2c: controller bus 2 at 7000c400, periph_id 54, speed 100000: ok i2c: controller bus 3 at 7000c500, periph_id 67, speed 100000: ok i2c: controller bus 4 at 7000c700, periph_id 103, speed 100000: ok MMC: i2c_write: chip=0x2d, addr=0x32, len=0x1
Quoted 4 lines
----------
However with this patch applied, something starts using the controller immediately, without it having been "probed" from device-tree:
Hmm... do you have a debugger?
Quoted 4 lines
----------
U-Boot SPL 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28) U-Boot 2013.07-rc3-00037-g1f2ba72-dirty (Jul 30 2013 - 13:08:28)
Quoted 8 lines
TEGRA30
Board: NVIDIA Beaver I2C: i2c_init(speed=100000, slaveaddr=0xfe)----------
i2c_inittouches HW, but sinceprocess_nodes()hasn't run, none of the parameters like register address or clock ID are yet known.
i> I think this call comes from init_sequence_f[] -> init_func_i2c() ->
Quoted 1 line
i2c_init()->i2c_init()==__i2c_init()->i2c_init_bus()->
No, we have now defined CONFIG_SYS_I2C and this calls
i2c_init_all() -> i2c_init_board()
and I think, on nvidia board i2c_init_board is defined. Yes, in the i2c driver there it is ... calling process_nodes() ... so, the i2c busses should be setup ...
Quoted 6 lines
I2C_ADAP->init(), although I didn't validate that in the running code, just by code inspection.The issue here is that the I2C core and/or Tegra driver seems to be statically registering the I2C device objects, even though they should be dynamically registered from device tree.
Feel free to post patches.
Quoted 2 lines
Should Tegra move its call of
i2c_init_board()out ofboard_init()toboard_init_f(), and/or override__i2c_init()to calli2c_init_board()?
No, i2c_init_board gets called here very early:init_func_i2c() -> i2c_init_all():
static int init_func_i2c(void)
{
puts("I2C: ");
#ifdef CONFIG_SYS_I2C
i2c_init_all();
#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
puts("ready\n");
return (0);
}and we have CONFIG_SYS_I2C defined (or, did you have it?)
and in drivers/i2c/i2c_core.c:
void i2c_init_all(void)
{
i2c_init_board();
i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
return;
}Ah, I see, it is also called in board_init ...
Quoted 3 lines
I think when init_sequence_f[] is running, there may be no serial console to report errors. If so, moving the I2C initialization to that early point sounds like a really bad idea.
No, we need i2c before relocation for example to read SPD data from eeprom, but this is on powerpc.puts() is working, as your log shows.
I added in the comment from i2c_init_all:
/*
* i2c_init_all():
*
* not longer needed, will deleted. Actual init the SPD_BUS
* for compatibility.
* i2c_adap[] must be initialized beforehead with function pointers and
* data, including speed and slaveaddr.
*/
So the question raises, do we need this on arm?
bye,
Heiko