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omap: overo: update support for Micron 1GB POP

PATCH New ash at gumstix.com 2 participants 4 messages Jul 24, 2013 – Aug 16, 2013

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ash at gumstix.com

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#0 lore raw

PATCH 1/2 omap: overo: update support for Micron 1GB POP

From: Steve Sakoman <[email protected]>

Signed-off-by Ash Charles <[email protected]>
---
 board/overo/overo.c |    6 ++++++
 board/overo/overo.h |    1 +
 2 files changed, 7 insertions(+)
board/overo/overo.c +6 -0
index c10c44c..8df077d 100644
@@ -169,6 +169,12 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
 		timings->ctrlb = HYNIX_V_ACTIMB_165;
 		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 		break;
+	case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
+		timings->mcfg = MCFG(512 << 20, 15);
+		timings->ctrla = MICRON_V_ACTIMA_200;
+		timings->ctrlb = MICRON_V_ACTIMB_200;
+		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
+		break;
 	default:
 		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
 		timings->ctrla = MICRON_V_ACTIMA_165;
board/overo/overo.h +1 -0
index b41b628..b984a54 100644
@@ -37,6 +37,7 @@ const omap3_sysinfo sysinfo = {
 #define REVISION_0	0x0
 #define REVISION_1	0x1
 #define REVISION_2	0x2
+#define REVISION_3	0x3
 
 /*
  * IEN  - Input Enable
Signature · 1 line
1.7.10.4
author
#1 lore raw

PATCH 2/2 omap: overo: Use 200MHz SDRC timings for revision 1, 2 & 3 boards

From: Ash Charles <[email protected]>

Gumstix uses 200Mhz RAM on revision 1, 2 & 3 COMs, so use 200MHz timings rather than 165MHz. Based on 6cf8bf44b1f8550e12f7f2a16e01890e5de8443d

Signed-off-by Ash Charles <[email protected]>
---
 board/overo/overo.c |   16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)
board/overo/overo.c +8 -8
index 8df077d..c70fcc3 100644
@@ -158,16 +158,16 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
 		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 		break;
 	case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
-		timings->mcfg = MICRON_V_MCFG_165(256 << 20);
-		timings->ctrla = MICRON_V_ACTIMA_165;
-		timings->ctrlb = MICRON_V_ACTIMB_165;
-		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+		timings->mcfg = MICRON_V_MCFG_200(256 << 20);
+		timings->ctrla = MICRON_V_ACTIMA_200;
+		timings->ctrlb = MICRON_V_ACTIMB_200;
+		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
 		break;
 	case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
-		timings->mcfg = HYNIX_V_MCFG_165(256 << 20);
-		timings->ctrla = HYNIX_V_ACTIMA_165;
-		timings->ctrlb = HYNIX_V_ACTIMB_165;
-		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+		timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
+		timings->ctrla = HYNIX_V_ACTIMA_200;
+		timings->ctrlb = HYNIX_V_ACTIMB_200;
+		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
 		break;
 	case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
 		timings->mcfg = MCFG(512 << 20, 15);
Signature · 1 line
1.7.10.4
#2 lore raw

PATCH 2/2 omap: overo: Use 200MHz SDRC timings for revision 1, 2 & 3 boards

Quoted 6 lines · Ash Charles

From: Ash Charles <[email protected]>

Gumstix uses 200Mhz RAM on revision 1, 2 & 3 COMs, so use 200MHz timings rather than 165MHz. Based on 6cf8bf44b1f8550e12f7f2a16e01890e5de8443d

Signed-off-by Ash Charles <[email protected]>

Applied to u-boot-ti/master, thanks!

Signature · 8 lines
Tom
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#3 lore raw

PATCH 1/2 omap: overo: update support for Micron 1GB POP

In reply to ash at gumstix.com
Quoted 8 lines · Ash Charles

From: Steve Sakoman <[email protected]>

Signed-off-by Ash Charles <[email protected]>

---
board/overo/overo.c | 6 ++++++

 board/overo/overo.h |    1 +
 2 files changed, 7 insertions(+)

Applied to u-boot-ti/master, thanks!

Signature · 8 lines
Tom
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