clk: ux500: Remove BML8580 clock
Subsystems (2)
PATCH 1/1 clk: ux500: Remove BML8580 clock
From: Lee Jones <[email protected]>
There is no mention of the PRCMU_BML8580CLK in any of the Design Specifications for the chips supported in Mainline. In fact, where it is incorrectly used in the u8540 clock definition driver it would have the side effect of using the incorrect clock management address ([PRCM_BML8580CLK_MGT] 0x108 instead of the correct value 0x04C).
--- drivers/clk/ux500/u8540_clk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clk/ux500/u8540_clk.c +1 -1
@@ -83,7 +83,7 @@ void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,clk_register_clkdev (clk,NULL ,"lcd" );clk_register_clkdev (clk,"lcd" ,"mcde" ); - clk =clk_reg_prcmu_opp_gate ("bmlclk" ,NULL ,PRCMU_BML8580CLK , + clk =clk_reg_prcmu_opp_gate ("bmlclk" ,NULL ,PRCMU_BMLCLK ,CLK_IS_ROOT );clk_register_clkdev (clk,NULL ,"bml" );
Signature · 1 line
1.8.1.4
PATCH 1/1 clk: ux500: Remove BML8580 clock
Quoting Linus Walleij (2013-08-11 14:49:16)
Quoted 9 lines
From: Lee Jones <[email protected]>
There is no mention of the
PRCMU_BML8580CLKin any of the Design Specifications for the chips supported in Mainline. In fact, where it is incorrectly used in the u8540 clock definition driver it would have the side effect of using the incorrect clock management address ([PRCM_BML8580CLK_MGT]0x108instead of the correct value0x04C).Signed-off-by Lee Jones <[email protected]>
Pulled into clk-next.
Thanks,
Mike
Quoted 19 lines
--- drivers/clk/ux500/u8540_clk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/clk/ux500/u8540_clk.c +1
-1@@ -83,7 +83,7 @@ void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,clk_register_clkdev (clk,NULL ,"lcd" );clk_register_clkdev (clk,"lcd" ,"mcde" ); - clk =clk_reg_prcmu_opp_gate ("bmlclk" ,NULL ,PRCMU_BML8580CLK , + clk =clk_reg_prcmu_opp_gate ("bmlclk" ,NULL ,PRCMU_BMLCLK ,CLK_IS_ROOT );clk_register_clkdev (clk,NULL ,"bml" );Signature · 1 line
1.8.1.4
PATCH 1/1 clk: ux500: Remove BML8580 clock
Quoted 9 lines · Mike Turquette
Quoting Linus Walleij (2013-08-11 14:49:16)
Quoted 8 lines
From: Lee Jones <[email protected]>
There is no mention of the
PRCMU_BML8580CLKin any of the Design Specifications for the chips supported in Mainline. In fact, where it is incorrectly used in the u8540 clock definition driver it would have the side effect of using the incorrect clock management address ([PRCM_BML8580CLK_MGT]0x108instead of the correct value0x04C).
Quoted 3 lines
Quoted 1 line
Signed-off-by Lee Jones <[email protected]>Pulled into clk-next.
Hm it turns out that I need this to be in the middle of Lee's patch set for device tree clock that need to go through ARM SoC.
Can you (please) drop this patch and provide an ACK instead?
Yours,
Linus Walleij
PATCH 1/1 clk: ux500: Remove BML8580 clock
Quoting Linus Walleij (2013-08-16 02:15:13)
Quoted 12 lines · Mike Turquette
Quoted 11 lines
Quoting Linus Walleij (2013-08-11 14:49:16)
Quoted 9 lines
From: Lee Jones <[email protected]>
There is no mention of the
PRCMU_BML8580CLKin any of the Design Specifications for the chips supported in Mainline. In fact, where it is incorrectly used in the u8540 clock definition driver it would have the side effect of using the incorrect clock management address ([PRCM_BML8580CLK_MGT]0x108instead of the correct value0x04C).Signed-off-by Lee Jones <[email protected]>
Quoted 7 lines
Quoted 1 line
Pulled into clk-next.
Hm it turns out that I need this to be in the middle of Lee's patch set for device tree clock that need to go through ARM SoC.
Can you (please) drop this patch and provide an ACK instead?
I've dropped the patch from clk-next. Please add my Ack.
Regards,
Mike
Quoted 3 lines
Yours,
Linus Walleij