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Fix sd3.0 issues for Realtek card reader

PATCH In review [email protected] 3 participants 6 messages Aug 21, 2013 – Aug 30, 2013 2 messages not in the archive

Subsystems (3)
MMC, SD and SDIO Multifunction devices (MFD) Sony memorystick
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[email protected]

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#0 lore raw

cover Fix sd3.0 issues for Realtek card reader

From: Wei WANG <[email protected]>

Wei WANG (3):
mfd:mmc:rtsx: Change default tx phase
mmc:rtsx:Clear SD_CLK toggle enable bit if switching voltage fail mmc:memstick:rtsx: Modify copyright comments

 drivers/memstick/host/rtsx_pci_ms.c |    3 +-
 drivers/mfd/rtl8411.c               |    4 ++
 drivers/mfd/rts5209.c               |    2 +
 drivers/mfd/rts5227.c               |    2 +
 drivers/mfd/rts5229.c               |    2 +
 drivers/mfd/rts5249.c               |    2 +
 drivers/mmc/host/rtsx_pci_sdmmc.c   |   70 +++++++++++++++++++++++++----------
 include/linux/mfd/rtsx_pci.h        |   15 ++++++++
 8 files changed, 79 insertions(+), 21 deletions(-)
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH 1/3 mfd:mmc:rtsx: Change default tx phase

From: Wei WANG <[email protected]>

The default phase can meet most cards' requirement, but it is not the optimal one. In some extreme situation, the rx phase point produced by the following tuning process will drift quite a distance. Before tuning UHS card, this patch will set a more proper initial tx phase point, which is calculated from statistic data, and can achieve a much better tx signal quality.

Signed-off-by Wei WANG <[email protected]>
---
 drivers/mfd/rtl8411.c             |    4 +++
 drivers/mfd/rts5209.c             |    2 ++
 drivers/mfd/rts5227.c             |    2 ++
 drivers/mfd/rts5229.c             |    2 ++
 drivers/mfd/rts5249.c             |    2 ++
 drivers/mmc/host/rtsx_pci_sdmmc.c |   58 +++++++++++++++++++++++++++----------
 include/linux/mfd/rtsx_pci.h      |   15 ++++++++++
 7 files changed, 69 insertions(+), 16 deletions(-)
drivers/mfd/rtl8411.c +4 -0
index e4c1833..5280135 100644
@@ -452,6 +452,8 @@ void rtl8411_init_params(struct rtsx_pcr *pcr)
 	pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
 	pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
 	pcr->aspm_en = ASPM_L1_EN;
+	pcr->tx_initial_phase = SET_CLOCK_PHASE(23, 7, 14);
+	pcr->rx_initial_phase = SET_CLOCK_PHASE(4, 3, 10);
 
 	pcr->ic_version = rtl8411_get_ic_version(pcr);
 	pcr->sd_pull_ctl_enable_tbl = rtl8411_sd_pull_ctl_enable_tbl;

@@ -471,6 +473,8 @@ void rtl8411b_init_params(struct rtsx_pcr *pcr)
 	pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
 	pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
 	pcr->aspm_en = ASPM_L1_EN;
+	pcr->tx_initial_phase = SET_CLOCK_PHASE(23, 7, 14);
+	pcr->rx_initial_phase = SET_CLOCK_PHASE(4, 3, 10);
 
 	pcr->ic_version = rtl8411_get_ic_version(pcr);
drivers/mfd/rts5209.c +2 -0
index 4026e1f..cb04174 100644
@@ -270,6 +270,8 @@ void rts5209_init_params(struct rtsx_pcr *pcr)
 	pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
 	pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
 	pcr->aspm_en = ASPM_L1_EN;
+	pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 16);
+	pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5);
 
 	pcr->ic_version = rts5209_get_ic_version(pcr);
 	pcr->sd_pull_ctl_enable_tbl = rts5209_sd_pull_ctl_enable_tbl;
drivers/mfd/rts5227.c +2 -0
index d7cae82..c001151 100644
@@ -291,6 +291,8 @@ void rts5227_init_params(struct rtsx_pcr *pcr)
 	pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B;
 	pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;
 	pcr->aspm_en = ASPM_L1_EN;
+	pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);
+	pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 7, 7);
 
 	pcr->sd_pull_ctl_enable_tbl = rts5227_sd_pull_ctl_enable_tbl;
 	pcr->sd_pull_ctl_disable_tbl = rts5227_sd_pull_ctl_disable_tbl;
drivers/mfd/rts5229.c +2 -0
index 620e7fa..6353f5d 100644
@@ -261,6 +261,8 @@ void rts5229_init_params(struct rtsx_pcr *pcr)
 	pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
 	pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
 	pcr->aspm_en = ASPM_L1_EN;
+	pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);
+	pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 6, 6);
 
 	pcr->ic_version = rts5229_get_ic_version(pcr);
 	if (pcr->ic_version == IC_VER_C) {
drivers/mfd/rts5249.c +2 -0
index ea90f8f..3b835f5 100644
@@ -298,6 +298,8 @@ void rts5249_init_params(struct rtsx_pcr *pcr)
 	pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_C;
 	pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;
 	pcr->aspm_en = ASPM_L1_EN;
+	pcr->tx_initial_phase = SET_CLOCK_PHASE(1, 29, 16);
+	pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5);
 
 	pcr->ic_version = rts5249_get_ic_version(pcr);
 	pcr->sd_pull_ctl_enable_tbl = rts5249_sd_pull_ctl_enable_tbl;
drivers/mmc/host/rtsx_pci_sdmmc.c +42 -16

119 lines not on this page · raw message

include/linux/mfd/rtsx_pci.h +15 -0
index daefca1..d1382df 100644
@@ -847,6 +847,9 @@ struct rtsx_pcr {
 #define PCR_REVERSE_SOCKET		(1 << 1)
 	u32				flags;
 
+	u32				tx_initial_phase;
+	u32				rx_initial_phase;
+
 	const u32			*sd_pull_ctl_enable_tbl;
 	const u32			*sd_pull_ctl_disable_tbl;
 	const u32			*ms_pull_ctl_enable_tbl;

@@ -863,6 +866,18 @@ struct rtsx_pcr {
 #define PCI_VID(pcr)			((pcr)->pci->vendor)
 #define PCI_PID(pcr)			((pcr)->pci->device)
 
+#define SDR104_PHASE(val)		((val) & 0xFF)
+#define SDR50_PHASE(val)		(((val) >> 8) & 0xFF)
+#define DDR50_PHASE(val)		(((val) >> 16) & 0xFF)
+#define SDR104_TX_PHASE(pcr)		SDR104_PHASE((pcr)->tx_initial_phase)
+#define SDR50_TX_PHASE(pcr)		SDR50_PHASE((pcr)->tx_initial_phase)
+#define DDR50_TX_PHASE(pcr)		DDR50_PHASE((pcr)->tx_initial_phase)
+#define SDR104_RX_PHASE(pcr)		SDR104_PHASE((pcr)->rx_initial_phase)
+#define SDR50_RX_PHASE(pcr)		SDR50_PHASE((pcr)->rx_initial_phase)
+#define DDR50_RX_PHASE(pcr)		DDR50_PHASE((pcr)->rx_initial_phase)
+#define SET_CLOCK_PHASE(sdr104, sdr50, ddr50)	\
+				(((ddr50) << 16) | ((sdr50) << 8) | (sdr104))
+
 void rtsx_pci_start_run(struct rtsx_pcr *pcr);
 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data);
 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data);
Signature · 1 line
1.7.9.5
Acked-by on v1 1/3
#2 lore raw

Re: [PATCH 1/3] mfd:mmc:rtsx: Change default tx phase

Quoted 10 lines · On Wed, 21 Aug 2013, [email protected] wrote:

From: Wei WANG <[email protected]>

The default phase can meet most cards' requirement, but it is not the optimal one. In some extreme situation, the rx phase point produced by the following tuning process will drift quite a distance. Before tuning UHS card, this patch will set a more proper initial tx phase point, which is calculated from statistic data, and can achieve a much better tx signal quality.

Signed-off-by Wei WANG <[email protected]>
Quoted 9 lines
---
 drivers/mfd/rtl8411.c             |    4 +++
 drivers/mfd/rts5209.c             |    2 ++
 drivers/mfd/rts5227.c             |    2 ++
 drivers/mfd/rts5229.c             |    2 ++
 drivers/mfd/rts5249.c             |    2 ++
 drivers/mmc/host/rtsx_pci_sdmmc.c |   58 +++++++++++++++++++++++++++----------
 include/linux/mfd/rtsx_pci.h      |   15 ++++++++++
 7 files changed, 69 insertions(+), 16 deletions(-)

MFD parts looks okay to me:

Acked-by Lee Jones <[email protected]>
Signature · 4 lines
Lee Jones
Linaro ST-Ericsson Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
author
#3 lore raw

PATCH 2/3 mmc:rtsx:Clear SD_CLK toggle enable bit if switching voltage fail

In reply to [email protected]

From: Wei WANG <[email protected]>

If switching voltage fails, SD_CLK toggle enable bit should been cleared so that SD host can control SD clock automatically.

Signed-off-by Wei WANG <[email protected]>
---
 drivers/mmc/host/rtsx_pci_sdmmc.c |    9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
drivers/mmc/host/rtsx_pci_sdmmc.c +8 -1
index fcb368e..0fefe4e 100644
@@ -227,6 +227,7 @@ static void sd_send_cmd_get_rsp(struct realtek_pci_sdmmc *host,
 	int stat_idx = 0;
 	u8 rsp_type;
 	int rsp_len = 5;
+	bool clock_toggled = false;
 
 	dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
 			__func__, cmd_idx, arg);

@@ -270,6 +271,8 @@ static void sd_send_cmd_get_rsp(struct realtek_pci_sdmmc *host,
 				0xFF, SD_CLK_TOGGLE_EN);
 		if (err < 0)
 			goto out;
+
+		clock_toggled = true;
 	}
 
 	rtsx_pci_init_cmd(pcr);

@@ -350,6 +353,10 @@ static void sd_send_cmd_get_rsp(struct realtek_pci_sdmmc *host,
 
 out:
 	cmd->error = err;
+
+	if (err && clock_toggled)
+		rtsx_pci_write_register(pcr, SD_BUS_STAT,
+				SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
 }
 
 static int sd_rw_multi(struct realtek_pci_sdmmc *host, struct mmc_request *mrq)

@@ -1121,11 +1128,11 @@ static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
 			goto out;
 	}
 
+out:
 	/* Stop toggle SD clock in idle */
 	err = rtsx_pci_write_register(pcr, SD_BUS_STAT,
 			SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
 
-out:
 	mutex_unlock(&pcr->pcr_mutex);
 
 	return err;
Signature · 1 line
1.7.9.5
author
#4 lore raw

PATCH 3/3 mmc:memstick:rtsx: Modify copyright comments

In reply to [email protected]

From: Wei WANG <[email protected]>

Update copyright date, and remove author address.

Signed-off-by Wei WANG <[email protected]>
---
 drivers/memstick/host/rtsx_pci_ms.c |    3 +--
 drivers/mmc/host/rtsx_pci_sdmmc.c   |    3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)
drivers/memstick/host/rtsx_pci_ms.c +1 -2
index 64a779c..cf8bd72 100644
@@ -1,6 +1,6 @@
 /* Realtek PCI-Express Memstick Card Interface driver
  *
- * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
+ * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by the

@@ -17,7 +17,6 @@
  *
  * Author:
  *   Wei WANG <[email protected]>
- *   No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
  */
 
 #include <linux/module.h>
drivers/mmc/host/rtsx_pci_sdmmc.c +1 -2
index 0fefe4e..375a880e 100644
@@ -1,6 +1,6 @@
 /* Realtek PCI-Express SD/MMC Card Interface driver
  *
- * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
+ * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by the

@@ -17,7 +17,6 @@
  *
  * Author:
  *   Wei WANG <[email protected]>
- *   No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
  */
 
 #include <linux/module.h>
Signature · 1 line
1.7.9.5

A message that is not in the archive (sent off-list or not yet received): [email protected]

A message that is not in the archive (sent off-list or not yet received): [email protected]

#7 lore raw

Hi Chris,

Quoted 25 lines · Chris Ball

Hi,

Quoted 19 lines · wwang
Quoted 7 lines · 于 2013年08月21日 09:46, [email protected] 写道:

From: Wei WANG <[email protected]>

Wei WANG (3):
mfd:mmc:rtsx: Change default tx phase
mmc:rtsx:Clear SD_CLK toggle enable bit if switching voltage fail mmc:memstick:rtsx: Modify copyright comments

Quoted 10 lines
 drivers/memstick/host/rtsx_pci_ms.c |    3 +-
 drivers/mfd/rtl8411.c               |    4 ++
 drivers/mfd/rts5209.c               |    2 +
 drivers/mfd/rts5227.c               |    2 +
 drivers/mfd/rts5229.c               |    2 +
 drivers/mfd/rts5249.c               |    2 +
 drivers/mmc/host/rtsx_pci_sdmmc.c   |   70 +++++++++++++++++++++++++----------
 include/linux/mfd/rtsx_pci.h        |   15 ++++++++
 8 files changed, 79 insertions(+), 21 deletions(-)
Quoted 2 lines

Can you help to review this patchset? I want to submit it to 3.12 kernel. And Lee Jones has acked the MFD parts.

Quoted 7 lines

The patchset looks fine, but it depends on MFD changes that aren't in my mmc-next tree, and I don't want to invalidate my mmc-next testing by updating my tree. Maybe the MFD maintainer could take it with my Ack?

If so:

Acked-by Chris Ball <[email protected]>

Thanks. I applied this patchset through the MFD tree, with Lee and your ACKs.

Cheers,
Samuel.

Signature · 2 lines
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