arm: omap: irq: cleanup INTC driver
Subsystems (6)
cover arm: omap: irq: cleanup INTC driver
Afte these patches, we're very close to being able
to move arch/arm/mach-omap2/irq.c to drivers/irqchip/irq-intc.c
All which would be missing is for Tony to drop all OMAP2/3 board files so we remove the few pending bits and pieces left in for legacy boot.
Note that I have only boot tested these on AM335x Bone Black (with a small fix for fixed regulator which should be in the mailing list already), so I'd need help testing all other impacted platforms, specially when it comes to PM.
Felipe Balbi (31):
arm: omap: irq: make omap_irq_base global
arm: omap: irq: define INTC_ILR0 register
arm: omap: irq: start to remove irq_banks array
arm: omap: irq: add a global omap_nr_irqs variable
arm: omap: irq: remove rest of irq_banks usage
arm: omap: irq: remove unused macro
arm: omap: irq: switch over to intc_readl on omap_intc_handle_irq
arm: omap: irq: remove unnecessary base_addr argument
arm: omap: irq: rename omap3_intc_regs
arm: omap: irq: always define omap3 support
arm: omap: irq: reorganize code a little bit
arm: omap: irq: add suspend/resume methods
arm: omap: irq: remove last bits of our homebrew irqchip pm
arm: omap: irq: make intc_of_init static
arm: omap: irq: call set_handle_irq() from intc_of_init
arm: omap: irq: use IRQCHIP_DECLARE macro
arm: omap: irq: drop .handle_irq and .init_irq fields
arm: omap: irq: add specific compatibles for omap3 and am33xx devices
arm: omap: irq: use compatible flag to figure out number of IRQ lines
arm: boot: dts: am33xx/omap3: fix intc compatible flag
arm: omap: irq: drop ti,intc-size support
arm: boot: dts: omap2/3/am33xx: drop ti,intc-size
arm: omap: irq: move some more code around
arm: omap: irq: call set_handle_irq() from .init_irq
arm: omap: irq: drop omap3_intc_handle_irq()
arm: omap: irq: drop omap2_intc_handle_irq()
arm: omap: irq: drop omap_pending_irq()
arm: omap: irq: remove unnecessary header
arm: omap: irq: remove nr_irqs argument
arm: omap: irq: introduce omap_nr_pending
arm: omap: irq: get rid of ifdef hack
arch/arm/boot/dts/am33xx.dtsi | 3 +- arch/arm/boot/dts/omap2.dtsi | 1 - arch/arm/boot/dts/omap3.dtsi | 3 +- arch/arm/mach-omap2/board-2430sdp.c | 1 - arch/arm/mach-omap2/board-3430sdp.c | 1 - arch/arm/mach-omap2/board-am3517crane.c | 1 - arch/arm/mach-omap2/board-am3517evm.c | 1 - arch/arm/mach-omap2/board-cm-t35.c | 2 - arch/arm/mach-omap2/board-cm-t3517.c | 1 - arch/arm/mach-omap2/board-devkit8000.c | 1 - arch/arm/mach-omap2/board-generic.c | 12 - arch/arm/mach-omap2/board-h4.c | 1 - arch/arm/mach-omap2/board-ldp.c | 1 - arch/arm/mach-omap2/board-n8x0.c | 3 - arch/arm/mach-omap2/board-omap3beagle.c | 1 - arch/arm/mach-omap2/board-omap3logic.c | 2 - arch/arm/mach-omap2/board-omap3pandora.c | 1 - arch/arm/mach-omap2/board-omap3stalker.c | 1 - arch/arm/mach-omap2/board-omap3touchbook.c | 1 - arch/arm/mach-omap2/board-overo.c | 1 - arch/arm/mach-omap2/board-rx51.c | 1 - arch/arm/mach-omap2/common.h | 19 -- arch/arm/mach-omap2/cpuidle34xx.c | 2 +- arch/arm/mach-omap2/irq.c | 357 ++++++++++++----------------- arch/arm/mach-omap2/pm24xx.c | 11 - arch/arm/mach-omap2/pm34xx.c | 13 -- 26 files changed, 153 insertions(+), 289 deletions(-)
Signature · 1 line
1.8.4.GIT
PATCH 1/31 arm: omap: irq: make omap_irq_base global
This is in preparation for removing the pointlessirq_banks array.
--- arch/arm/mach-omap2/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-omap2/irq.c +1 -1
@@ -68,6 +68,7 @@ static struct omap_irq_bank { };static struct irq_domain *domain; +static void __iomem *omap_irq_base;/* Structure to save interrupt controller context */ struct omap3_intc_regs {
@@ -161,7 +162,6 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)static void __init omap_init_irq (u32 base,int nr_irqs,struct device_node *node) { -void __iomem *omap_irq_base;unsigned long nr_of_irqs =0 ;unsigned int nr_banks =0 ;int i, j, irq_base;
Signature · 1 line
1.8.4.GIT
PATCH 2/31 arm: omap: irq: define INTC_ILR0 register
In reply to Felipe Balbithis is currently used as a hardcoded 0x100
offset.
--- arch/arm/mach-omap2/irq.c | 1 + 1 file changed, 1 insertion(+)
arch/arm/mach-omap2/irq.c +1 -0
@@ -41,6 +41,7 @@#define INTC_MIR_CLEAR0 0x0088#define INTC_MIR_SET0 0x008c#define INTC_PENDING_IRQ0 0x0098 +#define INTC_ILR0 0x0100/* Number of IRQ state bits in each MIR register */ #define IRQ_BITS_PER_REG 32
Signature · 1 line
1.8.4.GIT
PATCH 3/31 arm: omap: irq: start to remove irq_banks array
In reply to Felipe BalbiWe have a single bank in that array, this patch is in preparation to remove that array. It just shifts everything to a new set of functions for register IO while also removing old ones.
--- arch/arm/mach-omap2/irq.c | 64 ++++++++++++++++++++--------------------------- 1 file changed, 27 insertions(+), 37 deletions(-)
arch/arm/mach-omap2/irq.c +27 -37
@@ -82,21 +82,20 @@ struct omap3_intc_regs { };/* INTC bank register get/set */ - -static void intc_bank_write_reg (u32 val,struct omap_irq_bank *bank,u16 reg) +static void intc_writel (u32 reg,u32 val) { -__raw_writel (val, bank->base_reg + reg); +writel_relaxed (val, omap_irq_base + reg); } -static u32 intc_bank_read_reg (struct omap_irq_bank *bank,u16 reg) +static u32 intc_readl (u32 reg) { -return __raw_readl (bank->base_reg + reg); +return readl_relaxed (omap_irq_base + reg); }/* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq (struct irq_data *d) { -intc_bank_write_reg (0x1 , &irq_banks[0 ],INTC_CONTROL ); +intc_writel (INTC_CONTROL ,0x1 ); }static void omap_mask_ack_irq (struct irq_data *d)
@@ -109,19 +108,19 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) {unsigned long tmp; - tmp =intc_bank_read_reg (bank,INTC_REVISION ) &0xff ; + tmp =intc_readl (INTC_REVISION ) &0xff ;pr_info ("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n" , bank->base_reg, tmp >>4 , tmp &0xf , bank->nr_irqs); - tmp =intc_bank_read_reg (bank,INTC_SYSCONFIG ); + tmp =intc_readl (INTC_SYSCONFIG ); tmp |=1 <<1 ;/* soft reset */ -intc_bank_write_reg (tmp, bank,INTC_SYSCONFIG ); +intc_writel (INTC_SYSCONFIG , tmp); -while (!(intc_bank_read_reg (bank,INTC_SYSSTATUS ) &0x1 )) +while (!(intc_readl (INTC_SYSSTATUS ) &0x1 ))/* Wait for reset to complete */ ;/* Enable autoidle */ -intc_bank_write_reg (1 <<0 , bank,INTC_SYSCONFIG ); +intc_writel (INTC_SYSCONFIG ,1 <<0 ); }int omap_irq_pending (void )
@@ -133,7 +132,7 @@ int omap_irq_pending(void)int irq;for (irq =0 ; irq < bank->nr_irqs; irq +=32 ) -if (intc_bank_read_reg (bank,INTC_PENDING_IRQ0 + +if (intc_readl (INTC_PENDING_IRQ0 + ((irq >>5 ) <<5 )))return 1 ; }
@@ -299,22 +298,20 @@ void omap_intc_save_context(void) {int ind =0 , i =0 ;for (ind =0 ; ind <ARRAY_SIZE (irq_banks); ind++) { -struct omap_irq_bank *bank = irq_banks + ind; intc_context[ind].sysconfig = -intc_bank_read_reg (bank,INTC_SYSCONFIG ); +intc_readl (INTC_SYSCONFIG ); intc_context[ind].protection = -intc_bank_read_reg (bank,INTC_PROTECTION ); +intc_readl (INTC_PROTECTION ); intc_context[ind].idle = -intc_bank_read_reg (bank,INTC_IDLE ); +intc_readl (INTC_IDLE ); intc_context[ind].threshold = -intc_bank_read_reg (bank,INTC_THRESHOLD ); +intc_readl (INTC_THRESHOLD );for (i =0 ; i <INTCPS_NR_IRQS ; i++) intc_context[ind].ilr[i] = -intc_bank_read_reg (bank, (0x100 +0x4 *i)); +intc_readl ((INTC_ILR0 +0x4 * i));for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) intc_context[ind].mir[i] = -intc_bank_read_reg (&irq_banks[0 ],INTC_MIR0 + - (0x20 * i)); +intc_readl (INTC_MIR0 + (0x20 * i)); } }
@@ -323,23 +320,16 @@ void omap_intc_restore_context(void)int ind =0 , i =0 ;for (ind =0 ; ind <ARRAY_SIZE (irq_banks); ind++) { -struct omap_irq_bank *bank = irq_banks + ind; -intc_bank_write_reg (intc_context[ind].sysconfig, - bank,INTC_SYSCONFIG ); -intc_bank_write_reg (intc_context[ind].sysconfig, - bank,INTC_SYSCONFIG ); -intc_bank_write_reg (intc_context[ind].protection, - bank,INTC_PROTECTION ); -intc_bank_write_reg (intc_context[ind].idle, - bank,INTC_IDLE ); -intc_bank_write_reg (intc_context[ind].threshold, - bank,INTC_THRESHOLD ); +intc_writel (INTC_SYSCONFIG , intc_context[ind].sysconfig); +intc_writel (INTC_PROTECTION , intc_context[ind].protection); +intc_writel (INTC_IDLE , intc_context[ind].idle); +intc_writel (INTC_THRESHOLD , intc_context[ind].threshold);for (i =0 ; i <INTCPS_NR_IRQS ; i++) -intc_bank_write_reg (intc_context[ind].ilr[i], - bank, (0x100 +0x4 *i)); +intc_writel (INTC_ILR0 +0x4 * i, + intc_context[ind].ilr[i]);for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) -intc_bank_write_reg (intc_context[ind].mir[i], - &irq_banks[0 ],INTC_MIR0 + (0x20 * i)); +intc_writel (INTC_MIR0 +0x20 * i, + intc_context[ind].mir[i]); }/* MIRs are saved and restore with other PRCM registers */ }
@@ -356,13 +346,13 @@ void omap3_intc_prepare_idle(void)* Disable autoidle as it can stall interrupt controller, * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) */ -intc_bank_write_reg (0 , &irq_banks[0 ],INTC_SYSCONFIG ); +intc_writel (INTC_SYSCONFIG ,0 ); }void omap3_intc_resume_idle (void ) {/* Re-enable autoidle */ -intc_bank_write_reg (1 , &irq_banks[0 ],INTC_SYSCONFIG ); +intc_writel (INTC_SYSCONFIG ,1 ); } asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
Signature · 1 line
1.8.4.GIT
PATCH 4/31 arm: omap: irq: add a global omap_nr_irqs variable
In reply to Felipe Balbithis will cache number of irqs. Also in preparation for removal of irq_banks array.
--- arch/arm/mach-omap2/irq.c | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/mach-omap2/irq.c +3 -0
@@ -70,6 +70,7 @@ static struct omap_irq_bank {static struct irq_domain *domain;static void __iomem *omap_irq_base; +static int omap_nr_irqs =96 ;/* Structure to save interrupt controller context */ struct omap3_intc_regs {
@@ -170,6 +171,8 @@ static void __init omap_init_irq(u32 base, int nr_irqs,if (WARN_ON (!omap_irq_base))return ; + omap_nr_irqs = nr_irqs; + irq_base =irq_alloc_descs (-1 ,0 , nr_irqs,0 );if (irq_base <0 ) {pr_warn ("Couldn't allocate IRQ numbers\n" );
Signature · 1 line
1.8.4.GIT
PATCH 5/31 arm: omap: irq: remove rest of irq_banks usage
In reply to Felipe Balbinow we can finally remove the pointless irq_banks
array.
--- arch/arm/mach-omap2/irq.c | 128 +++++++++++++++++----------------------------- 1 file changed, 47 insertions(+), 81 deletions(-)
arch/arm/mach-omap2/irq.c +47 -81
@@ -49,8 +49,8 @@#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)#define INTCPS_SIR_IRQ_OFFSET 0x0040/* omap2/3 active interrupt offset */ #define ACTIVEIRQ_MASK 0x7f/* omap2/3 active interrupt bits */ +#define INTCPS_NR_ILR_REGS 128#define INTCPS_NR_MIR_REGS 3 -#define INTCPS_NR_IRQS 96/* * OMAP2 has a number of different interrupt controllers, each interrupt
@@ -58,15 +58,6 @@* fairly consistent for each bank, but not all registers are implemented * for each bank.. when in doubt, consult the TRM. */ -static struct omap_irq_bank { -void __iomem *base_reg; -unsigned int nr_irqs; -} __attribute__ ((aligned (4 ))) irq_banks[] = { - { -/* MPU INTC */ - .nr_irqs =96 , - }, -};static struct irq_domain *domain;static void __iomem *omap_irq_base;
@@ -78,7 +69,7 @@ struct omap3_intc_regs {u32 protection;u32 idle;u32 threshold; -u32 ilr[INTCPS_NR_IRQS ]; +u32 ilr[INTCPS_NR_ILR_REGS ];u32 mir[INTCPS_NR_MIR_REGS ]; };
@@ -105,13 +96,14 @@ static void omap_mask_ack_irq(struct irq_data *d)omap_ack_irq (d); } -static void __init omap_irq_bank_init_one (struct omap_irq_bank *bank) +static void __init omap_irq_soft_reset (void ) {unsigned long tmp; tmp =intc_readl (INTC_REVISION ) &0xff ; +pr_info ("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n" , - bank->base_reg, tmp >>4 , tmp &0xf , bank->nr_irqs); + omap_irq_base, tmp >>4 , tmp &0xf , omap_nr_irqs); tmp =intc_readl (INTC_SYSCONFIG ); tmp |=1 <<1 ;/* soft reset */
@@ -126,17 +118,12 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)int omap_irq_pending (void ) { -int i; +int irq; -for (i =0 ; i <ARRAY_SIZE (irq_banks); i++) { -struct omap_irq_bank *bank = irq_banks + i; -int irq; - -for (irq =0 ; irq < bank->nr_irqs; irq +=32 ) -if (intc_readl (INTC_PENDING_IRQ0 + - ((irq >>5 ) <<5 ))) -return 1 ; - } +for (irq =0 ; irq < omap_nr_irqs; irq +=32 ) +if (intc_readl (INTC_PENDING_IRQ0 + + ((irq >>5 ) <<5 ))) +return 1 ;return 0 ; }
@@ -163,9 +150,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)static void __init omap_init_irq (u32 base,int nr_irqs,struct device_node *node) { -unsigned long nr_of_irqs =0 ; -unsigned int nr_banks =0 ; -int i, j, irq_base; +int j, irq_base; omap_irq_base =ioremap (base,SZ_4K );if (WARN_ON (!omap_irq_base))
@@ -180,31 +165,12 @@ static void __init omap_init_irq(u32 base, int nr_irqs, } domain =irq_domain_add_legacy (node, nr_irqs, irq_base,0 , - &irq_domain_simple_ops,NULL ); - -for (i =0 ; i <ARRAY_SIZE (irq_banks); i++) { -struct omap_irq_bank *bank = irq_banks + i; - - bank->nr_irqs = nr_irqs; - -/* Static mapping, never released */ - bank->base_reg =ioremap (base,SZ_4K ); -if (!bank->base_reg) { -pr_err ("Could not ioremap irq bank%i\n" , i); -continue ; - } - -omap_irq_bank_init_one (bank); + &irq_domain_simple_ops,NULL ); -for (j =0 ; j < bank->nr_irqs; j +=32 ) -omap_alloc_gc (bank->base_reg + j, j + irq_base,32 ); +omap_irq_soft_reset (); - nr_of_irqs += bank->nr_irqs; - nr_banks++; - } - -pr_info ("Total of %ld interrupts on %d active controller%s\n" , - nr_of_irqs, nr_banks, nr_banks >1 ?"s" :"" ); +for (j =0 ; j < omap_nr_irqs; j +=32 ) +omap_alloc_gc (omap_irq_base + j, j + irq_base,32 ); }void __init omap2_init_irq (void )
@@ -295,45 +261,45 @@ void __init omap_intc_of_init(void) }#if defined(CONFIG_ARCH_OMAP3 ) || defined(CONFIG_SOC_AM33XX ) -static struct omap3_intc_regs intc_context[ARRAY_SIZE (irq_banks)]; +static struct omap3_intc_regs intc_context;void omap_intc_save_context (void ) { -int ind =0 , i =0 ; -for (ind =0 ; ind <ARRAY_SIZE (irq_banks); ind++) { - intc_context[ind].sysconfig = -intc_readl (INTC_SYSCONFIG ); - intc_context[ind].protection = -intc_readl (INTC_PROTECTION ); - intc_context[ind].idle = -intc_readl (INTC_IDLE ); - intc_context[ind].threshold = -intc_readl (INTC_THRESHOLD ); -for (i =0 ; i <INTCPS_NR_IRQS ; i++) - intc_context[ind].ilr[i] = -intc_readl ((INTC_ILR0 +0x4 * i)); -for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) - intc_context[ind].mir[i] = -intc_readl (INTC_MIR0 + (0x20 * i)); - } +int i; + + intc_context.sysconfig = +intc_readl (INTC_SYSCONFIG ); + intc_context.protection = +intc_readl (INTC_PROTECTION ); + intc_context.idle = +intc_readl (INTC_IDLE ); + intc_context.threshold = +intc_readl (INTC_THRESHOLD ); + +for (i =0 ; i < omap_nr_irqs; i++) + intc_context.ilr[i] = +intc_readl ((INTC_ILR0 +0x4 * i)); +for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) + intc_context.mir[i] = +intc_readl (INTC_MIR0 + (0x20 * i)); }void omap_intc_restore_context (void ) { -int ind =0 , i =0 ; - -for (ind =0 ; ind <ARRAY_SIZE (irq_banks); ind++) { -intc_writel (INTC_SYSCONFIG , intc_context[ind].sysconfig); -intc_writel (INTC_PROTECTION , intc_context[ind].protection); -intc_writel (INTC_IDLE , intc_context[ind].idle); -intc_writel (INTC_THRESHOLD , intc_context[ind].threshold); -for (i =0 ; i <INTCPS_NR_IRQS ; i++) -intc_writel (INTC_ILR0 +0x4 * i, - intc_context[ind].ilr[i]); -for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) -intc_writel (INTC_MIR0 +0x20 * i, - intc_context[ind].mir[i]); - } +int i; + +intc_writel (INTC_SYSCONFIG , intc_context.sysconfig); +intc_writel (INTC_PROTECTION , intc_context.protection); +intc_writel (INTC_IDLE , intc_context.idle); +intc_writel (INTC_THRESHOLD , intc_context.threshold); + +for (i =0 ; i < omap_nr_irqs; i++) +intc_writel (INTC_ILR0 +0x4 * i, + intc_context.ilr[i]); + +for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) +intc_writel (INTC_MIR0 +0x20 * i, + intc_context.mir[i]);/* MIRs are saved and restore with other PRCM registers */ }
Signature · 1 line
1.8.4.GIT
PATCH 6/31 arm: omap: irq: remove unused macro
In reply to Felipe Balbino functional changes.
--- arch/arm/mach-omap2/irq.c | 2 -- 1 file changed, 2 deletions(-)
arch/arm/mach-omap2/irq.c +0 -2
@@ -42,8 +42,6 @@#define INTC_MIR_SET0 0x008c#define INTC_PENDING_IRQ0 0x0098#define INTC_ILR0 0x0100 -/* Number of IRQ state bits in each MIR register */ -#define IRQ_BITS_PER_REG 32#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
Signature · 1 line
1.8.4.GIT
PATCH 7/31 arm: omap: irq: switch over to intc_readl on omap_intc_handle_irq
In reply to Felipe Balbian almost blind conversion from readl_relaxed
to our newly introduced intc_readl().
While at that, also remove some hardcoded
register addresses.
--- arch/arm/mach-omap2/irq.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-)
arch/arm/mach-omap2/irq.c +8 -6
@@ -41,11 +41,13 @@#define INTC_MIR_CLEAR0 0x0088#define INTC_MIR_SET0 0x008c#define INTC_PENDING_IRQ0 0x0098 +#define INTC_PENDING_IRQ1 0x00b8 +#define INTC_PENDING_IRQ2 0x00d8 +#define INTC_PENDING_IRQ3 0x00f8#define INTC_ILR0 0x0100#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) -#define INTCPS_SIR_IRQ_OFFSET 0x0040/* omap2/3 active interrupt offset */ #define ACTIVEIRQ_MASK 0x7f/* omap2/3 active interrupt bits */ #define INTCPS_NR_ILR_REGS 128#define INTCPS_NR_MIR_REGS 3
@@ -191,26 +193,26 @@ static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regsu32 irqnr; do { - irqnr = readl_relaxed(base_addr + 0x98); + irqnr = intc_readl(INTC_PENDING_IRQ0); if (irqnr) goto out; - irqnr = readl_relaxed(base_addr + 0xb8); + irqnr = intc_readl(INTC_PENDING_IRQ1); if (irqnr) goto out; - irqnr = readl_relaxed(base_addr + 0xd8); + irqnr = intc_readl(INTC_PENDING_IRQ2); #if IS_ENABLED(CONFIG_SOC_TI81XX) || IS_ENABLED(CONFIG_SOC_AM33XX) if (irqnr) goto out; - irqnr = readl_relaxed(base_addr + 0xf8); + irqnr = intc_readl(INTC_PENDING_IRQ3); #endif out: if (!irqnr) break; - irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET); + irqnr = intc_readl(INTC_SIR); irqnr &= ACTIVEIRQ_MASK; if (irqnr) {
Signature · 1 line
1.8.4.GIT
PATCH 8/31 arm: omap: irq: remove unnecessary base_addr argument
In reply to Felipe Balbiomap_intc_handle_irq now had an unnecessarybase_addr argument. Let's remove it and fix
all callers.
--- arch/arm/mach-omap2/irq.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-)
arch/arm/mach-omap2/irq.c +3 -7
@@ -46,8 +46,6 @@#define INTC_PENDING_IRQ3 0x00f8#define INTC_ILR0 0x0100 -#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) -#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)#define ACTIVEIRQ_MASK 0x7f/* omap2/3 active interrupt bits */ #define INTCPS_NR_ILR_REGS 128#define INTCPS_NR_MIR_REGS 3
@@ -188,7 +186,7 @@ void __init ti81xx_init_irq(void)omap_init_irq (OMAP34XX_IC_BASE ,128 ,NULL ); } -static inline void omap_intc_handle_irq (void __iomem *base_addr,struct pt_regs *regs) +static inline void omap_intc_handle_irq (struct pt_regs *regs) {u32 irqnr;
@@ -224,8 +222,7 @@ out: asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs) { -void __iomem *base_addr =OMAP2_IRQ_BASE ; -omap_intc_handle_irq (base_addr, regs); +omap_intc_handle_irq (regs); } int __init intc_of_init(struct device_node *node,
@@ -326,7 +323,6 @@ void omap3_intc_resume_idle(void) asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) { -void __iomem *base_addr =OMAP3_IRQ_BASE ; -omap_intc_handle_irq (base_addr, regs); +omap_intc_handle_irq (regs); }#endif /* CONFIG_ARCH_OMAP3 */
Signature · 1 line
1.8.4.GIT
PATCH 9/31 arm: omap: irq: rename omap3_intc_regs
In reply to Felipe Balbijust to make it clearer that it can
be used on all omaps.
--- arch/arm/mach-omap2/irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/irq.c +2 -2
@@ -62,7 +62,7 @@ static void __iomem *omap_irq_base;static int omap_nr_irqs =96 ;/* Structure to save interrupt controller context */ -struct omap3_intc_regs { +struct omap_intc_regs {u32 sysconfig;u32 protection;u32 idle;
@@ -258,7 +258,7 @@ void __init omap_intc_of_init(void) }#if defined(CONFIG_ARCH_OMAP3 ) || defined(CONFIG_SOC_AM33XX ) -static struct omap3_intc_regs intc_context; +static struct omap_intc_regs intc_context;void omap_intc_save_context (void ) {
Signature · 1 line
1.8.4.GIT
PATCH 10/31 arm: omap: irq: always define omap3 support
In reply to Felipe Balbiremove ifdef around omap3 INTC support. This
will make it easier to reuse code for PM.
--- arch/arm/mach-omap2/irq.c | 2 -- 1 file changed, 2 deletions(-)
arch/arm/mach-omap2/irq.c +0 -2
@@ -257,7 +257,6 @@ void __init omap_intc_of_init(void)of_irq_init (irq_match); } -#if defined(CONFIG_ARCH_OMAP3 ) || defined(CONFIG_SOC_AM33XX )static struct omap_intc_regs intc_context;void omap_intc_save_context (void )
@@ -325,4 +324,3 @@ asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs {omap_intc_handle_irq (regs); } -#endif /* CONFIG_ARCH_OMAP3 */
Signature · 1 line
1.8.4.GIT
PATCH 11/31 arm: omap: irq: reorganize code a little bit
In reply to Felipe Balbino functional changes, just moving code around.
--- arch/arm/mach-omap2/irq.c | 133 +++++++++++++++++++++++----------------------- 1 file changed, 66 insertions(+), 67 deletions(-)
arch/arm/mach-omap2/irq.c +66 -67
@@ -57,10 +57,6 @@* for each bank.. when in doubt, consult the TRM. */ -static struct irq_domain *domain; -static void __iomem *omap_irq_base; -static int omap_nr_irqs =96 ; -/* Structure to save interrupt controller context */ struct omap_intc_regs {u32 sysconfig;
@@ -70,6 +66,11 @@ struct omap_intc_regs {u32 ilr[INTCPS_NR_ILR_REGS ];u32 mir[INTCPS_NR_MIR_REGS ]; }; +static struct omap_intc_regs intc_context; + +static struct irq_domain *domain; +static void __iomem *omap_irq_base; +static int omap_nr_irqs =96 ;/* INTC bank register get/set */ static void intc_writel (u32 reg,u32 val)
@@ -82,6 +83,61 @@ static u32 intc_readl(u32 reg)return readl_relaxed (omap_irq_base + reg); } +void omap_intc_save_context (void ) +{ +int i; + + intc_context.sysconfig = +intc_readl (INTC_SYSCONFIG ); + intc_context.protection = +intc_readl (INTC_PROTECTION ); + intc_context.idle = +intc_readl (INTC_IDLE ); + intc_context.threshold = +intc_readl (INTC_THRESHOLD ); + +for (i =0 ; i < omap_nr_irqs; i++) + intc_context.ilr[i] = +intc_readl ((INTC_ILR0 +0x4 * i)); +for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) + intc_context.mir[i] = +intc_readl (INTC_MIR0 + (0x20 * i)); +} + +void omap_intc_restore_context (void ) +{ +int i; + +intc_writel (INTC_SYSCONFIG , intc_context.sysconfig); +intc_writel (INTC_PROTECTION , intc_context.protection); +intc_writel (INTC_IDLE , intc_context.idle); +intc_writel (INTC_THRESHOLD , intc_context.threshold); + +for (i =0 ; i < omap_nr_irqs; i++) +intc_writel (INTC_ILR0 +0x4 * i, + intc_context.ilr[i]); + +for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) +intc_writel (INTC_MIR0 +0x20 * i, + intc_context.mir[i]); +/* MIRs are saved and restore with other PRCM registers */ +} + +void omap3_intc_prepare_idle (void ) +{ +/* +* Disable autoidle as it can stall interrupt controller, +* cf. errata ID i540 for 3430 (all revisions up to 3.1.x) +*/ +intc_writel (INTC_SYSCONFIG ,0 ); +} + +void omap3_intc_resume_idle (void ) +{ +/* Re-enable autoidle */ +intc_writel (INTC_SYSCONFIG ,1 ); +} +/* XXX: FIQ and additional INTC support (only MPU@the moment) */ static void omap_ack_irq (struct irq_data *d) {
@@ -125,6 +181,12 @@ int omap_irq_pending(void)return 0 ; } +void omap3_intc_suspend (void ) +{ +/* A pending interrupt would prevent OMAP from entering suspend */ +omap_ack_irq (NULL ); +} +static __init void omap_alloc_gc (void __iomem *base,unsigned int irq_start,unsigned int num) {
@@ -257,69 +319,6 @@ void __init omap_intc_of_init(void)of_irq_init (irq_match); } -static struct omap_intc_regs intc_context; - -void omap_intc_save_context (void ) -{ -int i; - - intc_context.sysconfig = -intc_readl (INTC_SYSCONFIG ); - intc_context.protection = -intc_readl (INTC_PROTECTION ); - intc_context.idle = -intc_readl (INTC_IDLE ); - intc_context.threshold = -intc_readl (INTC_THRESHOLD ); - -for (i =0 ; i < omap_nr_irqs; i++) - intc_context.ilr[i] = -intc_readl ((INTC_ILR0 +0x4 * i)); -for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) - intc_context.mir[i] = -intc_readl (INTC_MIR0 + (0x20 * i)); -} - -void omap_intc_restore_context (void ) -{ -int i; - -intc_writel (INTC_SYSCONFIG , intc_context.sysconfig); -intc_writel (INTC_PROTECTION , intc_context.protection); -intc_writel (INTC_IDLE , intc_context.idle); -intc_writel (INTC_THRESHOLD , intc_context.threshold); - -for (i =0 ; i < omap_nr_irqs; i++) -intc_writel (INTC_ILR0 +0x4 * i, - intc_context.ilr[i]); - -for (i =0 ; i <INTCPS_NR_MIR_REGS ; i++) -intc_writel (INTC_MIR0 +0x20 * i, - intc_context.mir[i]); -/* MIRs are saved and restore with other PRCM registers */ -} - -void omap3_intc_suspend (void ) -{ -/* A pending interrupt would prevent OMAP from entering suspend */ -omap_ack_irq (NULL ); -} - -void omap3_intc_prepare_idle (void ) -{ -/* -* Disable autoidle as it can stall interrupt controller, -* cf. errata ID i540 for 3430 (all revisions up to 3.1.x) -*/ -intc_writel (INTC_SYSCONFIG ,0 ); -} - -void omap3_intc_resume_idle (void ) -{ -/* Re-enable autoidle */ -intc_writel (INTC_SYSCONFIG ,1 ); -} - asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) {omap_intc_handle_irq (regs);
Signature · 1 line
1.8.4.GIT
PATCH 12/31 arm: omap: irq: add suspend/resume methods
In reply to Felipe Balbithere is a generic way to suspend/resume irqchips, let's use that instead of our homebrew version.
--- arch/arm/mach-omap2/irq.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
arch/arm/mach-omap2/irq.c +14 -0
@@ -150,6 +150,18 @@ static void omap_mask_ack_irq(struct irq_data *d)omap_ack_irq (d); } +static void omap_suspend_irq (struct irq_data *d) +{ +omap3_intc_prepare_idle (); +omap_intc_save_context (); +} + +static void omap_resume_irq (struct irq_data *d) +{ +omap_intc_restore_context (); +omap3_intc_resume_idle (); +} +static void __init omap_irq_soft_reset (void ) {unsigned long tmp;
@@ -199,6 +211,8 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) ct->chip.irq_ack = omap_mask_ack_irq; ct->chip.irq_mask = irq_gc_mask_disable_reg; ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + ct->chip.irq_suspend = omap_suspend_irq; + ct->chip.irq_resume = omap_resume_irq; ct->chip.flags |=IRQCHIP_SKIP_SET_WAKE ; ct->regs.enable =INTC_MIR_CLEAR0 ;
Signature · 1 line
1.8.4.GIT
PATCH 13/31 arm: omap: irq: remove last bits of our homebrew irqchip pm
In reply to Felipe Balbicompletely move towards generic irqchip PM.
--- arch/arm/mach-omap2/common.h | 5 ----- arch/arm/mach-omap2/irq.c | 21 +++++++++------------ arch/arm/mach-omap2/pm34xx.c | 10 ---------- 3 files changed, 9 insertions(+), 27 deletions(-)
arch/arm/mach-omap2/common.h +0 -5
@@ -199,11 +199,6 @@ void omap2_init_irq(void);void omap3_init_irq (void );void ti81xx_init_irq (void );extern int omap_irq_pending (void ); -void omap_intc_save_context (void ); -void omap_intc_restore_context (void ); -void omap3_intc_suspend (void ); -void omap3_intc_prepare_idle (void ); -void omap3_intc_resume_idle (void );void omap2_intc_handle_irq (struct pt_regs *regs);void omap3_intc_handle_irq (struct pt_regs *regs);void omap_intc_of_init (void );
arch/arm/mach-omap2/irq.c +9 -12
@@ -83,7 +83,7 @@ static u32 intc_readl(u32 reg)return readl_relaxed (omap_irq_base + reg); } -void omap_intc_save_context (void ) +static void omap_intc_save_context (void ) {int i;
@@ -104,7 +104,7 @@ void omap_intc_save_context(void)intc_readl (INTC_MIR0 + (0x20 * i)); } -void omap_intc_restore_context (void ) +static void omap_intc_restore_context (void ) {int i;
@@ -123,7 +123,7 @@ void omap_intc_restore_context(void)/* MIRs are saved and restore with other PRCM registers */ } -void omap3_intc_prepare_idle (void ) +static void omap_intc_prepare_idle (void ) {/* * Disable autoidle as it can stall interrupt controller,
@@ -132,7 +132,7 @@ void omap3_intc_prepare_idle(void)intc_writel (INTC_SYSCONFIG ,0 ); } -void omap3_intc_resume_idle (void ) +static void omap_intc_resume_idle (void ) {/* Re-enable autoidle */ intc_writel (INTC_SYSCONFIG ,1 );
@@ -152,14 +152,17 @@ static void omap_mask_ack_irq(struct irq_data *d)static void omap_suspend_irq (struct irq_data *d) { -omap3_intc_prepare_idle (); +omap_intc_prepare_idle ();omap_intc_save_context (); + +/* A pending interrupt would prevent OMAP from entering suspend */ +omap_ack_irq (NULL ); }static void omap_resume_irq (struct irq_data *d) {omap_intc_restore_context (); -omap3_intc_resume_idle (); +omap_intc_resume_idle (); }static void __init omap_irq_soft_reset (void )
@@ -193,12 +196,6 @@ int omap_irq_pending(void)return 0 ; } -void omap3_intc_suspend (void ) -{ -/* A pending interrupt would prevent OMAP from entering suspend */ -omap_ack_irq (NULL ); -} -static __init void omap_alloc_gc (void __iomem *base,unsigned int irq_start,unsigned int num) {
arch/arm/mach-omap2/pm34xx.c +0 -10
@@ -82,8 +82,6 @@ static void omap3_core_save_context(void)omap_ctrl_writel (omap_ctrl_readl (OMAP343X_PADCONF_ETK_D14 ),OMAP343X_CONTROL_MEM_WKUP +0x2a0 ); -/* Save the Interrupt controller context */ -omap_intc_save_context ();/* Save the GPMC context */ omap3_gpmc_save_context ();/* Save the system control module context, padconf already save above*/
@@ -97,8 +95,6 @@ static void omap3_core_restore_context(void)omap3_control_restore_context ();/* Restore the GPMC context */ omap3_gpmc_restore_context (); -/* Restore the interrupt controller context */ -omap_intc_restore_context ();omap_dma_global_context_restore (); }
@@ -288,8 +284,6 @@ void omap_sram_idle(void) } } -omap3_intc_prepare_idle (); -/* * On EMU/HS devices ROM code restores a SRDC value * from scratchpad which has automatic self refresh on timeout
@@ -335,8 +329,6 @@ void omap_sram_idle(void)OMAP3430_GR_MOD , OMAP3_PRM_VOLTCTRL_OFFSET); } -omap3_intc_resume_idle (); -pwrdm_post_transition (NULL );/* PER */
@@ -373,8 +365,6 @@ static int omap3_pm_suspend(void) goto restore; } -omap3_intc_suspend (); -omap_sram_idle (); restore:
Signature · 1 line
1.8.4.GIT
PATCH 14/31 arm: omap: irq: make intc_of_init static
In reply to Felipe Balbinobody uses that function outside of this file,
so we don't need to expose it.
--- arch/arm/mach-omap2/common.h | 10 ---------- arch/arm/mach-omap2/irq.c | 2 +- 2 files changed, 1 insertion(+), 11 deletions(-)
arch/arm/mach-omap2/common.h +0 -10
@@ -209,16 +209,6 @@ extern void __iomem *omap4_get_l2cache_base(void);#endif struct device_node ; -#ifdef CONFIG_OF -int __init intc_of_init (struct device_node *node, -struct device_node *parent); -#else -int __init intc_of_init (struct device_node *node, -struct device_node *parent) -{ -return 0 ; -} -#endif #ifdef CONFIG_SMP extern void __iomem *omap4_get_scu_base (void );
arch/arm/mach-omap2/irq.c +1 -1
@@ -298,7 +298,7 @@ asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regsomap_intc_handle_irq (regs); } -int __init intc_of_init (struct device_node *node, +static int __init intc_of_init (struct device_node *node,struct device_node *parent) {struct resource res;
Signature · 1 line
1.8.4.GIT
PATCH 15/31 arm: omap: irq: call set_handle_irq() from intc_of_init
In reply to Felipe Balbithis will let us drop .handle_irq and .init_irq fields from our generic machine_descs.
--- arch/arm/mach-omap2/irq.c | 2 ++ 1 file changed, 2 insertions(+)
arch/arm/mach-omap2/irq.c +2 -0
@@ -317,6 +317,8 @@ static int __init intc_of_init(struct device_node *node,omap_init_irq (res.start, nr_irq,of_node_get (node)); +set_handle_irq (omap2_intc_handle_irq); +return 0 ; }
Signature · 1 line
1.8.4.GIT
PATCH 16/31 arm: omap: irq: use IRQCHIP_DECLARE macro
In reply to Felipe BalbiIRQCHIP_DECLARE macro is used to declare the same of_device_id structure for irqchips, it's just a helper. No functional changes.
Note that we're temporarily including irqchip.h with its full path, until we move this driver to drivers/irqchip/.
--- arch/arm/mach-omap2/irq.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)
arch/arm/mach-omap2/irq.c +3 -5
@@ -26,6 +26,7 @@#include "soc.h" #include "iomap.h" #include "common.h" +#include "../../drivers/irqchip/irqchip.h" /* selected INTC register offsets */
@@ -322,14 +323,11 @@ static int __init intc_of_init(struct device_node *node,return 0 ; } -static struct of_device_id irq_match[]__initdata = { - { .compatible ="ti,omap2-intc" , .data = intc_of_init, }, - { } -}; +IRQCHIP_DECLARE (omap_intc,"ti,omap2-intc" , intc_of_init);void __init omap_intc_of_init (void ) { -of_irq_init (irq_match); +of_irq_init (&irqchip_of_match_omap_intc); } asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
Signature · 1 line
1.8.4.GIT
PATCH 17/31 arm: omap: irq: drop .handle_irq and .init_irq fields
In reply to Felipe Balbinow we can safely drop those fields from our machine_desc.
While at that, also drop the now unused omap_intc_of_init() definition.
--- arch/arm/mach-omap2/board-generic.c | 12 ------------ arch/arm/mach-omap2/common.h | 1 - arch/arm/mach-omap2/irq.c | 5 ----- 3 files changed, 18 deletions(-)
arch/arm/mach-omap2/board-generic.c +0 -12
@@ -48,8 +48,6 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap242x_map_io, .init_early = omap2420_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap2_intc_handle_irq, .init_machine = omap_generic_init, .init_time = omap2_sync32k_timer_init, .dt_compat = omap242x_boards_compat,
@@ -67,8 +65,6 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap243x_map_io, .init_early = omap2430_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap2_intc_handle_irq, .init_machine = omap_generic_init, .init_time = omap2_sync32k_timer_init, .dt_compat = omap243x_boards_compat,
@@ -86,8 +82,6 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3430_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, .init_late = omap3_init_late, .init_time = omap3_sync32k_timer_init,
@@ -104,8 +98,6 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3630_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, .init_late = omap3_init_late, .init_time = omap3_sync32k_timer_init,
@@ -123,8 +115,6 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3430_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, .init_late = omap3_init_late, .init_time = omap3_secure_sync32k_timer_init,
@@ -143,8 +133,6 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") .reserve = omap_reserve, .map_io = am33xx_map_io, .init_early = am33xx_init_early, - .init_irq = omap_intc_of_init, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, .init_late = am33xx_init_late, .init_time = omap3_gptimer_timer_init,
arch/arm/mach-omap2/common.h +0 -1
@@ -201,7 +201,6 @@ void ti81xx_init_irq(void);extern int omap_irq_pending (void );void omap2_intc_handle_irq (struct pt_regs *regs);void omap3_intc_handle_irq (struct pt_regs *regs); -void omap_intc_of_init (void );void omap_gic_of_init (void );#ifdef CONFIG_CACHE_L2X0
arch/arm/mach-omap2/irq.c +0 -5
@@ -325,11 +325,6 @@ static int __init intc_of_init(struct device_node *node,IRQCHIP_DECLARE (omap_intc,"ti,omap2-intc" , intc_of_init); -void __init omap_intc_of_init (void ) -{ -of_irq_init (&irqchip_of_match_omap_intc); -} - asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) {omap_intc_handle_irq (regs);
Signature · 1 line
1.8.4.GIT
PATCH 18/31 arm: omap: irq: add specific compatibles for omap3 and am33xx devices
In reply to Felipe Balbiwith this, we can use a compatible flag to figure
out how many irq lines are wired up, no need for
our TI-specific ti,intc-size binding.
--- arch/arm/mach-omap2/irq.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
arch/arm/mach-omap2/irq.c +3 -1
@@ -323,7 +323,9 @@ static int __init intc_of_init(struct device_node *node,return 0 ; } -IRQCHIP_DECLARE (omap_intc,"ti,omap2-intc" , intc_of_init); +IRQCHIP_DECLARE (omap2_intc,"ti,omap2-intc" , intc_of_init); +IRQCHIP_DECLARE (omap3_intc,"ti,omap3-intc" , intc_of_init); +IRQCHIP_DECLARE (am33xx_intc,"ti,am33xx-intc" , intc_of_init); asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) {
Signature · 1 line
1.8.4.GIT
PATCH 19/31 arm: omap: irq: use compatible flag to figure out number of IRQ lines
In reply to Felipe Balbiso far, only am33xx has 128 lines, all other devices have only 96.
--- arch/arm/mach-omap2/irq.c | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/mach-omap2/irq.c +3 -0
@@ -313,6 +313,9 @@ static int __init intc_of_init(struct device_node *node,return -EINVAL ; } +if (of_device_is_compatible (node,"ti,am33xx-intc" )) + nr_irq =128 ; +if (of_property_read_u32 (node,"ti,intc-size" , &nr_irq))pr_warn ("unable to get intc-size, default to %d\n" , nr_irq);
Signature · 1 line
1.8.4.GIT
PATCH 20/31 arm: boot: dts: am33xx/omap3: fix intc compatible flag
In reply to Felipe Balbithat way, our intc driver can figure out how
many IRQ lines INTC has.
--- arch/arm/boot/dts/am33xx.dtsi | 2 +- arch/arm/boot/dts/omap3.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/am33xx.dtsi +1 -1
@@ -103,7 +103,7 @@ ti,hwmods = "l3_main"; intc: interrupt-controller at 48200000 { - compatible = "ti,omap2-intc"; + compatible = "ti,am33xx-intc"; interrupt-controller; #interrupt-cells = <1>; ti,intc-size = <128>;
arch/arm/boot/dts/omap3.dtsi +1 -1
@@ -89,7 +89,7 @@ }; intc: interrupt-controller at 48200000 { - compatible = "ti,omap2-intc"; + compatible = "ti,omap3-intc"; interrupt-controller; #interrupt-cells = <1>; ti,intc-size = <96>;
Signature · 1 line
1.8.4.GIT
PATCH 21/31 arm: omap: irq: drop ti,intc-size support
In reply to Felipe Balbiwe don't need that anymore since specific
devices are passing correct compatible flags.
--- arch/arm/mach-omap2/irq.c | 3 --- 1 file changed, 3 deletions(-)
arch/arm/mach-omap2/irq.c +0 -3
@@ -316,9 +316,6 @@ static int __init intc_of_init(struct device_node *node,if (of_device_is_compatible (node,"ti,am33xx-intc" )) nr_irq =128 ; -if (of_property_read_u32 (node,"ti,intc-size" , &nr_irq)) -pr_warn ("unable to get intc-size, default to %d\n" , nr_irq); -omap_init_irq (res.start, nr_irq,of_node_get (node));set_handle_irq (omap2_intc_handle_irq);
Signature · 1 line
1.8.4.GIT
PATCH 22/31 arm: boot: dts: omap2/3/am33xx: drop ti, intc-size
In reply to Felipe Balbiwe are now infering number of IRQ lines based
on correct compatible flag, which renders this
binding completely useless.
--- arch/arm/boot/dts/am33xx.dtsi | 1 - arch/arm/boot/dts/omap2.dtsi | 1 - arch/arm/boot/dts/omap3.dtsi | 1 - 3 files changed, 3 deletions(-)
arch/arm/boot/dts/am33xx.dtsi +0 -1
@@ -106,7 +106,6 @@ compatible = "ti,am33xx-intc"; interrupt-controller; #interrupt-cells = <1>; - ti,intc-size = <128>; reg = <0x48200000 0x1000>; };
arch/arm/boot/dts/omap2.dtsi +0 -1
@@ -57,7 +57,6 @@ compatible = "ti,omap2-intc"; interrupt-controller; #interrupt-cells = <1>; - ti,intc-size = <96>; reg = <0x480FE000 0x1000>; };
arch/arm/boot/dts/omap3.dtsi +0 -1
@@ -92,7 +92,6 @@ compatible = "ti,omap3-intc"; interrupt-controller; #interrupt-cells = <1>; - ti,intc-size = <96>; reg = <0x48200000 0x1000>; };
Signature · 1 line
1.8.4.GIT
PATCH 23/31 arm: omap: irq: move some more code around
In reply to Felipe BalbiWe want .init_irq to call set_irq_handle() for
legacy platforms. Note that this code will also
be dropped once omap2/3 devices are completely
moved to DT.
--- arch/arm/mach-omap2/irq.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
arch/arm/mach-omap2/irq.c +15 -15
@@ -245,21 +245,6 @@ static void __init omap_init_irq(u32 base, int nr_irqs,omap_alloc_gc (omap_irq_base + j, j + irq_base,32 ); } -void __init omap2_init_irq (void ) -{ -omap_init_irq (OMAP24XX_IC_BASE ,96 ,NULL ); -} - -void __init omap3_init_irq (void ) -{ -omap_init_irq (OMAP34XX_IC_BASE ,96 ,NULL ); -} - -void __init ti81xx_init_irq (void ) -{ -omap_init_irq (OMAP34XX_IC_BASE ,128 ,NULL ); -} -static inline void omap_intc_handle_irq (struct pt_regs *regs) {u32 irqnr;
@@ -299,6 +284,21 @@ asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regsomap_intc_handle_irq (regs); } +void __init omap2_init_irq (void ) +{ +omap_init_irq (OMAP24XX_IC_BASE ,96 ,NULL ); +} + +void __init omap3_init_irq (void ) +{ +omap_init_irq (OMAP34XX_IC_BASE ,96 ,NULL ); +} + +void __init ti81xx_init_irq (void ) +{ +omap_init_irq (OMAP34XX_IC_BASE ,128 ,NULL ); +} +static int __init intc_of_init (struct device_node *node,struct device_node *parent) {
Signature · 1 line
1.8.4.GIT
PATCH 24/31 arm: omap: irq: call set_handle_irq() from .init_irq
In reply to Felipe Balbithe idea is that board-files won't need to set
.handle_irq on their machine_descs, which lets
us drop a little more pointless code.
--- arch/arm/mach-omap2/board-2430sdp.c | 1 - arch/arm/mach-omap2/board-3430sdp.c | 1 - arch/arm/mach-omap2/board-am3517crane.c | 1 - arch/arm/mach-omap2/board-am3517evm.c | 1 - arch/arm/mach-omap2/board-cm-t35.c | 2 -- arch/arm/mach-omap2/board-cm-t3517.c | 1 - arch/arm/mach-omap2/board-devkit8000.c | 1 - arch/arm/mach-omap2/board-h4.c | 1 - arch/arm/mach-omap2/board-ldp.c | 1 - arch/arm/mach-omap2/board-n8x0.c | 3 --- arch/arm/mach-omap2/board-omap3beagle.c | 1 - arch/arm/mach-omap2/board-omap3logic.c | 2 -- arch/arm/mach-omap2/board-omap3pandora.c | 1 - arch/arm/mach-omap2/board-omap3stalker.c | 1 - arch/arm/mach-omap2/board-omap3touchbook.c | 1 - arch/arm/mach-omap2/board-overo.c | 1 - arch/arm/mach-omap2/board-rx51.c | 1 - arch/arm/mach-omap2/irq.c | 3 +++ 18 files changed, 3 insertions(+), 21 deletions(-)
arch/arm/mach-omap2/board-2430sdp.c +0 -1
@@ -265,7 +265,6 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") .map_io = omap243x_map_io, .init_early = omap2430_init_early, .init_irq = omap2_init_irq, - .handle_irq = omap2_intc_handle_irq, .init_machine = omap_2430sdp_init, .init_late = omap2430_init_late, .init_time = omap2_sync32k_timer_init,
arch/arm/mach-omap2/board-3430sdp.c +0 -1
@@ -625,7 +625,6 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_3430sdp_init, .init_late = omap3430_init_late, .init_time = omap3_sync32k_timer_init,
arch/arm/mach-omap2/board-am3517crane.c +0 -1
@@ -142,7 +142,6 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") .map_io = omap3_map_io, .init_early = am35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = am3517_crane_init, .init_late = am35xx_init_late, .init_time = omap3_sync32k_timer_init,
arch/arm/mach-omap2/board-am3517evm.c +0 -1
@@ -371,7 +371,6 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") .map_io = omap3_map_io, .init_early = am35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = am3517_evm_init, .init_late = am35xx_init_late, .init_time = omap3_sync32k_timer_init,
arch/arm/mach-omap2/board-cm-t35.c +0 -2
@@ -750,7 +750,6 @@ MACHINE_START(CM_T35, "Compulab CM-T35") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t35_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init,
@@ -763,7 +762,6 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730") .map_io = omap3_map_io, .init_early = omap3630_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t3730_init, .init_late = omap3630_init_late, .init_time = omap3_sync32k_timer_init,
arch/arm/mach-omap2/board-cm-t3517.c +0 -1
@@ -329,7 +329,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") .map_io = omap3_map_io, .init_early = am35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t3517_init, .init_late = am35xx_init_late, .init_time = omap3_gptimer_timer_init,
arch/arm/mach-omap2/board-devkit8000.c +0 -1
@@ -647,7 +647,6 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = devkit8000_init, .init_late = omap35xx_init_late, .init_time = omap3_secure_sync32k_timer_init,
arch/arm/mach-omap2/board-h4.c +0 -1
@@ -357,7 +357,6 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, - .handle_irq = omap2_intc_handle_irq, .init_machine = omap_h4_init, .init_late = omap2420_init_late, .init_time = omap2_sync32k_timer_init,
arch/arm/mach-omap2/board-ldp.c +0 -1
@@ -417,7 +417,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap_ldp_init, .init_late = omap3430_init_late, .init_time = omap3_sync32k_timer_init,
arch/arm/mach-omap2/board-n8x0.c +0 -3
@@ -724,7 +724,6 @@ MACHINE_START(NOKIA_N800, "Nokia N800") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, - .handle_irq = omap2_intc_handle_irq, .init_machine = n8x0_init_machine, .init_late = omap2420_init_late, .init_time = omap2_sync32k_timer_init,
@@ -737,7 +736,6 @@ MACHINE_START(NOKIA_N810, "Nokia N810") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, - .handle_irq = omap2_intc_handle_irq, .init_machine = n8x0_init_machine, .init_late = omap2420_init_late, .init_time = omap2_sync32k_timer_init,
@@ -750,7 +748,6 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, - .handle_irq = omap2_intc_handle_irq, .init_machine = n8x0_init_machine, .init_late = omap2420_init_late, .init_time = omap2_sync32k_timer_init,
arch/arm/mach-omap2/board-omap3beagle.c +0 -1
@@ -588,7 +588,6 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") .map_io = omap3_map_io, .init_early = omap3_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_beagle_init, .init_late = omap3_init_late, .init_time = omap3_secure_sync32k_timer_init,
arch/arm/mach-omap2/board-omap3logic.c +0 -2
@@ -230,7 +230,6 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3logic_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init,
@@ -243,7 +242,6 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3logic_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init,
arch/arm/mach-omap2/board-omap3pandora.c +0 -1
@@ -622,7 +622,6 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3pandora_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init,
arch/arm/mach-omap2/board-omap3stalker.c +0 -1
@@ -430,7 +430,6 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_stalker_init, .init_late = omap35xx_init_late, .init_time = omap3_secure_sync32k_timer_init,
arch/arm/mach-omap2/board-omap3touchbook.c +0 -1
@@ -388,7 +388,6 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_touchbook_init, .init_late = omap3430_init_late, .init_time = omap3_secure_sync32k_timer_init,
arch/arm/mach-omap2/board-overo.c +0 -1
@@ -564,7 +564,6 @@ MACHINE_START(OVERO, "Gumstix Overo") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = overo_init, .init_late = omap35xx_init_late, .init_time = omap3_sync32k_timer_init,
arch/arm/mach-omap2/board-rx51.c +0 -1
@@ -134,7 +134,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, - .handle_irq = omap3_intc_handle_irq, .init_machine = rx51_init, .init_late = omap3430_init_late, .init_time = omap3_sync32k_timer_init,
arch/arm/mach-omap2/irq.c +3 -0
@@ -287,16 +287,19 @@ asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regsvoid __init omap2_init_irq (void ) {omap_init_irq (OMAP24XX_IC_BASE ,96 ,NULL ); +set_handle_irq (omap2_intc_handle_irq); }void __init omap3_init_irq (void ) {omap_init_irq (OMAP34XX_IC_BASE ,96 ,NULL ); +set_handle_irq (omap2_intc_handle_irq); }void __init ti81xx_init_irq (void ) {omap_init_irq (OMAP34XX_IC_BASE ,128 ,NULL ); +set_handle_irq (omap2_intc_handle_irq); } static int __init intc_of_init(struct device_node *node,
Signature · 1 line
1.8.4.GIT
PATCH 25/31 arm: omap: irq: drop omap3_intc_handle_irq()
In reply to Felipe Balbithere are no more users for that function, we
can safely drop it.
--- arch/arm/mach-omap2/common.h | 1 - arch/arm/mach-omap2/irq.c | 5 ----- 2 files changed, 6 deletions(-)
arch/arm/mach-omap2/common.h +0 -1
@@ -200,7 +200,6 @@ void omap3_init_irq(void);void ti81xx_init_irq (void );extern int omap_irq_pending (void );void omap2_intc_handle_irq (struct pt_regs *regs); -void omap3_intc_handle_irq (struct pt_regs *regs);void omap_gic_of_init (void );#ifdef CONFIG_CACHE_L2X0
arch/arm/mach-omap2/irq.c +0 -5
@@ -329,8 +329,3 @@ static int __init intc_of_init(struct device_node *node,IRQCHIP_DECLARE (omap2_intc,"ti,omap2-intc" , intc_of_init);IRQCHIP_DECLARE (omap3_intc,"ti,omap3-intc" , intc_of_init);IRQCHIP_DECLARE (am33xx_intc,"ti,am33xx-intc" , intc_of_init); - -asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) -{ -omap_intc_handle_irq (regs); -}
Signature · 1 line
1.8.4.GIT
PATCH 26/31 arm: omap: irq: drop omap2_intc_handle_irq()
In reply to Felipe Balbithat was just a no-op wrapper around omap_intc_handle_irq anyway.
--- arch/arm/mach-omap2/common.h | 1 - arch/arm/mach-omap2/irq.c | 16 ++++++---------- 2 files changed, 6 insertions(+), 11 deletions(-)
arch/arm/mach-omap2/common.h +0 -1
@@ -199,7 +199,6 @@ void omap2_init_irq(void);void omap3_init_irq (void );void ti81xx_init_irq (void );extern int omap_irq_pending (void ); -void omap2_intc_handle_irq (struct pt_regs *regs);void omap_gic_of_init (void );#ifdef CONFIG_CACHE_L2X0
arch/arm/mach-omap2/irq.c +6 -10
@@ -245,7 +245,8 @@ static void __init omap_init_irq(u32 base, int nr_irqs,omap_alloc_gc (omap_irq_base + j, j + irq_base,32 ); } -static inline void omap_intc_handle_irq (struct pt_regs *regs) +static asmlinkage void __exception_irq_entry +omap_intc_handle_irq (struct pt_regs *regs) {u32 irqnr;
@@ -279,27 +280,22 @@ out: }while (irqnr); } -asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs) -{ -omap_intc_handle_irq (regs); -} -void __init omap2_init_irq (void ) {omap_init_irq (OMAP24XX_IC_BASE ,96 ,NULL ); -set_handle_irq (omap2_intc_handle_irq); +set_handle_irq (omap_intc_handle_irq); }void __init omap3_init_irq (void ) {omap_init_irq (OMAP34XX_IC_BASE ,96 ,NULL ); -set_handle_irq (omap2_intc_handle_irq); +set_handle_irq (omap_intc_handle_irq); }void __init ti81xx_init_irq (void ) {omap_init_irq (OMAP34XX_IC_BASE ,128 ,NULL ); -set_handle_irq (omap2_intc_handle_irq); +set_handle_irq (omap_intc_handle_irq); } static int __init intc_of_init(struct device_node *node,
@@ -321,7 +317,7 @@ static int __init intc_of_init(struct device_node *node,omap_init_irq (res.start, nr_irq,of_node_get (node)); -set_handle_irq (omap2_intc_handle_irq); +set_handle_irq (omap_intc_handle_irq);return 0 ; }
Signature · 1 line
1.8.4.GIT
PATCH 27/31 arm: omap: irq: drop omap_pending_irq()
In reply to Felipe BalbiWe already ack pending IRQs during suspend,
which renders the check for pending IRQs
quite unnecessary.
--- arch/arm/mach-omap2/common.h | 1 - arch/arm/mach-omap2/cpuidle34xx.c | 2 +- arch/arm/mach-omap2/irq.c | 11 ----------- arch/arm/mach-omap2/pm24xx.c | 11 ----------- arch/arm/mach-omap2/pm34xx.c | 3 --- 5 files changed, 1 insertion(+), 27 deletions(-)
arch/arm/mach-omap2/common.h +0 -1
@@ -198,7 +198,6 @@ extern struct device *omap4_get_dsp_device(void);void omap2_init_irq (void );void omap3_init_irq (void );void ti81xx_init_irq (void ); -extern int omap_irq_pending (void );void omap_gic_of_init (void );#ifdef CONFIG_CACHE_L2X0
arch/arm/mach-omap2/cpuidle34xx.c +1 -1
@@ -112,7 +112,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev, {struct omap3_idle_statedata *cx = &omap3_idle_data[index]; -if (omap_irq_pending () ||need_resched ()) +if (need_resched ()) goto return_sleep_time;/* Deny idle for C1 */
arch/arm/mach-omap2/irq.c +0 -11
@@ -186,17 +186,6 @@ static void __init omap_irq_soft_reset(void)intc_writel (INTC_SYSCONFIG ,1 <<0 ); } -int omap_irq_pending (void ) -{ -int irq; - -for (irq =0 ; irq < omap_nr_irqs; irq +=32 ) -if (intc_readl (INTC_PENDING_IRQ0 + - ((irq >>5 ) <<5 ))) -return 1 ; -return 0 ; -} -static __init void omap_alloc_gc (void __iomem *base,unsigned int irq_start,unsigned int num) {
arch/arm/mach-omap2/pm24xx.c +0 -11
@@ -88,17 +88,11 @@ static int omap2_enter_full_retention(void)omap2_gpio_prepare_for_idle (0 ); -/* One last check for pending IRQs to avoid extra latency due -* to sleeping unnecessarily. */ -if (omap_irq_pending ()) - goto no_sleep; -/* Jump to SRAM suspend code */ omap2_sram_suspend (sdrc_read_reg (SDRC_DLLA_CTRL ),OMAP_SDRC_REGADDR (SDRC_DLLA_CTRL ),OMAP_SDRC_REGADDR (SDRC_POWER )); -no_sleep:omap2_gpio_resume_after_idle ();clk_enable (osc_ck);
@@ -181,15 +175,10 @@ static int omap2_can_sleep(void)static void omap2_pm_idle (void ) {if (!omap2_can_sleep ()) { -if (omap_irq_pending ()) -return ;omap2_enter_mpu_retention ();return ; } -if (omap_irq_pending ()) -return ; -omap2_enter_full_retention (); }
arch/arm/mach-omap2/pm34xx.c +0 -3
@@ -338,9 +338,6 @@ void omap_sram_idle(void)static void omap3_pm_idle (void ) { -if (omap_irq_pending ()) -return ; -trace_cpu_idle (1 ,smp_processor_id ());omap_sram_idle ();
Signature · 1 line
1.8.4.GIT
PATCH 28/31 arm: omap: irq: remove unnecessary header
In reply to Felipe BalbiThere's no need for that header to be included.
--- arch/arm/mach-omap2/irq.c | 1 - 1 file changed, 1 deletion(-)
arch/arm/mach-omap2/irq.c +0 -1
@@ -24,7 +24,6 @@#include <linux/of_irq.h> #include "soc.h" -#include "iomap.h" #include "common.h" #include "../../drivers/irqchip/irqchip.h"
Signature · 1 line
1.8.4.GIT
PATCH 29/31 arm: omap: irq: remove nr_irqs argument
In reply to Felipe Balbiwe can set our global omap_nr_irqs early on
and drop the extra argument to omap_init_irq().
--- arch/arm/mach-omap2/irq.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-)
arch/arm/mach-omap2/irq.c +13 -12
@@ -207,8 +207,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) IRQ_NOREQUEST | IRQ_NOPROBE, 0); } -static void __init omap_init_irq (u32 base,int nr_irqs, -struct device_node *node) +static void __init omap_init_irq (u32 base,struct device_node *node) {int j, irq_base;
@@ -216,15 +215,13 @@ static void __init omap_init_irq(u32 base, int nr_irqs,if (WARN_ON (!omap_irq_base))return ; - omap_nr_irqs = nr_irqs; - - irq_base =irq_alloc_descs (-1 ,0 , nr_irqs,0 ); + irq_base =irq_alloc_descs (-1 ,0 , omap_nr_irqs,0 );if (irq_base <0 ) {pr_warn ("Couldn't allocate IRQ numbers\n" ); irq_base =0 ; } - domain =irq_domain_add_legacy (node, nr_irqs, irq_base,0 , + domain =irq_domain_add_legacy (node, omap_nr_irqs, irq_base,0 , &irq_domain_simple_ops,NULL );omap_irq_soft_reset ();
@@ -270,19 +267,22 @@ out:void __init omap2_init_irq (void ) { -omap_init_irq (OMAP24XX_IC_BASE ,96 ,NULL ); + omap_nr_irqs =96 ; +omap_init_irq (OMAP24XX_IC_BASE ,NULL );set_handle_irq (omap_intc_handle_irq); }void __init omap3_init_irq (void ) { -omap_init_irq (OMAP34XX_IC_BASE ,96 ,NULL ); + omap_nr_irqs =96 ; +omap_init_irq (OMAP34XX_IC_BASE ,NULL );set_handle_irq (omap_intc_handle_irq); }void __init ti81xx_init_irq (void ) { -omap_init_irq (OMAP34XX_IC_BASE ,128 ,NULL ); + omap_nr_irqs =96 ; +omap_init_irq (OMAP34XX_IC_BASE ,NULL );set_handle_irq (omap_intc_handle_irq); }
@@ -290,7 +290,8 @@ static int __init intc_of_init(struct device_node *node, struct device_node *parent) {struct resource res; -u32 nr_irq =96 ; + + omap_nr_irqs =96 ;if (WARN_ON (!node))return -ENODEV ;
@@ -301,9 +302,9 @@ static int __init intc_of_init(struct device_node *node, }if (of_device_is_compatible (node,"ti,am33xx-intc" )) - nr_irq =128 ; + omap_nr_irqs =128 ; -omap_init_irq (res.start, nr_irq,of_node_get (node)); +omap_init_irq (res.start,of_node_get (node));set_handle_irq (omap_intc_handle_irq);
Signature · 1 line
1.8.4.GIT
PATCH 30/31 arm: omap: irq: introduce omap_nr_pending
In reply to Felipe Balbithat variable will tell us how many INTC_PENDING_IRQn registers we have. It'll be used on a following patch to cleanup omap_intc_handle_irq() a bit.
--- arch/arm/mach-omap2/irq.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
arch/arm/mach-omap2/irq.c +8 -1
@@ -70,6 +70,7 @@ static struct omap_intc_regs intc_context;static struct irq_domain *domain;static void __iomem *omap_irq_base; +static int omap_nr_pending =3 ;static int omap_nr_irqs =96 ;/* INTC bank register get/set */
@@ -268,6 +269,7 @@ out:void __init omap2_init_irq (void ) { omap_nr_irqs =96 ; + omap_nr_pending =3 ;omap_init_irq (OMAP24XX_IC_BASE ,NULL );set_handle_irq (omap_intc_handle_irq); }
@@ -275,6 +277,7 @@ void __init omap2_init_irq(void)void __init omap3_init_irq (void ) { omap_nr_irqs =96 ; + omap_nr_pending =3 ;omap_init_irq (OMAP34XX_IC_BASE ,NULL );set_handle_irq (omap_intc_handle_irq); }
@@ -282,6 +285,7 @@ void __init omap3_init_irq(void)void __init ti81xx_init_irq (void ) { omap_nr_irqs =96 ; + omap_nr_pending =4 ;omap_init_irq (OMAP34XX_IC_BASE ,NULL );set_handle_irq (omap_intc_handle_irq); }
@@ -291,6 +295,7 @@ static int __init intc_of_init(struct device_node *node, {struct resource res; + omap_nr_pending =3 ; omap_nr_irqs =96 ;if (WARN_ON (!node))
@@ -301,8 +306,10 @@ static int __init intc_of_init(struct device_node *node,return -EINVAL ; } -if (of_device_is_compatible (node,"ti,am33xx-intc" )) +if (of_device_is_compatible (node,"ti,am33xx-intc" )) { omap_nr_irqs =128 ; + omap_nr_pending =4 ; + }omap_init_irq (res.start,of_node_get (node));
Signature · 1 line
1.8.4.GIT
PATCH 31/31 arm: omap: irq: get rid of ifdef hack
In reply to Felipe Balbiwe don't need the ifdef if we have omap_nr_pending telling us how many pending registers we have on current platform. This solves a possible problem where we could try to handle bogus interrupts on OMAP2 and OMAP3 if using single zImage kernel, because we would end up reading the following pending FIQ register.
--- arch/arm/mach-omap2/irq.c | 22 +++++++--------------- 1 file changed, 7 insertions(+), 15 deletions(-)
arch/arm/mach-omap2/irq.c +7 -15
@@ -234,23 +234,15 @@ static void __init omap_init_irq(u32 base, struct device_node *node) static asmlinkage void __exception_irq_entryomap_intc_handle_irq (struct pt_regs *regs) { -u32 irqnr; +u32 irqnr =0 ; +int i; do { - irqnr = intc_readl(INTC_PENDING_IRQ0); - if (irqnr) - goto out; - - irqnr = intc_readl(INTC_PENDING_IRQ1); - if (irqnr) - goto out; - - irqnr = intc_readl(INTC_PENDING_IRQ2); -#if IS_ENABLED(CONFIG_SOC_TI81XX) || IS_ENABLED(CONFIG_SOC_AM33XX) - if (irqnr) - goto out; - irqnr = intc_readl(INTC_PENDING_IRQ3); -#endif + for (i = 0; i < omap_nr_pending; i++) { + irqnr = intc_readl(INTC_PENDING_IRQ0 + (0x20 * i)); + if (irqnr) + goto out; + } out: if (!irqnr)
Signature · 1 line
1.8.4.GIT
Tony Lindgren
maintainercover arm: omap: irq: cleanup INTC driver
In reply to Felipe BalbiQuoted 2 lines · Felipe Balbi
Afte these patches, we're very close to being able
to movearch/arm/mach-omap2/irq.ctodrivers/irqchip/irq-intc.c
That would be nice :)
Quoted 3 lines
All which would be missing is for Tony to drop all OMAP2/3 board files so we remove the few pending bits and pieces left in for legacy boot.
That may still need to wait a while, but let's see.
Quoted 4 lines
Note that I have only boot tested these on AM335x Bone Black (with a small fix for fixed regulator which should be in the mailing list already), so I'd need help testing all other impacted platforms, specially when it comes to PM.
Sorry have not had much of a chance to test these with PM with all the fixes needed for omap3 DT mode. Tried testing these just now, but I get:
arch/arm/mach-omap2/board-generic.c:134: error: ?omap_intc_of_init? undeclared here (not in a function)
Regards,
Tony
cover arm: omap: irq: cleanup INTC driver
Quoted 17 lines · Tony Lindgren
Quoted 2 lines · Felipe Balbi
Afte these patches, we're very close to being able
to movearch/arm/mach-omap2/irq.ctodrivers/irqchip/irq-intc.cThat would be nice :)
Quoted 3 lines
All which would be missing is for Tony to drop all OMAP2/3 board files so we remove the few pending bits and pieces left in for legacy boot.
That may still need to wait a while, but let's see.
Quoted 4 lines
Note that I have only boot tested these on AM335x Bone Black (with a small fix for fixed regulator which should be in the mailing list already), so I'd need help testing all other impacted platforms, specially when it comes to PM.
Quoted 5 lines
Sorry have not had much of a chance to test these with PM with all the fixes needed for omap3 DT mode. Tried testing these just now, but I get:
arch/arm/mach-omap2/board-generic.c:134: error: ?omap_intc_of_init? undeclared here (not in a function)
some of your other changes messed it up, I have not references of omap_intc_of_init() in my branch, because that's one of the things I'm dropping from DT-based boots.
Can you see which patch added a new omap_intc_of_init() call ? Or maybe tell me which branch I should rebase on top of ?
cheers
Signature · 8 lines
balbi -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20131219/6397427f/attachment.sig>
Tony Lindgren
maintainercover arm: omap: irq: cleanup INTC driver
Quoted 22 lines · Felipe Balbi
Quoted 21 lines · Tony Lindgren
Quoted 2 lines · Felipe Balbi
Afte these patches, we're very close to being able
to movearch/arm/mach-omap2/irq.ctodrivers/irqchip/irq-intc.cThat would be nice :)
Quoted 3 lines
All which would be missing is for Tony to drop all OMAP2/3 board files so we remove the few pending bits and pieces left in for legacy boot.
That may still need to wait a while, but let's see.
Quoted 4 lines
Note that I have only boot tested these on AM335x Bone Black (with a small fix for fixed regulator which should be in the mailing list already), so I'd need help testing all other impacted platforms, specially when it comes to PM.
Sorry have not had much of a chance to test these with PM with all the fixes needed for omap3 DT mode. Tried testing these just now, but I get:
Quoted 8 lines
Quoted 1 line
arch/arm/mach-omap2/board-generic.c:134: error: ?omap_intc_of_init? undeclared here (not in a function)some of your other changes messed it up, I have not references of
omap_intc_of_init()in my branch, because that's one of the things I'm dropping from DT-based boots.Can you see which patch added a new
omap_intc_of_init()call ? Or maybe tell me which branch I should rebase on top of ?
OK I tried against v3.13-rc4, it's the 3517 changes that caused it. Looks like that can be just removed, and then there are some trivial n8x0 merge conflicts. And n8x0 boots too.
But looks like omap3 off-idle hangs after hitting idle with these, so a bit more work is needed. Maybe also rebase these against omap-for-v3.14/dt too?
Regards,
Tony
cover arm: omap: irq: cleanup INTC driver
Quoted 29 lines · Tony Lindgren
Quoted 28 lines · Felipe Balbi
Quoted 17 lines · Tony Lindgren
Quoted 2 lines · Felipe Balbi
Afte these patches, we're very close to being able
to movearch/arm/mach-omap2/irq.ctodrivers/irqchip/irq-intc.cThat would be nice :)
Quoted 3 lines
All which would be missing is for Tony to drop all OMAP2/3 board files so we remove the few pending bits and pieces left in for legacy boot.
That may still need to wait a while, but let's see.
Quoted 4 lines
Note that I have only boot tested these on AM335x Bone Black (with a small fix for fixed regulator which should be in the mailing list already), so I'd need help testing all other impacted platforms, specially when it comes to PM.
Quoted 5 lines
Sorry have not had much of a chance to test these with PM with all the fixes needed for omap3 DT mode. Tried testing these just now, but I get:
arch/arm/mach-omap2/board-generic.c:134: error: ?omap_intc_of_init? undeclared here (not in a function)some of your other changes messed it up, I have not references of
omap_intc_of_init()in my branch, because that's one of the things I'm dropping from DT-based boots.
Quoted 8 lines
Quoted 2 lines
Can you see which patch added a new
omap_intc_of_init()call ? Or maybe tell me which branch I should rebase on top of ?OK I tried against v3.13-rc4, it's the 3517 changes that caused it. Looks like that can be just removed, and then there are some trivial n8x0 merge conflicts. And n8x0 boots too.
But looks like omap3 off-idle hangs after hitting idle with these,
could it be we're racing between irq_chip.suspend() and hwmod's _disable() calls ?
Quoted 2 lines
so a bit more work is needed. Maybe also rebase these against omap-for-v3.14/dt too?
Will do.
Signature · 8 lines
balbi -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20131223/39d4027f/attachment.sig>
cover arm: omap: irq: cleanup INTC driver
Hi,
Quoted 8 lines · Felipe Balbi
Quoted 7 lines · Tony Lindgren
Quoted 6 lines · Felipe Balbi
Quoted 5 lines · Tony Lindgren
Quoted 2 lines · Felipe Balbi
Afte these patches, we're very close to being able
to movearch/arm/mach-omap2/irq.ctodrivers/irqchip/irq-intc.cThat would be nice :)
added a few patches on top of my branch removing all arch/arm/ dependencies and moving the driver to drivers/irqchip/irq-omap-intc.c
Quoted 18 lines
Quoted 18 lines
Quoted 17 lines
Quoted 10 lines
Quoted 4 lines
Note that I have only boot tested these on AM335x Bone Black (with a small fix for fixed regulator which should be in the mailing list already), so I'd need help testing all other impacted platforms, specially when it comes to PM.
Sorry have not had much of a chance to test these with PM with all the fixes needed for omap3 DT mode. Tried testing these just now, but I get:
arch/arm/mach-omap2/board-generic.c:134: error: ?omap_intc_of_init? undeclared here (not in a function)some of your other changes messed it up, I have not references of
omap_intc_of_init()in my branch, because that's one of the things I'm dropping from DT-based boots.Can you see which patch added a new
omap_intc_of_init()call ? Or maybe tell me which branch I should rebase on top of ?
Quoted 8 lines
Quoted 5 lines
OK I tried against v3.13-rc4, it's the 3517 changes that caused it. Looks like that can be just removed, and then there are some trivial n8x0 merge conflicts. And n8x0 boots too.
But looks like omap3 off-idle hangs after hitting idle with these,
could it be we're racing between
irq_chip.suspend()and hwmod's_disable()calls ?
So there are a few possibilities here (and having an OMAP3 platform at home would help a lot):
a. We're either killing INTC inside hwmod before irq_chip suspend is
called.
b. We could be calling irq_chip's resume before INTC is enabled again
c. We're loosing interrupts (??)
I might have a really old beagleboard somewhere around, if I do, I'll try to to boot it up again and track down this regression. Would be great to see these patches reaching mainline.
Quoted 4 lines
Quoted 2 lines
so a bit more work is needed. Maybe also rebase these against omap-for-v3.14/dt too?
Will do.
Rebased on top of omap-for-v3.14/omap3-board-removal. Patches are on my k.org tree:
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git wip/omap-fix-intc
cheers
Signature · 8 lines
balbi -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140102/b38f0700/attachment.sig>
cover arm: omap: irq: cleanup INTC driver
[]..
Quoted 9 lines
Quoted 4 lines
Quoted 2 lines
so a bit more work is needed. Maybe also rebase these against omap-for-v3.14/dt too?
Will do.
Rebased on top of omap-for-v3.14/omap3-board-removal. Patches are on my k.org tree:
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.gitwip/omap-fix-intc
It needs a minor build fix though..
drivers/irqchip/irq-omap-intc.c +1 -1
@@ -151,7 +151,7 @@ static void omap_mask_ack_irq(struct irq_data *d)static void omap_suspend_irq (struct irq_data *d) {omap_intc_save_context (); -omap3_intc_prepare_idle (); +omap_intc_prepare_idle ();/* A pending interrupt would prevent OMAP from entering suspend */ omap_ack_irq (NULL );
regards,
Rajendra
Quoted 10 lines
cheers
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
cover arm: omap: irq: cleanup INTC driver
Quoted 19 lines · Rajendra Nayak
[]..
Quoted 9 lines
Quoted 4 lines
Quoted 2 lines
so a bit more work is needed. Maybe also rebase these against omap-for-v3.14/dt too?
Will do.
Rebased on top of omap-for-v3.14/omap3-board-removal. Patches are on my k.org tree:
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.gitwip/omap-fix-intcIt needs a minor build fix though..
drivers/irqchip/irq-omap-intc.c +0
-0
drivers/irqchip/irq-omap-intc.c static void omap_mask_ack_irq(struct irq_data *d) · line 154
Quoted 5 lines
drivers/irqchip/irq-omap-intc.c +1
-1@@ -151,7 +151,7 @@ static void omap_mask_ack_irq(struct irq_data *d)static void omap_suspend_irq (struct irq_data *d) {omap_intc_save_context (); -omap3_intc_prepare_idle (); +omap_intc_prepare_idle ();
fixed now, thanks. Wonder how come I didn't see that, I was building every commit with omap2plus_defconfig :-( Oh well...
Signature · 8 lines
balbi -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140103/2dd4ab0f/attachment.sig>
Tony Lindgren
maintainercover arm: omap: irq: cleanup INTC driver
Quoted 15 lines · Felipe Balbi
Quoted 14 lines · Rajendra Nayak
[]..
Quoted 9 lines
Quoted 4 lines
Quoted 2 lines
so a bit more work is needed. Maybe also rebase these against omap-for-v3.14/dt too?
Will do.
Rebased on top of omap-for-v3.14/omap3-board-removal. Patches are on my k.org tree:
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.gitwip/omap-fix-intcIt needs a minor build fix though..
Quoted 13 lines
drivers/irqchip/irq-omap-intc.c static void omap_mask_ack_irq(struct irq_data *d) · line 154
Quoted 10 lines
drivers/irqchip/irq-omap-intc.c +1
-1@@ -151,7 +151,7 @@ static void omap_mask_ack_irq(struct irq_data *d)static void omap_suspend_irq (struct irq_data *d) {omap_intc_save_context (); -omap3_intc_prepare_idle (); +omap_intc_prepare_idle ();fixed now, thanks. Wonder how come I didn't see that, I was building every commit with
omap2plus_defconfig:-( Oh well...
Felipe, care to refresh this series against v3.16-rc4 and repost? We now finally have the DT based booting working for PM for omap3 the same way as legacy booting so I can test this easily for regressions. But I don't seem to have the patches in my mailbox any longer.
Regards,
Tony
cover arm: omap: irq: cleanup INTC driver
Quoted 30 lines · Tony Lindgren
Quoted 15 lines · Felipe Balbi
Quoted 14 lines · Rajendra Nayak
[]..
Quoted 9 lines
Quoted 4 lines
Quoted 2 lines
so a bit more work is needed. Maybe also rebase these against omap-for-v3.14/dt too?
Will do.
Rebased on top of omap-for-v3.14/omap3-board-removal. Patches are on my k.org tree:
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.gitwip/omap-fix-intcIt needs a minor build fix though..
Quoted 13 lines
drivers/irqchip/irq-omap-intc.c static void omap_mask_ack_irq(struct irq_data *d) · line 154
Quoted 10 lines
drivers/irqchip/irq-omap-intc.c +1
-1@@ -151,7 +151,7 @@ static void omap_mask_ack_irq(struct irq_data *d)static void omap_suspend_irq (struct irq_data *d) {omap_intc_save_context (); -omap3_intc_prepare_idle (); +omap_intc_prepare_idle ();fixed now, thanks. Wonder how come I didn't see that, I was building every commit with
omap2plus_defconfig:-( Oh well...
Quoted 5 lines
Felipe, care to refresh this series against v3.16-rc4 and repost? We now finally have the DT based booting working for PM for omap3 the same way as legacy booting so I can test this easily for regressions. But I don't seem to have the patches in my mailbox any longer.
not sure when I'll have time to work on this again, but I'll add it to my TODO list.
Signature · 8 lines
balbi -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140715/5e577733/attachment.sig>