Add usb ethernet support for Arndale
Subsystems (4)
v2 cover Add usb ethernet support for Arndale
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patchset adds support for this usb ethernet controllor.
Changes in v2:
- removed setting preboot environment in patch 2
Inderpal Singh (2):
usb: ehci: exynos: set/reset hsic phys
usb: exynos5: arndale: Add network support
arch/arm/include/asm/arch-exynos/ehci.h | 14 +++++++++ board/samsung/arndale/arndale.c | 13 ++++++++ drivers/usb/host/ehci-exynos.c | 49 +++++++++++++++++++++++++++++++ include/configs/arndale.h | 4 +++ 4 files changed, 80 insertions(+)
Signature · 1 line
1.7.9.5
PATCH v2 1/2 usb: ehci: exynos: set/reset hsic phys
From: Inderpal Singh <[email protected]>
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys.
--- arch/arm/include/asm/arch-exynos/ehci.h | 14 +++++++++++ drivers/usb/host/ehci-exynos.c | 39 +++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+)
arch/arm/include/asm/arch-exynos/ehci.h +14 -0
@@ -29,6 +29,20 @@#define EHCICTRL_ENAINCR8 (1 << 27)#define EHCICTRL_ENAINCR16 (1 << 26) +#define HSIC_CTRL_REFCLKSEL (0x2) +#define HSIC_CTRL_REFCLKSEL_MASK (0x3) +#define HSIC_CTRL_REFCLKSEL_SHIFT (23) + +#define HSIC_CTRL_REFCLKDIV_12 (0x24) +#define HSIC_CTRL_REFCLKDIV_MASK (0x7f) +#define HSIC_CTRL_REFCLKDIV_SHIFT (16) + +#define HSIC_CTRL_SIDDQ (0x1 << 6) +#define HSIC_CTRL_FORCESLEEP (0x1 << 5) +#define HSIC_CTRL_FORCESUSPEND (0x1 << 4) +#define HSIC_CTRL_UTMISWRST (0x1 << 2) +#define HSIC_CTRL_PHYSWRST (0x1 << 0) +/* Register map for PHY control */ struct exynos_usb_phy {unsigned int usbphyctrl0;
drivers/usb/host/ehci-exynos.c +39 -0
@@ -88,6 +88,8 @@ static int exynos_usb_parse_dt(const void *blob, struct exynos_ehci *exynos)/* Setup the EHCI host controller. */ static void setup_usb_phy (struct exynos_usb_phy *usb) { +u32 hsic_ctrl; +set_usbhost_mode (USB20_PHY_CFG_HOST_LINK_EN );set_usbhost_phy_ctrl (POWER_USB_HOST_PHY_CTRL_EN );
@@ -112,6 +114,32 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)clrbits_le32 (&usb->usbphyctrl0,HOST_CTRL0_LINKSWRST |HOST_CTRL0_UTMISWRST ); + +/* HSIC Phy Setting */ + hsic_ctrl = (HSIC_CTRL_FORCESUSPEND | +HSIC_CTRL_FORCESLEEP | +HSIC_CTRL_SIDDQ ); + +clrbits_le32 (&usb->hsicphyctrl1, hsic_ctrl); +clrbits_le32 (&usb->hsicphyctrl2, hsic_ctrl); + + hsic_ctrl = (((HSIC_CTRL_REFCLKDIV_12 &HSIC_CTRL_REFCLKDIV_MASK ) + <<HSIC_CTRL_REFCLKDIV_SHIFT ) + | ((HSIC_CTRL_REFCLKSEL &HSIC_CTRL_REFCLKSEL_MASK ) + <<HSIC_CTRL_REFCLKSEL_SHIFT ) + |HSIC_CTRL_UTMISWRST ); + +setbits_le32 (&usb->hsicphyctrl1, hsic_ctrl); +setbits_le32 (&usb->hsicphyctrl2, hsic_ctrl); + +udelay (10 ); + +clrbits_le32 (&usb->hsicphyctrl1,HSIC_CTRL_PHYSWRST | +HSIC_CTRL_UTMISWRST ); + +clrbits_le32 (&usb->hsicphyctrl2,HSIC_CTRL_PHYSWRST | +HSIC_CTRL_UTMISWRST ); +udelay (20 );/* EHCI Ctrl setting */
@@ -125,6 +153,8 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)/* Reset the EHCI host controller. */ static void reset_usb_phy (struct exynos_usb_phy *usb) { +u32 hsic_ctrl; +/* HOST_PHY reset */ setbits_le32(&usb->usbphyctrl0, HOST_CTRL0_PHYSWRST |
@@ -133,6 +163,15 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)HOST_CTRL0_FORCESUSPEND | HOST_CTRL0_FORCESLEEP); +/* HSIC Phy reset */ + hsic_ctrl = (HSIC_CTRL_FORCESUSPEND | +HSIC_CTRL_FORCESLEEP | +HSIC_CTRL_SIDDQ | +HSIC_CTRL_PHYSWRST ); + +setbits_le32 (&usb->hsicphyctrl1, hsic_ctrl); +setbits_le32 (&usb->hsicphyctrl2, hsic_ctrl); +set_usbhost_phy_ctrl (POWER_USB_HOST_PHY_CTRL_DISABLE ); }
Signature · 1 line
1.7.9.5
PATCH v2 1/2 usb: ehci: exynos: set/reset hsic phys
Quoted 6 lines · Inderpal Singh
From: Inderpal Singh <[email protected]>
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys.
Quoted 6 lines
Signed-off-by Inderpal Singh <[email protected]>--- arch/arm/include/asm/arch-exynos/ehci.h | 14 +++++++++++ drivers/usb/host/ehci-exynos.c | 39+++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+)
Is it OK to set all the ports up unconditionally ? I am not sure about exynos of course, but is it possible there are some machines which don't use the HSIC ports and this would have some kind of adverse effects on those?
Best regards,
Marek Vasut
PATCH v2 1/2 usb: ehci: exynos: set/reset hsic phys
Hi Marek,
Thanks for the review.
Quoted 14 lines · Marek Vasut
Quoted 6 lines · Inderpal Singh
From: Inderpal Singh <[email protected]>
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys.
Quoted 6 lines
Signed-off-by Inderpal Singh <[email protected]>--- arch/arm/include/asm/arch-exynos/ehci.h | 14 +++++++++++ drivers/usb/host/ehci-exynos.c | 39+++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+)
Quoted 6 lines
Is it OK to set all the ports up unconditionally ? I am not sure about exynos of
course, but is it possible there are some machines which don't use the HSIC ports and this would have some kind of adverse effects on those?
I feel it should not cause any side effect as it wont interfere with the normal USB 2.0 phy port. Also, its being done along the same lines as kernel driver at drivers/usb/phy/phy-samsung-usb2.c, which also sets up all ports unconditionally.
Regards,
Inder
Quoted 3 lines
Best regards,
Marek Vasut
PATCH v2 1/2 usb: ehci: exynos: set/reset hsic phys
Quoted 25 lines · Inderpal Singh
Hi Marek,
Thanks for the review.
Quoted 13 lines · Marek Vasut
Quoted 12 lines · Inderpal Singh
From: Inderpal Singh <[email protected]>
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys.
Signed-off-by Inderpal Singh <[email protected]>---
arch/arm/include/asm/arch-exynos/ehci.h | 14 +++++++++++ drivers/usb/host/ehci-exynos.c | 39Quoted 6 lines
Quoted 1 line
+++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+)
Is it OK to set all the ports up unconditionally ? I am not sure about exynos of
course, but is it possible there are some machines which don't use the HSIC ports and this would have some kind of adverse effects on those?
Quoted 4 lines
I feel it should not cause any side effect as it wont interfere with the normal USB 2.0 phy port. Also, its being done along the same lines as kernel driver at
drivers/usb/phy/phy-samsung-usb2.c, which also sets up all ports unconditionally.
OK, I won't fight this. I would be much more inclined to being able to conditionally select which ports get configured. Especially, since you do know that information from DT, dont you?
Best regards,
Marek Vasut
PATCH v2 1/2 usb: ehci: exynos: set/reset hsic phys
Quoted 29 lines · Marek Vasut
Quoted 20 lines · Inderpal Singh
Hi Marek,
Thanks for the review.
Quoted 15 lines · Marek Vasut
Quoted 13 lines · Inderpal Singh
From: Inderpal Singh <[email protected]>
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys.
Signed-off-by Inderpal Singh <[email protected]>---
arch/arm/include/asm/arch-exynos/ehci.h | 14 +++++++++++ drivers/usb/host/ehci-exynos.c | 39+++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+)
Quoted 8 lines
Quoted 4 lines
Is it OK to set all the ports up unconditionally ? I am not sure about exynos of
course, but is it possible there are some machines which don't use the HSIC ports and this would have some kind of adverse effects on those?I feel it should not cause any side effect as it wont interfere with the normal USB 2.0 phy port. Also, its being done along the same lines as kernel driver at
drivers/usb/phy/phy-samsung-usb2.c, which also sets up
Quoted 8 lines
all
Quoted 1 line
ports unconditionally.
OK, I won't fight this. I would be much more inclined to being able to conditionally select which ports get configured. Especially, since you do know
that information from DT, dont you?
Ok, Thanks Marek.
As of now DT is not providing port information.
Regards,
Inder
Quoted 3 lines
Best regards,
Marek Vasut
PATCH v2 1/2 usb: ehci: exynos: set/reset hsic phys
Quoted 37 lines · Inderpal Singh
Quoted 36 lines · Marek Vasut
Quoted 26 lines · Inderpal Singh
Hi Marek,
Thanks for the review.
Quoted 13 lines · Marek Vasut
Quoted 12 lines · Inderpal Singh
From: Inderpal Singh <[email protected]>
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys.
Signed-off-by Inderpal Singh <[email protected]>---
arch/arm/include/asm/arch-exynos/ehci.h | 14 +++++++++++ drivers/usb/host/ehci-exynos.c | 39Quoted 7 lines
Quoted 1 line
+++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+)
Is it OK to set all the ports up unconditionally ? I am not sure about exynos of
course, but is it possible there are some machines which don't use the HSIC ports and this would have some kind of adverse effects on those?Quoted 4 lines
I feel it should not cause any side effect as it wont interfere with the normal USB 2.0 phy port. Also, its being done along the same lines as kernel driver at
drivers/usb/phy/phy-samsung-usb2.c, which also sets upall
Quoted 1 line
ports unconditionally.
Quoted 7 lines
Quoted 4 lines
OK, I won't fight this. I would be much more inclined to being able to conditionally select which ports get configured. Especially, since you do know
that information from DT, dont you?Ok, Thanks Marek.
As of now DT is not providing port information.
Bah, I'd expect -- especially in case of exynos, which is targetting the mobile segment -- to focus on power consumption very much. Anyway, like I said, I won't fight this. Minkyu, what's your take on this one please?
Best regards,
Marek Vasut
PATCH v2 1/2 usb: ehci: exynos: set/reset hsic phys
Quoted 43 lines · Marek Vasut
Quoted 42 lines · Inderpal Singh
Quoted 40 lines · Marek Vasut
Quoted 26 lines · Inderpal Singh
Hi Marek,
Thanks for the review.
Quoted 13 lines · Marek Vasut
Quoted 12 lines · Inderpal Singh
From: Inderpal Singh <[email protected]>
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys.
Signed-off-by Inderpal Singh <[email protected]>---
arch/arm/include/asm/arch-exynos/ehci.h | 14 +++++++++++ drivers/usb/host/ehci-exynos.c | 39Quoted 7 lines
Quoted 1 line
+++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+)
Is it OK to set all the ports up unconditionally ? I am not sure about exynos of
course, but is it possible there are some machines which don't use the HSIC ports and this would have some kind of adverse effects on those?Quoted 4 lines
I feel it should not cause any side effect as it wont interfere with the normal USB 2.0 phy port. Also, its being done along the same lines as kernel driver at
drivers/usb/phy/phy-samsung-usb2.c, which also sets upall
Quoted 1 line
ports unconditionally.
OK, I won't fight this. I would be much more inclined to being able to conditionally select which ports get configured. Especially, since you do know
that information from DT, dont you?
Quoted 6 lines
Quoted 2 lines
Ok, Thanks Marek.
As of now DT is not providing port information.Bah, I'd expect -- especially in case of exynos, which is targetting the mobile segment -- to focus on power consumption very much. Anyway, like I said, I won't fight this. Minkyu, what's your take on this one please?
I agree with Marek.
Thanks,
Minkyu Kang.
PATCH v2 2/2 usb: exynos5: arndale: Add network support
In reply to Inderpal SinghArndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch implements a board specific board_usb_init function in ehci driver to perform reset sequence for USB3503 hub and enables the relevant config options for network to work.
--- board/samsung/arndale/arndale.c | 13 +++++++++++++ drivers/usb/host/ehci-exynos.c | 10 ++++++++++ include/configs/arndale.h | 4 ++++ 3 files changed, 27 insertions(+)
board/samsung/arndale/arndale.c +13 -0
@@ -7,10 +7,23 @@#include <common.h> #include <asm/arch/pinmux.h> #include <asm/arch/dwmmc.h> +#include <asm/arch/gpio.h> #include <asm/arch/power.h> DECLARE_GLOBAL_DATA_PTR ; +#ifdef CONFIG_USB_EHCI_EXYNOS +void exynos_board_usb_init (int value) +{ +struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *) +samsung_get_base_gpio_part1 (); + +/* Configure gpios for usb 3503 hub's reset and connect */ +s5p_gpio_direction_output (&gpio->x3,5 , value); +s5p_gpio_direction_output (&gpio->d1,7 , value); +} +#endif +int board_init (void ) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 +0x100UL );
drivers/usb/host/ehci-exynos.c +10 -0
@@ -175,6 +175,12 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)set_usbhost_phy_ctrl (POWER_USB_HOST_PHY_CTRL_DISABLE ); } +inline void __exynos_board_usb_init (int value) +{ +} +void exynos_board_usb_init (int ) + __attribute__((weak,alias ("__exynos_board_usb_init" ))); +/* * EHCI-initialization * Create the appropriate control structures to manage
@@ -201,8 +207,12 @@ int ehci_hcd_init(int index, enum usb_init_type init,gpio_direction_output (ctx->vbus_gpio.gpio,1 );#endif +exynos_board_usb_init (0 ); +setup_usb_phy (ctx->usb); +exynos_board_usb_init (1 ); + *hccr = ctx->hcd; *hcor = (struct ehci_hcor *)((uint32_t ) *hccr +HC_LENGTH (ehci_readl (&(*hccr)->cr_capbase)));
include/configs/arndale.h +4 -0
@@ -116,6 +116,10 @@#define CONFIG_USB_EHCI_EXYNOS #define CONFIG_USB_STORAGE +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +/* MMC SPL */ #define CONFIG_EXYNOS_SPL #define CONFIG_SPL
Signature · 1 line
1.7.9.5
PATCH v2 2/2 usb: exynos5: arndale: Add network support
Quoted 48 lines · Inderpal Singh
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch implements a board specific
board_usb_initfunction in ehci driver to perform reset sequence for USB3503 hub and enables the relevant config options for network to work.Signed-off-by Inderpal Singh <[email protected]>Signed-off-by Chander Kashyap <[email protected]>--- board/samsung/arndale/arndale.c | 13 +++++++++++++ drivers/usb/host/ehci-exynos.c | 10 ++++++++++ include/configs/arndale.h | 4 ++++ 3 files changed, 27 insertions(+)(quoted diff) +0
-0
b/board/samsung/arndale/arndale.cindex 052fecd..deca348 100644board/samsung/arndale/arndale.c +13
-0@@ -7,10 +7,23 @@#include <common.h> #include <asm/arch/pinmux.h> #include <asm/arch/dwmmc.h> +#include <asm/arch/gpio.h> #include <asm/arch/power.h> DECLARE_GLOBAL_DATA_PTR ; +#ifdef CONFIG_USB_EHCI_EXYNOS +void exynos_board_usb_init (int value) +{ +struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *) +samsung_get_base_gpio_part1 (); + +/* Configure gpios for usb 3503 hub's reset and connect */ +s5p_gpio_direction_output (&gpio->x3,5 , value); +s5p_gpio_direction_output (&gpio->d1,7 , value); +} +#endif +int board_init (void ) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 +0x100UL );(quoted diff) +0
-0
b/drivers/usb/host/ehci-exynos.cindex 88e6466..4be6a60 100644
drivers/usb/host/ehci-exynos.c static void reset_usb_phy(struct exynos_usb_phy *usb) · line 183
Quoted 9 lines
drivers/usb/host/ehci-exynos.c +6
-0@@ -175,6 +175,12 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)set_usbhost_phy_ctrl (POWER_USB_HOST_PHY_CTRL_DISABLE ); } +inline void __exynos_board_usb_init (int value) +{ +} +void exynos_board_usb_init (int ) + __attribute__((weak,alias ("__exynos_board_usb_init" ))); +
Sorry, this is not happening. Why can you not use the existing board_usb_init() and instead have to invent new stuff ?
[..]
PATCH v2 2/2 usb: exynos5: arndale: Add network support
Hi Marek,
Thanks for review.
Quoted 54 lines · Marek Vasut
Quoted 23 lines · Inderpal Singh
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch implements a board specific
board_usb_initfunction in ehci driver to perform reset sequence for USB3503 hub and enables the relevant config options for network to work.Signed-off-by Inderpal Singh <[email protected]>Signed-off-by Chander Kashyap <[email protected]>--- board/samsung/arndale/arndale.c | 13 +++++++++++++ drivers/usb/host/ehci-exynos.c | 10 ++++++++++ include/configs/arndale.h | 4 ++++ 3 files changed, 27 insertions(+)(quoted diff) +0
-0
b/board/samsung/arndale/arndale.cindex 052fecd..deca348 100644board/samsung/arndale/arndale.c +0
-0@@ -7,10 +7,23 @@#include <common.h> #include <asm/arch/pinmux.h> #include <asm/arch/dwmmc.h> board/samsung/arndale/arndale.c line 19
Quoted 10 lines
board/samsung/arndale/arndale.c +6
-0+#include <asm/arch/gpio.h> #include <asm/arch/power.h> DECLARE_GLOBAL_DATA_PTR ; +#ifdef CONFIG_USB_EHCI_EXYNOS +void exynos_board_usb_init (int value) +{ + struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *) +
samsung_get_base_gpio_part1();drivers/usb/host/ehci-exynos.c static void reset_usb_phy(struct exynos_usb_phy
Quoted 15 lines
board/samsung/arndale/arndale.c +7
-0+ +/* Configure gpios for usb 3503 hub's reset and connect */ +s5p_gpio_direction_output (&gpio->x3,5 , value); + s5p_gpio_direction_output(&gpio->d1, 7, value); +} +#endif +int board_init (void ) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 +0x100UL );(quoted diff) +0
-0
b/drivers/usb/host/ehci-exynos.cindex 88e6466..4be6a60 100644drivers/usb/host/ehci-exynos.c +0
-0@@ -175,6 +175,12 @@ static void reset_usb_phy(struct exynos_usb_phy*usb)
Quoted 3 lines
drivers/usb/host/ehci-exynos.c +0
-0set_usbhost_phy_ctrl (POWER_USB_HOST_PHY_CTRL_DISABLE ); }
Quoted 11 lines
drivers/usb/host/ehci-exynos.c static void reset_usb_phy(struct exynos_usb_phy *usb) · line 183
Quoted 6 lines
drivers/usb/host/ehci-exynos.c +6
-0+inline void __exynos_board_usb_init (int value) +{ +} +void exynos_board_usb_init (int ) + __attribute__((weak,alias ("__exynos_board_usb_init" ))); +Sorry, this is not happening. Why can you not use the existing
board_usb_init()
and instead have to invent new stuff ?
I did not use board_usb_init because it has 2 parameters which may not be used as described in usb.h for my use case, which is to only configure gpios for reset and connect of usb 3503 hub.
Let me know if you still feel that board_usb_init should be used. In that case I will have to utilize index parameter in my own way.
Regards,
Inder
Quoted 3 lines
[..]
PATCH v2 2/2 usb: exynos5: arndale: Add network support
Quoted 83 lines · Inderpal Singh
Hi Marek,
Thanks for review.
Quoted 67 lines · Marek Vasut
Quoted 28 lines · Inderpal Singh
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch implements a board specific
board_usb_initfunction in ehci driver to perform reset sequence for USB3503 hub and enables the relevant config options for network to work.Signed-off-by Inderpal Singh <[email protected]>Signed-off-by Chander Kashyap <[email protected]>---
board/samsung/arndale/arndale.c | 13 +++++++++++++ drivers/usb/host/ehci-exynos.c | 10 ++++++++++ include/configs/arndale.h | 4 ++++ 3 files changed, 27 insertions(+)(quoted diff) +0
-0
b/board/samsung/arndale/arndale.cindex 052fecd..deca348 100644board/samsung/arndale/arndale.c +1
-0@@ -7,10 +7,23 @@#include <common.h> #include <asm/arch/pinmux.h> #include <asm/arch/dwmmc.h> +#include <asm/arch/gpio.h> board/samsung/arndale/arndale.c line 22
Quoted 10 lines
board/samsung/arndale/arndale.c +5
-0#include <asm/arch/power.h> DECLARE_GLOBAL_DATA_PTR ; +#ifdef CONFIG_USB_EHCI_EXYNOS +void exynos_board_usb_init (int value) +{ + struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *) +
samsung_get_base_gpio_part1();drivers/usb/host/ehci-exynos.c static void reset_usb_phy(struct exynos_usb_phy
Quoted 18 lines
board/samsung/arndale/arndale.c +7
-0+ +/* Configure gpios for usb 3503 hub's reset and connect */ +s5p_gpio_direction_output (&gpio->x3,5 , value); + s5p_gpio_direction_output(&gpio->d1, 7, value); +} +#endif +int
board_init(void)
{gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);(quoted diff) +0
-0
b/drivers/usb/host/ehci-exynos.cindex 88e6466..4be6a60 100644drivers/usb/host/ehci-exynos.c +0
-0@@ -175,6 +175,12 @@ static void reset_usb_phy(struct exynos_usb_phy*usb)
Quoted 4 lines
drivers/usb/host/ehci-exynos.c +0
-0set_usbhost_phy_ctrl (POWER_USB_HOST_PHY_CTRL_DISABLE ); }Quoted 10 lines
drivers/usb/host/ehci-exynos.c static void reset_usb_phy(struct exynos_usb_phy *usb) · line 183
Quoted 6 lines
drivers/usb/host/ehci-exynos.c +6
-0+inline void __exynos_board_usb_init (int value) +{ +} +void exynos_board_usb_init (int ) + __attribute__((weak,alias ("__exynos_board_usb_init" ))); +Sorry, this is not happening. Why can you not use the existing
board_usb_init()
and instead have to invent new stuff ?
Quoted 6 lines
I did not use
board_usb_initbecause it has 2 parameters which may not be used as described inusb.hfor my use case, which is to only configure gpios for reset and connect of usb 3503 hub.Let me know if you still feel that
board_usb_initshould be used. In that case I will have to utilize index parameter in my own way.
Shall I read that as "I will abuse API" ? You know that this will not happen ;-)
Why can you not reset the USB HUB in regular board_usb_init() simply by toggling the switch's reset gpio as done on the rest of the boards ?
PATCH v2 2/2 usb: exynos5: arndale: Add network support
Quoted 89 lines · Marek Vasut
Quoted 11 lines · Inderpal Singh
Hi Marek,
Thanks for review.
Quoted 6 lines · Marek Vasut
Quoted 5 lines · Inderpal Singh
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch implements a board specific
board_usb_initfunction inehci
Quoted 76 lines
Quoted 61 lines
Quoted 23 lines
driver to perform reset sequence for USB3503 hub and enables the relevant config options for network to work.
Signed-off-by Inderpal Singh <[email protected]>Signed-off-by Chander Kashyap <[email protected]>---
board/samsung/arndale/arndale.c | 13 +++++++++++++ drivers/usb/host/ehci-exynos.c | 10 ++++++++++ include/configs/arndale.h | 4 ++++ 3 files changed, 27 insertions(+)(quoted diff) +0
-0
b/board/samsung/arndale/arndale.cindex 052fecd..deca348 100644board/samsung/arndale/arndale.c +1
-0@@ -7,10 +7,23 @@#include <common.h> #include <asm/arch/pinmux.h> #include <asm/arch/dwmmc.h> +#include <asm/arch/gpio.h> board/samsung/arndale/arndale.c line 22
Quoted 10 lines
board/samsung/arndale/arndale.c +5
-0#include <asm/arch/power.h> DECLARE_GLOBAL_DATA_PTR ; +#ifdef CONFIG_USB_EHCI_EXYNOS +void exynos_board_usb_init (int value) +{ + struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *) +
samsung_get_base_gpio_part1();drivers/usb/host/ehci-exynos.c static void reset_usb_phy(struct exynos_usb_phy
Quoted 18 lines
board/samsung/arndale/arndale.c +7
-0+ +/* Configure gpios for usb 3503 hub's reset and connect */ +s5p_gpio_direction_output (&gpio->x3,5 , value); + s5p_gpio_direction_output(&gpio->d1, 7, value); +} +#endif +int
board_init(void)
{gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);(quoted diff) +0
-0
b/drivers/usb/host/ehci-exynos.cindex 88e6466..4be6a60 100644drivers/usb/host/ehci-exynos.c +0
-0@@ -175,6 +175,12 @@ static void reset_usb_phy(struct exynos_usb_phy*usb)
Quoted 4 lines
drivers/usb/host/ehci-exynos.c +0
-0set_usbhost_phy_ctrl (POWER_USB_HOST_PHY_CTRL_DISABLE ); }Quoted 10 lines
drivers/usb/host/ehci-exynos.c static void reset_usb_phy(struct exynos_usb_phy *usb) · line 183
Quoted 6 lines
drivers/usb/host/ehci-exynos.c +6
-0+inline void __exynos_board_usb_init (int value) +{ +} +void exynos_board_usb_init (int ) + __attribute__((weak,alias ("__exynos_board_usb_init" ))); +Sorry, this is not happening. Why can you not use the existing
board_usb_init()
and instead have to invent new stuff ?I did not use
board_usb_initbecause it has 2 parameters which may not be used as described inusb.hfor my use case, which is to only configure gpios for reset and connect of usb 3503 hub.
Quoted 6 lines
Quoted 2 lines
Let me know if you still feel that
board_usb_initshould be used. In that case I will have to utilize index parameter in my own way.Shall I read that as "I will abuse API" ? You know that this will not happen ;-)
Yes, thats an abuse and have not done that yet :-)
Quoted 5 lines
Why can you not reset the USB HUB in regular
board_usb_init()simply by toggling
the switch's reset gpio as done on the rest of the boards ?
Ok, let me try this. If it works I will send the updated patch.
Regards,
Inder
PATCH v2 2/2 usb: exynos5: arndale: Add network support
Quoted 99 lines · Inderpal Singh
Quoted 92 lines · Marek Vasut
Quoted 11 lines · Inderpal Singh
Hi Marek,
Thanks for review.
Quoted 6 lines · Marek Vasut
Quoted 5 lines · Inderpal Singh
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch implements a board specific
board_usb_initfunction inehci
Quoted 77 lines
Quoted 62 lines
Quoted 32 lines
driver to perform reset sequence for USB3503 hub and enables the relevant config options for network to work.
Signed-off-by Inderpal Singh <[email protected]>Signed-off-by Chander Kashyap <[email protected]>---
board/samsung/arndale/arndale.c | 13 +++++++++++++ drivers/usb/host/ehci-exynos.c | 10 ++++++++++ include/configs/arndale.h | 4 ++++ 3 files changed, 27 insertions(+)(quoted diff) +0
-0
b/board/samsung/arndale/arndale.cindex 052fecd..deca348 100644board/samsung/arndale/arndale.c +5
-0@@ -7,10 +7,23 @@#include <common.h> #include <asm/arch/pinmux.h> #include <asm/arch/dwmmc.h> +#include <asm/arch/gpio.h> #include <asm/arch/power.h> DECLARE_GLOBAL_DATA_PTR ; +#ifdef CONFIG_USB_EHCI_EXYNOS +void exynos_board_usb_init (int value) +{ + struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1Quoted 1 line
*) +
samsung_get_base_gpio_part1();Quoted 18 lines
board/samsung/arndale/arndale.c +7
-0+ +/* Configure gpios for usb 3503 hub's reset and connect */ +s5p_gpio_direction_output (&gpio->x3,5 , value); + s5p_gpio_direction_output(&gpio->d1, 7, value); +} +#endif +int board_init (void ) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 +0x100UL );(quoted diff) +0
-0
b/drivers/usb/host/ehci-exynos.cindex 88e6466..4be6a60 100644drivers/usb/host/ehci-exynos.c +0
-0@@ -175,6 +175,12 @@ static void reset_usb_phy(structQuoted 1 line
exynos_usb_phy*usb)
Quoted 4 lines
set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);}
Quoted 10 lines
drivers/usb/host/ehci-exynos.c static void reset_usb_phy(struct exynos_usb_phy *usb) · line 183
Quoted 6 lines
drivers/usb/host/ehci-exynos.c +6
-0+inline void __exynos_board_usb_init (int value) +{ +} +void exynos_board_usb_init (int ) + __attribute__((weak,alias ("__exynos_board_usb_init" ))); +Sorry, this is not happening. Why can you not use the existing
board_usb_init()
and instead have to invent new stuff ?I did not use
board_usb_initbecause it has 2 parameters which may not be used as described inusb.hfor my use case, which is to only configure gpios for reset and connect of usb 3503 hub.Quoted 5 lines
Quoted 2 lines
Let me know if you still feel that
board_usb_initshould be used. In that case I will have to utilize index parameter in my own way.Shall I read that as "I will abuse API" ? You know that this will not happen ;-)
Quoted 7 lines
Yes, thats an abuse and have not done that yet :-)
Quoted 3 lines
Why can you not reset the USB HUB in regular
board_usb_init()simply by toggling
the switch's reset gpio as done on the rest of the boards ?Ok, let me try this. If it works I will send the updated patch.
Thank you!