ARM: shmobile: r8a7790: add thermal driver support

PATCH Superseded Simon Horman 4 participants 9 messages Jun 27, 2013 – Jan 8, 2014

Subsystems (4)

Arm (32-bit) Arm sub-architectures SuperH Arm/RISC-V/Renesas architecture

lore

Share & tools

lore

Simon Horman

author

2013-06-27 01:53 UTC #0 lore raw

v3 cover ARM: shmobile: r8a7790: add thermal driver support

This short series enables the thermal driver on the r8a7790 SoC and thus the lager board.

It is based on renesas-next-20130620

v3
* Correct title of clocks patch to refer to r8a7790

v2
* Add clocks patch

Simon Horman (2):
ARM: shmobile: r8a7790: add clocks for thermal
ARM: shmobile: r8a7790: add thermal driver support

 arch/arm/mach-shmobile/clock-r8a7790.c |  4 ++++
 arch/arm/mach-shmobile/setup-r8a7790.c | 12 ++++++++++++
 2 files changed, 16 insertions(+)

Signature · 1 line

1.8.2.1

Simon Horman

author

2013-06-27 01:53 UTC #1 lore raw

PATCH v3 1/2 ARM: shmobile: r8a7790: add clocks for thermal

Cc Kuninori Morimoto <[email protected]>

Signed-off-by Simon Horman <[email protected]>

---

v3
* Correct title to refer to r8a7790

v2
* First post

---
 arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++
 1 file changed, 4 insertions(+)

arch/arm/mach-shmobile/clock-r8a7790.c +4 -0

index 5d71313..28eccd1 100644
@@ -49,6 +49,7 @@
 
 #define SMSTPCR2 0xe6150138
 #define SMSTPCR3 0xe615013c
+#define SMSTPCR5 0xe6150144
 #define SMSTPCR7 0xe615014c
 
 #define MODEMR		0xE6160060

@@ -182,6 +183,7 @@ static struct clk div6_clks[DIV6_NR] = {
 enum {
 	MSTP721, MSTP720,
 	MSTP717, MSTP716,
+	MSTP522,
 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
 	MSTP_NR

@@ -203,6 +205,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
 	[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
 	[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
+	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
 	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
 	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
 };

@@ -254,6 +257,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
 	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
 	CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
+	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
 	CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),

Signature · 1 line

1.8.2.1

Valentine Barshak

2013-12-27 11:44 UTC #2 lore raw

PATCH v3 1/2 ARM: shmobile: r8a7790: Add VIN clock support

This adds VIN[0-3] clock support to R8A7790 SoC.

Changes in V2:
* none.

Changes in V3:
* capitalized ARM in the subject.

Signed-off-by Valentine Barshak <[email protected]>

---
 arch/arm/mach-shmobile/clock-r8a7790.c | 9 +++++++++
 1 file changed, 9 insertions(+)

arch/arm/mach-shmobile/clock-r8a7790.c +9 -0

index c5c60ec..81f45a0 100644
@@ -188,6 +188,7 @@ enum {
 	MSTP931, MSTP930, MSTP929, MSTP928,
 	MSTP917,
 	MSTP813,
+	MSTP811, MSTP810, MSTP809, MSTP808,
 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
 	MSTP717, MSTP716,
 	MSTP704,

@@ -216,6 +217,10 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
 	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+	[MSTP811] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 11, 0), /* VIN0 */
+	[MSTP810] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 10, 0), /* VIN1 */
+	[MSTP809] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  9, 0), /* VIN2 */
+	[MSTP808] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  8, 0), /* VIN3 */
 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
 	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
 	[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */

@@ -300,6 +305,10 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
 	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
+	CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]),
+	CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]),
+	CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]),
+	CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]),
 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),

Signature · 1 line

1.8.3.1

Simon Horman

2014-01-06 06:44 UTC #3 lore raw

Re: [PATCH V3 1/2] ARM: shmobile: r8a7790: Add VIN clock support

In reply to Simon Horman

Quoted 9 lines · Valentine Barshak

This adds VIN[0-3] clock support to R8A7790 SoC.
Changes in V2:
* none.
Changes in V3:
* capitalized ARM in the subject.
Signed-off-by Valentine Barshak <[email protected]>

Thanks, I will queue this up.

Simon Horman

2014-01-08 04:17 UTC #4 lore raw

Re: [PATCH V3 1/2] ARM: shmobile: r8a7790: Add VIN clock support

In reply to Simon Horman

Quoted 37 lines · Valentine Barshak

This adds VIN[0-3] clock support to R8A7790 SoC.

Changes in V2:
* none.

Changes in V3:
* capitalized ARM in the subject.

Signed-off-by Valentine Barshak <[email protected]>

---
 arch/arm/mach-shmobile/clock-r8a7790.c | 9 +++++++++
 1 file changed, 9 insertions(+)

arch/arm/mach-shmobile/clock-r8a7790.c +5 -0

index c5c60ec..81f45a0 100644
@@ -188,6 +188,7 @@ enum {
 	MSTP931, MSTP930, MSTP929, MSTP928,
 	MSTP917,
 	MSTP813,
+	MSTP811, MSTP810, MSTP809, MSTP808,
 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
 	MSTP717, MSTP716,
 	MSTP704,

@@ -216,6 +217,10 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
 	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+	[MSTP811] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 11, 0), /* VIN0 */
+	[MSTP810] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 10, 0), /* VIN1 */
+	[MSTP809] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  9, 0), /* VIN2 */
+	[MSTP808] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  8, 0), /* VIN3 */
 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
 	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
 	[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */

arch/arm/mach-shmobile/clock-r8a7790.c static struct clk_lookup lookups[] = { · line 314

Quoted 10 lines

arch/arm/mach-shmobile/clock-r8a7790.c +4 -0

@@ -300,6 +305,10 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
 	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
+	CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]),
+	CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]),
+	CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]),
+	CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]),
 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
 	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),

Unfortunately this patch conflicts with "ARM: shmobile: r8a7790: Wait for status on all MSTP clocks" which I have queued up as a fix for v3.14.

As this patch will be submitted for inclusion on v3.15 it will be in a branch based on v3.14-rc1 which I expect to include (""ARM: shmobile:
r8a7790: Wait for status on all MSTP clocks").

Rather than risk messing up doing the non-trivial rebase of this patch myself I have dropped this patch. Could you please rebase it on top of the latest devel tag of the renesas tree, currently renesas-devel-v3.13-rc7-20140108.

Valentine

2014-01-08 13:02 UTC #5 lore raw

Re: [PATCH V3 1/2] ARM: shmobile: r8a7790: Add VIN clock support

In reply to Simon Horman

Quoted 52 lines · Simon Horman

Quoted 37 lines · Valentine Barshak

This adds VIN[0-3] clock support to R8A7790 SoC.

Changes in V2:
* none.

Changes in V3:
* capitalized ARM in the subject.

Signed-off-by Valentine Barshak <[email protected]>

---
  arch/arm/mach-shmobile/clock-r8a7790.c | 9 +++++++++
  1 file changed, 9 insertions(+)

arch/arm/mach-shmobile/clock-r8a7790.c +5 -0

index c5c60ec..81f45a0 100644
@@ -188,6 +188,7 @@ enum {
  	MSTP931, MSTP930, MSTP929, MSTP928,
  	MSTP917,
  	MSTP813,
+	MSTP811, MSTP810, MSTP809, MSTP808,
  	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
  	MSTP717, MSTP716,
  	MSTP704,

@@ -216,6 +217,10 @@ static struct clk mstp_clks[MSTP_NR] = {
  	[MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
  	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
  	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
+	[MSTP811] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 11, 0), /* VIN0 */
+	[MSTP810] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 10, 0), /* VIN1 */
+	[MSTP809] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  9, 0), /* VIN2 */
+	[MSTP808] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8,  8, 0), /* VIN3 */
  	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
  	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
  	[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */

arch/arm/mach-shmobile/clock-r8a7790.c static struct clk_lookup lookups[] = { · line 314

Quoted 10 lines

arch/arm/mach-shmobile/clock-r8a7790.c +4 -0

@@ -300,6 +305,10 @@ static struct clk_lookup lookups[] = {
  	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
  	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
  	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
+	CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]),
+	CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]),
+	CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]),
+	CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]),
  	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
  	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
  	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),

Unfortunately this patch conflicts with "ARM: shmobile: r8a7790: Wait for status on all MSTP clocks" which I have queued up as a fix for v3.14.

Quoted 8 lines

As this patch will be submitted for inclusion on v3.15 it will be in a branch based on v3.14-rc1 which I expect to include (""ARM: shmobile:
r8a7790: Wait for status on all MSTP clocks").
Rather than risk messing up doing the non-trivial rebase of this patch myself I have dropped this patch. Could you please rebase it on top of the latest devel tag of the renesas tree, currently renesas-devel-v3.13-rc7-20140108.

If you don't mind, I'll split out and bundle all the clock-related patches up in one series. This includes VIN, USB host, SATA clocks.
Clocks do not depend on anything else and can be applied with no harm even if the driver that needs them is still pending. Besides, it should minimize possible conflicts.

Thanks,
Val.

Quoted 5 lines

--
To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to [email protected]
More majordomo info at http://vger.kernel.org/majordomo-info.html

Simon Horman

author

2013-06-27 01:53 UTC #6 lore raw

PATCH v3 2/2 ARM: shmobile: r8a7790: add thermal driver support

In reply to Simon Horman

The current temperature may be read using:
cat /sys/class/thermal/thermal_zone0/temp

Based on similar work for the r8a73a4 by Kuninori Morimoto.

Cc Kuninori Morimoto <[email protected]>

Signed-off-by Simon Horman <[email protected]>

---
 arch/arm/mach-shmobile/setup-r8a7790.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

arch/arm/mach-shmobile/setup-r8a7790.c +12 -0

index 28f9475..06c720f 100644
@@ -149,6 +149,17 @@ static struct resource irqc0_resources[] __initdata = {
 					  &irqc##idx##_data,		\
 					  sizeof(struct renesas_irqc_config))
 
+static struct resource thermal_resources[] __initdata = {
+	DEFINE_RES_MEM(0xe61f0000, 0x14),
+	DEFINE_RES_MEM(0xe61f0100, 0x38),
+	DEFINE_RES_IRQ(gic_spi(69)),
+};
+
+#define r8a7790_register_thermal()					\
+	platform_device_register_simple("rcar_thermal", -1,		\
+					thermal_resources,		\
+					ARRAY_SIZE(thermal_resources))
+
 void __init r8a7790_add_standard_devices(void)
 {
 	r8a7790_register_scif(SCIFA0);

@@ -162,6 +173,7 @@ void __init r8a7790_add_standard_devices(void)
 	r8a7790_register_scif(HSCIF0);
 	r8a7790_register_scif(HSCIF1);
 	r8a7790_register_irqc(0);
+	r8a7790_register_thermal();
 }
 
 void __init r8a7790_timer_init(void)

Signature · 1 line

1.8.2.1

Kuninori Morimoto

2013-06-27 05:41 UTC #7 lore raw

v3 cover ARM: shmobile: r8a7790: add thermal driver support

In reply to Simon Horman

Hi Simon

Quoted 11 lines

This short series enables the thermal driver on the r8a7790 SoC and thus the lager board.
It is based on renesas-next-20130620
v3
* Correct title of clocks patch to refer to r8a7790
v2
* Add clocks patch

Quoted 7 lines

Simon Horman (2):
ARM: shmobile: r8a7790: add clocks for thermal
ARM: shmobile: r8a7790: add thermal driver support
 arch/arm/mach-shmobile/clock-r8a7790.c |  4 ++++
 arch/arm/mach-shmobile/setup-r8a7790.c | 12 ++++++++++++
 2 files changed, 16 insertions(+)

For all patches

Acked-by Kuninori Morimoto <[email protected]>

Best regards
---
Kuninori Morimoto

Simon Horman

2013-06-27 07:02 UTC #8 lore raw

v3 cover ARM: shmobile: r8a7790: add thermal driver support

Quoted 18 lines · Kuninori Morimoto

Hi Simon
Quoted 15 lines
This short series enables the thermal driver on the r8a7790 SoC and thus the lager board.
It is based on renesas-next-20130620
v3
* Correct title of clocks patch to refer to r8a7790
v2
* Add clocks patch
Simon Horman (2):
ARM: shmobile: r8a7790: add clocks for thermal
ARM: shmobile: r8a7790: add thermal driver support

Quoted 7 lines

Quoted 3 lines
 arch/arm/mach-shmobile/clock-r8a7790.c |  4 ++++
 arch/arm/mach-shmobile/setup-r8a7790.c | 12 ++++++++++++
 2 files changed, 16 insertions(+)
For all patches
Acked-by Kuninori Morimoto <[email protected]>

Thanks, I have queued these up for v3.12 in the soc branch.