zynq: Enable CONFIG_FIT_VERBOSE
Subsystems (2)
A message that is not in the archive (sent off-list or not yet received): [email protected]
PATCH v4 1/29 zynq: Enable CONFIG_FIT_VERBOSE
Enabled fit_format_{error,warning}()
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq.h | 1 + 1 file changed, 1 insertion(+)
include/configs/zynq.h +1 -0
@@ -127,6 +127,7 @@/* OF */ #define CONFIG_FIT +#define CONFIG_FIT_VERBOSE 1/* enable fit_format_{error,warning}() */ #define CONFIG_OF_LIBFDT /* Commands */
Signature · 1 line
1.8.3
PATCH v4 2/29 zynq: Enable Boot FreeBSD/vxWorks
In reply to a message not in the archiveThis enabled Boot FreeBSD/vxWorks from an ELF image support
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq.h | 7 +++++++ 1 file changed, 7 insertions(+)
include/configs/zynq.h +7 -0
@@ -130,6 +130,13 @@#define CONFIG_FIT_VERBOSE 1/* enable fit_format_{error,warning}() */ #define CONFIG_OF_LIBFDT +/* Boot FreeBSD/vxWorks from an ELF image */ +#if defined(CONFIG_ZYNQ_BOOT_FREEBSD ) +# define CONFIG_API +# define CONFIG_CMD_ELF +# define CONFIG_SYS_MMC_MAX_DEVICE 1 +#endif +/* Commands */ #include <config_cmd_default.h>
Signature · 1 line
1.8.3
PATCH v4 3/29 zynq: Cleanup on miscellaneous configs
In reply to a message not in the archiveCleanup on miscellaneous configurable options:
- Rename SYS_PROMPT as "zynq-uboot"
- Add comment
- Re-order configs
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq.h | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-)
include/configs/zynq.h +10 -9
@@ -111,19 +111,20 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT "zynq-uboot> " +#define CONFIG_SYS_HUSH_PARSER + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_MAXARGS 15/* max number of command args */ +#define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16)#define CONFIG_SYS_LOAD_ADDR 0 -#define CONFIG_SYS_MAXARGS 15/* max number of command args */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "/* OF */ #define CONFIG_FIT
Signature · 1 line
1.8.3
PATCH v4 4/29 zynq: Cleanup on memory configs
In reply to a message not in the archiveCleanup on memory configuration options:
- Add comment
- Re-order configs
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq.h | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-)
include/configs/zynq.h +14 -13
@@ -13,14 +13,6 @@/* CPU clock */ #define CONFIG_CPU_FREQ_HZ 800000000 -/* Ram */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_TEXT_BASE 0 -#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) -/* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
@@ -105,11 +97,6 @@#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_MALLOC_LEN 0x400000 -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE)/* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "zynq-uboot> "
@@ -125,7 +112,21 @@#define CONFIG_SYS_LOAD_ADDR 0 +/* Physical Memory map */ +#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) + +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE)/* OF */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE 1/* enable fit_format_{error,warning}() */
Signature · 1 line
1.8.3
PATCH v4 5/29 zynq: Minor config cleanup
In reply to a message not in the archiveCleanups mostly on:
- Add comments
- Re-order configs
- Remove #define CONFIG_ZYNQ_SDHCI
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq.h | 76 ++++++++++++++++++++++++++------------------------ 1 file changed, 39 insertions(+), 37 deletions(-)
include/configs/zynq.h +39 -37
@@ -7,33 +7,51 @@#ifndef __CONFIG_ZYNQ_H#define __CONFIG_ZYNQ_H -#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */ +/* High Level configuration Options */ +#define CONFIG_ARMV7 #define CONFIG_ZYNQ /* CPU clock */ -#define CONFIG_CPU_FREQ_HZ 800000000 +#ifndef CONFIG_CPU_FREQ_HZ +# define CONFIG_CPU_FREQ_HZ 800000000 +#endif +/* Serial drivers */ +#define CONFIG_BAUDRATE 115200/* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -#define CONFIG_BAUDRATE 115200 - -/* XPSS Serial driver */ +/* Zynq Serial driver */ #define CONFIG_ZYNQ_SERIAL #define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE#define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +/* DCC driver */ +#if defined(CONFIG_ZYNQ_DCC ) +# define CONFIG_ARM_DCC +# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ +#endif +/* Ethernet driver */ #define CONFIG_NET_MULTI #define CONFIG_ZYNQ_GEM #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 -#define CONFIG_ZYNQ_SDHCI -#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_SPI +/* SPI */ +#ifdef CONFIG_ZYNQ_SPI +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_SST +# define CONFIG_CMD_SF +#endif + +/* NOR */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ZYNQ_SDHCI0 /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0 ) || defined(CONFIG_ZYNQ_SDHCI1 )# define CONFIG_MMC
@@ -48,7 +66,6 @@#endif #define CONFIG_ZYNQ_I2C0 -/* I2C */ #if defined(CONFIG_ZYNQ_I2C0 ) || defined(CONFIG_ZYNQ_I2C1 )# define CONFIG_CMD_I2C
@@ -58,26 +75,6 @@# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1#endif -#if defined(CONFIG_ZYNQ_DCC ) -# define CONFIG_ARM_DCC -# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ -#endif - -#define CONFIG_ZYNQ_SPI - -/* SPI */ -#ifdef CONFIG_ZYNQ_SPI -# define CONFIG_SPI_FLASH -# define CONFIG_SPI_FLASH_SST -# define CONFIG_CMD_SF -#endif - -/* Enable the PL to be downloaded */ -#define CONFIG_FPGA -#define CONFIG_FPGA_XILINX -#define CONFIG_FPGA_ZYNQPL -#define CONFIG_CMD_FPGA -#define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY
@@ -91,12 +88,9 @@#define CONFIG_PHY_MARVELL /* Environment */ +#define CONFIG_ENV_SIZE 0x10000/* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_SIZE 0x10000 - -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_SYS_MALLOC_LEN 0x400000 +#define CONFIG_SYS_LOAD_ADDR 0/* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "zynq-uboot> "
@@ -110,8 +104,6 @@#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LOAD_ADDR 0 -/* Physical Memory map */ #define CONFIG_SYS_TEXT_BASE 0
@@ -122,15 +114,25 @@#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) +#define CONFIG_SYS_MALLOC_LEN 0x400000#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -/* OF */ + +/* Enable the PL to be downloaded */ +#define CONFIG_FPGA +#define CONFIG_FPGA_XILINX +#define CONFIG_FPGA_ZYNQPL +#define CONFIG_CMD_FPGA + +/* Open Firmware flat tree */ +#define CONFIG_OF_LIBFDT + +/* FIT support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE 1/* enable fit_format_{error,warning}() */ -#define CONFIG_OF_LIBFDT /* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD )
Signature · 1 line
1.8.3
PATCH v4 6/29 zynq: Enable cache options
In reply to a message not in the archive- Enable cache command
- Turn-off L2 cache
- Turn-on D-cache
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq.h | 10 ++++++++++ 1 file changed, 10 insertions(+)
include/configs/zynq.h +10 -0
@@ -16,6 +16,16 @@# define CONFIG_CPU_FREQ_HZ 800000000#endif +/* Cache options */ +#define CONFIG_CMD_CACHE +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#define CONFIG_SYS_L2CACHE_OFF +#ifndef CONFIG_SYS_L2CACHE_OFF +# define CONFIG_SYS_L2_PL310 +# define CONFIG_SYS_PL310_BASE 0xf8f02000 +#endif +/* Serial drivers */ #define CONFIG_BAUDRATE 115200/* The following table includes the supported baudrates */
Signature · 1 line
1.8.3
PATCH v4 7/29 zynq: Add UART0, UART1 configs support
In reply to a message not in the archiveZynq uart controller support two serial ports like CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1 enabled both so-that the respective board will define these macros based on their usage.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq.h | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-)
include/configs/zynq.h +16 -4
@@ -33,10 +33,22 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}/* Zynq Serial driver */ -#define CONFIG_ZYNQ_SERIAL -#define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000 -#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE -#define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +#define CONFIG_ZYNQ_SERIAL_UART1 +#ifdef CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +#endif + +#ifdef CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK1 50000000 +#endif + +#if defined(CONFIG_ZYNQ_SERIAL_UART0 ) || defined(CONFIG_ZYNQ_SERIAL_UART1 ) +# define CONFIG_ZYNQ_SERIAL +#endif /* DCC driver */ #if defined(CONFIG_ZYNQ_DCC )
Signature · 1 line
1.8.3
PATCH v4 8/29 zynq: Add GEM0, GEM1 configs support
In reply to a message not in the archiveZynq ethernet controller support two GEM's like CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled both so-that the respective board will define these macros based on their usage.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
include/configs/zynq.h +8 -8
@@ -57,10 +57,16 @@#endif /* Ethernet driver */ -#define CONFIG_NET_MULTI -#define CONFIG_ZYNQ_GEM #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +#if defined(CONFIG_ZYNQ_GEM0 ) || defined(CONFIG_ZYNQ_GEM1 ) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif #define CONFIG_ZYNQ_SPI /* SPI */
@@ -103,12 +109,6 @@#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL -/* MII and Phylib */ -#define CONFIG_MII -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_PHYLIB -#define CONFIG_PHY_MARVELL -/* Environment */ #define CONFIG_ENV_SIZE 0x10000/* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE
Signature · 1 line
1.8.3
PATCH v4 9/29 zynq-common: Rename zynq with zynq-common
In reply to a message not in the archivezynq.h -> zynq-common.h, zynq-common is Common
configuration options for all Zynq boards.
zynq.h is no longer exists hense removed from boards.cfg
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
---
boards.cfg | 2 --
include/configs/{zynq.h => zynq-common.h} | 9 ++++++---
2 files changed, 6 insertions(+), 5 deletions(-)
rename include/configs/{zynq.h => zynq-common.h} (95%)boards.cfg +0 -2
@@ -354,8 +354,6 @@ Active arm armv7 socfpga altera socfpga Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier <[email protected]> Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <[email protected]> -Active arm armv7 zynq xilinx zynq zynq - Michal Simek <[email protected]> -Active arm armv7 zynq xilinx zynq zynq_dcc zynq:ZYNQ_DCC Michal Simek <[email protected]> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <[email protected]> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding <[email protected]> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding <[email protected]>
include/configs/zynq-common.h renamed from include/configs/zynq.h +6 -3
@@ -1,11 +1,14 @@/* * (C) Copyright 2012 Michal Simek <[email protected]> +* (C) Copyright 2013 Xilinx, Inc. +* +* Common configuration options for all Zynq boards. * * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __CONFIG_ZYNQ_H -#define __CONFIG_ZYNQ_H +#ifndef __CONFIG_ZYNQ_COMMON_H +#define __CONFIG_ZYNQ_COMMON_H/* High Level configuration Options */ #define CONFIG_ARMV7
@@ -170,4 +173,4 @@#define CONFIG_CMD_DHCP #define CONFIG_CMD_MII -#endif /* __CONFIG_ZYNQ_H */ +#endif /* __CONFIG_ZYNQ_COMMON_H */
Signature · 1 line
1.8.3
PATCH v4 9/29 zynq-common: Rename zynq with zynq-common
Hi Jagannadha,
Quoted 4 lines · Jagannadha Sutradharudu Teki
zynq.h->zynq-common.h, zynq-common is Common
configuration options for all Zynq boards.
zynq.his no longer exists hense removed from boards.cfg
Note this did not cleanly apply to arm/master and had to be manually fixed.
Amicalement,
Signature · 1 line
Albert.
PATCH v4 10/29 doc: zynq: Add information on zynq u-boot
In reply to a message not in the archiveInformation on zynq u-boot about
- zynq boards
- mainline status
- TODO
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- doc/README.zynq | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 doc/README.zynq
doc/README.zynq new file +60 -0
@@ -0,0 +1,60 @@ +# +# Xilinx ZYNQ U-Boot +# +# (C) Copyright 2013 Xilinx, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +1. About this + +This document describes the information about Xilinx Zynq U-Boot - +like supported boards, ML status and TODO list. + +2. Zynq boards + +Xilinx Zynq-7000 All Programmable SoCs enable extensive system level +differentiation, integration, and flexibility through hardware, software, +and I/O programmability. + +* zc70x + - zc702 (single qspi, gem0, mmc) [1] + - zc706 (dual parallel qspi, gem0, mmc) [2] +* zed (single qspi, gem0, mmc) [3] +* microzed (single qspi, gem0, mmc) [4] +* zc770 + - zc770-xm010 (single qspi, gem0, mmc) + - zc770-xm011 (8 or 16 bit nand) + - zc770-xm012 (nor) + - zc770-xm013 (dual parallel qspi, gem1) + +3. Mainline status + +- Added basic board configurations support. +- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq +- Added zynq boards named - zynq, zynq_dcc +- Added zynq drivers: + serial - drivers/serial/serial_zynq.c + net - drivers/net/zynq_gem.c + mmc - drivers/mmc/zynq_sdhci.c + mmc - drivers/mmc/zynq_sdhci.c + spi- drivers/spi/zynq_spi.c + i2c - drivers/i2c/zynq_i2c.c + +4. TODO + +- Add zynq boards support - zc70x, zed, microzed, zc770 +- Add zynq qspi controller driver +- Add zynq nand controller driver +- d-cache support for zynq_gem.c +- FDT support for zynq boards +- Need proper cleanups on board configurations + +[1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm +[2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm +[3] http://zedboard.org/product/zedboard +[4] http://zedboard.org/product/microzed + +-- +Jagannadha Sutradharudu Teki <[email protected]> +Sun Dec 15 14:52:41 IST 2013
Signature · 1 line
1.8.3
PATCH v4 11/29 zynq: Add zynq zc70x board support
In reply to a message not in the archiveThe Zynq-7000 APSOC zc702 and zc706 enabled complte embedded processing includes ASIC and FPGA design.
ZC702-:
APSOC:
- XC7Z020-CLG484-1
Memory:
- DDR3 Component Memory 1GB
- 16MB Quad SPI Flash
- IIC - 1 KB EEPROM
Connectivity:
- Gigabit Ethernet GMII, RGMII and SGMII.
- USB OTG - Host USB
- IIC Bus Headers/HUB
- 1 CAN with Wake on CAN
- USB-UART
Video/Display:
- HDMI Video OUT
- 8X LEDs
Control & I/O:
- 3 User Push Buttons
- 2 User Switches
- 8 User LEDs
For more info on zc702 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm
ZC706-:
APSOC:
- XC7Z045 FFG900 -2 AP SoC
Memory:
- DDR3 Component Memory 1GB (PS)
- DDR3 SODIM Memory 1GB (PL)
- 2X16MB Quad SPI Flash (dual parallel)
- IIC - 1 KB EEPROM
Connectivity:
- PCIe Gen2x4
- SFP+ and SMA Pairs
- GigE RGMII Ethernet (PS)
- USB OTG 1 (PS) - Host USB
- IIC Bus Headers/HUB (PS)
- 1 CAN with Wake on CAN (PS)
- USB-UART
Video/Display:
- HDMI 8 color RGB 4.4.4 1080P-60 OUT
- HDMI IN 8 color RGB 4.4.4
Control & I/O:
- 2 User Push Buttons/Dip Switch, 2 User LEDs
- IIC access to GPIO
- SDIO (SD Card slot)
- 3 User Push Buttons, 2 User Switches, 8 User LEDs
For more info on zc706 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- boards.cfg | 1 + include/configs/zynq-common.h | 9 --------- include/configs/zynq_zc70x.h | 25 +++++++++++++++++++++++++ 3 files changed, 26 insertions(+), 9 deletions(-) create mode 100644 include/configs/zynq_zc70x.h
boards.cfg +1 -0
@@ -354,6 +354,7 @@ Active arm armv7 socfpga altera socfpga Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier <[email protected]> Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <[email protected]> +Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <[email protected]> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding <[email protected]> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding <[email protected]>
include/configs/zynq-common.h +0 -9
@@ -36,7 +36,6 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}/* Zynq Serial driver */ -#define CONFIG_ZYNQ_SERIAL_UART1 #ifdef CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
@@ -60,8 +59,6 @@#endif /* Ethernet driver */ -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7#if defined(CONFIG_ZYNQ_GEM0 ) || defined(CONFIG_ZYNQ_GEM1 )# define CONFIG_NET_MULTI # define CONFIG_ZYNQ_GEM
@@ -71,7 +68,6 @@# define CONFIG_PHY_MARVELL #endif -#define CONFIG_ZYNQ_SPI /* SPI */ #ifdef CONFIG_ZYNQ_SPI # define CONFIG_SPI_FLASH
@@ -79,10 +75,6 @@# define CONFIG_CMD_SF #endif -/* NOR */ -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_SDHCI0 /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0 ) || defined(CONFIG_ZYNQ_SDHCI1 )# define CONFIG_MMC
@@ -96,7 +88,6 @@# define CONFIG_DOS_PARTITION #endif -#define CONFIG_ZYNQ_I2C0 /* I2C */ #if defined(CONFIG_ZYNQ_I2C0 ) || defined(CONFIG_ZYNQ_I2C1 )# define CONFIG_CMD_I2C
include/configs/zynq_zc70x.h new file +25 -0
@@ -0,0 +1,25 @@ +/* +* (C) Copyright 2013 Xilinx, Inc. +* +* Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards +* See zynq_common.h for Zynq common configs +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __CONFIG_ZYNQ_ZC70X_H +#define __CONFIG_ZYNQ_ZC70X_H + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_ZC70X_H */
Signature · 1 line
1.8.3
PATCH v4 12/29 zynq: Add zynq zed board support
In reply to a message not in the archiveZed is a complete development board based on the
Xilinx Zynq-7000 All Programmable SoC.
APSOC:
- XC7Z020-CLG484-1
Memory:
- 512 MB DDR3
- 256 Mb Quad-SPI Flash(
- Full size SD/MMC card cage
Connectivity:
- 10/100/1000 Ethernet
- USB OTG (Device/Host/OTG)
- USB-UART
Expansion:
- FMC (Low Pin Count)
- Pmod. headers (2x6)
Video/Display:
- HDMI output (1080p60 + audio)
- VGA connector
- 128 x 32 OLED
- User LEDs (9)
User inputs:
- Slide switches (8)
- Push button switches (7)
Audio:
- 24-bit stereo audio CODEC
- Stereo line in/out
- Headphone
- Microphone input
Analog:
- Xilinx XADC header
- Supports 4 analog inputs
- 2 Differential / 4 Single-ended
Debug:
- On-board USB JTAG programming port
- ARM Debug Access Port (DAP)
For more info - http://zedboard.org/product/zedboard
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- boards.cfg | 1 + include/configs/zynq_zed.h | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 include/configs/zynq_zed.h
boards.cfg +1 -0
@@ -355,6 +355,7 @@ Active arm armv7 u8500 st-ericsson snowball Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <[email protected]> Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> +Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <[email protected]> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding <[email protected]> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding <[email protected]>
include/configs/zynq_zed.h new file +24 -0
@@ -0,0 +1,24 @@ +/* +* (C) Copyright 2013 Xilinx, Inc. +* +* Configuration for Zynq Evaluation and Development Board - ZedBoard +* See zynq_common.h for Zynq common configs +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __CONFIG_ZYNQ_ZED_H +#define __CONFIG_ZYNQ_ZED_H + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_ZED_H */
Signature · 1 line
1.8.3
PATCH v4 13/29 zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configs
In reply to a message not in the archiveCONFIG_SYS_SDRAM_SIZE is specific to a board hence moved to specific pre-config board files.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq-common.h | 1 - include/configs/zynq_zc70x.h | 2 ++ include/configs/zynq_zed.h | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-)
include/configs/zynq-common.h +0 -1
@@ -125,7 +125,6 @@#define CONFIG_NR_DRAM_BANKS 1#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
include/configs/zynq_zc70x.h +2 -0
@@ -10,6 +10,8 @@#ifndef __CONFIG_ZYNQ_ZC70X_H#define __CONFIG_ZYNQ_ZC70X_H +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) +#define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
include/configs/zynq_zed.h +2 -0
@@ -10,6 +10,8 @@#ifndef __CONFIG_ZYNQ_ZED_H#define __CONFIG_ZYNQ_ZED_H +#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) +#define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
Signature · 1 line
1.8.3
PATCH v4 14/29 zynq-common: Define exact TEXT_BASE
In reply to a message not in the archiveDefined TEXT_BASE for u-boot starts from 0x4000000 w.r.t zynq memory-map.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
include/configs/zynq-common.h +1 -1
@@ -121,7 +121,7 @@ sizeof(CONFIG_SYS_PROMPT) + 16)/* Physical Memory map */ -#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_SYS_TEXT_BASE 0x4000000#define CONFIG_NR_DRAM_BANKS 1#define CONFIG_SYS_SDRAM_BASE 0
Signature · 1 line
1.8.3
PATCH v4 15/29 zynq: zc70x: Add Catalyst 24WC08 EEPROM config support
In reply to a message not in the archiveAdds configurations for Catalyst 24WC08 EEPROM, which is present on the zynq boards.
Enable EEPROM support for zc70x boards.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq-common.h | 10 ++++++++++ include/configs/zynq_zc70x.h | 1 + 2 files changed, 11 insertions(+)
include/configs/zynq-common.h +10 -0
@@ -97,6 +97,16 @@# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1#endif +/* EEPROM */ +#ifdef CONFIG_ZYNQ_EEPROM +# define CONFIG_CMD_EEPROM +# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +# define CONFIG_SYS_EEPROM_SIZE 1024/* Bytes */ +#endif +#define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY
include/configs/zynq_zc70x.h +1 -0
@@ -20,6 +20,7 @@#define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_BOOT_FREEBSD #include <configs/zynq-common.h>
Signature · 1 line
1.8.3
PATCH v4 16/29 zynq: Add zynq microzed board support
In reply to a message not in the archiveMicroZed is a low-cost development board based on
the Xilinx Zynq-7000 All Programmable SoC.
APSOC:
- XC7Z010-1CLG400C
Memory:
- 1 GB of DDR3 SDRAM
- 128Mb of QSPI flash(S25FL128SAGBHI200)
- Micro SD card interface
Communication:
- 10/100/1000 Ethernet
- USB 2.0
- USB-UART
User I/O:
- 100 User I/O (50 per connector)
- Configurable as up to 48 LVDS pairs or 100 single-ended I/O Misc:
- Xilinx PC4 JTAG configuration port
- PS JTAG pins accessible via Pmod
- 33.33 MHz oscillator
- User LED and push switch
For more info - http://zedboard.org/product/microzed
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- boards.cfg | 1 + include/configs/zynq_microzed.h | 25 +++++++++++++++++++++++++ 2 files changed, 26 insertions(+) create mode 100644 include/configs/zynq_microzed.h
boards.cfg +1 -0
@@ -356,6 +356,7 @@ Active arm armv7 u8500 st-ericsson u8500 Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <[email protected]> Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> +Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <[email protected]> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding <[email protected]> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding <[email protected]>
include/configs/zynq_microzed.h new file +25 -0
@@ -0,0 +1,25 @@ +/* +* (C) Copyright 2013 Xilinx, Inc. +* +* Configuration for Micro Zynq Evaluation and Development Board - MicroZedBoard +* See zynq-common.h for Zynq common configs +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __CONFIG_ZYNQ_MICROZED_H +#define __CONFIG_ZYNQ_MICROZED_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_MICROZED_H */
Signature · 1 line
1.8.3
PATCH v4 17/29 zynq: Add zynq_zc770 xm010 board support
In reply to a message not in the archiveZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM010:
- 1Gb DDR3
- 1Mb SST SPI flash
- 128 Mb Quad-SPI Flash
- 8 Mb SST SI flash
- Full size SD/MMC card cage
- 10/100/1000 Ethernet
- USB-UART
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- boards.cfg | 1 + include/configs/zynq_zc770.h | 30 ++++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) create mode 100644 include/configs/zynq_zc770.h
boards.cfg +1 -0
@@ -357,6 +357,7 @@ Active arm armv7 vf610 freescale vf610twr Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> +Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <[email protected]> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding <[email protected]> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding <[email protected]>
include/configs/zynq_zc770.h new file +30 -0
@@ -0,0 +1,30 @@ +/* +* (C) Copyright 2013 Xilinx, Inc. +* +* Configuration settings for the Xilinx Zynq ZC770 board. +* See zynq-common.h for Zynq common configs +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef __CONFIG_ZYNQ_ZC770_H +#define __CONFIG_ZYNQ_ZC770_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_SYS_NO_FLASH + +#if defined(CONFIG_ZC770_XM010 ) +# define CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_GEM0 +# define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +# define CONFIG_ZYNQ_SDHCI0 +# define CONFIG_ZYNQ_SPI + +#else +# define CONFIG_ZYNQ_SERIAL_UART0 +#endif + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_ZC770_H */
Signature · 1 line
1.8.3
PATCH v4 18/29 zynq: Add zynq_zc770 xm013 board support
In reply to a message not in the archiveZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM013:
- 1GB DDR3
- 128 Mb Quad-SPI Flash(dual parallel)
- USB-UART
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- boards.cfg | 1 + include/configs/zynq_zc770.h | 5 +++++ 2 files changed, 6 insertions(+)
boards.cfg +1 -0
@@ -358,6 +358,7 @@ Active arm armv7 zynq xilinx zynq zynq_zc70x - Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> +Active arm armv7 zynq xilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <[email protected]> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding <[email protected]> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding <[email protected]>
include/configs/zynq_zc770.h +5 -0
@@ -21,6 +21,11 @@# define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM013 ) +# define CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_GEM1 +# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 +#else # define CONFIG_ZYNQ_SERIAL_UART0 #endif
Signature · 1 line
1.8.3
PATCH v4 19/29 zynq: Add zynq_zc770 xm012 board support
In reply to a message not in the archiveZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM012:
- 1GB DDR3
- 64MiB Numonyx NOR flash
- USB-UART
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
Cc Stefan Roese <[email protected]>
--- boards.cfg | 1 + include/configs/zynq-common.h | 16 ++++++++++++++++ include/configs/zynq_zc770.h | 4 ++++ 3 files changed, 21 insertions(+)
boards.cfg +1 -0
@@ -358,6 +358,7 @@ Active arm armv7 zynq xilinx zynq zynq_zc70x - Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> +Active arm armv7 zynq xilinx zynq zynq_zc770_xm012 zynq_zc770:ZC770_XM012 Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7 zynq xilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek <[email protected]>:Jagannadha Sutradharudu Teki <[email protected]> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <[email protected]> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding <[email protected]>
include/configs/zynq-common.h +16 -0
@@ -75,6 +75,22 @@# define CONFIG_CMD_SF #endif +/* NOR */ +#ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_SYS_FLASH_BASE 0xE2000000 +# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) +# define CONFIG_SYS_MAX_FLASH_BANKS 1 +# define CONFIG_SYS_MAX_FLASH_SECT 512 +# define CONFIG_SYS_FLASH_ERASE_TOUT 1000 +# define CONFIG_SYS_FLASH_WRITE_TOUT 5000 +# define CONFIG_FLASH_SHOW_PROGRESS 10 +# define CONFIG_SYS_FLASH_CFI +# undef CONFIG_SYS_FLASH_EMPTY_INFO +# define CONFIG_FLASH_CFI_DRIVER +# undef CONFIG_SYS_FLASH_PROTECTION +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#endif +/* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0 ) || defined(CONFIG_ZYNQ_SDHCI1 )# define CONFIG_MMC
include/configs/zynq_zc770.h +4 -0
@@ -21,6 +21,10 @@# define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM012 ) +# define CONFIG_ZYNQ_SERIAL_UART1 +# undef CONFIG_SYS_NO_FLASH +#elif defined(CONFIG_ZC770_XM013 )# define CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_GEM1
Signature · 1 line
1.8.3
PATCH v4 20/29 zynq: Add support to find bootmode
In reply to a message not in the archiveAdded support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode.
Added this functionality on board_late_init as it's not needed for normal initializtion part.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- arch/arm/cpu/armv7/zynq/slcr.c | 6 ++++++ arch/arm/include/asm/arch-zynq/sys_proto.h | 1 + board/xilinx/zynq/board.c | 25 +++++++++++++++++++++++++ doc/README.zynq | 25 +++++++++++++++++++++++-- include/configs/zynq-common.h | 1 + 5 files changed, 56 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/zynq/slcr.c +6 -0
@@ -101,6 +101,12 @@ void zynq_slcr_devcfg_enable(void)zynq_slcr_lock (); } +u32 zynq_slcr_get_boot_mode (void ) +{ +/* Get the bootmode register value */ +return readl (&slcr_base->boot_mode); +} +u32 zynq_slcr_get_idcode (void ) { return (readl(&slcr_base->pss_idcode) & SLCR_IDCODE_MASK) >>
arch/arm/include/asm/arch-zynq/sys_proto.h +1 -0
@@ -13,6 +13,7 @@ extern void zynq_slcr_cpu_reset(void);extern void zynq_slcr_gem_clk_setup (u32 gem_id,u32 rclk,u32 clk);extern void zynq_slcr_devcfg_disable (void );extern void zynq_slcr_devcfg_enable (void ); +extern u32 zynq_slcr_get_boot_mode (void );extern u32 zynq_slcr_get_idcode (void );extern void zynq_ddrc_init (void );
board/xilinx/zynq/board.c +25 -0
@@ -12,6 +12,12 @@DECLARE_GLOBAL_DATA_PTR ; +/* Bootmode setting values */ +#define ZYNQ_BM_MASK 0x0F +#define ZYNQ_BM_NOR 0x02 +#define ZYNQ_BM_SD 0x05 +#define ZYNQ_BM_JTAG 0x0 +#ifdef CONFIG_FPGA Xilinx_desc fpga;
@@ -59,6 +65,25 @@ int board_init(void)return 0 ; } +int board_late_init (void ) +{ +switch ((zynq_slcr_get_boot_mode ()) &ZYNQ_BM_MASK ) { +case ZYNQ_BM_NOR : +setenv ("modeboot" ,"norboot" ); +break ; +case ZYNQ_BM_SD : +setenv ("modeboot" ,"sdboot" ); +break ; +case ZYNQ_BM_JTAG : +setenv ("modeboot" ,"jtagboot" ); +break ; +default : +setenv ("modeboot" ,"" ); +break ; + } + +return 0 ; +}#ifdef CONFIG_CMD_NET int board_eth_init (bd_t *bis)
doc/README.zynq +23 -2
@@ -28,7 +28,27 @@ and I/O programmability. - zc770-xm012 (nor) - zc770-xm013 (dual parallel qspi, gem1) -3. Mainline status +3. Bootmode + +Zynq has a facility to read the bootmode from the slcr bootmode register +once user is setting through jumpers on the board - see page no:1546 on [5] + +All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins +on [5]. + +board_late_init() will read the bootmode values using slcr bootmode register +at runtime and assign the modeboot variable to specific bootmode string which +is intern used in autoboot. + +SLCR bootmode register Bit[3:0] values +#define ZYNQ_BM_NOR 0x02 +#define ZYNQ_BM_SD 0x05 +#define ZYNQ_BM_JTAG 0x0 + +"modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot" +bootmode strings at runtime. + +4. Mainline status - Added basic board configurations support. - Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq
@@ -41,7 +61,7 @@ and I/O programmability. spi- drivers/spi/zynq_spi.c i2c - drivers/i2c/zynq_i2c.c -4. TODO +5. TODO - Add zynq boards support - zc70x, zed, microzed, zc770 - Add zynq qspi controller driver
@@ -54,6 +74,7 @@ and I/O programmability. [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm [3] http://zedboard.org/product/zedboard [4] http://zedboard.org/product/microzed +[5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf -- Jagannadha Sutradharudu Teki <[email protected]>
include/configs/zynq-common.h +1 -0
@@ -140,6 +140,7 @@#define CONFIG_CMDLINE_EDITING #define CONFIG_AUTO_COMPLETE +#define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_MAXARGS 15/* max number of command args */ #define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */
Signature · 1 line
1.8.3
PATCH v4 21/29 zynq-common: Define default environment
In reply to a message not in the archiveDefined default env. for autoboot FIT image from
respective boot devices.
Default settings:
fit_image=fit.itb
load_addr=0x2000000
fit_size=0x800000
flash_off=0x100000
nor_flash_off=0xE2100000
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq-common.h | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-)
include/configs/zynq-common.h +22 -1
@@ -132,7 +132,28 @@/* Environment */ #define CONFIG_ENV_SIZE 0x10000/* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_SYS_LOAD_ADDR 0 + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fit_image=fit.itb\0" \ + "load_addr=0x2000000\0" \ + "fit_size=0x800000\0" \ + "flash_off=0x100000\0" \ + "nor_flash_off=0xE2100000\0" \ + "fdt_high=0x20000000\0" \ + "initrd_high=0x20000000\0" \ + "norboot=echo Copying FIT from NOR flash to RAM... && " \ + "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ + "bootm ${load_addr}\0" \ + "sdboot=echo Copying FIT from SD to RAM... && " \ + "fatload mmc 0 ${load_addr} ${fit_image} && " \ + "bootm ${load_addr}\0" \ + "jtagboot=echo TFTPing FIT to RAM... && " \ + "tftp ${load_addr} ${fit_image} && " \ + "bootm ${load_addr}\0" +#define CONFIG_BOOTCOMMAND "run $modeboot" +#define CONFIG_BOOTDELAY 3/* -1 to Disable autoboot */ +#define CONFIG_SYS_LOAD_ADDR 0/* default? */ /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "zynq-uboot> "
Signature · 1 line
1.8.3
PATCH v4 22/29 zynq-common: Change Env. Sector size to 128Kb
In reply to a message not in the archiveChanged Env. Sector size from 0x10000 to 128Kb
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq-common.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
include/configs/zynq-common.h +3 -1
@@ -129,8 +129,10 @@#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE (128 << 10) +/* Environment */ -#define CONFIG_ENV_SIZE 0x10000/* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE /* Default environment */
Signature · 1 line
1.8.3
PATCH v4 23/29 zynq-common: Define flash env. partition
In reply to a message not in the archiveLast 128Kb sector of 1Mb flash is defined as u-boot environment partition.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq-common.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)
include/configs/zynq-common.h +11 -1
@@ -133,7 +133,17 @@#define CONFIG_ENV_SIZE (128 << 10)/* Environment */ -#define CONFIG_ENV_IS_NOWHERE +#ifndef CONFIG_ENV_IS_NOWHERE +# ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_ENV_IS_IN_FLASH +# elif defined(CONFIG_SYS_NO_FLASH ) +# define CONFIG_ENV_IS_NOWHERE +# endif + +# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +# define CONFIG_ENV_OFFSET 0xE0000 +# define CONFIG_CMD_SAVEENV +#endif /* Default environment */ #define CONFIG_EXTRA_ENV_SETTINGS \
Signature · 1 line
1.8.3
PATCH v4 24/29 zynq-common: Define CONFIG_ENV_OVERWRITE
In reply to a message not in the archiveDefined CONFIG_ENV_OVERWRITE, which allow to
overwrite serial baudrate and ethaddr.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq-common.h | 3 +++ 1 file changed, 3 insertions(+)
include/configs/zynq-common.h +3 -0
@@ -132,6 +132,9 @@/* Total Size of Environment Sector */ #define CONFIG_ENV_SIZE (128 << 10) +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +/* Environment */ #ifndef CONFIG_ENV_IS_NOWHERE # ifndef CONFIG_SYS_NO_FLASH
Signature · 1 line
1.8.3
PATCH v4 25/29 dts: zynq: Add basic fdt support
In reply to a message not in the archiveThis patch provides a basic fdt support for zynq u-boot.
zynq-7000.dtsi-> initial arch dts file zynq-zed.dts -> initial zed board dts file more devices should be added in subsequent patches.
u-boot build: once configuring of a board done
for building dtb with zynq-zed.dts as an input
zynq-uboot> make DEVICE_TREE=zynq-zed
Enabled CONFIG_OF_SEPARATE for building dtb separately. There is a new binary called u-boot-dtb.bin which is a u-boot with devicetree supported.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- arch/arm/dts/zynq-7000.dtsi | 13 +++++++++++++ board/xilinx/dts/zynq-zed.dts | 14 ++++++++++++++ include/configs/zynq-common.h | 5 +++++ 3 files changed, 32 insertions(+) create mode 100644 arch/arm/dts/zynq-7000.dtsi create mode 100644 board/xilinx/dts/zynq-zed.dts
arch/arm/dts/zynq-7000.dtsi new file +13 -0
@@ -0,0 +1,13 @@ +/* + * Xilinx Zynq 7000 DTSI + * Describes the hardware common to all Zynq 7000-based boards. + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/include/ "skeleton.dtsi" + +/ { + compatible = "xlnx,zynq-7000"; +};
board/xilinx/dts/zynq-zed.dts new file +14 -0
@@ -0,0 +1,14 @@ +/* + * Xilinx ZED board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZED Board"; + compatible = "xlnx,zynq-zed", "xlnx,zynq-7000"; +};
include/configs/zynq-common.h +5 -0
@@ -212,6 +212,11 @@#define CONFIG_FIT #define CONFIG_FIT_VERBOSE 1/* enable fit_format_{error,warning}() */ +/* FDT support */ +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE +#define CONFIG_DISPLAY_BOARDINFO_LATE +/* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD )# define CONFIG_API
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1.8.3
PATCH v4 26/29 gpio: zynq: Add dummy gpio routines
In reply to a message not in the archiveGPIO dummy routines are required for fdt build, may be removed these dependencies once the u-boot fdt is fully optimized.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- arch/arm/include/asm/arch-zynq/gpio.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 arch/arm/include/asm/arch-zynq/gpio.h
arch/arm/include/asm/arch-zynq/gpio.h new file +25 -0
@@ -0,0 +1,25 @@ +/* +* Copyright (c) 2013 Xilinx, Inc. +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef _ZYNQ_GPIO_H +#define _ZYNQ_GPIO_H + +inline int gpio_get_value (unsigned gpio) +{ +return 0 ; +} + +inline int gpio_set_value (unsigned gpio,int val) +{ +return 0 ; +} + +inline int gpio_request (unsigned gpio,const char *label) +{ +return 0 ; +} + +#endif /* _ZYNQ_GPIO_H */
Signature · 1 line
1.8.3
PATCH v4 27/29 zynq-common: Enable verified boot(RSA)
In reply to a message not in the archiveCONFIG_FIT_SIGNATURE - signature node support in FIT image CONFIG_RSA - RSA lib support
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- include/configs/zynq-common.h | 4 ++++ 1 file changed, 4 insertions(+)
include/configs/zynq-common.h +4 -0
@@ -217,6 +217,10 @@#define CONFIG_OF_SEPARATE #define CONFIG_DISPLAY_BOARDINFO_LATE +/* RSA support */ +#define CONFIG_FIT_SIGNATURE +#define CONFIG_RSA +/* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD )# define CONFIG_API
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1.8.3
PATCH v4 28/29 dts: zynq: Add more zynq dts files
In reply to a message not in the archiveThis patch adds initial dts support for supported
zynq boards.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- board/xilinx/dts/zynq-microzed.dts | 14 ++++++++++++++ board/xilinx/dts/zynq-zc702.dts | 14 ++++++++++++++ board/xilinx/dts/zynq-zc706.dts | 14 ++++++++++++++ board/xilinx/dts/zynq-zc770-xm010.dts | 14 ++++++++++++++ board/xilinx/dts/zynq-zc770-xm012.dts | 14 ++++++++++++++ board/xilinx/dts/zynq-zc770-xm013.dts | 14 ++++++++++++++ 6 files changed, 84 insertions(+) create mode 100644 board/xilinx/dts/zynq-microzed.dts create mode 100644 board/xilinx/dts/zynq-zc702.dts create mode 100644 board/xilinx/dts/zynq-zc706.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm010.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm012.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm013.dts
board/xilinx/dts/zynq-microzed.dts new file +14 -0
@@ -0,0 +1,14 @@ +/* + * Xilinx MicroZED board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq MicroZED Board"; + compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000"; +};
board/xilinx/dts/zynq-zc702.dts new file +14 -0
@@ -0,0 +1,14 @@ +/* + * Xilinx ZC702 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC702 Board"; + compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; +};
board/xilinx/dts/zynq-zc706.dts new file +14 -0
@@ -0,0 +1,14 @@ +/* + * Xilinx ZC706 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC706 Board"; + compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; +};
board/xilinx/dts/zynq-zc770-xm010.dts new file +14 -0
@@ -0,0 +1,14 @@ +/* + * Xilinx ZC770 XM010 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC770 XM010 Board"; + compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000"; +};
board/xilinx/dts/zynq-zc770-xm012.dts new file +14 -0
@@ -0,0 +1,14 @@ +/* + * Xilinx ZC770 XM012 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC770 XM012 Board"; + compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; +};
board/xilinx/dts/zynq-zc770-xm013.dts new file +14 -0
@@ -0,0 +1,14 @@ +/* + * Xilinx ZC770 XM013 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC770 XM013 Board"; + compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000"; +};
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1.8.3
PATCH v4 29/29 doc: Update the zynq u-boot status
In reply to a message not in the archiveUpdated doc/README.zynq to current status.
Signed-off-by Jagannadha Sutradharudu Teki <[email protected]>
--- doc/README.zynq | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-)
doc/README.zynq +18 -8
@@ -28,7 +28,16 @@ and I/O programmability. - zc770-xm012 (nor) - zc770-xm013 (dual parallel qspi, gem1) -3. Bootmode +3. Building + + # Configure for microzed board + $ make zynq_microzed_config + Configuring for zynq_microzed board... + + # Building + $ make DEVICE_TREE=zynq-microzed + +4. Bootmode Zynq has a facility to read the bootmode from the slcr bootmode register once user is setting through jumpers on the board - see page no:1546 on [5]
@@ -48,11 +57,11 @@ SLCR bootmode register Bit[3:0] values "modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot" bootmode strings at runtime. -4. Mainline status +5. Mainline status - Added basic board configurations support. - Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq -- Added zynq boards named - zynq, zynq_dcc +- Added zynq boards named - zc70x, zed, microzed, zc770_xm010, zc770_xm012, zc770_xm013 - Added zynq drivers: serial - drivers/serial/serial_zynq.c net - drivers/net/zynq_gem.c
@@ -60,15 +69,16 @@ bootmode strings at runtime. mmc - drivers/mmc/zynq_sdhci.c spi- drivers/spi/zynq_spi.c i2c - drivers/i2c/zynq_i2c.c +- Done proper cleanups on board configurations +- Added basic FDT support for zynq boards +- d-cache support for zynq_gem.c -5. TODO +6. TODO -- Add zynq boards support - zc70x, zed, microzed, zc770 +- Add zynq boards support - zc770_xm011 - Add zynq qspi controller driver - Add zynq nand controller driver -- d-cache support for zynq_gem.c -- FDT support for zynq boards -- Need proper cleanups on board configurations +- Add FDT support on individual drivers [1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
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1.8.3