ARM: hw_breakpoint: Add ARMv8 support

PATCH Superseded Christopher Covington 2 participants 7 messages Jan 22, 2014 – Jan 29, 2014

Subsystems (2)

Arm (32-bit) Arm PMU profiling and debugging

lore

Share & tools

lore

Christopher Covington

author

2014-01-22 18:29 UTC #0 lore raw

PATCH 1/1 ARM: hw_breakpoint: Add ARMv8 support

Add the trivial support necessary to get hardware breakpoints working for GDB on ARMv8 simulators running in AArch32 mode.

Signed-off-by Christopher Covington <[email protected]>

---
 arch/arm/include/asm/hw_breakpoint.h | 1 +
 arch/arm/kernel/hw_breakpoint.c      | 1 +
 2 files changed, 2 insertions(+)

arch/arm/include/asm/hw_breakpoint.h +1 -0

index eef55ea..8e427c7 100644
@@ -51,6 +51,7 @@ static inline void decode_ctrl_reg(u32 reg,
 #define ARM_DEBUG_ARCH_V7_ECP14	3
 #define ARM_DEBUG_ARCH_V7_MM	4
 #define ARM_DEBUG_ARCH_V7_1	5
+#define ARM_DEBUG_ARCH_V8	6
 
 /* Breakpoint */
 #define ARM_BREAKPOINT_EXECUTE	0

arch/arm/kernel/hw_breakpoint.c +1 -0

index 3d44660..45fbcaf 100644
@@ -257,6 +257,7 @@ static int enable_monitor_mode(void)
 		break;
 	case ARM_DEBUG_ARCH_V7_ECP14:
 	case ARM_DEBUG_ARCH_V7_1:
+	case ARM_DEBUG_ARCH_V8:
 		ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN));
 		isb();
 		break;

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by the Linux Foundation.

Will Deacon

2014-01-24 15:57 UTC #1 lore raw

Hi Christopher,

Quoted 26 lines · Christopher Covington

Add the trivial support necessary to get hardware breakpoints working for GDB on ARMv8 simulators running in AArch32 mode.
Signed-off-by Christopher Covington <[email protected]>
---
 arch/arm/include/asm/hw_breakpoint.h | 1 +
 arch/arm/kernel/hw_breakpoint.c      | 1 +
 2 files changed, 2 insertions(+)
arch/arm/include/asm/hw_breakpoint.h +1 -0
index eef55ea..8e427c7 100644
@@ -51,6 +51,7 @@ static inline void decode_ctrl_reg(u32 reg,
 #define ARM_DEBUG_ARCH_V7_ECP14	3
 #define ARM_DEBUG_ARCH_V7_MM	4
 #define ARM_DEBUG_ARCH_V7_1	5
+#define ARM_DEBUG_ARCH_V8	6
 
 /* Breakpoint */
 #define ARM_BREAKPOINT_EXECUTE	0
arch/arm/kernel/hw_breakpoint.c +0 -0
index 3d44660..45fbcaf 100644

arch/arm/kernel/hw_breakpoint.c static int enable_monitor_mode(void) · line 263

Quoted 7 lines

arch/arm/kernel/hw_breakpoint.c +1 -0

@@ -257,6 +257,7 @@ static int enable_monitor_mode(void)
 		break;
 	case ARM_DEBUG_ARCH_V7_ECP14:
 	case ARM_DEBUG_ARCH_V7_1:
+	case ARM_DEBUG_ARCH_V8:
 		ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN));
 		isb();
 		break;

I'm slightly uneasy about this, mainly because I've not spent much time looking at the AArch32 side of ARMv8 debug and I know that a fair amount has changed since 7.1. Furthermore, the arch/arm/ kernel hasn't grown any v8 features yet and it's not clear whether that's a road down which people wish to take it.

Anyway, assuming this works, can you please update debug_exception_updates_fsr to return true for ARMv8 cores?

Will

Christopher Covington

author

2014-01-28 18:26 UTC #2 lore raw

PATCH v2 1/1 ARM: hw_breakpoint: Add ARMv8 support

In reply to Christopher Covington

Add the trivial support necessary to get hardware breakpoints working for GDB on ARMv8 simulators running in AArch32 mode.

Signed-off-by Christopher Covington <[email protected]>

---

v2: modify debug_exception_updates_fsr

 arch/arm/include/asm/hw_breakpoint.h | 1 +
 arch/arm/kernel/hw_breakpoint.c      | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

arch/arm/include/asm/hw_breakpoint.h +1 -0

index eef55ea..8e427c7 100644
@@ -51,6 +51,7 @@ static inline void decode_ctrl_reg(u32 reg,
 #define ARM_DEBUG_ARCH_V7_ECP14	3
 #define ARM_DEBUG_ARCH_V7_MM	4
 #define ARM_DEBUG_ARCH_V7_1	5
+#define ARM_DEBUG_ARCH_V8	6
 
 /* Breakpoint */
 #define ARM_BREAKPOINT_EXECUTE	0

arch/arm/kernel/hw_breakpoint.c +2 -1

index 3d44660..a711b27 100644
@@ -167,7 +167,7 @@ static int debug_arch_supported(void)
 /* Can we determine the watchpoint access type from the fsr? */
 static int debug_exception_updates_fsr(void)
 {
-	return 0;
+	return get_debug_arch() == ARM_DEBUG_ARCH_V8;
 }
 
 /* Determine number of WRP registers available. */

@@ -257,6 +257,7 @@ static int enable_monitor_mode(void)
 		break;
 	case ARM_DEBUG_ARCH_V7_ECP14:
 	case ARM_DEBUG_ARCH_V7_1:
+	case ARM_DEBUG_ARCH_V8:
 		ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN));
 		isb();
 		break;

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by the Linux Foundation.

Will Deacon

Acked-by on v2 1/1

2014-01-28 18:38 UTC #3 lore raw

Quoted 29 lines · Christopher Covington

Add the trivial support necessary to get hardware breakpoints working for GDB on ARMv8 simulators running in AArch32 mode.
Signed-off-by Christopher Covington <[email protected]>
---
v2: modify debug_exception_updates_fsr
 arch/arm/include/asm/hw_breakpoint.h | 1 +
 arch/arm/kernel/hw_breakpoint.c      | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)
arch/arm/include/asm/hw_breakpoint.h +1 -0
index eef55ea..8e427c7 100644
@@ -51,6 +51,7 @@ static inline void decode_ctrl_reg(u32 reg,
 #define ARM_DEBUG_ARCH_V7_ECP14	3
 #define ARM_DEBUG_ARCH_V7_MM	4
 #define ARM_DEBUG_ARCH_V7_1	5
+#define ARM_DEBUG_ARCH_V8	6
 
 /* Breakpoint */
 #define ARM_BREAKPOINT_EXECUTE	0
arch/arm/kernel/hw_breakpoint.c +0 -0
index 3d44660..a711b27 100644

arch/arm/kernel/hw_breakpoint.c static int debug_arch_supported(void) · line 170

Quoted 5 lines

arch/arm/kernel/hw_breakpoint.c +1 -1

@@ -167,7 +167,7 @@ static int debug_arch_supported(void)
 /* Can we determine the watchpoint access type from the fsr? */
 static int debug_exception_updates_fsr(void)
 {
-	return 0;
+	return get_debug_arch() == ARM_DEBUG_ARCH_V8;

I'd probably make that >= to save on future changes.

With that change:

Acked-by Will Deacon <[email protected]>

Will

Christopher Covington

author

2014-01-28 18:51 UTC #4 lore raw

PATCH v3 1/1 ARM: hw_breakpoint: Add ARMv8 support

Add the trivial support necessary to get hardware breakpoints working for GDB on ARMv8 simulators running in AArch32 mode.

Acked-by Will Deacon <[email protected]>

Signed-off-by Christopher Covington <[email protected]>

---

v3: assume for now that ARMv9 and later will update FSR

v2: modify debug_exception_updates_fsr

 arch/arm/include/asm/hw_breakpoint.h | 1 +
 arch/arm/kernel/hw_breakpoint.c      | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

arch/arm/include/asm/hw_breakpoint.h +1 -0

index eef55ea..8e427c7 100644
@@ -51,6 +51,7 @@ static inline void decode_ctrl_reg(u32 reg,
 #define ARM_DEBUG_ARCH_V7_ECP14	3
 #define ARM_DEBUG_ARCH_V7_MM	4
 #define ARM_DEBUG_ARCH_V7_1	5
+#define ARM_DEBUG_ARCH_V8	6
 
 /* Breakpoint */
 #define ARM_BREAKPOINT_EXECUTE	0

arch/arm/kernel/hw_breakpoint.c +2 -1

index 3d44660..9da35c6 100644
@@ -167,7 +167,7 @@ static int debug_arch_supported(void)
 /* Can we determine the watchpoint access type from the fsr? */
 static int debug_exception_updates_fsr(void)
 {
-	return 0;
+	return get_debug_arch() >= ARM_DEBUG_ARCH_V8;
 }
 
 /* Determine number of WRP registers available. */

@@ -257,6 +257,7 @@ static int enable_monitor_mode(void)
 		break;
 	case ARM_DEBUG_ARCH_V7_ECP14:
 	case ARM_DEBUG_ARCH_V7_1:
+	case ARM_DEBUG_ARCH_V8:
 		ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN));
 		isb();
 		break;

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by the Linux Foundation.

Will Deacon

2014-01-29 10:57 UTC #5 lore raw

Hi Christopher,

Quoted 8 lines · Christopher Covington

Add the trivial support necessary to get hardware breakpoints working for GDB on ARMv8 simulators running in AArch32 mode.
Acked-by Will Deacon <[email protected]>
Signed-off-by Christopher Covington <[email protected]>
---
v3: assume for now that ARMv9 and later will update FSR

Please can you stick this into the patch system? I don't have any other hw_breakpoint changes queued, so I doubt I'll send a pull for 3.15.

Cheers,

Will

Christopher Covington

author

2014-01-29 14:00 UTC #6 lore raw

Hi Will,

Quoted 6 lines · Will Deacon

Hi Christopher,
Quoted 3 lines · Christopher Covington
Add the trivial support necessary to get hardware breakpoints working for GDB on ARMv8 simulators running in AArch32 mode.

Quoted 8 lines

Quoted 5 lines
Acked-by Will Deacon <[email protected]>
Signed-off-by Christopher Covington <[email protected]>
---
v3: assume for now that ARMv9 and later will update FSR
Please can you stick this into the patch system? I don't have any other hw_breakpoint changes queued, so I doubt I'll send a pull for 3.15.

Thanks for your review. Sounds good; will do.

Regards,
Christopher

Signature · 3 lines

Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.