Latency = weigth in perf mem record/report?

Dear list,

table 18-18 from the Vol 3b part 2 of the Intel® 64 and IA-32
Architectures Software Developer’s Manual (labeled as Table 18-18. PEBS Record Format for Intel Core i7 Processor Family ) [1] indicates that the PEBS samples report the latency value (in core cycles) for that particular load/store that emitted the sample at the address 0xa8 from the begin of the PEBS sample address.

I've seen that there is a weight field in the output of the perf
report -D associated to the PERF_RECORD_SAMPLE. Looking at the kernel code I found in file arch/x86/kernel/cpu/perf_event_intel_ds.c the following code which seems to be storing the info I want

819 /*
820 * Use latency for weight (only avail with PEBS-LL)
821 */
822 if (fll && (sample_type & PERF_SAMPLE_WEIGHT))
823 data.weight = pebs->lat;

and then in tools/perf/builtin-mem.c the routine dump_raw_samples
seems to dump this info. Am I right? Can anyone kindly confirm this?

Thank you very much.

[1] http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3b-part-2-manual.pdf

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Right, PEBS latency info is stored in sample's WEIGHT (for mem-loads and mem-stores events), and it's sample->weight on the perf tool side.

jirka