clock and HWMOD changes for USIM module
Subsystems (7)
cover clock and HWMOD changes for USIM module
Patch set includes clock and HWMOD entries for AM43x's USIM modoule.
Note: I am in process of mainlining usim driver.
Satish Patel (2):
ARM: dts: AM43xx-clocks: Entries added for ti-usim
ARM: OMAP: AM43xx: HWMOD changes added for ti-usim
arch/arm/boot/dts/am43xx-clocks.dtsi | 34 ++++++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 39 ++++++++++++++++++++++++++++ arch/arm/mach-omap2/prcm43xx.h | 1 + drivers/clk/ti/clk-43xx.c | 4 +++ 4 files changed, 78 insertions(+), 0 deletions(-)
RFC PATCH 1/2 ARM: dts: AM43xx-clocks: Entries added for ti-usim
Clock entries support for TI's USIM - Smart card controller of AM43xx platform USIM controller has multiple sources for debounce and functional clock.Entry for each source has been added.
--- arch/arm/boot/dts/am43xx-clocks.dtsi | 34 ++++++++++++++++++++++++++++++++++ drivers/clk/ti/clk-43xx.c | 4 ++++ 2 files changed, 38 insertions(+), 0 deletions(-)
arch/arm/boot/dts/am43xx-clocks.dtsi +34 -0
@@ -420,6 +420,40 @@ wdt1_fck: wdt1_fck at 44df422c { bit-mask = <0x1>; }; +usim0_fck: usim0_fck at 44df4254 { + #clock-cells = <0>; + compatible = "mux-clock"; + clocks = <&sys_clkin_ck>, <&dpll_core_m4_ck>; + reg = <0x44df4254 0x4>; + bit-mask = <0x1>; +}; + +usim_dbck: usim_dbck at 44df425c { + #clock-cells = <0>; + compatible = "mux-clock"; + clocks = <&clk_rc32k_ck>, <&clk_32k_mosc_ck>, <&clkdiv32k_ick>; + reg = <0x44df425c 0x4>; + bit-mask = <0x3>; +}; + +usim0_opt_fck: usim0_opt_fck at 44df8da8 { + #clock-cells = <0>; + compatible = "gate-clock"; + clocks = <&usim0_fck>; + reg = <0x44df8da8 0x4>; + bit-shift = <8>; + bit-mask = <0x1>; +}; + +usim0_opt_fck32: usim0_opt_fck32 at 44df8da8 { + #clock-cells = <0>; + compatible = "gate-clock"; + clocks = <&usim_dbck>; + bit-shift = <9>; + bit-mask = <0x1>; + reg = <0x44df8da8 0x4>; +}; + l3_gclk: l3_gclk { #clock-cells = <0>; compatible = "fixed-factor-clock";
drivers/clk/ti/clk-43xx.c +4 -0
@@ -66,6 +66,10 @@ static struct omap_dt_clk am43xx_clks[] = {DT_CLK (NULL ,"timer6_fck" ,"timer6_fck" ),DT_CLK (NULL ,"timer7_fck" ,"timer7_fck" ),DT_CLK (NULL ,"wdt1_fck" ,"wdt1_fck" ), +DT_CLK (NULL ,"usim0_fck" ,"usim0_fck" ), +DT_CLK (NULL ,"usim_dbck" ,"usim_dbck" ), +DT_CLK (NULL ,"usim0_opt_fck" ,"usim0_opt_fck" ), +DT_CLK (NULL ,"usim0_opt_fck32" ,"usim0_opt_fck32" ),DT_CLK (NULL ,"l3_gclk" ,"l3_gclk" ),DT_CLK (NULL ,"dpll_core_m4_div2_ck" ,"dpll_core_m4_div2_ck" ), DT_CLK(NULL, "l4hs_gclk", "l4hs_gclk"),
Signature · 1 line
1.7.1
RFC PATCH 1/2 ARM: dts: AM43xx-clocks: Entries added for ti-usim
Quoted 3 lines · Satish Patel
Clock entries support for TI's USIM - Smart card controller of AM43xx platform USIM controller has multiple sources for debounce and functional clock.Entry for each source has been added.
This patch is using unsupported/old version of DT data layout for mux and gate clocks, and as such does not work at all (probably causes a hang during boot.) Please update against latest kernel.
Quoted 57 lines
Signed-off-by Satish Patel <[email protected]>--- arch/arm/boot/dts/am43xx-clocks.dtsi | 34 ++++++++++++++++++++++++++++++++++ drivers/clk/ti/clk-43xx.c | 4 ++++ 2 files changed, 38 insertions(+), 0 deletions(-)arch/arm/boot/dts/am43xx-clocks.dtsi +34
-0@@ -420,6 +420,40 @@ wdt1_fck: wdt1_fck at 44df422c { bit-mask = <0x1>; }; +usim0_fck: usim0_fck at 44df4254 { + #clock-cells = <0>; + compatible = "mux-clock"; + clocks = <&sys_clkin_ck>, <&dpll_core_m4_ck>; + reg = <0x44df4254 0x4>; + bit-mask = <0x1>; +}; + +usim_dbck: usim_dbck at 44df425c { + #clock-cells = <0>; + compatible = "mux-clock"; + clocks = <&clk_rc32k_ck>, <&clk_32k_mosc_ck>, <&clkdiv32k_ick>; + reg = <0x44df425c 0x4>; + bit-mask = <0x3>; +}; + +usim0_opt_fck: usim0_opt_fck at 44df8da8 { + #clock-cells = <0>; + compatible = "gate-clock"; + clocks = <&usim0_fck>; + reg = <0x44df8da8 0x4>; + bit-shift = <8>; + bit-mask = <0x1>; +}; + +usim0_opt_fck32: usim0_opt_fck32 at 44df8da8 { + #clock-cells = <0>; + compatible = "gate-clock"; + clocks = <&usim_dbck>; + bit-shift = <9>; + bit-mask = <0x1>; + reg = <0x44df8da8 0x4>; +}; + l3_gclk: l3_gclk { #clock-cells = <0>; compatible = "fixed-factor-clock";drivers/clk/ti/clk-43xx.c +0
-0
drivers/clk/ti/clk-43xx.c static struct omap_dt_clk am43xx_clks[] = { · line 72
Quoted 7 lines
drivers/clk/ti/clk-43xx.c +4
-0@@ -66,6 +66,10 @@ static struct omap_dt_clk am43xx_clks[] = {DT_CLK (NULL ,"timer6_fck" ,"timer6_fck" ),DT_CLK (NULL ,"timer7_fck" ,"timer7_fck" ),DT_CLK (NULL ,"wdt1_fck" ,"wdt1_fck" ), +DT_CLK (NULL ,"usim0_fck" ,"usim0_fck" ), +DT_CLK (NULL ,"usim_dbck" ,"usim_dbck" ), +DT_CLK (NULL ,"usim0_opt_fck" ,"usim0_opt_fck" ), + DT_CLK(NULL, "usim0_opt_fck32", "usim0_opt_fck32"),
Do you need to add these aliases? Please avoid if possible.
-Tero
Quoted 4 lines
drivers/clk/ti/clk-43xx.c +0
-0DT_CLK (NULL ,"l3_gclk" ,"l3_gclk" ),DT_CLK (NULL ,"dpll_core_m4_div2_ck" ,"dpll_core_m4_div2_ck" ), DT_CLK(NULL, "l4hs_gclk", "l4hs_gclk"),
RFC PATCH 2/2 ARM: OMAP: AM43xx: HWMOD changes added for ti-usim
In reply to Satish PatelHWMOD entries support for TI's USIM - Smart card controller of AM43xx platform
--- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 39 ++++++++++++++++++++++++++++ arch/arm/mach-omap2/prcm43xx.h | 1 + 2 files changed, 40 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/omap_hwmod_33xx_data.c +39 -0
@@ -1689,6 +1689,35 @@ static struct omap_hwmod am33xx_usbss_hwmod = { }, }; +/* usim0 */ +static struct omap_hwmod_class_sysconfig am43xx_usim0_sysc = { + .rev_offs =0x0 , + .sysc_offs =0x10 , + .sysc_flags = (SYSC_HAS_SIDLEMODE ), + .idlemodes = (SIDLE_FORCE |SIDLE_NO |SIDLE_SMART | +SIDLE_SMART_WKUP ), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class am43xx_usim0_hwmod_class = { + .name ="usim" , + .sysc = &am43xx_usim0_sysc, +}; + +static struct omap_hwmod am43xx_usim0_hwmod = { + .name ="usim0" , + .class = &am43xx_usim0_hwmod_class, + .clkdm_name ="l4ls_clkdm" , + .main_clk ="l4ls_gclk" , + .prcm = { + .omap4 = { + .clkctrl_offs =AM43XX_CM_PER_USIM0_CLKCTRL_OFFSET , + .modulemode =MODULEMODE_SWCTRL , + }, + }, +}; + +static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = { .rev_offs =0x0 , .sysc_offs =0x4 ,
@@ -2901,6 +2930,14 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi4 = { .user = OCP_USER_MPU, }; +static struct omap_hwmod_ocp_if am43xx_l4_ls__usim0 = { + .master = &am33xx_l4_ls_hwmod, + .slave = &am43xx_usim0_hwmod, + .clk ="l4ls_gclk" , + .user =OCP_USER_MPU , +}; + +static struct omap_hwmod_ocp_if am43xx_l4_ls__gpio4 = { .master = &am33xx_l4_ls_hwmod, .slave = &am43xx_gpio4_hwmod,
@@ -3083,6 +3120,7 @@ static void am43xx_hwmod_clkctrl(void)CLKCTRL (am33xx_sha0_hwmod ,AM43XX_CM_PER_SHA0_CLKCTRL_OFFSET );CLKCTRL (am33xx_aes0_hwmod ,AM43XX_CM_PER_AES0_CLKCTRL_OFFSET );CLKCTRL (am33xx_rng_hwmod ,AM43XX_CM_PER_RNG_CLKCTRL_OFFSET ); +CLKCTRL (am43xx_usim0_hwmod ,AM43XX_CM_PER_USIM0_CLKCTRL_OFFSET ); }static void am33xx_hwmod_clkctrl (void )
@@ -3256,6 +3294,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am43xx_l4_ls__dss, &am43xx_l4_ls__dss_dispc, &am43xx_l4_ls__dss_rfbi, + &am43xx_l4_ls__usim0, NULL, };
arch/arm/mach-omap2/prcm43xx.h +1 -0
@@ -146,5 +146,6 @@#define AM43XX_CM_PER_GPIO5_CLKCTRL_OFFSET 0x0498#define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET 0x0a20#define AM43XX_CM_PER_MAGADC_CLKCTRL_OFFSET 0x0230 +#define AM43XX_CM_PER_USIM0_CLKCTRL_OFFSET 0x05A8#endif
Signature · 1 line
1.7.1
cover clock and HWMOD changes for USIM module
In reply to Satish PatelQuoted 8 lines · Satish Patel
Patch set includes clock and HWMOD entries for AM43x's USIM modoule.
Note: I am in process of mainlining usim driver.
Satish Patel (2):
ARM: dts: AM43xx-clocks: Entries added for ti-usim
ARM: OMAP: AM43xx: HWMOD changes added for ti-usim
Tony,
Can you pull in these patches if there are no comments?
Thanks,
Satish
Tony Lindgren
maintainercover clock and HWMOD changes for USIM module
Quoted 7 lines · Satish Patel
Quoted 4 lines · Satish Patel
Patch set includes clock and HWMOD entries for AM43x's USIM modoule.
Note: I am in process of mainlining usim driver.
Quoted 8 lines
Quoted 4 lines
Satish Patel (2):
ARM: dts: AM43xx-clocks: Entries added for ti-usim
ARM: OMAP: AM43xx: HWMOD changes added for ti-usimTony,
Can you pull in these patches if there are no comments?
Would like to see acks from Benoit/Tero/Paul first.
Regards,
Tony
cover clock and HWMOD changes for USIM module
Quoted 13 lines · Tony Lindgren
Quoted 12 lines · Satish Patel
Quoted 8 lines · Satish Patel
Patch set includes clock and HWMOD entries for AM43x's USIM modoule.
Note: I am in process of mainlining usim driver.
Satish Patel (2):
ARM: dts: AM43xx-clocks: Entries added for ti-usim
ARM: OMAP: AM43xx: HWMOD changes added for ti-usim
Quoted 6 lines
Quoted 3 lines
Tony,
Can you pull in these patches if there are no comments?
Would like to see acks from Benoit/Tero/Paul first.
Benoit/Tero/Paul:
Can you please review and ack this patch series,
so that tony can pick it up.
Thanks
satish
Quoted 4 lines
Regards,
Tony
Tero Kristo
NAKcover clock and HWMOD changes for USIM module
Quoted 18 lines · Satish Patel
Quoted 15 lines · Tony Lindgren
Quoted 14 lines · Satish Patel
Quoted 8 lines · Satish Patel
Patch set includes clock and HWMOD entries for AM43x's USIM modoule.
Note: I am in process of mainlining usim driver.
Satish Patel (2):
ARM: dts: AM43xx-clocks: Entries added for ti-usim
ARM: OMAP: AM43xx: HWMOD changes added for ti-usimTony,
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
Can you pull in these patches if there are no comments?
Would like to see acks from Benoit/Tero/Paul first.
Benoit/Tero/Paul:
Can you please review and ack this patch series,
so that tony can pick it up.
NAK, patch #1 is broken.
Quoted 7 lines
Thanks
satishQuoted 4 lines
Regards,
Tony