CCF support for Renesas r7s72100

PATCH Superseded Wolfram Sang 4 participants 33 messages Mar 7, 2014 – Mar 27, 2014

Subsystems (7)

Device tree bindings Arm (32-bit) Arm sub-architectures Common clk +3 more subsystems

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Wolfram Sang

author

2014-03-07 16:00 UTC #0 lore raw

v3 cover CCF support for Renesas r7s72100

This series moves the r7s72100 platfrom from the legacy clock implementation to the common clock framework.

This series has been tested with the renesas-devel-v3.14-rc5-20140307v2 tag. If you want to boot into a console, you have a runtime dependency [1].

Patches 1-5 is the minimal set to activate CCF and get the board booting into a console. Patches 6-8 add SCIF support, 9+10 I2C support, and 11+12 SPI support.

Changes since V2:

Patches 1+3 got updates, patch 12 was not send out last time due to sendmail error.

Patch 1 should probably go via clock tree (it has no dependencies). The rest via shmobile. Please apply.

Wolfram

PS: A tree can be found here with this series only:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/r7s-ccf

And here with a quick hack to make the system bootable:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/r7s-ccf-bootable

[1] http://lkml.org/lkml/2014/2/20/205 ([PATCH V7 0/3] clocksource: Consolidate SH and ARM mach-shmobile Kconfig bits)

Wolfram Sang (12):
clk: shmobile: add CPG driver for rz-platforms
ARM: shmobile: r7s72100: document MSTP clock support
ARM: shmobile: r7s72100: add essential clock nodes to dtsi
ARM: shmobile: r7s72100: genmai: populate nodes for external clocks
ARM: shmobile: r7s72100: use workaround for non DT-clocks
ARM: shmobile: r7s72100: add scif nodes to dtsi
ARM: shmobile: r7s72100: genmai: activate scif2 for console output
ARM: shmobile: r7s72100: genmai: platform scif devices only for legacy
support
ARM: shmobile: r7s72100: add i2c clocks to dtsi
ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock
support
ARM: shmobile: r7s72100: add spi clocks to dtsi
ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock
support

 .../bindings/clock/renesas,cpg-mstp-clocks.txt     |   1 +
 .../bindings/clock/renesas,rz-cpg-clocks.txt       |  29 +++
 arch/arm/boot/dts/r7s72100-genmai-reference.dts    |  12 ++
 arch/arm/boot/dts/r7s72100.dtsi                    | 223 ++++++++++++++++++++-
 arch/arm/mach-shmobile/board-genmai-reference.c    |  14 +-
 arch/arm/mach-shmobile/board-genmai.c              |  44 ++++
 arch/arm/mach-shmobile/clock-r7s72100.c            |   9 -
 arch/arm/mach-shmobile/setup-r7s72100.c            |  43 ----
 drivers/clk/shmobile/Makefile                      |   1 +
 drivers/clk/shmobile/clk-rz.c                      | 103 ++++++++++
 include/dt-bindings/clock/r7s72100-clock.h         |  40 ++++
 11 files changed, 464 insertions(+), 55 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
 create mode 100644 drivers/clk/shmobile/clk-rz.c
 create mode 100644 include/dt-bindings/clock/r7s72100-clock.h

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #1 lore raw

PATCH v3 1/12 clk: shmobile: add CPG driver for rz-platforms

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---

Changes since V2:

* Document the input clocks for r7s72100
* revamp and simplify the error paths of the driver

Changes since V1:
* added docs
* preparation for usb_x1 support by documenting two input clocks
* static-consted frqcr_tab
* bail out if num_clks == 0
* cosmetic fixes

Mike: if you are fine with this driver, it would be good if you could apply it. Then, we can deal with the orthogonal dependencies in mach-shmobile seperately and know that the driver is already in place when the rest gets resolved. Thanks!

 .../bindings/clock/renesas,rz-cpg-clocks.txt       |  29 ++++++
 drivers/clk/shmobile/Makefile                      |   1 +
 drivers/clk/shmobile/clk-rz.c                      | 103 +++++++++++++++++++++
 3 files changed, 133 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
 create mode 100644 drivers/clk/shmobile/clk-rz.c

Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt new file +29 -0

new file mode 100644
index 000000000000..98a257492522
@@ -0,0 +1,29 @@
+* Renesas RZ Clock Pulse Generator (CPG)
+
+The CPG generates core clocks for the RZ SoCs. It includes the PLL, variable
+CPU and GPU clocks, and several fixed ratio dividers.
+
+Required Properties:
+
+  - compatible: Must be one of
+    - "renesas,r7s72100-cpg-clocks" for the r7s72100 CPG
+    - "renesas,rz-cpg-clocks" for the generic RZ CPG
+  - reg: Base address and length of the memory resource used by the CPG
+  - clocks: References to possible parent clocks. Order must match clock modes
+    in the datasheet. For the r7s72100, this is extal, usb_x1.
+  - #clock-cells: Must be 1
+  - clock-output-names: The names of the clocks. Supported clocks are "pll",
+    "i", and "g"
+
+
+Example
+-------
+
+	cpg_clocks: cpg_clocks at fcfe0000 {
+		#clock-cells = <1>;
+		compatible = "renesas,r7s72100-cpg-clocks",
+			     "renesas,rz-cpg-clocks";
+		reg = <0xfcfe0000 0x18>;
+		clocks = <&extal_clk>, <&usb_x1_clk>;
+		clock-output-names = "pll", "i", "g";
+	};

drivers/clk/shmobile/Makefile +1 -0

index 9ecef140dba7..5404cb931ebf 100644
@@ -1,4 +1,5 @@
 obj-$(CONFIG_ARCH_EMEV2)		+= clk-emev2.o
+obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o
 obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o
 obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o
 obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-div6.o

drivers/clk/shmobile/clk-rz.c new file +103 -0

103 lines not on this page · raw message

Signature · 1 line

1.9.0

Mike Turquette

2014-03-21 01:26 UTC #2 lore raw

PATCH v3 1/12 clk: shmobile: add CPG driver for rz-platforms

Quoting Wolfram Sang (2014-03-07 08:00:37)

Quoted 17 lines

From: Wolfram Sang <[email protected]>
Signed-off-by Wolfram Sang <[email protected]>
---
Changes since V2:
* Document the input clocks for r7s72100
* revamp and simplify the error paths of the driver
Changes since V1:
* added docs
* preparation for usb_x1 support by documenting two input clocks
* static-consted frqcr_tab
* bail out if num_clks == 0
* cosmetic fixes

Quoted 4 lines

Mike: if you are fine with this driver, it would be good if you could apply it. Then, we can deal with the orthogonal dependencies in mach-shmobile seperately and know that the driver is already in place when the rest gets resolved. Thanks!

Taken into clk-next.

Regards,
Mike

Quoted 165 lines

 .../bindings/clock/renesas,rz-cpg-clocks.txt       |  29 ++++++
 drivers/clk/shmobile/Makefile                      |   1 +
 drivers/clk/shmobile/clk-rz.c                      | 103 +++++++++++++++++++++
 3 files changed, 133 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
 create mode 100644 drivers/clk/shmobile/clk-rz.c

Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt new file +29 -0

new file mode 100644
index 000000000000..98a257492522
@@ -0,0 +1,29 @@
+* Renesas RZ Clock Pulse Generator (CPG)
+
+The CPG generates core clocks for the RZ SoCs. It includes the PLL, variable
+CPU and GPU clocks, and several fixed ratio dividers.
+
+Required Properties:
+
+  - compatible: Must be one of
+    - "renesas,r7s72100-cpg-clocks" for the r7s72100 CPG
+    - "renesas,rz-cpg-clocks" for the generic RZ CPG
+  - reg: Base address and length of the memory resource used by the CPG
+  - clocks: References to possible parent clocks. Order must match clock modes
+    in the datasheet. For the r7s72100, this is extal, usb_x1.
+  - #clock-cells: Must be 1
+  - clock-output-names: The names of the clocks. Supported clocks are "pll",
+    "i", and "g"
+
+
+Example
+-------
+
+       cpg_clocks: cpg_clocks at fcfe0000 {
+               #clock-cells = <1>;
+               compatible = "renesas,r7s72100-cpg-clocks",
+                            "renesas,rz-cpg-clocks";
+               reg = <0xfcfe0000 0x18>;
+               clocks = <&extal_clk>, <&usb_x1_clk>;
+               clock-output-names = "pll", "i", "g";
+       };

drivers/clk/shmobile/Makefile +1 -0

index 9ecef140dba7..5404cb931ebf 100644
@@ -1,4 +1,5 @@
 obj-$(CONFIG_ARCH_EMEV2)               += clk-emev2.o
+obj-$(CONFIG_ARCH_R7S72100)            += clk-rz.o
 obj-$(CONFIG_ARCH_R8A7790)             += clk-rcar-gen2.o
 obj-$(CONFIG_ARCH_R8A7791)             += clk-rcar-gen2.o
 obj-$(CONFIG_ARCH_SHMOBILE_MULTI)      += clk-div6.o

drivers/clk/shmobile/clk-rz.c new file +103 -0

new file mode 100644
index 000000000000..7e68e8630962
@@ -0,0 +1,103 @@
+/*
+ * rz Core CPG Clocks
+ *
+ * Copyright (C) 2013 Ideas On Board SPRL
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+struct rz_cpg {
+       struct clk_onecell_data data;
+       void __iomem *reg;
+};
+
+#define CPG_FRQCR      0x10
+#define CPG_FRQCR2     0x14
+
+/* -----------------------------------------------------------------------------
+ * Initialization
+ */
+
+static struct clk * __init
+rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *name)
+{
+       u32 val;
+       unsigned mult;
+       static const unsigned frqcr_tab[4] = { 3, 2, 0, 1 };
+
+       if (strcmp(name, "pll") == 0) {
+               /* FIXME: cpg_mode should be read from GPIO. But no GPIO support yet */
+               unsigned cpg_mode = 0; /* hardcoded to EXTAL for now */
+               const char *parent_name = of_clk_get_parent_name(np, cpg_mode);
+
+               mult = cpg_mode ? (32 / 4) : 30;
+
+               return clk_register_fixed_factor(NULL, name, parent_name, 0, mult, 1);
+       }
+
+       /* If mapping regs failed, skip non-pll clocks. System will boot anyhow */
+       if (!cpg->reg)
+               return ERR_PTR(-ENXIO);
+
+       /* FIXME:"i" and "g" are variable clocks with non-integer dividers (e.g. 2/3)
+        * and the constraint that always g <= i. To get the rz platform started,
+        * let them run at fixed current speed and implement the details later.
+        */
+       if (strcmp(name, "i") == 0)
+               val = (clk_readl(cpg->reg + CPG_FRQCR) >> 8) & 3;
+       else if (strcmp(name, "g") == 0)
+               val = clk_readl(cpg->reg + CPG_FRQCR2) & 3;
+       else
+               return ERR_PTR(-EINVAL);
+
+       mult = frqcr_tab[val];
+       return clk_register_fixed_factor(NULL, name, "pll", 0, mult, 3);
+}
+
+static void __init rz_cpg_clocks_init(struct device_node *np)
+{
+       struct rz_cpg *cpg;
+       struct clk **clks;
+       unsigned i;
+       int num_clks;
+
+       num_clks = of_property_count_strings(np, "clock-output-names");
+       if (WARN(num_clks <= 0, "can't count CPG clocks\n"))
+               return;
+
+       cpg = kzalloc(sizeof(*cpg), GFP_KERNEL);
+       clks = kzalloc(num_clks * sizeof(*clks), GFP_KERNEL);
+       BUG_ON(!cpg || !clks);
+
+       cpg->data.clks = clks;
+       cpg->data.clk_num = num_clks;
+
+       cpg->reg = of_iomap(np, 0);
+
+       for (i = 0; i < num_clks; ++i) {
+               const char *name;
+               struct clk *clk;
+
+               of_property_read_string_index(np, "clock-output-names", i, &name);
+
+               clk = rz_cpg_register_clock(np, cpg, name);
+               if (IS_ERR(clk))
+                       pr_err("%s: failed to register %s %s clock (%ld)\n",
+                              __func__, np->name, name, PTR_ERR(clk));
+               else
+                       cpg->data.clks[i] = clk;
+       }
+
+       of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);
+}
+CLK_OF_DECLARE(rz_cpg_clks, "renesas,rz-cpg-clocks", rz_cpg_clocks_init);

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #3 lore raw

PATCH v3 2/12 ARM: shmobile: r7s72100: document MSTP clock support

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---
 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
 1 file changed, 1 insertion(+)

Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt +1 -0

index a6a352c2771e..395b2e8ecfd1 100644
@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
 Required Properties:
 
   - compatible: Must be one of the following
+    - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
     - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
     - "renesas,cpg-mstp-clock" for generic MSTP gate clocks

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #4 lore raw

PATCH v3 3/12 ARM: shmobile: r7s72100: add essential clock nodes to dtsi

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Only essential clocks are added for now. Other clocks will be added when needed.

Signed-off-by Wolfram Sang <[email protected]>

---

Change since V2:

* Use macro to reference the PLL

Changes since V1:
* add usb_x1 clock
* reference usb_x1 to cpg
* improved wording
* #clock-cells consistently first property

 arch/arm/boot/dts/r7s72100.dtsi            | 86 +++++++++++++++++++++++++++++-
 include/dt-bindings/clock/r7s72100-clock.h | 27 ++++++++++
 2 files changed, 112 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/clock/r7s72100-clock.h

arch/arm/boot/dts/r7s72100.dtsi +85 -1

index ee700717a34b..6af5c28c670e 100644
@@ -1,13 +1,15 @@
 /*
  * Device Tree Source for the r7s72100 SoC
  *
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-14 Renesas Solutions Corp.
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <[email protected]>
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/clock/r7s72100-clock.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {

@@ -28,6 +30,88 @@
 		spi4 = &spi4;
 	};
 
+	clocks {
+		ranges;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* External clocks */
+		extal_clk: extal_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			/* If clk present, value must be set by board */
+			clock-frequency = <0>;
+			clock-output-names = "extal";
+		};
+
+		usb_x1_clk: usb_x1_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			/* If clk present, value must be set by board */
+			clock-frequency = <0>;
+			clock-output-names = "usb_x1";
+		};
+
+		/* Special CPG clocks */
+		cpg_clocks: cpg_clocks at fcfe0000 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-cpg-clocks",
+				     "renesas,rz-cpg-clocks";
+			reg = <0xfcfe0000 0x18>;
+			clocks = <&extal_clk>, <&usb_x1_clk>;
+			clock-output-names = "pll", "i", "g";
+		};
+
+		/* Fixed factor clocks */
+		b_clk: b_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+			clock-mult = <1>;
+			clock-div = <3>;
+			clock-output-names = "b";
+		};
+		p1_clk: p1_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+			clock-mult = <1>;
+			clock-div = <6>;
+			clock-output-names = "p1";
+		};
+		p0_clk: p0_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+			clock-mult = <1>;
+			clock-div = <12>;
+			clock-output-names = "p0";
+		};
+
+		/* MSTP clocks */
+		mstp3_clks: mstp3_clks at fcfe0420 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0420 4>;
+			clocks = <&p0_clk>;
+			renesas,clock-indices = <R7S72100_CLK_MTU2>;
+			clock-output-names = "mtu2";
+		};
+
+		mstp4_clks: mstp4_clks at fcfe0424 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0424 4>;
+			clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
+				 <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
+			renesas,clock-indices = <
+				R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
+				R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
+			>;
+			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
+		};
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;

include/dt-bindings/clock/r7s72100-clock.h new file +27 -0

new file mode 100644
index 000000000000..d0e2d91025c2
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__
+#define __DT_BINDINGS_CLOCK_R7S72100_H__
+
+#define R7S72100_CLK_PLL	0
+
+/* MSTP3 */
+#define R7S72100_CLK_MTU2	3
+
+/* MSTP4 */
+#define R7S72100_CLK_SCIF0	7
+#define R7S72100_CLK_SCIF1	6
+#define R7S72100_CLK_SCIF2	5
+#define R7S72100_CLK_SCIF3	4
+#define R7S72100_CLK_SCIF4	3
+#define R7S72100_CLK_SCIF5	2
+#define R7S72100_CLK_SCIF6	1
+#define R7S72100_CLK_SCIF7	0
+
+#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */

Signature · 1 line

1.9.0

Ben Dooks

2014-03-07 16:22 UTC #5 lore raw

PATCH v3 3/12 ARM: shmobile: r7s72100: add essential clock nodes to dtsi

Quoted 14 lines · Wolfram Sang

From: Wolfram Sang <[email protected]>

arch/arm/boot/dts/r7s72100.dtsi +11 -0

+		/* MSTP clocks */
+		mstp3_clks: mstp3_clks at fcfe0420 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0420 4>;
+			clocks = <&p0_clk>;
+			renesas,clock-indices = <R7S72100_CLK_MTU2>;
+			clock-output-names = "mtu2";
+		};
+
+		mstp4_clks: mstp4_clks at fcfe0424 {

arch/arm/boot/dts/r7s72100.dtsi line 111

Quoted 10 lines

arch/arm/boot/dts/r7s72100.dtsi +10 -0

+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0424 4>;
+			clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
+				 <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
+			renesas,clock-indices = <
+				R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
+				R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
+			>;
+			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";

FYI: I'm pushing a patch through to make clock-indices a standard DT property that will allow the of_clk_get_name() function to work properly. With this, the renesas,clock-indices will be replaced with the clock-indices.

Signature · 2 lines

Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genies

Wolfram Sang

author

2014-03-07 16:33 UTC #6 lore raw

PATCH v3 3/12 ARM: shmobile: r7s72100: add essential clock nodes to dtsi

Quoted 5 lines

FYI: I'm pushing a patch through to make clock-indices a standard DT property that will allow the of_clk_get_name() function to work properly. With this, the renesas,clock-indices will be replaced with the clock-indices.

Great, I'll keep an eye on it!

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Wolfram Sang

author

2014-03-07 16:00 UTC #7 lore raw

PATCH v3 4/12 ARM: shmobile: r7s72100: genmai: populate nodes for external clocks

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100-genmai-reference.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

arch/arm/boot/dts/r7s72100-genmai-reference.dts +8 -0

index e664611a47c8..941e72ce7c82 100644
@@ -30,6 +30,14 @@
 	};
 };
 
+&extal_clk {
+	clock-frequency = <13330000>;
+};
+
+&usb_x1_clk {
+	clock-frequency = <48000000>;
+};
+
 &i2c2 {
 	status = "okay";
 	clock-frequency = <400000>;

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #8 lore raw

PATCH v3 5/12 ARM: shmobile: r7s72100: use workaround for non DT-clocks

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

SCIF2 and MTU2 are not yet prepared for DT usage, so use the common workaround via clkdev for now.

Signed-off-by Wolfram Sang <[email protected]>

---
 arch/arm/mach-shmobile/board-genmai-reference.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

arch/arm/mach-shmobile/board-genmai-reference.c +13 -2

index 7630c1053e32..91dcdd0e026d 100644
@@ -18,18 +18,29 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
-#include <linux/clk-provider.h>
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
+#include <mach/clock.h>
 #include <mach/common.h>
 #include <mach/r7s72100.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+#ifdef CONFIG_COMMON_CLK
+/*
+ * This is a really crude hack to provide clkdev support to platform
+ * devices until they get moved to DT.
+ */
+static const struct clk_name clk_names[] = {
+	{ "mtu2", NULL, "sh_mtu2.0" },
+	{ "scif2", NULL, "sh-sci.2" },
+};
+#endif
+
 static void __init genmai_add_standard_devices(void)
 {
 #ifdef CONFIG_COMMON_CLK
-	of_clk_init(NULL);
+	shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), true);
 #else
 	r7s72100_clock_init();
 #endif

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #9 lore raw

PATCH v3 6/12 ARM: shmobile: r7s72100: add scif nodes to dtsi

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100.dtsi | 104 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 104 insertions(+)

arch/arm/boot/dts/r7s72100.dtsi +104 -0

index 6af5c28c670e..d49afe30c1d7 100644
@@ -23,6 +23,14 @@
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
+		serial0 = &scif0;
+		serial1 = &scif1;
+		serial2 = &scif2;
+		serial3 = &scif3;
+		serial4 = &scif4;
+		serial5 = &scif5;
+		serial6 = &scif6;
+		serial7 = &scif7;
 		spi0 = &spi0;
 		spi1 = &spi1;
 		spi2 = &spi2;

@@ -200,6 +208,102 @@
 		status = "disabled";
 	};
 
+	scif0: serial at e8007000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007000 64>;
+		interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 191 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 192 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 189 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif1: serial at e8007800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007800 64>;
+		interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 195 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 196 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 193 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif2: serial at e8008000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008000 64>;
+		interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 199 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 200 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 197 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif3: serial at e8008800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008800 64>;
+		interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 203 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 204 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 201 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif4: serial at e8009000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009000 64>;
+		interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 207 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 208 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 205 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif5: serial at e8009800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009800 64>;
+		interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 211 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 212 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 209 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif6: serial at e800a000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a000 64>;
+		interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 215 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 216 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 213 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif7: serial at e800a800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a800 64>;
+		interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 219 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 220 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 217 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
 	spi0: spi at e800c800 {
 		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 		reg = <0xe800c800 0x24>;

Signature · 1 line

1.9.0

Laurent Pinchart

2014-03-07 16:13 UTC #10 lore raw

PATCH v3 6/12 ARM: shmobile: r7s72100: add scif nodes to dtsi

Hi Wolfram,

Thank you for the patch.

Quoted 13 lines · On Friday 07 March 2014 17:00:42 Wolfram Sang wrote:

From: Wolfram Sang <[email protected]>
Signed-off-by Wolfram Sang <[email protected]>
---
 arch/arm/boot/dts/r7s72100.dtsi | 104 +++++++++++++++++++++++++++++++++++++
 1 file changed, 104 insertions(+)
(quoted diff) +0 -0
b/arch/arm/boot/dts/r7s72100.dtsi index 6af5c28c670e..d49afe30c1d7 100644
arch/arm/boot/dts/r7s72100.dtsi +0 -0
@@ -23,6 +23,14 @@
 		i2c1 = &i2c1;

arch/arm/boot/dts/r7s72100.dtsi line 33

Quoted 10 lines

arch/arm/boot/dts/r7s72100.dtsi +8 -0

 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
+		serial0 = &scif0;
+		serial1 = &scif1;
+		serial2 = &scif2;
+		serial3 = &scif3;
+		serial4 = &scif4;
+		serial5 = &scif5;
+		serial6 = &scif6;
+		serial7 = &scif7;

As port usages is board specific, shouldn't this be moved to the board .dts file, with only serial0 = &scif2 ?

Quoted 106 lines

arch/arm/boot/dts/r7s72100.dtsi +96 -0

 		spi0 = &spi0;
 		spi1 = &spi1;
 		spi2 = &spi2;

@@ -200,6 +208,102 @@
 		status = "disabled";
 	};
 
+	scif0: serial at e8007000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007000 64>;
+		interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 191 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 192 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 189 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif1: serial at e8007800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007800 64>;
+		interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 195 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 196 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 193 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif2: serial at e8008000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008000 64>;
+		interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 199 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 200 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 197 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif3: serial at e8008800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008800 64>;
+		interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 203 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 204 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 201 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif4: serial at e8009000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009000 64>;
+		interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 207 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 208 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 205 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif5: serial at e8009800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009800 64>;
+		interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 211 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 212 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 209 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif6: serial at e800a000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a000 64>;
+		interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 215 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 216 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 213 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif7: serial at e800a800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a800 64>;
+		interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 219 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 220 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 217 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
 	spi0: spi at e800c800 {
 		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 		reg = <0xe800c800 0x24>;

Signature · 3 lines

Regards,

Laurent Pinchart

Wolfram Sang

author

2014-03-07 16:25 UTC #11 lore raw

PATCH v3 6/12 ARM: shmobile: r7s72100: add scif nodes to dtsi

Quoted 12 lines

Quoted 12 lines
(quoted diff) +0 -0
b/arch/arm/boot/dts/r7s72100.dtsi index 6af5c28c670e..d49afe30c1d7 100644
arch/arm/boot/dts/r7s72100.dtsi +3 -0
@@ -23,6 +23,14 @@
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
+		serial0 = &scif0;
+		serial1 = &scif1;
+		serial2 = &scif2;

Quoted 8 lines

arch/arm/boot/dts/r7s72100.dtsi line 33
Quoted 5 lines
arch/arm/boot/dts/r7s72100.dtsi +5 -0
+		serial3 = &scif3;
+		serial4 = &scif4;
+		serial5 = &scif5;
+		serial6 = &scif6;
+		serial7 = &scif7;
As port usages is board specific, shouldn't this be moved to the board .dts file, with only serial0 = &scif2 ?

Nope, the intention of these aliases is to have a consistent numbering of SCIF cores, similar to platform.dev_id.

Laurent Pinchart

2014-03-07 16:37 UTC #12 lore raw

PATCH v3 6/12 ARM: shmobile: r7s72100: add scif nodes to dtsi

Hi Wolfram,

Quoted 21 lines · On Friday 07 March 2014 17:25:10 Wolfram Sang wrote:

Quoted 12 lines
Quoted 12 lines
(quoted diff) +0 -0
b/arch/arm/boot/dts/r7s72100.dtsi index 6af5c28c670e..d49afe30c1d7 100644
arch/arm/boot/dts/r7s72100.dtsi +3 -0
@@ -23,6 +23,14 @@
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
+		serial0 = &scif0;
+		serial1 = &scif1;
+		serial2 = &scif2;
Quoted 8 lines
arch/arm/boot/dts/r7s72100.dtsi line 33
Quoted 5 lines
arch/arm/boot/dts/r7s72100.dtsi +5 -0
+		serial3 = &scif3;
+		serial4 = &scif4;
+		serial5 = &scif5;
+		serial6 = &scif6;
+		serial7 = &scif7;
As port usages is board specific, shouldn't this be moved to the board .dts file, with only serial0 = &scif2 ?

Quoted 2 lines

Nope, the intention of these aliases is to have a consistent numbering of SCIF cores, similar to platform.dev_id.

But do we want that ? Isn't it better from a user point of view to have ttySC0 regardless of whether scif2 or scif3 is used when the board has a single serial port only ?

Signature · 10 lines

Regards,

Laurent Pinchart
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Wolfram Sang

author

2014-03-07 16:44 UTC #13 lore raw

PATCH v3 6/12 ARM: shmobile: r7s72100: add scif nodes to dtsi

Quoted 10 lines

Quoted 6 lines
Quoted 3 lines
As port usages is board specific, shouldn't this be moved to the board .dts file, with only serial0 = &scif2 ?
Nope, the intention of these aliases is to have a consistent numbering of SCIF cores, similar to platform.dev_id.
But do we want that ? Isn't it better from a user point of view to have ttySC0 regardless of whether scif2 or scif3 is used when the board has a single serial port only ?

Some prefer this, some that. The current standard pattern is what I implemented. I think consistency makes sense for my series. If you like to prefer another pattern, please start a discussion at the devicetree list.

Laurent Pinchart

2014-03-07 16:48 UTC #14 lore raw

PATCH v3 6/12 ARM: shmobile: r7s72100: add scif nodes to dtsi

Hi Wolfram,

Quoted 6 lines · On Friday 07 March 2014 17:44:27 Wolfram Sang wrote:

Quoted 6 lines
Quoted 5 lines
Quoted 2 lines
As port usages is board specific, shouldn't this be moved to the board .dts file, with only serial0 = &scif2 ?
Nope, the intention of these aliases is to have a consistent numbering of SCIF cores, similar to platform.dev_id.

Quoted 7 lines

Quoted 3 lines
But do we want that ? Isn't it better from a user point of view to have ttySC0 regardless of whether scif2 or scif3 is used when the board has a single serial port only ?
Some prefer this, some that. The current standard pattern is what I implemented. I think consistency makes sense for my series. If you like to prefer another pattern, please start a discussion at the devicetree list.

When you say standard pattern, do you mean the practice followed by most .dts in mainline, or is there an actual document that recommends this pattern ?

Signature · 10 lines

Regards,

Laurent Pinchart
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Wolfram Sang

author

2014-03-07 16:48 UTC #15 lore raw

PATCH v3 6/12 ARM: shmobile: r7s72100: add scif nodes to dtsi

Quoted 3 lines

When you say standard pattern, do you mean the practice followed by most .dts in mainline, or is there an actual document that recommends this pattern ?

I mean the first. There might be the latter, don't know.

Wolfram Sang

author

2014-03-07 16:00 UTC #16 lore raw

PATCH v3 7/12 ARM: shmobile: r7s72100: genmai: activate scif2 for console output

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100-genmai-reference.dts | 4 ++++
 1 file changed, 4 insertions(+)

arch/arm/boot/dts/r7s72100-genmai-reference.dts +4 -0

index 941e72ce7c82..82901a2cd947 100644
@@ -48,3 +48,7 @@
 		pagesize = <64>;
 	};
 };
+
+&scif2 {
+	status = "okay";
+};

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #17 lore raw

PATCH v3 8/12 ARM: shmobile: r7s72100: genmai: platform scif devices only for legacy support

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

We have now DT support for SCIF, so use the platform_device initialization only for the legacy support.

Signed-off-by Wolfram Sang <[email protected]>

---
 arch/arm/mach-shmobile/board-genmai-reference.c |  1 -
 arch/arm/mach-shmobile/board-genmai.c           | 44 +++++++++++++++++++++++++
 arch/arm/mach-shmobile/setup-r7s72100.c         | 43 ------------------------
 3 files changed, 44 insertions(+), 44 deletions(-)

arch/arm/mach-shmobile/board-genmai-reference.c +0 -1

index 91dcdd0e026d..fde558b66d4e 100644
@@ -33,7 +33,6 @@
  */
 static const struct clk_name clk_names[] = {
 	{ "mtu2", NULL, "sh_mtu2.0" },
-	{ "scif2", NULL, "sh-sci.2" },
 };
 #endif

arch/arm/mach-shmobile/board-genmai.c +44 -0

62 lines not on this page · raw message

arch/arm/mach-shmobile/setup-r7s72100.c +0 ~~-43~~

61 lines not on this page · raw message

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #18 lore raw

PATCH v3 9/12 ARM: shmobile: r7s72100: add i2c clocks to dtsi

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100.dtsi            | 15 +++++++++++++++
 include/dt-bindings/clock/r7s72100-clock.h |  6 ++++++
 2 files changed, 21 insertions(+)

arch/arm/boot/dts/r7s72100.dtsi +15 -0

index d49afe30c1d7..9f7a06dc5e30 100644
@@ -118,6 +118,17 @@
 			>;
 			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
 		};
+
+		mstp9_clks: mstp9_clks at fcfe0438 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0438 4>;
+			clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
+			renesas,clock-indices = <
+				R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
+			>;
+			clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
+		};
 	};
 
 	cpus {

@@ -153,6 +164,7 @@
 			     <0 162 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 163 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 164 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};

@@ -170,6 +182,7 @@
 			     <0 170 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 171 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 172 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};

@@ -187,6 +200,7 @@
 			     <0 178 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 179 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 180 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};

@@ -204,6 +218,7 @@
 			     <0 186 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 187 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 188 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};

include/dt-bindings/clock/r7s72100-clock.h +6 -0

index d0e2d91025c2..b412bb2c93b1 100644
@@ -24,4 +24,10 @@
 #define R7S72100_CLK_SCIF6	1
 #define R7S72100_CLK_SCIF7	0
 
+/* MSTP9 */
+#define R7S72100_CLK_I2C0	7
+#define R7S72100_CLK_I2C1	6
+#define R7S72100_CLK_I2C2	5
+#define R7S72100_CLK_I2C3	4
+
 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #19 lore raw

PATCH v3 10/12 ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock support

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Not used anymore since we switched to CCF.

Signed-off-by Wolfram Sang <[email protected]>

---
 arch/arm/mach-shmobile/clock-r7s72100.c | 4 ----
 1 file changed, 4 deletions(-)

arch/arm/mach-shmobile/clock-r7s72100.c +0 -4

index 7998ce3c8f0e..31148c1acc07 100644
@@ -199,10 +199,6 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
 	CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
 	CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
-	CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
-	CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
-	CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
-	CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
 	CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
 	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #20 lore raw

PATCH v3 11/12 ARM: shmobile: r7s72100: add spi clocks to dtsi

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Signed-off-by Wolfram Sang <[email protected]>

Acked-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r7s72100.dtsi            | 18 ++++++++++++++++++
 include/dt-bindings/clock/r7s72100-clock.h |  7 +++++++
 2 files changed, 25 insertions(+)

arch/arm/boot/dts/r7s72100.dtsi +18 -0

index 9f7a06dc5e30..3575c0f86eda 100644
@@ -129,6 +129,19 @@
 			>;
 			clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
 		};
+
+		mstp10_clks: mstp10_clks at fcfe043c {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe043c 4>;
+			clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
+				 <&p1_clk>;
+			renesas,clock-indices = <
+				R7S72100_CLK_SPI0 R7S72100_CLK_SPI1 R7S72100_CLK_SPI2 R7S72100_CLK_SPI3
+				R7S72100_CLK_SPI4
+			>;
+			clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
+		};
 	};
 
 	cpus {

@@ -326,6 +339,7 @@
 			     <0 239 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 240 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;

@@ -339,6 +353,7 @@
 			     <0 242 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 243 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;

@@ -352,6 +367,7 @@
 			     <0 245 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 246 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;

@@ -365,6 +381,7 @@
 			     <0 248 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 249 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;

@@ -378,6 +395,7 @@
 			     <0 251 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 252 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;

include/dt-bindings/clock/r7s72100-clock.h +7 -0

index b412bb2c93b1..5cb969fa4931 100644
@@ -30,4 +30,11 @@
 #define R7S72100_CLK_I2C2	5
 #define R7S72100_CLK_I2C3	4
 
+/* MSTP10 */
+#define R7S72100_CLK_SPI0	7
+#define R7S72100_CLK_SPI1	6
+#define R7S72100_CLK_SPI2	5
+#define R7S72100_CLK_SPI3	4
+#define R7S72100_CLK_SPI4	3
+
 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */

Signature · 1 line

1.9.0

Wolfram Sang

author

2014-03-07 16:00 UTC #21 lore raw

PATCH v3 12/12 ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock support

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Not used anymore since we switched to CCF.

Signed-off-by Wolfram Sang <[email protected]>

---
 arch/arm/mach-shmobile/clock-r7s72100.c | 5 -----
 1 file changed, 5 deletions(-)

arch/arm/mach-shmobile/clock-r7s72100.c +0 -5

index 31148c1acc07..b60543ec442b 100644
@@ -194,11 +194,6 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
 	CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
 	CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
-	CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
-	CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
-	CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
-	CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
-	CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
 	CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
 	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),

Signature · 1 line

1.9.0

Laurent Pinchart

2014-03-07 16:14 UTC #22 lore raw

v3 cover CCF support for Renesas r7s72100

In reply to Wolfram Sang

Hi Wolfram,

Thank you for the patches.

Beside the comment to patch 06/12, I would have moved patches 06/12 to 08/12 to the beginning of the series, in order to avoid adding a clock workaround for the serial clock only to remove it a couple of patches later.

Oh, and one might ask you to fix the 80 columns checkpatch warnings for patch 01/12 :-)

Quoted 67 lines · On Friday 07 March 2014 17:00:36 Wolfram Sang wrote:

This series moves the r7s72100 platfrom from the legacy clock implementation to the common clock framework.
This series has been tested with the renesas-devel-v3.14-rc5-20140307v2 tag. If you want to boot into a console, you have a runtime dependency [1].
Patches 1-5 is the minimal set to activate CCF and get the board booting into a console. Patches 6-8 add SCIF support, 9+10 I2C support, and 11+12 SPI support.
Changes since V2:
Patches 1+3 got updates, patch 12 was not send out last time due to sendmail error.
Patch 1 should probably go via clock tree (it has no dependencies). The rest via shmobile. Please apply.
Wolfram
PS: A tree can be found here with this series only:
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/r7s-ccf
And here with a quick hack to make the system bootable:
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git
renesas/r7s-ccf-bootable
[1] http://lkml.org/lkml/2014/2/20/205 ([PATCH V7 0/3] clocksource:
Consolidate SH and ARM mach-shmobile Kconfig bits)
Wolfram Sang (12):
clk: shmobile: add CPG driver for rz-platforms
ARM: shmobile: r7s72100: document MSTP clock support
ARM: shmobile: r7s72100: add essential clock nodes to dtsi
ARM: shmobile: r7s72100: genmai: populate nodes for external clocks
ARM: shmobile: r7s72100: use workaround for non DT-clocks
ARM: shmobile: r7s72100: add scif nodes to dtsi
ARM: shmobile: r7s72100: genmai: activate scif2 for console output
ARM: shmobile: r7s72100: genmai: platform scif devices only for legacy
support
ARM: shmobile: r7s72100: add i2c clocks to dtsi
ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock
support
ARM: shmobile: r7s72100: add spi clocks to dtsi
ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock
support
 .../bindings/clock/renesas,cpg-mstp-clocks.txt     |   1 +
 .../bindings/clock/renesas,rz-cpg-clocks.txt       |  29 +++
 arch/arm/boot/dts/r7s72100-genmai-reference.dts    |  12 ++
 arch/arm/boot/dts/r7s72100.dtsi                    | 223
++++++++++++++++++++- arch/arm/mach-shmobile/board-genmai-reference.c    | 
14 +-
 arch/arm/mach-shmobile/board-genmai.c              |  44 ++++
 arch/arm/mach-shmobile/clock-r7s72100.c            |   9 -
 arch/arm/mach-shmobile/setup-r7s72100.c            |  43 ----
 drivers/clk/shmobile/Makefile                      |   1 +
 drivers/clk/shmobile/clk-rz.c                      | 103 ++++++++++
 include/dt-bindings/clock/r7s72100-clock.h         |  40 ++++
 11 files changed, 464 insertions(+), 55 deletions(-)
 create mode 100644
Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt create
mode 100644 drivers/clk/shmobile/clk-rz.c
 create mode 100644 include/dt-bindings/clock/r7s72100-clock.h

Signature · 3 lines

Regards,

Laurent Pinchart

Wolfram Sang

author

2014-03-07 16:29 UTC #23 lore raw

v3 cover CCF support for Renesas r7s72100

Hi Laurent,

Quoted 3 lines

Beside the comment to patch 06/12, I would have moved patches 06/12 to 08/12 to the beginning of the series, in order to avoid adding a clock workaround for the serial clock only to remove it a couple of patches later.

That would have saved only 2 lines since we need the workaround anyhow (MTU2) and would break the incremental approach of this series somewhat. I'd like to keep it.

Quoted 2 lines

Oh, and one might ask you to fix the 80 columns checkpatch warnings for patch 01/12 :-)

Broken intentionally for the sake of readability :)

Thanks,

Wolfram

Laurent Pinchart

2014-03-07 16:36 UTC #24 lore raw

v3 cover CCF support for Renesas r7s72100

Hi Wolfram,

Quoted 10 lines · On Friday 07 March 2014 17:29:47 Wolfram Sang wrote:

Hi Laurent,
Quoted 4 lines
Beside the comment to patch 06/12, I would have moved patches 06/12 to 08/12 to the beginning of the series, in order to avoid adding a clock workaround for the serial clock only to remove it a couple of patches later.
That would have saved only 2 lines since we need the workaround anyhow (MTU2) and would break the incremental approach of this series somewhat. I'd like to keep it.

It would have saved one patch. If Simon needs to apply CCF support separately I'm fine with that approach, but if both changes are applied at the same time the SCIF patches could go in first.

Quoted 4 lines

Quoted 2 lines
Oh, and one might ask you to fix the 80 columns checkpatch warnings for patch 01/12 :-)
Broken intentionally for the sake of readability :)

Signature · 10 lines

Regards,

Laurent Pinchart
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Wolfram Sang

author

2014-03-07 16:47 UTC #25 lore raw

v3 cover CCF support for Renesas r7s72100

Quoted 8 lines

Quoted 4 lines
That would have saved only 2 lines since we need the workaround anyhow (MTU2) and would break the incremental approach of this series somewhat. I'd like to keep it.
It would have saved one patch. If Simon needs to apply CCF support separately I'm fine with that approach, but if both changes are applied at the same time the SCIF patches could go in first.

Which one would be saved? We need to workaround anyhow (patch 5) and some scif cleanup besides the workaround is needed, too (patch 7). No?

Laurent Pinchart

2014-03-07 16:59 UTC #26 lore raw

v3 cover CCF support for Renesas r7s72100

Quoted 10 lines · On Friday 07 March 2014 17:47:41 Wolfram Sang wrote:

Quoted 7 lines
Quoted 3 lines
That would have saved only 2 lines since we need the workaround anyhow (MTU2) and would break the incremental approach of this series somewhat. I'd like to keep it.
It would have saved one patch. If Simon needs to apply CCF support separately I'm fine with that approach, but if both changes are applied at the same time the SCIF patches could go in first.
Which one would be saved? We need to workaround anyhow (patch 5) and some scif cleanup besides the workaround is needed, too (patch 7). No?

Indeed, I got it wrong. We can leave it as-is then.

Signature · 10 lines

Regards,

Laurent Pinchart
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Wolfram Sang

author

2014-03-10 07:27 UTC #27 lore raw

v3 cover CCF support for Renesas r7s72100

Quoted 2 lines

Indeed, I got it wrong. We can leave it as-is then.

Great. So I guess, this series can be applied now?

Laurent Pinchart

2014-03-10 11:59 UTC #28 lore raw

v3 cover CCF support for Renesas r7s72100

Hi Wolfram,

Quoted 3 lines · On Monday 10 March 2014 08:27:19 Wolfram Sang wrote:

Quoted 1 line
Indeed, I got it wrong. We can leave it as-is then.
Great. So I guess, this series can be applied now?

There's just the issue of serial port aliases left. I've started a discussion about that on the DT mailing list (you've been CC'ed).

Signature · 10 lines

Regards,

Laurent Pinchart
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Wolfram Sang

author

2014-03-27 06:46 UTC #29 lore raw

v3 cover CCF support for Renesas r7s72100

Quoted 9 lines · Laurent Pinchart

Hi Wolfram,
Quoted 3 lines · On Monday 10 March 2014 08:27:19 Wolfram Sang wrote:
Quoted 1 line
Indeed, I got it wrong. We can leave it as-is then.
Great. So I guess, this series can be applied now?
There's just the issue of serial port aliases left. I've started a discussion about that on the DT mailing list (you've been CC'ed).

So, how to proceed with this series?

Laurent Pinchart

2014-03-27 10:56 UTC #30 lore raw

v3 cover CCF support for Renesas r7s72100

Hi Wolfram,

Quoted 10 lines · On Thursday 27 March 2014 07:46:43 Wolfram Sang wrote:

Quoted 7 lines · Laurent Pinchart
Quoted 3 lines · On Monday 10 March 2014 08:27:19 Wolfram Sang wrote:
Quoted 1 line
Indeed, I got it wrong. We can leave it as-is then.
Great. So I guess, this series can be applied now?
There's just the issue of serial port aliases left. I've started a discussion about that on the DT mailing list (you've been CC'ed).
So, how to proceed with this series?

Could you please ping the DT maintainers to revive the discussion ?

Signature · 10 lines

Regards,

Laurent Pinchart
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Wolfram Sang

author

2014-03-27 11:36 UTC #31 lore raw

v3 cover CCF support for Renesas r7s72100

Quoted 11 lines

Quoted 9 lines
Quoted 7 lines
Quoted 4 lines
Quoted 2 lines
Indeed, I got it wrong. We can leave it as-is then.
Great. So I guess, this series can be applied now?
There's just the issue of serial port aliases left. I've started a discussion about that on the DT mailing list (you've been CC'ed).
So, how to proceed with this series?
Could you please ping the DT maintainers to revive the discussion ?

I don't think I am the right person to ping, because I don't know what you are precisely looking for from them.

Laurent Pinchart

2014-03-27 12:50 UTC #32 lore raw

v3 cover CCF support for Renesas r7s72100

Quoted 7 lines · On Thursday 27 March 2014 12:36:33 Wolfram Sang wrote:

Quoted 7 lines
Quoted 7 lines
Quoted 6 lines
Quoted 3 lines
Quoted 1 line
Indeed, I got it wrong. We can leave it as-is then.
Great. So I guess, this series can be applied now?
There's just the issue of serial port aliases left. I've started a discussion about that on the DT mailing list (you've been CC'ed).

Quoted 6 lines

Quoted 3 lines
Quoted 1 line
So, how to proceed with this series?
Could you please ping the DT maintainers to revive the discussion ?
I don't think I am the right person to ping, because I don't know what you are precisely looking for from them.

I've pinged them.

Signature · 10 lines

Regards,

Laurent Pinchart
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