Armada 380 NAND support
Subsystems (4)
cover Armada 380 NAND support
This patchset adds support for the NAND on Armada 380/385 SoCs.
The first patch adds a new "armada-380-corediv-clock" compatible string, with its proper SoC-specific structure, adding the register layout for this SoC family.
The second and third patches add the devicetree changes to support the Core Divider clock.
After adding its clock source, the fourth and fifth patches add the NAND devicetree changes. The NAND controller is compatible with the Armada 370 controller, so we are currently support it using the same compatible string.
The last patch updates the binding documentation for the Core Divider clock, which is missing the information about the already supported Armada 375 compatible string.
This series is based on linux-next 20140307. I expect it will apply cleanly on v3.15-rc1; if that's not the case, I'll send a rebased patchset.
The clock and devicetree changes are mostly independent so they can be merged through the clock and mvebu tree respectively.
Ezequiel Garcia (6):
clk: mvebu: Support Armada 380 SoC on the core divider clock
ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
ARM: mvebu: Add support for NAND controller in Armada 38x SoC
ARM: mvebu: Enable NAND controller in Armada 385-DB
clk: mvebu: Update binding documentation for the core divider clock
.../bindings/clock/mvebu-corediv-clock.txt | 5 ++++- arch/arm/boot/dts/armada-385-db.dts | 21 ++++++++++++++++++ arch/arm/boot/dts/armada-38x.dtsi | 25 ++++++++++++++++++++++ drivers/clk/mvebu/clk-corediv.c | 23 ++++++++++++++++++++ 4 files changed, 73 insertions(+), 1 deletion(-)
Signature · 1 line
1.9.0
PATCH 1/6 clk: mvebu: Support Armada 380 SoC on the core divider clock
This commit adds support for the Core Divider clocks of the Armada 380 SoCs. Similarly to Armada 370 and XP, the Core Divider clocks of the 380 have gate capabilities. The only difference is the register layout.
--- drivers/clk/mvebu/clk-corediv.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
drivers/clk/mvebu/clk-corediv.c +23 -0
@@ -204,6 +204,22 @@ static const struct clk_corediv_soc_desc armada370_corediv_soc = { .ratio_offset = 0x8, }; +static const struct clk_corediv_soc_desc armada380_corediv_soc = { + .descs = mvebu_corediv_desc, + .ndescs =ARRAY_SIZE (mvebu_corediv_desc), + .ops = { + .enable = clk_corediv_enable, + .disable = clk_corediv_disable, + .is_enabled = clk_corediv_is_enabled, + .recalc_rate = clk_corediv_recalc_rate, + .round_rate = clk_corediv_round_rate, + .set_rate = clk_corediv_set_rate, + }, + .ratio_reload =BIT (8 ), + .enable_bit_offset =16 , + .ratio_offset =0x4 , +}; +static const struct clk_corediv_soc_desc armada375_corediv_soc = { .descs = mvebu_corediv_desc, .ndescs =ARRAY_SIZE (mvebu_corediv_desc),
@@ -290,3 +306,10 @@ static void __init armada375_corediv_clk_init(struct device_node *node) }CLK_OF_DECLARE (armada375_corediv_clk,"marvell,armada-375-corediv-clock" , armada375_corediv_clk_init); + +static void __init armada380_corediv_clk_init (struct device_node *node) +{ +return mvebu_corediv_clk_init (node, &armada380_corediv_soc); +} +CLK_OF_DECLARE (armada380_corediv_clk,"marvell,armada-380-corediv-clock" , + armada380_corediv_clk_init);
Signature · 1 line
1.9.0
PATCH 2/6 ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
In reply to Ezequiel GarciaArmada 38x SoCs have a 2 GHz fixed main PLL that is used to feed other clocks. This commit adds a DT representation of this clock through a fixed-clock compatible node.
--- arch/arm/boot/dts/armada-38x.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
arch/arm/boot/dts/armada-38x.dtsi +7 -0
@@ -341,6 +341,13 @@ }; clocks { + /* 2 GHz fixed main PLL */ + mainpll: mainpll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <2000000000>; + }; + /* 25 MHz reference crystal */ refclk: oscillator { compatible = "fixed-clock";
Signature · 1 line
1.9.0
PATCH 3/6 ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
In reply to Ezequiel GarciaThe Armada 38x SoC family has a clock provider called "Core Divider", derived from the fixed 2 GHz main PLL clock. This is similar to the one on A370, A375 and AXP.
--- arch/arm/boot/dts/armada-38x.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
arch/arm/boot/dts/armada-38x.dtsi +8 -0
@@ -337,6 +337,14 @@ compatible = "marvell,orion-mdio"; reg = <0x72004 0x4>; }; + + coredivclk: corediv-clock at e4250 { + compatible = "marvell,armada-380-corediv-clock"; + reg = <0xe4250 0xc>; + #clock-cells = <1>; + clocks = <&mainpll>; + clock-output-names = "nand"; + }; }; };
Signature · 1 line
1.9.0
PATCH 4/6 ARM: mvebu: Add support for NAND controller in Armada 38x SoC
In reply to Ezequiel GarciaThe Armada 38x SoC family has a NAND controller, compatible with the controller in Armada 370/375/XP SoCs. Add support for it in the devicetree file.
--- arch/arm/boot/dts/armada-38x.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
arch/arm/boot/dts/armada-38x.dtsi +10 -0
@@ -345,6 +345,16 @@ clocks = <&mainpll>; clock-output-names = "nand"; }; + + nand at d0000 { + compatible = "marvell,armada370-nand"; + reg = <0xd0000 0x54>; + #address-cells = <1>; + #size-cells = <1>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&coredivclk 0>; + status = "disabled"; + }; }; };
Signature · 1 line
1.9.0
PATCH 4/6 ARM: mvebu: Add support for NAND controller in Armada 38x SoC
Hello.
Quoted 14 lines · Ezequiel Garcia
The Armada 38x SoC family has a NAND controller, compatible with the controller in Armada 370/375/XP SoCs. Add support for it in the devicetree file.
Signed-off-by Ezequiel Garcia <[email protected]>--- arch/arm/boot/dts/armada-38x.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)arch/arm/boot/dts/armada-38x.dtsi +0
-0
arch/arm/boot/dts/armada-38x.dtsi line 349
Quoted 5 lines
arch/arm/boot/dts/armada-38x.dtsi +2
-0@@ -345,6 +345,16 @@ clocks = <&mainpll>; clock-output-names = "nand"; }; + + nand@d0000 {
ePAPR standard [1] tells us:
The name of a node should be somewhat generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:
[...]
• flash
[1] http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf
WBR, Sergei
PATCH 4/6 ARM: mvebu: Add support for NAND controller in Armada 38x SoC
Quoted 24 lines · Sergei Shtylyov
Quoted 14 lines · Ezequiel Garcia
The Armada 38x SoC family has a NAND controller, compatible with the controller in Armada 370/375/XP SoCs. Add support for it in the devicetree file.
Signed-off-by Ezequiel Garcia <[email protected]>--- arch/arm/boot/dts/armada-38x.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)arch/arm/boot/dts/armada-38x.dtsi +0
-0arch/arm/boot/dts/armada-38x.dtsi line 349
Quoted 5 lines
arch/arm/boot/dts/armada-38x.dtsi +2
-0@@ -345,6 +345,16 @@ clocks = <&mainpll>; clock-output-names = "nand"; }; + + nand at d0000 {ePAPR standard [1] tells us:
Quoted 7 lines
The name of a node should be somewhat generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:
[...]
? flash
I think 'nand' is generic enough, isn't it?
In any case, it seems sane to distinguish a NAND flash from a NOR flash, from a SPI flash.
FWIW, quite a few other SoCs have chosen 'nand' for the node name, including the other Armada variants. Was this a wrong choice?
Signature · 3 lines
Ezequiel Garc?a, Free Electrons Embedded Linux, Kernel and Android Engineering http://free-electrons.com
PATCH 4/6 ARM: mvebu: Add support for NAND controller in Armada 38x SoC
Quoted 22 lines · Ezequiel Garcia
Quoted 21 lines
Quoted 14 lines
The Armada 38x SoC family has a NAND controller, compatible with the controller in Armada 370/375/XP SoCs. Add support for it in the devicetree file.
Signed-off-by Ezequiel Garcia <[email protected]>--- arch/arm/boot/dts/armada-38x.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)arch/arm/boot/dts/armada-38x.dtsi +0
-0arch/arm/boot/dts/armada-38x.dtsi line 349
Quoted 5 lines
arch/arm/boot/dts/armada-38x.dtsi +2
-0@@ -345,6 +345,16 @@ clocks = <&mainpll>; clock-output-names = "nand"; }; + + nand@d0000 {ePAPR standard [1] tells us:
Quoted 8 lines
Quoted 6 lines
The name of a node should be somewhat generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:
[...]
• flashI think 'nand' is generic enough, isn't it?
It is but not more generic than "flash". :-)
Quoted 2 lines
In any case, it seems sane to distinguish a NAND flash from a NOR flash, from a SPI flash.
I don't know enough about the SPI flashes but this is only a node name, no
more, so I think we can afford to be really generic...
Quoted 2 lines
FWIW, quite a few other SoCs have chosen 'nand' for the node name, including the other Armada variants. Was this a wrong choice?
I guess. There's a lot of wrong choices now all over thearch/arm/boot/dts/ because people are probably not aware of the necessary documentation such as http://devicetree.org/Device_Tree_Usage (pointing to ePAPR and having a passage on the generic device names too).
WBR, Sergei
PATCH 4/6 ARM: mvebu: Add support for NAND controller in Armada 38x SoC
Quoted 28 lines · Sergei Shtylyov
Quoted 25 lines · Ezequiel Garcia
Quoted 25 lines
Quoted 14 lines
The Armada 38x SoC family has a NAND controller, compatible with the controller in Armada 370/375/XP SoCs. Add support for it in the devicetree file.
Signed-off-by Ezequiel Garcia <[email protected]>--- arch/arm/boot/dts/armada-38x.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)arch/arm/boot/dts/armada-38x.dtsi +0
-0arch/arm/boot/dts/armada-38x.dtsi line 349
Quoted 5 lines
arch/arm/boot/dts/armada-38x.dtsi +2
-0@@ -345,6 +345,16 @@ clocks = <&mainpll>; clock-output-names = "nand"; }; + + nand at d0000 {ePAPR standard [1] tells us:
The name of a node should be somewhat generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:
Quoted 7 lines
Quoted 4 lines
Quoted 2 lines
[...]
? flashI think 'nand' is generic enough, isn't it?
It is but not more generic than "flash". :-)
Right.
Quoted 8 lines
Quoted 2 lines
FWIW, quite a few other SoCs have chosen 'nand' for the node name, including the other Armada variants. Was this a wrong choice?
I guess. There's a lot of wrong choices now all over the
arch/arm/boot/dts/because people are probably not aware of the necessary documentation such as http://devicetree.org/Device_Tree_Usage (pointing to ePAPR and having a passage on the generic device names too).
OK, I guess it's fine. Let's try to do things from now on, at least. I'll fix this and send a new series.
Signature · 3 lines
Ezequiel Garc?a, Free Electrons Embedded Linux, Kernel and Android Engineering http://free-electrons.com
PATCH 5/6 ARM: mvebu: Enable NAND controller in Armada 385-DB
In reply to Ezequiel GarciaThe Armada 385-DB board has a NAND flash, so enable it in the devicetree and add the partitions as prepared in the factory images.
--- arch/arm/boot/dts/armada-385-db.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
arch/arm/boot/dts/armada-385-db.dts +21 -0
@@ -80,6 +80,27 @@ reg = <1>; }; }; + + nand: nand at d0000 { + status = "okay"; + num-cs = <1>; + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; + + partition at 0 { + label = "U-Boot"; + reg = <0 0x800000>; + }; + partition at 800000 { + label = "Linux"; + reg = <0x800000 0x800000>; + }; + partition at 1000000 { + label = "Filesystem"; + reg = <0x1000000 0x3f000000>; + }; + }; }; pcie-controller {
Signature · 1 line
1.9.0
PATCH 6/6 clk: mvebu: Update binding documentation for the core divider clock
In reply to Ezequiel GarciaThe Core Divider clock support two new compatible strings for Armada 375 and Armada 380 SoCs. Add the compatible strings to the documentation.
--- Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt +4 -1
@@ -4,7 +4,10 @@ The following is a list of provided IDs and clock names on Armada 370/XP: 0 = nand (NAND clock) Required properties: -- compatible : must be "marvell,armada-370-corediv-clock" +- compatible : must be "marvell,armada-370-corediv-clock", + "marvell,armada-375-corediv-clock", + "marvell,armada-380-corediv-clock", + - reg : must be the register address of Core Divider control register - #clock-cells : from common clock binding; shall be set to 1 - clocks : must be set to the parent's phandle
Signature · 1 line
1.9.0
cover Armada 380 NAND support
In reply to Ezequiel GarciaEzequiel,
Quoted 32 lines · Ezequiel Garcia
This patchset adds support for the NAND on Armada 380/385 SoCs.
The first patch adds a new "armada-380-corediv-clock" compatible string, with its proper SoC-specific structure, adding the register layout for this SoC family.
The second and third patches add the devicetree changes to support the Core Divider clock.
After adding its clock source, the fourth and fifth patches add the NAND devicetree changes. The NAND controller is compatible with the Armada 370 controller, so we are currently support it using the same compatible string.
The last patch updates the binding documentation for the Core Divider clock, which is missing the information about the already supported Armada 375 compatible string.
This series is based on linux-next 20140307. I expect it will apply cleanly on v3.15-rc1; if that's not the case, I'll send a rebased patchset.
The clock and devicetree changes are mostly independent so they can be merged through the clock and mvebu tree respectively.
Ezequiel Garcia (6):
clk: mvebu: Support Armada 380 SoC on the core divider clock
ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
ARM: mvebu: Add support for NAND controller in Armada 38x SoC
ARM: mvebu: Enable NAND controller in Armada 385-DB
clk: mvebu: Update binding documentation for the core divider clock
Quoted 5 lines
.../bindings/clock/mvebu-corediv-clock.txt | 5 ++++- arch/arm/boot/dts/armada-385-db.dts | 21 ++++++++++++++++++ arch/arm/boot/dts/armada-38x.dtsi | 25 ++++++++++++++++++++++ drivers/clk/mvebu/clk-corediv.c | 23 ++++++++++++++++++++ 4 files changed, 73 insertions(+), 1 deletion(-)
This clock changes looks really clean and simple. Mike says he has time for one more pull. Can you fixup the s/nand/flash/ and resend? I'd like to pull this and your fix in and possibly send a pull request for v3.15 tomorrow.
thx,
Jason.
cover Armada 380 NAND support
Quoted 41 lines · Jason Cooper
Ezequiel,
Quoted 32 lines · Ezequiel Garcia
This patchset adds support for the NAND on Armada 380/385 SoCs.
The first patch adds a new "armada-380-corediv-clock" compatible string, with its proper SoC-specific structure, adding the register layout for this SoC family.
The second and third patches add the devicetree changes to support the Core Divider clock.
After adding its clock source, the fourth and fifth patches add the NAND devicetree changes. The NAND controller is compatible with the Armada 370 controller, so we are currently support it using the same compatible string.
The last patch updates the binding documentation for the Core Divider clock, which is missing the information about the already supported Armada 375 compatible string.
This series is based on linux-next 20140307. I expect it will apply cleanly on v3.15-rc1; if that's not the case, I'll send a rebased patchset.
The clock and devicetree changes are mostly independent so they can be merged through the clock and mvebu tree respectively.
Ezequiel Garcia (6):
clk: mvebu: Support Armada 380 SoC on the core divider clock
ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
ARM: mvebu: Add support for NAND controller in Armada 38x SoC
ARM: mvebu: Enable NAND controller in Armada 385-DB
clk: mvebu: Update binding documentation for the core divider clockQuoted 5 lines
.../bindings/clock/mvebu-corediv-clock.txt | 5 ++++- arch/arm/boot/dts/armada-385-db.dts | 21 ++++++++++++++++++ arch/arm/boot/dts/armada-38x.dtsi | 25 ++++++++++++++++++++++ drivers/clk/mvebu/clk-corediv.c | 23 ++++++++++++++++++++ 4 files changed, 73 insertions(+), 1 deletion(-)
Quoted 5 lines
This clock changes looks really clean and simple. Mike says he has time for one more pull. Can you fixup the s/nand/flash/ and resend? I'd like to pull this and your fix in and possibly send a pull request for v3.15 tomorrow.
Right away.
Signature · 3 lines
Ezequiel Garc?a, Free Electrons Embedded Linux, Kernel and Android Engineering http://free-electrons.com