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arm: pj4: check cpu id for pj4 cp0 access

PATCH New Chao Xie 7 participants 7 messages Jun 14, 2013 – Mar 20, 2014 Arm (32-bit)

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Chao Xie

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#0 lore raw

PATCH v2 1/1 arm: pj4: check cpu id for pj4 cp0 access

Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(pj4 and no-PJ4) use same platform code.

---
 arch/arm/kernel/pj4-cp0.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)
arch/arm/kernel/pj4-cp0.c +11 -0
index 679cf4d..bf658d3 100644
@@ -17,6 +17,10 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <asm/thread_notify.h>
+#include <asm/cputype.h>
+
+#define CORE_PJ4_MASK	0xfffffff0
+#define CORE_PJ4_ID	0x562f5840
 
 static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
 {
@@ -79,6 +83,13 @@ static void __init pj4_cp_access_write(u32 value)
 static int __init pj4_cp0_init(void)
 {
 	u32 cp_access;
+	unsigned int cpuid;
+
+	cpuid = read_cpuid_id();
+
+	/* If it is not a pj4 core, skip it. */
+	if ((cpuid & CORE_PJ4_MASK) != CORE_PJ4_ID)
+		return 0;
 
 	cp_access = pj4_cp_access_read() & ~0xf;
 	pj4_cp_access_write(cp_access);
Signature · 1 line
1.7.4.1
#2 lore raw

PATCH v2 1/1 arm: pj4: check cpu id for pj4 cp0 access

In reply to Chao Xie
Quoted 7 lines · Chao Xie

Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(pj4 and no-PJ4) use same platform code.

This patch fixes a boot failure in next now that ARCH_DOVE (and thus CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works again in next with the BCM28155-AP board.

Quoted 32 lines

arch/arm/kernel/pj4-cp0.c | 11 +++++++++++

 1 files changed, 11 insertions(+), 0 deletions(-)
arch/arm/kernel/pj4-cp0.c +11 -0
index 679cf4d..bf658d3 100644
@@ -17,6 +17,10 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <asm/thread_notify.h>
+#include <asm/cputype.h>
+
+#define CORE_PJ4_MASK	0xfffffff0
+#define CORE_PJ4_ID	0x562f5840
 
 static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
 {
@@ -79,6 +83,13 @@ static void __init pj4_cp_access_write(u32 value)
 static int __init pj4_cp0_init(void)
 {
 	u32 cp_access;
+	unsigned int cpuid;
+
+	cpuid = read_cpuid_id();
+
+	/* If it is not a pj4 core, skip it. */
+	if ((cpuid & CORE_PJ4_MASK) != CORE_PJ4_ID)
+		return 0;
 
 	cp_access = pj4_cp_access_read() & ~0xf;
 	pj4_cp_access_write(cp_access);
#3 lore raw

PATCH v2 1/1 arm: pj4: check cpu id for pj4 cp0 access

Quoted 6 lines · Matt Porter
Quoted 5 lines · Chao Xie

Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(pj4 and no-PJ4) use same platform code.

Quoted 8 lines
Quoted 2 lines

This patch fixes a boot failure in next now that ARCH_DOVE (and thus CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works again in next with the BCM28155-AP board.

I've also verified that this fixes the boot regression on the BCM28155-AP board.

Chao, can you collect the acks/tested-bys and submit this to Russell's patch tracker[1] so he can apply it please?. Thanks.

Kevin

[1] http://www.arm.linux.org.uk/developer/patches/

#4 lore raw

PATCH v2 1/1 arm: pj4: check cpu id for pj4 cp0 access

Quoted 14 lines · Kevin Hilman
Quoted 13 lines · Matt Porter
Quoted 7 lines · Chao Xie

Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(pj4 and no-PJ4) use same platform code.

This patch fixes a boot failure in next now that ARCH_DOVE (and thus CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works again in next with the BCM28155-AP board.

Quoted 8 lines
Quoted 1 line

I've also verified that this fixes the boot regression on the BCM28155-AP board.

Chao, can you collect the acks/tested-bys and submit this to Russell's patch tracker[1] so he can apply it please?. Thanks.

Any reason not put the IDs in asm/cputype.h, where all the others are - and maybe also a cpu_is_pj4() inline function too?

Signature · 2 lines
FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly
improving, and getting towards what was expected from it.
#5 lore raw

PATCH v2 1/1 arm: pj4: check cpu id for pj4 cp0 access

Quoted 19 lines · Russell King - ARM Linux
Quoted 18 lines · Kevin Hilman
Quoted 6 lines · Matt Porter
Quoted 5 lines · Chao Xie

Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(pj4 and no-PJ4) use same platform code.

Quoted 8 lines
Quoted 2 lines

This patch fixes a boot failure in next now that ARCH_DOVE (and thus CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works again in next with the BCM28155-AP board.

I've also verified that this fixes the boot regression on the BCM28155-AP board.

Quoted 8 lines
Quoted 4 lines

Chao, can you collect the acks/tested-bys and submit this to Russell's patch tracker[1] so he can apply it please?. Thanks.

Any reason not put the IDs in asm/cputype.h, where all the others are - and maybe also a cpu_is_pj4() inline function too?

Sure, i can put it at arch/arm/asm/include/cputype.h

I will send the patch later.

Thanks.

Quoted 3 lines

--
FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly improving, and getting towards what was expected from it.

#6 lore raw

PATCH v2 1/1 arm: pj4: check cpu id for pj4 cp0 access

In reply to Matt Porter
Quoted 6 lines · Matt Porter
Quoted 5 lines · Chao Xie

Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(pj4 and no-PJ4) use same platform code.

Quoted 8 lines
Quoted 2 lines

This patch fixes a boot failure in next now that ARCH_DOVE (and thus CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works again in next with the BCM28155-AP board.

This also solves the Tegra SoC boot failures with next-20130320.