: ARM: OMAP2+: PRCM move to drivers

index 535d66e..5627072 100644
@@ -30,23 +30,23 @@
 /* Read a register in CM1 */
 u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
 {
-	return __raw_readl(OMAP44XX_CM1_REGADDR(inst, reg));
+	return __raw_readl(cm_base + inst + reg);
 }
 
 /* Write into a register in CM1 */
 void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
-	__raw_writel(val, OMAP44XX_CM1_REGADDR(inst, reg));
+	__raw_writel(val, cm_base + inst + reg);
 }
 
 /* Read a register in CM2 */
 u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
 {
-	return __raw_readl(OMAP44XX_CM2_REGADDR(inst, reg));
+	return __raw_readl(cm2_base + inst + reg);
 }
 
 /* Write into a register in CM2 */
 void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
-	__raw_writel(val, OMAP44XX_CM2_REGADDR(inst, reg));
+	__raw_writel(val, cm2_base + inst + reg);
 }

index f17f006..82c37b1 100644
@@ -18,7 +18,6 @@
 
 #include "powerdomain.h"
 #include "clock.h"
-#include "omap_hwmod.h"
 
 /*
  * Clockdomain flags

@@ -98,6 +97,8 @@ struct clkdm_dep {
 /* Possible flags for struct clockdomain._flags */
 #define _CLKDM_FLAG_HWSUP_ENABLED		BIT(0)
 
+struct omap_hwmod;
+
 /**
  * struct clockdomain - OMAP clockdomain
  * @name: clockdomain name

index cfb8891..15a778c 100644
@@ -17,11 +17,8 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM_33XX_H
 
-#include "common.h"
-
 #include "cm.h"
 #include "cm-regbits-33xx.h"
-#include "iomap.h"
 
 /* CM base address */
 #define AM33XX_CM_BASE		0x44e00000

index 5627072..37ba6e8 100644
@@ -18,8 +18,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "iomap.h"
-#include "common.h"
 #include "cm.h"
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"

index 40b3b5a..9e2482a 100644
@@ -18,7 +18,6 @@
 #include "cm2xxx.h"
 #include "cm3xxx.h"
 #include "cm44xx.h"
-#include "common.h"
 
 /*
  * cm_ll_data: function pointers to SoC-specific implementations of

index 731ca13..d27d2bd 100644
@@ -21,8 +21,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "iomap.h"
-#include "common.h"
 #include "clockdomain.h"
 #include "cm.h"
 #include "cm1_44xx.h"

index 0f17862..a579b89 100644
@@ -24,6 +24,7 @@
 #include "prm33xx.h"
 #include "omap_hwmod_33xx_43xx_common_data.h"
 #include "prcm43xx.h"
+#include "common.h"
 
 #define CLKCTRL(oh, clkctrl) ((oh).prcm.omap4.clkctrl_offs = (clkctrl))
 #define RSTCTRL(oh, rstctrl) ((oh).prcm.omap4.rstctrl_offs = (rstctrl))

index 93a2a6e..faebd5f 100644
@@ -32,6 +32,7 @@
 
 #include "powerdomain.h"
 #include "clockdomain.h"
+#include "voltage.h"
 
 #include "soc.h"
 #include "pm.h"

index da5a59a..f472711 100644
@@ -21,8 +21,6 @@
 #include <linux/list.h>
 #include <linux/spinlock.h>
 
-#include "voltage.h"
-
 /* Powerdomain basic power states */
 #define PWRDM_POWER_OFF		0x0
 #define PWRDM_POWER_RET		0x1

@@ -75,6 +73,7 @@
 
 struct clockdomain;
 struct powerdomain;
+struct voltagedomain;
 
 /**
  * struct powerdomain - OMAP powerdomain

index e982598..ee2384a 100644
@@ -428,6 +428,8 @@
 #define MAX_IOPAD_LATCH_TIME			100
 # ifndef __ASSEMBLER__
 
+#include <linux/delay.h>
+
 /**
  * omap_test_timeout - busy-loop, testing a condition
  * @cond: condition to test until it evaluates to true

index 059bd4f..ac9cb45 100644
@@ -26,7 +26,6 @@
 #define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
 
 #include "prcm_mpu_44xx_54xx.h"
-#include "common.h"
 
 #define OMAP4430_PRCM_MPU_BASE			0x48243000
 

index 5209823..d891499 100644
@@ -16,7 +16,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "common.h"
 #include "powerdomain.h"
 #include "prm2xxx_3xxx_private.h"
 #include "prm-regbits-24xx.h"

index 7204407..0660105 100644
@@ -19,7 +19,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "common.h"
 #include "powerdomain.h"
 #include "prm33xx.h"
 #include "prm-regbits-33xx.h"

index 45f83dd..a7f1cac 100644
@@ -18,9 +18,6 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 
-#include "soc.h"
-#include "common.h"
-#include "vp.h"
 #include "powerdomain.h"
 #include "clockdomain.h"
 #include "prm2xxx_3xxx_private.h"

@@ -261,19 +258,11 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
 
 int __init omap2xxx_prm_init(void)
 {
-	if (!cpu_is_omap24xx())
-		return 0;
-
 	return prm_register(&omap2xxx_prm_ll_data);
 }
 
 static void __exit omap2xxx_prm_exit(void)
 {
-	if (!cpu_is_omap24xx())
-		return;
-
-	/* Should never happen */
-	WARN(prm_unregister(&omap2xxx_prm_ll_data),
-	     "%s: prm_ll_data function pointer mismatch\n", __func__);
+	prm_unregister(&omap2xxx_prm_ll_data);
 }
 __exitcall(omap2xxx_prm_exit);

index 6d3e9c2..1a39954 100644
@@ -639,9 +639,6 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
 
 int __init omap3xxx_prm_init(void)
 {
-	if (!cpu_is_omap34xx())
-		return 0;
-
 	return prm_register(&omap3xxx_prm_ll_data);
 }
 

@@ -664,11 +661,6 @@ omap_subsys_initcall(omap3xxx_prm_late_init);
 
 static void __exit omap3xxx_prm_exit(void)
 {
-	if (!cpu_is_omap34xx())
-		return;
-
-	/* Should never happen */
-	WARN(prm_unregister(&omap3xxx_prm_ll_data),
-	     "%s: prm_ll_data function pointer mismatch\n", __func__);
+	prm_unregister(&omap3xxx_prm_ll_data);
 }
 __exitcall(omap3xxx_prm_exit);

index 3655e16..be96881 100644
@@ -660,9 +660,6 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 
 int __init omap44xx_prm_init(void)
 {
-	if (!cpu_is_omap44xx() && !soc_is_omap54xx() && !soc_is_dra7xx())
-		return 0;
-
 	return prm_register(&omap44xx_prm_ll_data);
 }
 

@@ -679,11 +676,6 @@ omap_subsys_initcall(omap44xx_prm_late_init);
 
 static void __exit omap44xx_prm_exit(void)
 {
-	if (!cpu_is_omap44xx())
-		return;
-
-	/* Should never happen */
-	WARN(prm_unregister(&omap44xx_prm_ll_data),
-	     "%s: prm_ll_data function pointer mismatch\n", __func__);
+	prm_unregister(&omap44xx_prm_ll_data);
 }
 __exitcall(omap44xx_prm_exit);

index ee2384a..a8e4b58 100644
@@ -480,6 +480,7 @@ struct omap_prcm_irq {
  * @ocp_barrier: fn ptr to force buffered PRM writes to complete
  * @save_and_clear_irqen: fn ptr to save and clear IRQENABLE regs
  * @restore_irqen: fn ptr to save and clear IRQENABLE regs
+ * @reconfigure_io_chain: fn ptr to reconfigure IO chain
  * @saved_mask: IRQENABLE regs are saved here during suspend
  * @priority_mask: 1 bit per IRQ, set to 1 if omap_prcm_irq.priority = true
  * @base_irq: base dynamic IRQ number, returned from irq_alloc_descs() in init

@@ -501,6 +502,7 @@ struct omap_prcm_irq_setup {
 	void (*ocp_barrier)(void);
 	void (*save_and_clear_irqen)(u32 *saved_mask);
 	void (*restore_irqen)(u32 *saved_mask);
+	void (*reconfigure_io_chain)(void);
 	u32 *saved_mask;
 	u32 *priority_mask;
 	int base_irq;

index 1a39954..dab93f4 100644
@@ -45,6 +45,7 @@ static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
 	.ocp_barrier		= &omap3xxx_prm_ocp_barrier,
 	.save_and_clear_irqen	= &omap3xxx_prm_save_and_clear_irqen,
 	.restore_irqen		= &omap3xxx_prm_restore_irqen,
+	.reconfigure_io_chain	= &omap3xxx_prm_reconfigure_io_chain,
 };
 
 /*

index be96881..10834cb 100644
@@ -47,6 +47,7 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
 	.ocp_barrier		= &omap44xx_prm_ocp_barrier,
 	.save_and_clear_irqen	= &omap44xx_prm_save_and_clear_irqen,
 	.restore_irqen		= &omap44xx_prm_restore_irqen,
+	.reconfigure_io_chain	= &omap44xx_prm_reconfigure_io_chain,
 };
 
 /*

index 878ae9f..b3c593b 100644
@@ -330,12 +330,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
 
 	if (of_have_populated_dt()) {
 		int irq = omap_prcm_event_to_irq("io");
-		if (cpu_is_omap34xx())
-			omap_pcs_legacy_init(irq,
-				omap3xxx_prm_reconfigure_io_chain);
-		else
-			omap_pcs_legacy_init(irq,
-				omap44xx_prm_reconfigure_io_chain);
+		omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
 	}
 
 	return 0;

index 623db40..04426c4 100644
@@ -17,10 +17,18 @@
 
 # ifndef __ASSEMBLER__
 extern void __iomem *prm_base;
+extern u16 prm_features;
 extern void omap2_set_globals_prm(void __iomem *prm);
 int of_prcm_init(void);
 # endif
 
+/*
+ * prm_features flag values
+ *
+ * PRM_HAS_IO_WAKEUP: has IO wakeup capability
+ * PRM_HAS_VOLTAGE: has voltage domains
+ */
+#define PRM_HAS_IO_WAKEUP	(1 << 0)
 
 /*
  * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP

index dab93f4..fcbe854 100644
@@ -410,7 +410,7 @@ void omap3xxx_prm_reconfigure_io_chain(void)
  */
 static void __init omap3xxx_prm_enable_io_wakeup(void)
 {
-	if (omap3_has_io_wakeup())
+	if (prm_features & PRM_HAS_IO_WAKEUP)
 		omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
 					   PM_WKEN);
 }

@@ -640,6 +640,9 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
 
 int __init omap3xxx_prm_init(void)
 {
+	if (omap3_has_io_wakeup())
+		prm_features |= PRM_HAS_IO_WAKEUP;
+
 	return prm_register(&omap3xxx_prm_ll_data);
 }
 

@@ -650,6 +653,9 @@ static int __init omap3xxx_prm_late_init(void)
 	if (!cpu_is_omap34xx())
 		return 0;
 
+	if (!(prm_features & PRM_HAS_IO_WAKEUP))
+		return 0;
+
 	omap3xxx_prm_enable_io_wakeup();
 	ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
 	if (!ret)

index 10834cb..dc357df 100644
@@ -661,6 +661,9 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 
 int __init omap44xx_prm_init(void)
 {
+	if (cpu_is_omap44xx())
+		prm_features |= PRM_HAS_IO_WAKEUP;
+
 	return prm_register(&omap44xx_prm_ll_data);
 }
 

@@ -669,6 +672,9 @@ static int __init omap44xx_prm_late_init(void)
 	if (!cpu_is_omap44xx())
 		return 0;
 
+	if (!(prm_features & PRM_HAS_IO_WAKEUP))
+		return 0;
+
 	omap44xx_prm_enable_io_wakeup();
 
 	return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);

index b3c593b..f98c01a 100644
@@ -62,6 +62,8 @@ static struct omap_prcm_irq_setup *prcm_irq_setup;
 /* prm_base: base virtual address of the PRM IP block */
 void __iomem *prm_base;
 
+u16 prm_features;
+
 /*
  * prm_ll_data: function pointers to SoC-specific implementations of
  * common PRM functions

index 04426c4..48480d5 100644
@@ -126,6 +126,7 @@ struct prm_reset_src_map {
  * @read_reset_sources: ptr to the SoC PRM-specific get_reset_source impl
  * @was_any_context_lost_old: ptr to the SoC PRM context loss test fn
  * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
+ * @late_init: ptr to the late init function
  *
  * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
  * deprecated.

@@ -134,6 +135,7 @@ struct prm_ll_data {
 	u32 (*read_reset_sources)(void);
 	bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx);
 	void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
+	int (*late_init)(void);
 };
 
 extern int prm_register(struct prm_ll_data *pld);

index fcbe854..f92de79 100644
@@ -634,8 +634,11 @@ struct pwrdm_ops omap3_pwrdm_operations = {
  *
  */
 
+static int omap3xxx_prm_late_init(void);
+
 static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.read_reset_sources = &omap3xxx_prm_read_reset_sources,
+	.late_init = &omap3xxx_prm_late_init,
 };
 
 int __init omap3xxx_prm_init(void)

@@ -650,9 +653,6 @@ static int __init omap3xxx_prm_late_init(void)
 {
 	int ret;
 
-	if (!cpu_is_omap34xx())
-		return 0;
-
 	if (!(prm_features & PRM_HAS_IO_WAKEUP))
 		return 0;
 

@@ -664,7 +664,6 @@ static int __init omap3xxx_prm_late_init(void)
 
 	return ret;
 }
-omap_subsys_initcall(omap3xxx_prm_late_init);
 
 static void __exit omap3xxx_prm_exit(void)
 {

index dc357df..60b9b05 100644
@@ -650,6 +650,8 @@ struct pwrdm_ops omap4_pwrdm_operations = {
 	.pwrdm_has_voltdm	= omap4_check_vcvp,
 };
 
+static int omap44xx_prm_late_init(void);
+
 /*
  * XXX document
  */

@@ -657,6 +659,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.read_reset_sources = &omap44xx_prm_read_reset_sources,
 	.was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old,
 	.clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
+	.late_init = &omap44xx_prm_late_init,
 };
 
 int __init omap44xx_prm_init(void)

@@ -669,9 +672,6 @@ int __init omap44xx_prm_init(void)
 
 static int __init omap44xx_prm_late_init(void)
 {
-	if (!cpu_is_omap44xx())
-		return 0;
-
 	if (!(prm_features & PRM_HAS_IO_WAKEUP))
 		return 0;
 

@@ -679,7 +679,6 @@ static int __init omap44xx_prm_late_init(void)
 
 	return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
 }
-omap_subsys_initcall(omap44xx_prm_late_init);
 
 static void __exit omap44xx_prm_exit(void)
 {

index f98c01a..76ca320 100644
@@ -529,3 +529,11 @@ int __init of_prcm_init(void)
 
 	return 0;
 }
+
+static int __init prm_late_init(void)
+{
+	if (prm_ll_data->late_init)
+		return prm_ll_data->late_init();
+	return 0;
+}
+subsys_initcall(prm_late_init);

index 5b19efd..251432f 100644
@@ -458,6 +458,15 @@ void __init omap2430_init_late(void)
  * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
  */
 #ifdef CONFIG_ARCH_OMAP3
+static inline u16 omap3_prm_type(void)
+{
+	if (cpu_is_omap3430())
+		return PRM_OMAP3430;
+	if (cpu_is_omap3630())
+		return PRM_OMAP3630;
+	return PRM_OMAP3_OTHER;
+}
+
 void __init omap3_init_early(void)
 {
 	omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));

@@ -469,7 +478,7 @@ void __init omap3_init_early(void)
 	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
 	omap3xxx_check_revision();
 	omap3xxx_check_features();
-	omap3xxx_prm_init();
+	omap3xxx_prm_init(omap3_prm_type());
 	omap3xxx_cm_init();
 	omap3xxx_voltagedomains_init();
 	omap3xxx_powerdomains_init();

@@ -636,7 +645,7 @@ void __init omap4430_init_early(void)
 	omap4xxx_check_revision();
 	omap4xxx_check_features();
 	omap4_pm_init_early();
-	omap44xx_prm_init();
+	omap44xx_prm_init(PRM_OMAP4);
 	omap44xx_voltagedomains_init();
 	omap44xx_powerdomains_init();
 	omap44xx_clockdomains_init();

@@ -666,7 +675,7 @@ void __init omap5_init_early(void)
 	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
 	omap_prm_base_init();
 	omap_cm_base_init();
-	omap44xx_prm_init();
+	omap44xx_prm_init(PRM_OMAP5);
 	omap5xxx_check_revision();
 	omap54xx_voltagedomains_init();
 	omap54xx_powerdomains_init();

@@ -694,7 +703,7 @@ void __init dra7xx_init_early(void)
 	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
 	omap_prm_base_init();
 	omap_cm_base_init();
-	omap44xx_prm_init();
+	omap44xx_prm_init(PRM_DRA7);
 	dra7xx_powerdomains_init();
 	dra7xx_clockdomains_init();
 	dra7xx_hwmod_init();

index 48480d5..fd5123e 100644
@@ -30,6 +30,17 @@ int of_prcm_init(void);
  */
 #define PRM_HAS_IO_WAKEUP	(1 << 0)
 
+#ifndef __ASSEMBLER__
+enum {
+	PRM_OMAP3430 = 0,
+	PRM_OMAP3630,
+	PRM_OMAP3_OTHER,
+	PRM_OMAP4,
+	PRM_OMAP5,
+	PRM_DRA7,
+};
+#endif
+
 /*
  * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
  * module to softreset

index f92de79..9915cd6 100644
@@ -641,9 +641,9 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.late_init = &omap3xxx_prm_late_init,
 };
 
-int __init omap3xxx_prm_init(void)
+int __init omap3xxx_prm_init(u16 cpu_type)
 {
-	if (omap3_has_io_wakeup())
+	if (cpu_type == PRM_OMAP3430 || cpu_type == PRM_OMAP3630)
 		prm_features |= PRM_HAS_IO_WAKEUP;
 
 	return prm_register(&omap3xxx_prm_ll_data);

index 7120af9..0e759bc 100644
@@ -160,7 +160,7 @@ extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
 
 extern void omap3xxx_prm_dpll3_reset(void);
 
-extern int __init omap3xxx_prm_init(void);
+int __init omap3xxx_prm_init(u16 cpu_type);
 extern u32 omap3xxx_prm_get_reset_sources(void);
 int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits);
 void omap3xxx_prm_iva_idle(void);

index 60b9b05..18fae1dd 100644
@@ -662,9 +662,9 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.late_init = &omap44xx_prm_late_init,
 };
 
-int __init omap44xx_prm_init(void)
+int __init omap44xx_prm_init(u16 cpu_type)
 {
-	if (cpu_is_omap44xx())
+	if (cpu_type == PRM_OMAP4)
 		prm_features |= PRM_HAS_IO_WAKEUP;
 
 	return prm_register(&omap44xx_prm_ll_data);

index 8d95aa5..73734b2 100644
@@ -57,7 +57,7 @@ extern void omap44xx_prm_ocp_barrier(void);
 extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
 extern void omap44xx_prm_restore_irqen(u32 *saved_mask);
 
-extern int __init omap44xx_prm_init(void);
+int __init omap44xx_prm_init(u16 cpu_type);
 extern u32 omap44xx_prm_get_reset_sources(void);
 
 #endif

index fd5123e..8d40a5d 100644
@@ -29,6 +29,7 @@ int of_prcm_init(void);
  * PRM_HAS_VOLTAGE: has voltage domains
  */
 #define PRM_HAS_IO_WAKEUP	(1 << 0)
+#define PRM_HAS_VOLTAGE		(1 << 1)
 
 #ifndef __ASSEMBLER__
 enum {

index 18fae1dd..fb05abc 100644
@@ -624,7 +624,7 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
 static int omap4_check_vcvp(void)
 {
 	/* No VC/VP on dra7xx devices */
-	if (soc_is_dra7xx())
+	if (!(prm_features & PRM_HAS_VOLTAGE))
 		return 0;
 
 	return 1;

@@ -664,6 +664,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 
 int __init omap44xx_prm_init(u16 cpu_type)
 {
+	if (cpu_type != PRM_DRA7)
+		prm_features |= PRM_HAS_VOLTAGE;
 	if (cpu_type == PRM_OMAP4)
 		prm_features |= PRM_HAS_IO_WAKEUP;
 

index 8d40a5d..8caa7af 100644
@@ -17,6 +17,7 @@
 
 # ifndef __ASSEMBLER__
 extern void __iomem *prm_base;
+extern u16 prm_dev_inst;
 extern u16 prm_features;
 extern void omap2_set_globals_prm(void __iomem *prm);
 int of_prcm_init(void);

index fb05abc..206dcd9 100644
@@ -24,6 +24,8 @@
 #include "common.h"
 #include "vp.h"
 #include "prm44xx.h"
+#include "prm54xx.h"
+#include "prm7xx.h"
 #include "prm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prminst44xx_private.h"

@@ -664,10 +666,22 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 
 int __init omap44xx_prm_init(u16 cpu_type)
 {
-	if (cpu_type != PRM_DRA7)
+	switch (cpu_type) {
+	case PRM_OMAP4:
+		prm_features |= PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE;
+		prm_dev_inst = OMAP4430_PRM_DEVICE_INST;
+		break;
+	case PRM_OMAP5:
 		prm_features |= PRM_HAS_VOLTAGE;
-	if (cpu_type == PRM_OMAP4)
-		prm_features |= PRM_HAS_IO_WAKEUP;
+		prm_dev_inst = OMAP54XX_PRM_DEVICE_INST;
+		break;
+	case PRM_DRA7:
+		prm_dev_inst = DRA7XX_PRM_DEVICE_INST;
+		break;
+	default:
+		pr_err("%s: unsupported cpu type: %d\n", __func__, cpu_type);
+		return -EINVAL;
+	}
 
 	return prm_register(&omap44xx_prm_ll_data);
 }

index 76ca320..5d5d564 100644
@@ -63,6 +63,7 @@ static struct omap_prcm_irq_setup *prcm_irq_setup;
 void __iomem *prm_base;
 
 u16 prm_features;
+u16 prm_dev_inst;
 
 /*
  * prm_ll_data: function pointers to SoC-specific implementations of

index 00b69d1..d4a7919 100644
@@ -168,28 +168,18 @@ int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
 void omap4_prminst_global_warm_sw_reset(void)
 {
 	u32 v;
-	s16 dev_inst;
-
-	if (cpu_is_omap44xx())
-		dev_inst = OMAP4430_PRM_DEVICE_INST;
-	else if (soc_is_omap54xx())
-		dev_inst = OMAP54XX_PRM_DEVICE_INST;
-	else if (soc_is_dra7xx())
-		dev_inst = DRA7XX_PRM_DEVICE_INST;
-	else
-		return;
-
-	v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, dev_inst,
+
+	v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, prm_dev_inst,
 					OMAP4_PRM_RSTCTRL_OFFSET);
 	v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
 	omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION,
-				 OMAP4430_PRM_DEVICE_INST,
-				 OMAP4_PRM_RSTCTRL_OFFSET);
+				     prm_dev_inst,
+				     OMAP4_PRM_RSTCTRL_OFFSET);
 
 	/* OCP barrier */
 	v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
-				    OMAP4430_PRM_DEVICE_INST,
-				    OMAP4_PRM_RSTCTRL_OFFSET);
+					prm_dev_inst,
+					OMAP4_PRM_RSTCTRL_OFFSET);
 }
 
 void omap4_prminst_mpuss_clear_prev_logic_pwrst(void)

index a8e4b58..9da4c17 100644
@@ -523,6 +523,7 @@ extern int omap_prcm_register_chain_handler(
 extern int omap_prcm_event_to_irq(const char *event);
 extern void omap_prcm_irq_prepare(void);
 extern void omap_prcm_irq_complete(void);
+void omap_pcs_legacy_init(int irq, void (*rearm)(void));
 
 # endif
 

index 9915cd6..f1d3e15 100644
@@ -18,8 +18,6 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 
-#include "soc.h"
-#include "common.h"
 #include "vp.h"
 #include "powerdomain.h"
 #include "prm3xxx.h"

@@ -40,7 +38,7 @@ static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
 	.nr_regs		= 1,
 	.irqs			= omap3_prcm_irqs,
 	.nr_irqs		= ARRAY_SIZE(omap3_prcm_irqs),
-	.irq			= 11 + OMAP_INTC_START,
+	.irq			= 11 + NR_IRQS,
 	.read_pending_irqs	= &omap3xxx_prm_read_pending_irqs,
 	.ocp_barrier		= &omap3xxx_prm_ocp_barrier,
 	.save_and_clear_irqen	= &omap3xxx_prm_save_and_clear_irqen,

index 206dcd9..27f4603 100644
@@ -19,9 +19,6 @@
 #include <linux/io.h>
 
 
-#include "soc.h"
-#include "iomap.h"
-#include "common.h"
 #include "vp.h"
 #include "prm44xx.h"
 #include "prm54xx.h"

@@ -33,6 +30,8 @@
 
 /* Static data */
 
+#define OMAP44XX_IRQ_GIC_START	32
+
 static const struct omap_prcm_irq omap4_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("wkup",   0,      0),
 	OMAP_PRCM_IRQ("io",     9,      1),

index 5d5d564..b4ef9e4 100644
@@ -28,12 +28,10 @@
 #include <linux/clk-provider.h>
 #include <linux/clk/ti.h>
 
-#include "soc.h"
 #include "prm2xxx_3xxx.h"
 #include "prm2xxx.h"
 #include "prm3xxx.h"
 #include "prm44xx.h"
-#include "common.h"
 #include "clock.h"
 
 /*

index d4a7919..bd0e0da 100644
@@ -16,8 +16,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "iomap.h"
-#include "common.h"
 #include "prcm-common.h"
 #include "prm44xx.h"
 #include "prm54xx.h"

@@ -26,7 +24,6 @@
 #include "prm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prcm_mpu44xx.h"
-#include "soc.h"
 
 static void __iomem *_prm_bases[OMAP4_MAX_PRCM_PARTITIONS];
 

index b4ef9e4..2d63196 100644
@@ -521,11 +521,10 @@ int __init of_prcm_init(void)
 		mem = of_iomap(np, 0);
 		clk_memmaps[memmap_index] = mem;
 		ti_dt_clk_init_provider(np, memmap_index);
+		ti_dt_clockdomains_setup(np);
 		memmap_index++;
 	}
 
-	ti_dt_clockdomains_setup();
-
 	return 0;
 }
 

102 lines not on this page · raw message

index 03decc2..86e8ae4 100644
@@ -284,7 +284,7 @@ void omap2xxx_clkt_vps_init(void);
 void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index);
 void ti_dt_clocks_register(struct ti_dt_clk *oclks);
 void ti_dt_clk_init_provider(struct device_node *np, int index);
-void ti_dt_clockdomains_setup(void);
+void ti_dt_clockdomains_setup(struct device_node *node);
 int ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
 		      ti_of_clk_init_cb_t func);
 int of_ti_clk_autoidle_setup(struct device_node *node);

index 9e2482a..c334d38 100644
@@ -14,6 +14,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/errno.h>
+#include <linux/of.h>
 
 #include "cm2xxx.h"
 #include "cm3xxx.h"

@@ -137,3 +138,20 @@ int cm_unregister(struct cm_ll_data *cld)
 
 	return 0;
 }
+
+static struct of_device_id omap_cm_dt_match_table[] = {
+	{ .compatible = "ti,omap3-cm" },
+	{ .compatible = "ti,omap4-cm1" },
+	{ .compatible = "ti,omap4-cm2" },
+	{ .compatible = "ti,omap5-cm-core-aon" },
+	{ .compatible = "ti,omap5-cm-core" },
+	{ .compatible = "ti,dra7-cm-core-aon" },
+	{ .compatible = "ti,dra7-cm-core" },
+	{ }
+};
+
+
+int __init of_cm_init(void)
+{
+	return of_prcm_module_init(omap_cm_dt_match_table);
+}

index 5854b3c..90a7add 100644
@@ -611,3 +611,18 @@ void __init omap3_ctrl_init(void)
 	omap3_ctrl_setup_d2d_padconf();
 }
 #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
+
+static struct of_device_id omap_scrm_dt_match_table[] = {
+	{ .compatible = "ti,am3-scrm" },
+	{ .compatible = "ti,am4-scrm" },
+	{ .compatible = "ti,omap2-scrm" },
+	{ .compatible = "ti,omap3-scrm" },
+	{ .compatible = "ti,omap4-scrm" },
+	{ .compatible = "ti,omap5-scrm" },
+	{ }
+};
+
+int __init of_scrm_init(void)
+{
+	return of_prcm_module_init(omap_scrm_dt_match_table);
+}

index ccbd70c..8a5c025 100644
@@ -428,6 +428,7 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
 extern void omap3630_ctrl_disable_rta(void);
 extern int omap3_ctrl_save_padconf(void);
 void omap3_ctrl_init(void);
+int of_scrm_init(void);
 extern void omap2_set_globals_control(void __iomem *ctrl,
 				      void __iomem *ctrl_pad);
 #else

index 251432f..dfba898 100644
@@ -736,6 +736,10 @@ int __init omap_clk_init(void)
 	if (!omap_clk_soc_init)
 		return 0;
 
+	ret = of_scrm_init();
+	if (ret)
+		return ret;
+
 	ret = of_prcm_init();
 	if (!ret)
 		ret = omap_clk_soc_init();

index 9da4c17..f356532 100644
@@ -517,6 +517,8 @@ struct omap_prcm_irq_setup {
 	.priority = _priority				\
 	}
 
+struct of_device_id;
+
 extern void omap_prcm_irq_cleanup(void);
 extern int omap_prcm_register_chain_handler(
 	struct omap_prcm_irq_setup *irq_setup);

@@ -524,6 +526,8 @@ extern int omap_prcm_event_to_irq(const char *event);
 extern void omap_prcm_irq_prepare(void);
 extern void omap_prcm_irq_complete(void);
 void omap_pcs_legacy_init(int irq, void (*rearm)(void));
+int of_prcm_module_init(struct of_device_id *match_table);
+int of_cm_init(void);
 
 # endif
 

83 lines not on this page · raw message

index 37ba6e8..c440ba7 100644
@@ -21,7 +21,6 @@
 #include "cm.h"
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
-#include "cm-regbits-44xx.h"
 
 /* CM1 hardware module low-level functions */
 

index d27d2bd..c2712d3 100644
@@ -28,12 +28,18 @@
 #include "cm44xx.h"
 #include "cminst44xx.h"
 #include "cm-regbits-34xx.h"
-#include "cm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prm44xx.h"
 #include "prcm_mpu44xx.h"
 #include "prcm-common.h"
 
+#define OMAP4430_IDLEST_SHIFT		16
+#define OMAP4430_IDLEST_MASK		(0x3 << 16)
+#define OMAP4430_CLKTRCTRL_SHIFT	0
+#define OMAP4430_CLKTRCTRL_MASK		(0x3 << 0)
+#define OMAP4430_MODULEMODE_SHIFT	0
+#define OMAP4430_MODULEMODE_MASK	(0x3 << 0)
+
 /*
  * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
  *

index c0aeabf..c40e5f0 100644
@@ -17,7 +17,6 @@
 #include "pm.h"
 #include "cm.h"
 #include "cm-regbits-34xx.h"
-#include "cm-regbits-44xx.h"
 #include "prm-regbits-34xx.h"
 #include "prm-regbits-44xx.h"
 

index 4c29f63..e74484a 100644
@@ -22,7 +22,6 @@
 #include "cm.h"
 #include "cm2xxx_3xxx_private.h"
 #include "cm2xxx.h"
-#include "cm-regbits-24xx.h"
 #include "clockdomain.h"
 
 /* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */

@@ -36,6 +35,24 @@
 /* CM_IDLEST_PLL bit value offset for APLLs (OMAP2xxx only) */
 #define EN_APLL_LOCKED					3
 
+#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO			0x0
+#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO			0x1
+
+#define OMAP24XX_CORE_CLK_SRC_MASK			(0x3 << 0)
+
+#define OMAP24XX_EN_54M_PLL_SHIFT			6
+#define OMAP24XX_EN_96M_PLL_SHIFT			2
+#define OMAP24XX_ST_54M_APLL_SHIFT			9
+#define OMAP24XX_ST_96M_APLL_SHIFT			8
+#define OMAP24XX_AUTO_54M_MASK				(0x3 << 6)
+#define OMAP24XX_AUTO_96M_MASK				(0x3 << 2)
+#define OMAP24XX_AUTO_DPLL_SHIFT			0
+#define OMAP24XX_AUTO_DPLL_MASK				(0x3 << 0)
+
+#define OMAP24XX_EN_DSS1_MASK				(1 << 0)
+
+#define OMAP24XX_CLKSEL_DSS2_MASK			(0x1 << 13)
+
 static const u8 omap2xxx_cm_idlest_offs[] = {
 	CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4
 };

index 40a22e5..728ac3f 100644
@@ -26,9 +26,16 @@
 #include "cm.h"
 #include "cm33xx.h"
 #include "cm-regbits-34xx.h"
-#include "cm-regbits-33xx.h"
 #include "prm33xx.h"
 
+#define AM33XX_MODULEMODE_SHIFT			0
+#define AM33XX_MODULEMODE_MASK			(0x3 << 0)
+
+#define AM33XX_CLKTRCTRL_SHIFT			0
+#define AM33XX_CLKTRCTRL_MASK			(0x3 << 0)
+#define AM33XX_IDLEST_SHIFT			16
+#define AM33XX_IDLEST_MASK			(0x3 << 16)
+
 /*
  * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
  *

index 15a778c..8f9e479 100644
@@ -18,7 +18,6 @@
 #define __ARCH_ARM_MACH_OMAP2_CM_33XX_H
 
 #include "cm.h"
-#include "cm-regbits-33xx.h"
 
 /* CM base address */
 #define AM33XX_CM_BASE		0x44e00000

index a7f1cac..7264ae6 100644
@@ -20,9 +20,23 @@
 
 #include "powerdomain.h"
 #include "clockdomain.h"
+#include "prm2xxx.h"
 #include "prm2xxx_3xxx_private.h"
 #include "cm2xxx_3xxx.h"
-#include "prm-regbits-24xx.h"
+
+#define OMAP24XX_FORCESTATE_MASK		(1 << 18)
+#define OMAP24XX_AUTOIDLE_MASK			(1 << 0)
+#define OMAP24XX_AUTO_EXTVOLT_MASK		(1 << 15)
+
+#define OMAP24XX_SETOFF_LEVEL_SHIFT		12
+#define OMAP24XX_MEMRETCTRL_MASK		(1 << 8)
+#define OMAP24XX_SETRET_LEVEL_SHIFT		6
+#define OMAP24XX_VOLT_LEVEL_SHIFT		0
+
+#define OMAP24XX_EXTWMPU_RST_SHIFT		6
+#define OMAP24XX_SECU_WD_RST_SHIFT		5
+#define OMAP24XX_MPU_WD_RST_SHIFT		4
+#define OMAP24XX_SECU_VIOL_RST_SHIFT		3
 
 /*
  * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -

index d891499..d8044f9 100644
@@ -18,7 +18,6 @@
 
 #include "powerdomain.h"
 #include "prm2xxx_3xxx_private.h"
-#include "prm-regbits-24xx.h"
 #include "clockdomain.h"
 
 /**

index 0660105..877d7c7 100644
@@ -21,7 +21,13 @@
 
 #include "powerdomain.h"
 #include "prm33xx.h"
-#include "prm-regbits-33xx.h"
+
+#define AM33XX_LASTPOWERSTATEENTERED_SHIFT	24
+#define AM33XX_LASTPOWERSTATEENTERED_MASK	(0x3 << 24)
+#define AM33XX_LOGICSTATEST_SHIFT		2
+#define AM33XX_LOGICSTATEST_MASK		(1 << 2)
+#define AM33XX_LOWPOWERSTATECHANGE_SHIFT	4
+#define AM33XX_LOWPOWERSTATECHANGE_MASK		(1 << 4)
 
 /* Read a register in a PRM instance */
 u32 am33xx_prm_read_reg(s16 inst, u16 idx)

index 27f4603..5033cd3 100644
@@ -23,11 +23,42 @@
 #include "prm44xx.h"
 #include "prm54xx.h"
 #include "prm7xx.h"
-#include "prm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prminst44xx_private.h"
 #include "powerdomain.h"
 
+#define OMAP4430_GLOBAL_COLD_RST_SHIFT			0
+#define OMAP4430_GLOBAL_WARM_SW_RST_SHIFT		1
+#define OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT		2
+#define OMAP4430_MPU_WDT_RST_SHIFT			3
+#define OMAP4430_SECURE_WDT_RST_SHIFT			4
+#define OMAP4430_EXTERNAL_WARM_RST_SHIFT		5
+#define OMAP4430_VDD_MPU_VOLT_MGR_RST_SHIFT		6
+#define OMAP4430_VDD_IVA_VOLT_MGR_RST_SHIFT		7
+#define OMAP4430_VDD_CORE_VOLT_MGR_RST_SHIFT		8
+#define OMAP4430_ICEPICK_RST_SHIFT			9
+#define OMAP4430_C2C_RST_SHIFT				10
+
+#define OMAP4430_GLOBAL_WUEN_MASK			(1 << 16)
+
+#define OMAP4430_LASTPOWERSTATEENTERED_SHIFT		24
+#define OMAP4430_LASTPOWERSTATEENTERED_MASK		(0x3 << 24)
+#define OMAP4430_LOWPOWERSTATECHANGE_SHIFT		4
+#define OMAP4430_LOWPOWERSTATECHANGE_MASK		(1 << 4)
+
+#define OMAP4430_LOGICRETSTATE_SHIFT			2
+#define OMAP4430_LOGICRETSTATE_MASK			(1 << 2)
+#define OMAP4430_LOGICSTATEST_SHIFT			2
+#define OMAP4430_LOGICSTATEST_MASK			(1 << 2)
+
+#define OMAP4430_VP_CORE_TRANXDONE_ST_MASK		(1 << 21)
+#define OMAP4430_VP_IVA_TRANXDONE_ST_MASK		(1 << 29)
+#define OMAP4430_VP_MPU_TRANXDONE_ST_MASK		(1 << 5)
+
+#define OMAP4430_WUCLK_CTRL_MASK			(1 << 8)
+#define OMAP4430_WUCLK_STATUS_SHIFT			9
+#define OMAP4430_WUCLK_STATUS_MASK			(1 << 9)
+
 /* Static data */
 
 #define OMAP44XX_IRQ_GIC_START	32

index bd0e0da..74349e1 100644
@@ -21,10 +21,11 @@
 #include "prm54xx.h"
 #include "prm7xx.h"
 #include "prminst44xx.h"
-#include "prm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prcm_mpu44xx.h"
 
+#define OMAP4430_RST_GLOBAL_WARM_SW_MASK		(1 << 0)
+
 static void __iomem *_prm_bases[OMAP4_MAX_PRCM_PARTITIONS];
 
 /**

index f1d3e15..8ae209a 100644
@@ -23,10 +23,62 @@
 #include "prm3xxx.h"
 #include "prm2xxx_3xxx_private.h"
 #include "cm2xxx_3xxx_private.h"
-#include "prm-regbits-34xx.h"
 #include "cm3xxx.h"
 #include "cm-regbits-34xx.h"
 
+#define OMAP3430_GLOBAL_COLD_RST_MASK			(1 << 0)
+#define OMAP3430_GLOBAL_COLD_RST_SHIFT			0
+#define OMAP3430_GLOBAL_SW_RST_SHIFT			1
+#define OMAP3430_SECURITY_VIOL_RST_SHIFT		3
+#define OMAP3430_MPU_WD_RST_SHIFT			4
+#define OMAP3430_SECURE_WD_RST_SHIFT			5
+#define OMAP3430_EXTERNAL_WARM_RST_SHIFT		6
+#define OMAP3430_VDD1_VOLTAGE_MANAGER_RST_SHIFT		7
+#define OMAP3430_VDD2_VOLTAGE_MANAGER_RST_SHIFT		8
+#define OMAP3430_ICEPICK_RST_SHIFT			9
+#define OMAP3430_ICECRUSHER_RST_SHIFT			10
+
+#define OMAP3430_VP1_TRANXDONE_ST_MASK			(1 << 15)
+#define OMAP3430_VP2_TRANXDONE_ST_MASK			(1 << 21)
+
+#define OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RST_MASK	(1 << 0)
+#define OMAP3430_RM_RSTCTRL_CORE_MODEM_SW_RSTPWRON_MASK	(1 << 1)
+
+#define OMAP3430_PM_WKEN_DSS_EN_DSS_MASK		(1 << 0)
+
+#define OMAP3430_GRPSEL_GPT1_MASK			(1 << 0)
+#define OMAP3430_GRPSEL_GPT12_MASK			(1 << 1)
+#define OMAP3430_GRPSEL_GPIO1_MASK			(1 << 3)
+#define OMAP3430_GRPSEL_MCBSP2_MASK			(1 << 0)
+#define OMAP3430_GRPSEL_MCBSP3_MASK			(1 << 1)
+#define OMAP3430_GRPSEL_MCBSP4_MASK			(1 << 2)
+#define OMAP3430_GRPSEL_UART3_MASK			(1 << 11)
+#define OMAP3430_GRPSEL_GPIO2_MASK			(1 << 13)
+#define OMAP3430_GRPSEL_GPIO3_MASK			(1 << 14)
+#define OMAP3430_GRPSEL_GPIO4_MASK			(1 << 15)
+#define OMAP3430_GRPSEL_GPIO5_MASK			(1 << 16)
+#define OMAP3430_GRPSEL_GPIO6_MASK			(1 << 17)
+#define OMAP3630_GRPSEL_UART4_MASK			(1 << 18)
+
+#define OMAP3430_EN_IO_MASK				(1 << 8)
+#define OMAP3430_EN_IO_CHAIN_MASK			(1 << 16)
+#define OMAP3430_ST_IO_CHAIN_MASK			(1 << 16)
+
+#define OMAP3430ES2_SAVEANDRESTORE_SHIFT		4
+
+#define OMAP3430_LASTLOGICSTATEENTERED_MASK		(1 << 2)
+#define OMAP3430_LASTMEM1STATEENTERED_MASK		(0x3 << 4)
+#define OMAP3430_LASTMEM2STATEENTERED_MASK		(0x3 << 6)
+#define OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK	(0x3 << 8)
+#define OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK		(0x3 << 10)
+
+#define OMAP3430_RST1_IVA2_MASK				(1 << 0)
+#define OMAP3430_RST2_IVA2_MASK				(1 << 1)
+#define OMAP3430_RST3_IVA2_MASK				(1 << 2)
+
+#define OMAP3430_LASTPOWERSTATEENTERED_MASK		(0x3 << 0)
+#define OMAP3430_LOGICSTATEST_MASK			(1 << 2)
+
 static const struct omap_prcm_irq omap3_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("wkup",	0,	0),
 	OMAP_PRCM_IRQ("io",	9,	1),

index 728ac3f..c7be4e4 100644
@@ -25,7 +25,6 @@
 #include "clockdomain.h"
 #include "cm.h"
 #include "cm33xx.h"
-#include "cm-regbits-34xx.h"
 #include "prm33xx.h"
 
 #define AM33XX_MODULEMODE_SHIFT			0

@@ -36,6 +35,11 @@
 #define AM33XX_IDLEST_SHIFT			16
 #define AM33XX_IDLEST_MASK			(0x3 << 16)
 
+#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO		0x0
+#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP		0x1
+#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP		0x2
+#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO		0x3
+
 /*
  * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
  *

index 989590e..859c2fd 100644
@@ -22,9 +22,15 @@
 #include "cm.h"
 #include "cm2xxx_3xxx_private.h"
 #include "cm3xxx.h"
-#include "cm-regbits-34xx.h"
 #include "clockdomain.h"
 
+#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO		0x0
+#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP		0x1
+#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP		0x2
+#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO		0x3
+
+#define OMAP3430_AUTO_PERIPH_DPLL_MASK		(0x7 << 3)
+
 static const u8 omap3xxx_cm_idlest_offs[] = {
 	CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
 };

index c2712d3..58e01c7 100644
@@ -27,7 +27,6 @@
 #include "cm2_44xx.h"
 #include "cm44xx.h"
 #include "cminst44xx.h"
-#include "cm-regbits-34xx.h"
 #include "prcm44xx.h"
 #include "prm44xx.h"
 #include "prcm_mpu44xx.h"

@@ -40,6 +39,11 @@
 #define OMAP4430_MODULEMODE_SHIFT	0
 #define OMAP4430_MODULEMODE_MASK	(0x3 << 0)
 
+#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO	0x0
+#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP	0x1
+#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP	0x2
+#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO	0x3
+
 /*
  * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
  *

index c40e5f0..2c62cd9 100644
@@ -16,7 +16,6 @@
 #include <linux/bug.h>
 #include "pm.h"
 #include "cm.h"
-#include "cm-regbits-34xx.h"
 #include "prm-regbits-34xx.h"
 #include "prm-regbits-44xx.h"
 

index 8ae209a..852bc4d 100644
@@ -24,7 +24,6 @@
 #include "prm2xxx_3xxx_private.h"
 #include "cm2xxx_3xxx_private.h"
 #include "cm3xxx.h"
-#include "cm-regbits-34xx.h"
 
 #define OMAP3430_GLOBAL_COLD_RST_MASK			(1 << 0)
 #define OMAP3430_GLOBAL_COLD_RST_SHIFT			0

@@ -79,6 +78,12 @@
 #define OMAP3430_LASTPOWERSTATEENTERED_MASK		(0x3 << 0)
 #define OMAP3430_LOGICSTATEST_MASK			(1 << 2)
 
+#define OMAP3430ES2_EN_USBHOST2_SHIFT			1
+
+#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK		(1 << 0)
+
+#define OMAP3430_CLKACTIVITY_IVA2_MASK			(1 << 0)
+
 static const struct omap_prcm_irq omap3_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("wkup",	0,	0),
 	OMAP_PRCM_IRQ("io",	9,	1),

index 2da3b5e..9a59efb 100644
@@ -29,7 +29,6 @@
 #include <linux/bitops.h>
 
 #include "soc.h"
-#include "clock.h"
 #include "clockdomain.h"
 
 /* clkdm_list contains all registered struct clockdomains */

index 82c37b1..4322a28 100644
@@ -17,7 +17,6 @@
 #include <linux/init.h>
 
 #include "powerdomain.h"
-#include "clock.h"
 
 /*
  * Clockdomain flags

@@ -98,6 +97,7 @@ struct clkdm_dep {
 #define _CLKDM_FLAG_HWSUP_ENABLED		BIT(0)
 
 struct omap_hwmod;
+struct clk;
 
 /**
  * struct clockdomain - OMAP clockdomain

index f356532..1a05d04 100644
@@ -519,6 +519,8 @@ struct omap_prcm_irq_setup {
 
 struct of_device_id;
 
+extern void __iomem *clk_memmaps[];
+
 extern void omap_prcm_irq_cleanup(void);
 extern int omap_prcm_register_chain_handler(
 	struct omap_prcm_irq_setup *irq_setup);

index 080b3ed..090d13f 100644
@@ -32,7 +32,6 @@
 #include "prm2xxx.h"
 #include "prm3xxx.h"
 #include "prm44xx.h"
-#include "clock.h"
 
 /*
  * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs

@@ -481,18 +480,16 @@ static struct of_device_id omap_prcm_dt_match_table[] = {
 	{ }
 };
 
-static struct clk_hw_omap memmap_dummy_ck = {
-	.flags = MEMMAP_ADDRESSING,
-};
-
 static u32 prm_clk_readl(void __iomem *reg)
 {
-	return omap2_clk_readl(&memmap_dummy_ck, reg);
+	struct clk_omap_reg *r = (struct clk_omap_reg *)®
+	return readl_relaxed(clk_memmaps[r->index] + r->offset);
 }
 
 static void prm_clk_writel(u32 val, void __iomem *reg)
 {
-	omap2_clk_writel(val, &memmap_dummy_ck, reg);
+	struct clk_omap_reg *r = (struct clk_omap_reg *)®
+	writel_relaxed(val, clk_memmaps[r->index] + r->offset);
 }
 
 static struct ti_clk_ll_ops omap_clk_ll_ops = {

index e74484a..6f04031 100644
@@ -21,7 +21,7 @@
 #include "prm2xxx.h"
 #include "cm.h"
 #include "cm2xxx_3xxx_private.h"
-#include "cm2xxx.h"
+#include <linux/power/omap/cm2xxx.h>
 #include "clockdomain.h"
 
 /* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */

62 lines not on this page · raw message

index c334d38..9a53eb5 100644
@@ -16,7 +16,7 @@
 #include <linux/errno.h>
 #include <linux/of.h>
 
-#include "cm2xxx.h"
+#include <linux/power/omap/cm2xxx.h>
 #include "cm3xxx.h"
 #include "cm44xx.h"
 

70 lines not on this page · raw message

index c7be4e4..7a7b2e7 100644
@@ -24,7 +24,7 @@
 
 #include "clockdomain.h"
 #include "cm.h"
-#include "cm33xx.h"
+#include <linux/power/omap/cm33xx.h>
 #include "prm33xx.h"
 
 #define AM33XX_MODULEMODE_SHIFT			0

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index 859c2fd..cbba617 100644
@@ -21,7 +21,7 @@
 #include "prm2xxx_3xxx.h"
 #include "cm.h"
 #include "cm2xxx_3xxx_private.h"
-#include "cm3xxx.h"
+#include <linux/power/omap/cm3xxx.h>
 #include "clockdomain.h"
 
 #define OMAP34XX_CLKSTCTRL_DISABLE_AUTO		0x0

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index 9a53eb5..f8f9343 100644
@@ -17,7 +17,7 @@
 #include <linux/of.h>
 
 #include <linux/power/omap/cm2xxx.h>
-#include "cm3xxx.h"
+#include <linux/power/omap/cm3xxx.h>
 #include "cm44xx.h"
 
 /*

index 852bc4d..4700605 100644
@@ -23,7 +23,7 @@
 #include "prm3xxx.h"
 #include "prm2xxx_3xxx_private.h"
 #include "cm2xxx_3xxx_private.h"
-#include "cm3xxx.h"
+#include <linux/power/omap/cm3xxx.h>
 
 #define OMAP3430_GLOBAL_COLD_RST_MASK			(1 << 0)
 #define OMAP3430_GLOBAL_COLD_RST_SHIFT			0

82 lines not on this page · raw message

deleted file mode 100644
index 3380bee..0000000
@@ -1,26 +0,0 @@
-/*
- * OMAP4 Clock Management (CM) definitions
- *
- * Copyright (C) 2007-2011 Texas Instruments, Inc.
- * Copyright (C) 2007-2009 Nokia Corporation
- *
- * Written by Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * OMAP4 has two separate CM blocks, CM1 and CM2.  This file contains
- * macros and function prototypes that are applicable to both.
- */
-#ifndef __ARCH_ASM_MACH_OMAP2_CM44XX_H
-#define __ARCH_ASM_MACH_OMAP2_CM44XX_H
-
-
-#include "prcm-common.h"
-#include "cm.h"
-
-#define OMAP4_CM_CLKSTCTRL				0x0000
-#define OMAP4_CM_STATICDEP				0x0004
-
-#endif

index f8f9343..8655538 100644
@@ -18,7 +18,8 @@
 
 #include <linux/power/omap/cm2xxx.h>
 #include <linux/power/omap/cm3xxx.h>
-#include "cm44xx.h"
+#include "cm.h"
+#include "prcm-common.h"
 
 /*
  * cm_ll_data: function pointers to SoC-specific implementations of

index 58e01c7..dfb1a93 100644
@@ -25,7 +25,6 @@
 #include "cm.h"
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
-#include "cm44xx.h"
 #include "cminst44xx.h"
 #include "prcm44xx.h"
 #include "prm44xx.h"

@@ -44,6 +43,9 @@
 #define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP	0x2
 #define OMAP34XX_CLKSTCTRL_ENABLE_AUTO	0x3
 
+#define OMAP4_CM_CLKSTCTRL		0x0000
+#define OMAP4_CM_STATICDEP		0x0004
+
 /*
  * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
  *

index faebd5f..62649ba 100644
@@ -24,7 +24,6 @@
 
 #include "cm2xxx_3xxx.h"
 #include "prcm44xx.h"
-#include "cm44xx.h"
 #include "prm2xxx_3xxx.h"
 #include "prm44xx.h"
 

index 333f0a6..b4cf577 100644
@@ -17,7 +17,7 @@
 
 #include "clock.h"
 #include "clock2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-24xx.h"
 
 /* Private functions */

index 0b02b41..4706f2f 100644
@@ -26,7 +26,7 @@
 #include "clock3xxx.h"
 #include "prm2xxx_3xxx.h"
 #include "prm-regbits-34xx.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-34xx.h"
 
 /*

index 7e76bec..7931fd1 100644
@@ -38,7 +38,7 @@
 #include "soc.h"
 #include "clockdomain.h"
 #include "prm2xxx_3xxx.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-24xx.h"
 #include "prm-regbits-24xx.h"
 

index b923007..2e3918c 100644
@@ -38,7 +38,7 @@
 #include "soc.h"
 #include "clockdomain.h"
 #include "prm2xxx_3xxx.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-24xx.h"
 #include "prm-regbits-24xx.h"
 

index 4972219..b728d6e 100644
@@ -37,7 +37,7 @@
 
 #include "clockdomain.h"
 #include "prm2xxx_3xxx.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-24xx.h"
 #include "cm-regbits-34xx.h"
 #include "cm-regbits-44xx.h"

index e6b91e5..27851ac 100644
@@ -36,7 +36,7 @@
 #include "soc.h"
 #include "clockdomain.h"
 #include "prm2xxx_3xxx.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-34xx.h"
 #include "prm-regbits-34xx.h"
 

index 5eaa007..80e9892 100644
@@ -17,7 +17,7 @@
 #define __ARCH_ASM_MACH_OMAP2_CM2XXX_H
 
 #include "prcm-common.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include <linux/power/omap/cm2xxx.h>
 
 #define OMAP2420_CM_REGADDR(module, reg)				\

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index 9131829..ca7ca94 100644
@@ -17,7 +17,7 @@
 #define __ARCH_ARM_MACH_OMAP2_CM2XXX_3XXX_PRIVATE_H
 
 #include "cm.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 
 #ifndef __ASSEMBLER__
 

index 9c2047f..5fdc14c 100644
@@ -17,7 +17,7 @@
 #define __ARCH_ASM_MACH_OMAP2_CM3XXX_H
 
 #include "prcm-common.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include <linux/power/omap/cm3xxx.h>
 
 #define OMAP34XX_CM_REGADDR(module, reg)				\

index 3185ced..79ce6e8 100644
@@ -31,7 +31,7 @@
 #include "soc.h"
 #include "clockdomain.h"
 #include "clock.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-34xx.h"
 
 /* CM_AUTOIDLE_PLL*.AUTO_* bit values */

index b8208b4..1d802fe 100644
@@ -24,7 +24,7 @@
 #include <asm/memblock.h>
 
 #include "control.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "prm2xxx_3xxx.h"
 #ifdef CONFIG_TIDSPBRIDGE_DVFS
 #include "omap-pm.h"

index 0b33986..95f28b2 100644
@@ -33,7 +33,7 @@
 #include "omap-pm.h"
 
 #include "soc.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "prm2xxx_3xxx.h"
 #include "pm.h"
 

index 62649ba..e532d2b 100644
@@ -22,7 +22,7 @@
 #include <linux/spinlock.h>
 #include <trace/events/power.h>
 
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "prcm44xx.h"
 #include "prm2xxx_3xxx.h"
 #include "prm44xx.h"

index 328c103..9db6a8e 100644
@@ -21,7 +21,7 @@
 #include "prcm-common.h"
 #include "prm2xxx_3xxx.h"
 #include "prm-regbits-34xx.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-34xx.h"
 
 /*

index 7264ae6..5b5260c 100644
@@ -22,7 +22,7 @@
 #include "clockdomain.h"
 #include "prm2xxx.h"
 #include "prm2xxx_3xxx_private.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 
 #define OMAP24XX_FORCESTATE_MASK		(1 << 18)
 #define OMAP24XX_AUTOIDLE_MASK			(1 << 0)

index a388f8c..90e06b3 100644
@@ -36,7 +36,7 @@
 #include "soc.h"
 #include "prm2xxx_3xxx.h"
 #include "pm.h"
-#include "cm2xxx_3xxx.h"
+#include <linux/power/omap/cm2xxx_3xxx.h>
 #include "prm-regbits-34xx.h"
 #include "control.h"
 #include "mux.h"

70 lines not on this page · raw message

index 5ae8fe3..a594992 100644
@@ -25,8 +25,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM1 base address */
 #define OMAP4430_CM1_BASE		0x4a004000
 

index 90b3348..fd245df 100644
@@ -22,8 +22,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM1 base address */
 #define OMAP54XX_CM_CORE_AON_BASE		0x4a004000
 

index ca6fa1f..2f1c09e 100644
@@ -23,8 +23,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_7XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM1_7XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM1 base address */
 #define DRA7XX_CM_CORE_AON_BASE		0x4a005000
 

index ee5136d..7521abf 100644
@@ -25,8 +25,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM2 base address */
 #define OMAP4430_CM2_BASE		0x4a008000
 

index 2683231..ff4040c 100644
@@ -21,8 +21,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM2 base address */
 #define OMAP54XX_CM_CORE_BASE		0x4a008000
 

index 9ad7594..ef00a9d 100644
@@ -22,8 +22,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_7XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM2_7XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM2 base address */
 #define DRA7XX_CM_CORE_BASE		0x4a008000
 

deleted file mode 100644
index cbb2116..0000000
@@ -1,36 +0,0 @@
-/*
- * OMAP44xx and OMAP54xx CM1/CM2 function prototypes
- *
- * Copyright (C) 2009-2013 Texas Instruments, Inc.
- * Copyright (C) 2009-2010 Nokia Corporation
- *
- * Paul Walmsley (paul at pwsan.com)
- * Rajendra Nayak (rnayak at ti.com)
- * Benoit Cousson (b-cousson at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap at vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CM_44XX_54XX_H
-#define __ARCH_ARM_MACH_OMAP2_CM_44XX_55XX_H
-
-/* CM1 Function prototypes */
-extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
-extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
-extern u32 omap4_cm1_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-
-/* CM2 Function prototypes */
-extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
-extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
-extern u32 omap4_cm2_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-
-#endif

index dfb1a93..20681de 100644
@@ -80,6 +80,8 @@ void omap_cm_base_init(void)
 
 /* Private functions */
 
+static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
+
 /**
  * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in

@@ -118,10 +120,8 @@ static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
 		v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
 }
 
-/* Public functions */
-
 /* Read a register in a CM instance */
-u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
+static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
 {
 	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
 	       part == OMAP4430_INVALID_PRCM_PARTITION ||

@@ -130,7 +130,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
 }
 
 /* Write into a register in a CM instance */
-void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
+static void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
 {
 	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
 	       part == OMAP4430_INVALID_PRCM_PARTITION ||

@@ -139,8 +139,8 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
 }
 
 /* Read-modify-write a register in CM1. Caller must lock */
-u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
-				   s16 idx)
+static u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
+					  s16 idx)
 {
 	u32 v;
 

@@ -152,17 +152,18 @@ u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
 	return v;
 }
 
-u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
+static u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
 {
 	return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx);
 }
 
-u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
+static u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
+					    s16 idx)
 {
 	return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx);
 }
 
-u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
+static u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
 {
 	u32 v;
 

@@ -173,9 +174,7 @@ u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
 	return v;
 }
 
-/*
- *
- */
+/* Public functions */
 
 /**
  * _clktrctrl_write - write @c to a CM_CLKSTCTRL.CLKTRCTRL register bitfield

index 7f56ea4..ad06525 100644
@@ -23,20 +23,6 @@ extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
 				       u16 clkctrl_offs);
 extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
-/*
- * In an ideal world, we would not export these low-level functions,
- * but this will probably take some time to fix properly
- */
-u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
-void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx);
-u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
-				   u16 inst, s16 idx);
-u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst,
-				   s16 idx);
-u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
-				     s16 idx);
-extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
-					   u32 mask);
 
 extern void omap_cm_base_init(void);
 

index 20681de..2f780df 100644
@@ -25,7 +25,7 @@
 #include "cm.h"
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
-#include "cminst44xx.h"
+#include <linux/power/omap/cm44xx.h>
 #include "prcm44xx.h"
 #include "prm44xx.h"
 #include "prcm_mpu44xx.h"

deleted file mode 100644
index ad06525..0000000
@@ -1,29 +0,0 @@
-/*
- * OMAP4 Clock Management (CM) function prototypes
- *
- * Copyright (C) 2010 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
-#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
-
-bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
-extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
-extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
-					 u16 clkctrl_offs);
-extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
-				       u16 clkctrl_offs);
-extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
-
-extern void omap_cm_base_init(void);
-
-#endif

index dfba898..6212c10 100644
@@ -49,7 +49,7 @@
 #include "cm.h"
 #include "prcm_mpu44xx.h"
 #include "prminst44xx.h"
-#include "cminst44xx.h"
+#include <linux/power/omap/cm44xx.h>
 #include "prm2xxx.h"
 #include "prm3xxx.h"
 #include "prm44xx.h"

index 54c24e1..4576f0b 100644
@@ -153,7 +153,7 @@
 #include "powerdomain.h"
 #include "cm2xxx.h"
 #include "cm3xxx.h"
-#include "cminst44xx.h"
+#include <linux/power/omap/cm44xx.h>
 #include "cm33xx.h"
 #include "prm.h"
 #include "prm3xxx.h"

new file mode 100644
index 0000000..eda5670
@@ -0,0 +1,30 @@
+/*
+ * OMAP4 Clock Management (CM) function prototypes
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __LINUX_POWER_OMAP_CM44XX_H
+#define __LINUX_POWER_OMAP_CM44XX_H
+
+bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs);
+void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
+void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
+void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
+void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
+int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs,
+				   u16 clkctrl_offs);
+int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
+				  u16 clkctrl_offs);
+void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
+				u16 clkctrl_offs);
+void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
+				 u16 clkctrl_offs);
+
+void omap_cm_base_init(void);
+
+#endif

index 4ac6e3d..4276c46 100644
@@ -31,7 +31,7 @@
 #include "soc.h"
 #include "clockdomain.h"
 #include "clock.h"
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "cm2xxx.h"
 #include "cm3xxx.h"
 #include "cm-regbits-24xx.h"

index b870f6a..4c996dd 100644
@@ -25,7 +25,7 @@
 #include "soc.h"
 #include "clock.h"
 #include "clock2xxx.h"
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "cm-regbits-24xx.h"
 
 struct clk_hw *dclk_hw;

index 32c90fd..e86f84e 100644
@@ -18,7 +18,7 @@
 #include <linux/io.h>
 
 #include "clockdomain.h"
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "cm33xx.h"
 #include "cm-regbits-33xx.h"
 

64 lines not on this page · raw message

index 6f04031..f4a070c 100644
@@ -19,7 +19,7 @@
 #include <linux/io.h>
 
 #include "prm2xxx.h"
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "cm2xxx_3xxx_private.h"
 #include <linux/power/omap/cm2xxx.h>
 #include "clockdomain.h"

index ca7ca94..a28dff0 100644
@@ -16,7 +16,7 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2XXX_3XXX_PRIVATE_H
 #define __ARCH_ARM_MACH_OMAP2_CM2XXX_3XXX_PRIVATE_H
 
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include <linux/power/omap/cm2xxx_3xxx.h>
 
 #ifndef __ASSEMBLER__

index 7a7b2e7..7717eeb 100644
@@ -23,7 +23,7 @@
 #include <linux/io.h>
 
 #include "clockdomain.h"
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include <linux/power/omap/cm33xx.h>
 #include "prm33xx.h"
 

index 67f1d49..d8c4278 100644
@@ -17,7 +17,7 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM_33XX_H
 
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include <linux/power/omap/cm33xx.h>
 
 /* CM base address */

index cbba617..0818156 100644
@@ -19,7 +19,7 @@
 #include <linux/io.h>
 
 #include "prm2xxx_3xxx.h"
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "cm2xxx_3xxx_private.h"
 #include <linux/power/omap/cm3xxx.h>
 #include "clockdomain.h"

index c440ba7..506974b 100644
@@ -18,7 +18,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
 

index 8655538..3843f1f 100644
@@ -18,7 +18,7 @@
 
 #include <linux/power/omap/cm2xxx.h>
 #include <linux/power/omap/cm3xxx.h>
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "prcm-common.h"
 
 /*

index 2f780df..b577a8e 100644
@@ -22,7 +22,7 @@
 #include <linux/io.h>
 
 #include "clockdomain.h"
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
 #include <linux/power/omap/cm44xx.h>

index 6212c10..ed677bb 100644
@@ -46,7 +46,7 @@
 #include "cm2xxx.h"
 #include "cm3xxx.h"
 #include "prm.h"
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "prcm_mpu44xx.h"
 #include "prminst44xx.h"
 #include <linux/power/omap/cm44xx.h>

index 2c62cd9..8c511e3 100644
@@ -15,7 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/bug.h>
 #include "pm.h"
-#include "cm.h"
+#include <linux/power/omap/cm.h>
 #include "prm-regbits-34xx.h"
 #include "prm-regbits-44xx.h"
 

64 lines not on this page · raw message

index f4a070c..b37783a 100644
@@ -18,11 +18,13 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "prm2xxx.h"
+#include <linux/power/omap/prm2xxx.h>
 #include <linux/power/omap/cm.h>
 #include "cm2xxx_3xxx_private.h"
 #include <linux/power/omap/cm2xxx.h>
 #include "clockdomain.h"
+#include "prcm-common.h"
+#include "prm2xxx_3xxx.h"
 
 /* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */
 #define DPLL_AUTOIDLE_DISABLE				0x0

index 5b5260c..849b415 100644
@@ -20,7 +20,7 @@
 
 #include "powerdomain.h"
 #include "clockdomain.h"
-#include "prm2xxx.h"
+#include <linux/power/omap/prm2xxx.h>
 #include "prm2xxx_3xxx_private.h"
 #include <linux/power/omap/cm2xxx_3xxx.h>
 

index 071bb6d..19ff266 100644
@@ -19,6 +19,7 @@
 #include "prcm-common.h"
 #include "prm.h"
 #include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx.h>
 
 #define OMAP2420_PRM_REGADDR(module, reg)				\
 		OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))

@@ -35,9 +36,7 @@
  *
  */
 
-#define OMAP2_PRCM_REVISION_OFFSET	0x0000
 #define OMAP2420_PRCM_REVISION		OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000)
-#define OMAP2_PRCM_SYSCONFIG_OFFSET	0x0010
 #define OMAP2420_PRCM_SYSCONFIG		OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010)
 
 #define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET	0x0018

@@ -45,11 +44,9 @@
 #define OMAP2_PRCM_IRQENABLE_MPU_OFFSET	0x001c
 #define OMAP2420_PRCM_IRQENABLE_MPU	OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c)
 
-#define OMAP2_PRCM_VOLTCTRL_OFFSET	0x0050
 #define OMAP2420_PRCM_VOLTCTRL		OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050)
 #define OMAP2_PRCM_VOLTST_OFFSET	0x0054
 #define OMAP2420_PRCM_VOLTST		OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054)
-#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET	0x0060
 #define OMAP2420_PRCM_CLKSRC_CTRL	OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060)
 #define OMAP2_PRCM_CLKOUT_CTRL_OFFSET	0x0070
 #define OMAP2420_PRCM_CLKOUT_CTRL	OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070)

@@ -59,9 +56,7 @@
 #define OMAP2420_PRCM_CLKCFG_CTRL	OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080)
 #define OMAP2_PRCM_CLKCFG_STATUS_OFFSET	0x0084
 #define OMAP2420_PRCM_CLKCFG_STATUS	OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084)
-#define OMAP2_PRCM_VOLTSETUP_OFFSET	0x0090
 #define OMAP2420_PRCM_VOLTSETUP		OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090)
-#define OMAP2_PRCM_CLKSSETUP_OFFSET	0x0094
 #define OMAP2420_PRCM_CLKSSETUP		OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094)
 #define OMAP2_PRCM_POLCTRL_OFFSET	0x0098
 #define OMAP2420_PRCM_POLCTRL		OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098)

@@ -119,17 +114,4 @@
 #define OMAP24XX_PRCM_IRQSTATUS_IVA			0x00f8
 #define OMAP24XX_PRCM_IRQENABLE_IVA			0x00fc
 
-#ifndef __ASSEMBLER__
-/* Function prototypes */
-extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
-extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
-
-extern void omap2xxx_prm_dpll_reset(void);
-void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
-void omap2xxx_prm_init_pm(void);
-
-extern int __init omap2xxx_prm_init(void);
-
-#endif
-
 #endif

index 090d13f..273a338 100644
@@ -29,7 +29,7 @@
 #include <linux/clk/ti.h>
 
 #include "prm2xxx_3xxx.h"
-#include "prm2xxx.h"
+#include <linux/power/omap/prm2xxx.h>
 #include "prm3xxx.h"
 #include "prm44xx.h"
 

new file mode 100644
index 0000000..32b76d5
@@ -0,0 +1,39 @@
+/*
+ * OMAP2xxx Power/Reset Management (PRM) register definitions
+ *
+ * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc.
+ * Copyright (C) 2008-2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * The PRM hardware modules on the OMAP2/3 are quite similar to each
+ * other.  The PRM on OMAP4 has a new register layout, and is handled
+ * in a separate file.
+ */
+#ifndef __LINUX_POWER_OMAP_PRM2XXX_H
+#define __LINUX_POWER_OMAP_PRM2XXX_H
+
+#define OMAP2_PRCM_REVISION_OFFSET		0x0000
+#define OMAP2_PRCM_SYSCONFIG_OFFSET		0x0010
+#define OMAP2_PRCM_VOLTCTRL_OFFSET		0x0050
+#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET		0x0060
+#define OMAP2_PRCM_VOLTSETUP_OFFSET		0x0090
+#define OMAP2_PRCM_CLKSSETUP_OFFSET		0x0094
+
+#ifndef __ASSEMBLER__
+
+struct clockdomain;
+
+/* Function prototypes */
+int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
+int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
+void omap2xxx_prm_dpll_reset(void);
+void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
+void omap2xxx_prm_init_pm(void);
+int __init omap2xxx_prm_init(void);
+#endif
+
+#endif

index 4706f2f..aebe66b 100644
@@ -24,7 +24,7 @@
 #include "soc.h"
 #include "clock.h"
 #include "clock3xxx.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include "prm-regbits-34xx.h"
 #include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-34xx.h"

index 7931fd1..432cb14 100644
@@ -37,7 +37,7 @@
 
 #include "soc.h"
 #include "clockdomain.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-24xx.h"
 #include "prm-regbits-24xx.h"

index 2e3918c..48df0fb 100644
@@ -37,7 +37,7 @@
 
 #include "soc.h"
 #include "clockdomain.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-24xx.h"
 #include "prm-regbits-24xx.h"

index b728d6e..435e5c3 100644
@@ -36,7 +36,7 @@
 #include <linux/io.h>
 
 #include "clockdomain.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-24xx.h"
 #include "cm-regbits-34xx.h"

index 27851ac..9272baf 100644
@@ -35,7 +35,7 @@
 
 #include "soc.h"
 #include "clockdomain.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-34xx.h"
 #include "prm-regbits-34xx.h"

index b37783a..2385498 100644
@@ -24,7 +24,7 @@
 #include <linux/power/omap/cm2xxx.h>
 #include "clockdomain.h"
 #include "prcm-common.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 
 /* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */
 #define DPLL_AUTOIDLE_DISABLE				0x0

index 0818156..a80cd3e 100644
@@ -18,11 +18,12 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include <linux/power/omap/cm.h>
 #include "cm2xxx_3xxx_private.h"
 #include <linux/power/omap/cm3xxx.h>
 #include "clockdomain.h"
+#include "prcm-common.h"
 
 #define OMAP34XX_CLKSTCTRL_DISABLE_AUTO		0x0
 #define OMAP34XX_CLKSTCTRL_FORCE_SLEEP		0x1

index 1d802fe..a48b6d9 100644
@@ -25,7 +25,7 @@
 
 #include "control.h"
 #include <linux/power/omap/cm2xxx_3xxx.h>
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #ifdef CONFIG_TIDSPBRIDGE_DVFS
 #include "omap-pm.h"
 #endif

index 95f28b2..d2e4fb8 100644
@@ -34,7 +34,7 @@
 
 #include "soc.h"
 #include <linux/power/omap/cm2xxx_3xxx.h>
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include "pm.h"
 
 u32 enable_off_mode;

index e532d2b..fdb6172 100644
@@ -24,7 +24,7 @@
 
 #include <linux/power/omap/cm2xxx_3xxx.h>
 #include "prcm44xx.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include "prm44xx.h"
 
 #include <asm/cpu.h>

index 578eef8..266bd96 100644
@@ -19,7 +19,7 @@
 #include "powerdomains2xxx_3xxx_data.h"
 
 #include "prcm-common.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include "prm-regbits-24xx.h"
 
 /* 24XX powerdomains and dependencies */

index 9db6a8e..7ba44db 100644
@@ -19,7 +19,7 @@
 #include "powerdomain.h"
 #include "powerdomains2xxx_3xxx_data.h"
 #include "prcm-common.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include "prm-regbits-34xx.h"
 #include <linux/power/omap/cm2xxx_3xxx.h>
 #include "cm-regbits-34xx.h"

index 19ff266..feeaf00 100644
@@ -18,8 +18,8 @@
 
 #include "prcm-common.h"
 #include "prm.h"
-#include "prm2xxx_3xxx.h"
 #include <linux/power/omap/prm2xxx.h>
+#include <linux/power/omap/prm2xxx_3xxx.h>
 
 #define OMAP2420_PRM_REGADDR(module, reg)				\
 		OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))

198 lines not on this page · raw message

index 6e007e9..ebd6a09 100644
@@ -18,7 +18,7 @@
 
 #include "prcm-common.h"
 #include "prm.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 
 #ifndef __ASSEMBLER__
 

index 0e759bc..c79f4c6 100644
@@ -18,7 +18,7 @@
 
 #include "prcm-common.h"
 #include "prm.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 
 #define OMAP34XX_PRM_REGADDR(module, reg)				\
 		OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))

index 273a338..c3eef62 100644
@@ -28,7 +28,7 @@
 #include <linux/clk-provider.h>
 #include <linux/clk/ti.h>
 
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include <linux/power/omap/prm2xxx.h>
 #include "prm3xxx.h"
 #include "prm44xx.h"

index 90e06b3..0413d7e 100644
@@ -34,7 +34,7 @@
 #include "omap_device.h"
 #include "omap-pm.h"
 #include "soc.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include "pm.h"
 #include <linux/power/omap/cm2xxx_3xxx.h>
 #include "prm-regbits-34xx.h"

index 4bd0968..d18dc7b 100644
@@ -26,7 +26,7 @@
 
 #include "soc.h"
 #include "iomap.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 #include "sdrc.h"
 #include "sram.h"
 

index 1914e02..8507479 100644
@@ -25,7 +25,7 @@
 #include "voltage.h"
 
 #include "vp.h"
-#include "prm2xxx_3xxx.h"
+#include <linux/power/omap/prm2xxx_3xxx.h>
 
 static const struct omap_vp_ops omap3_vp_ops = {
 	.check_txdone = omap3_prm_vp_check_txdone,

197 lines not on this page · raw message

index c88d8df7..7286389 100644
@@ -24,12 +24,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
 {
 	/* TODO: Handle mode and cmd if necessary */
 
-	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
-				AM33XX_RST_GLOBAL_WARM_SW_MASK,
-				AM33XX_PRM_DEVICE_MOD,
-				AM33XX_PRM_RSTCTRL_OFFSET);
-
-	/* OCP barrier */
-	(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
-				  AM33XX_PRM_RSTCTRL_OFFSET);
+	am33xx_prm_global_warm_sw_reset();
 }

index 877d7c7..a08b1da 100644
@@ -29,6 +29,10 @@
 #define AM33XX_LOWPOWERSTATECHANGE_SHIFT	4
 #define AM33XX_LOWPOWERSTATECHANGE_MASK		(1 << 4)
 
+#define AM33XX_PRM_RSTCTRL_OFFSET		0x0000
+
+#define AM33XX_RST_GLOBAL_WARM_SW_MASK		(1 << 0)
+
 /* Read a register in a PRM instance */
 u32 am33xx_prm_read_reg(s16 inst, u16 idx)
 {

@@ -331,6 +335,18 @@ static int am33xx_check_vcvp(void)
 	return 0;
 }
 
+void am33xx_prm_global_warm_sw_reset(void)
+{
+	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
+				AM33XX_RST_GLOBAL_WARM_SW_MASK,
+				AM33XX_PRM_DEVICE_MOD,
+				AM33XX_PRM_RSTCTRL_OFFSET);
+
+	/* OCP barrier */
+	(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
+				  AM33XX_PRM_RSTCTRL_OFFSET);
+}
+
 struct pwrdm_ops am33xx_pwrdm_operations = {
 	.pwrdm_set_next_pwrst		= am33xx_pwrdm_set_next_pwrst,
 	.pwrdm_read_next_pwrst		= am33xx_pwrdm_read_next_pwrst,