Skip to contentSkip to conversation

ARM: errata: Fix the workaround for erratum 764369

PATCH New Nitin Garg 3 participants 3 messages Mar 31, 2014 – Apr 14, 2014 Arm (32-bit)

lore
Share & tools
lore

Nitin Garg

author
#0 lore raw

PATCH 1/1 ARM: errata: Fix the workaround for erratum 764369

The SCU diagnostic control register at offset 0x30 is write-only register, so do not do read-modify write.

---
 arch/arm/kernel/smp_scu.c |    4 +---
 1 files changed, 1 insertions(+), 3 deletions(-)
arch/arm/kernel/smp_scu.c +1 -3
index 1aafa0d..b0cca7e 100644
@@ -42,9 +42,7 @@ void scu_enable(void __iomem *scu_base)
 #ifdef CONFIG_ARM_ERRATA_764369
 	/* Cortex-A9 only */
 	if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc090) {
-		scu_ctrl = readl_relaxed(scu_base + 0x30);
-		if (!(scu_ctrl & 1))
-			writel_relaxed(scu_ctrl | 0x1, scu_base + 0x30);
+		writel_relaxed(0x1, scu_base + 0x30);
 	}
 #endif
 
Signature · 1 line
1.7.4.1
#1 lore raw

PATCH 1/1 ARM: errata: Fix the workaround for erratum 764369

arch/arm/kernel/smp_scu.c void scu_enable(void __iomem *scu_base) · line 47

Quoted 10 lines · Nitin Garg <nitin.garg <at> freescale.com> writes:

#ifdef CONFIG_ARM_ERRATA_764369

arch/arm/kernel/smp_scu.c +1 -3
 	/* Cortex-A9 only */
 	if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc090) {
-		scu_ctrl = readl_relaxed(scu_base + 0x30);
-		if (!(scu_ctrl & 1))
-			writel_relaxed(scu_ctrl | 0x1, scu_base + 0x30);
+		writel_relaxed(0x1, scu_base + 0x30);
 	}
 #endif

Hmmm.. SCU diagnostic control register is undocumented one, afaics. Anyway, writel_* is supposed to write u32, so writing plain 0x1 sets-off other settings, doesn't it?

Vladimir

#2 lore raw

PATCH 1/1 ARM: errata: Fix the workaround for erratum 764369

In reply to Nitin Garg
Quoted 2 lines · Nitin Garg

The SCU diagnostic control register at offset 0x30 is write-only register, so do not do read-modify write.

As far as I can tell, the register isn't even documented, so I'd rather leave the code as-is unless it's causing you problems.

If the behaviour is as you suggest, then doing multiple writes to the register would undo prvious writes (otherwise it wouldn't be possible to clear bits), which doesn't sound realistic to me.

Will

Quoted 25 lines
---
 arch/arm/kernel/smp_scu.c |    4 +---
 1 files changed, 1 insertions(+), 3 deletions(-)
arch/arm/kernel/smp_scu.c +1 -3
index 1aafa0d..b0cca7e 100644
@@ -42,9 +42,7 @@ void scu_enable(void __iomem *scu_base)
 #ifdef CONFIG_ARM_ERRATA_764369
 	/* Cortex-A9 only */
 	if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc090) {
-		scu_ctrl = readl_relaxed(scu_base + 0x30);
-		if (!(scu_ctrl & 1))
-			writel_relaxed(scu_ctrl | 0x1, scu_base + 0x30);
+		writel_relaxed(0x1, scu_base + 0x30);
 	}
 #endif
 
Signature · 1 line
1.7.4.1