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ARM: dts: Add Phytec pfla02 with i.MX6 DualLite/Solo

PATCH New Philipp Zabel 2 participants 12 messages Apr 14, 2014 – Apr 16, 2014

Subsystems (3)
Device tree bindings Arm i.MX and Layerscape Arm and arm64 SoC sub-architectures (common parts)
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Philipp Zabel

author
#0 lore raw

PATCH 1/10 ARM: dts: Add Phytec pfla02 with i.MX6 DualLite/Solo

Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi  |  22 ++
 arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi   | 307 +------------------------
 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 323 +++++++++++++++++++++++++++
 3 files changed, 347 insertions(+), 305 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi
 create mode 100644 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi new file +22 -0
new file mode 100644
index 0000000..964bc2a
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-phytec-pfla02.dtsi"
+
+/ {
+	model = "Phytec phyFLEX-i.MX6 DualLite/Solo";
+	compatible = "phytec,imx6dl-pfla02", "fsl,imx6dl";
+
+	memory {
+		reg = <0x10000000 0x20000000>;
+	};
+};
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +2 -305

318 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi new file +323 -0

323 lines not on this page · raw message

Signature · 1 line
1.9.1
author
#1 lore raw

PATCH 2/10 ARM: dts: Add Phytec pbab01 with i.MX6 DualLite/Solo

The PBA-B-01 carrier board can be equipped with either Quad or DualLite/Solo phyFLEX i.MX6 modules (PFL-A-02).
This moves all common devices into imx6qdl-phytec-pbab01.dtsi. The SoC specific device trees then just include the pfla01 and pbab01 dtsi files corresponding to the SoC variant.

Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/Makefile                   |  1 +
 arch/arm/boot/dts/imx6dl-phytec-pbab01.dts   | 19 ++++++++++++++
 arch/arm/boot/dts/imx6q-phytec-pbab01.dts    | 31 ++---------------------
 arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 38 ++++++++++++++++++++++++++++
 4 files changed, 60 insertions(+), 29 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6dl-phytec-pbab01.dts
 create mode 100644 arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
arch/arm/boot/dts/Makefile +1 -0
index 35c146f..1afa764 100644
@@ -197,6 +197,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx6q-gw54xx.dtb \
 	imx6q-nitrogen6x.dtb \
 	imx6q-phytec-pbab01.dtb \
+	imx6dl-phytec-pbab01.dtb \
 	imx6q-sabreauto.dtb \
 	imx6q-sabrelite.dtb \
 	imx6q-sabresd.dtb \
arch/arm/boot/dts/imx6dl-phytec-pbab01.dts new file +19 -0
new file mode 100644
index 0000000..08e9780
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6dl-phytec-pfla02.dtsi"
+#include "imx6qdl-phytec-pbab01.dtsi"
+
+/ {
+	model = "Phytec phyFLEX-i.MX6 DualLite/Solo Carrier-Board";
+	compatible = "phytec,imx6dl-pbab01", "phytec,imx6dl-pfla02", "fsl,imx6dl";
+};
arch/arm/boot/dts/imx6q-phytec-pbab01.dts +2 -29
index 5607c33..3a43dab 100644
@@ -11,40 +11,13 @@
 
 /dts-v1/;
 #include "imx6q-phytec-pfla02.dtsi"
+#include "imx6qdl-phytec-pbab01.dtsi"
 
 / {
 	model = "Phytec phyFLEX-i.MX6 Quad Carrier-Board";
 	compatible = "phytec,imx6q-pbab01", "phytec,imx6q-pfla02", "fsl,imx6q";
 };
 
-&fec {
-	status = "okay";
-};
-
-&gpmi {
-	status = "okay";
-};
-
 &sata {
-	status = "okay";
-};
-
-&uart4 {
-	status = "okay";
-};
-
-&usbh1 {
-	status = "okay";
-};
-
-&usbotg {
-	status = "okay";
-};
-
-&usdhc2 {
-	status = "okay";
-};
-
-&usdhc3 {
-	status = "okay";
+        status = "okay";
 };
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi new file +38 -0
new file mode 100644
index 0000000..cd2d4af
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+&fec {
+	status = "okay";
+};
+
+&gpmi {
+	status = "okay";
+};
+
+&uart4 {
+	status = "okay";
+};
+
+&usbh1 {
+	status = "okay";
+};
+
+&usbotg {
+	status = "okay";
+};
+
+&usdhc2 {
+	status = "okay";
+};
+
+&usdhc3 {
+	status = "okay";
+};
Signature · 1 line
1.9.1
#2 lore raw

PATCH 2/10 ARM: dts: Add Phytec pbab01 with i.MX6 DualLite/Solo

Quoted 21 lines · Philipp Zabel

The PBA-B-01 carrier board can be equipped with either Quad or DualLite/Solo phyFLEX i.MX6 modules (PFL-A-02).
This moves all common devices into imx6qdl-phytec-pbab01.dtsi. The SoC specific device trees then just include the pfla01 and pbab01 dtsi files corresponding to the SoC variant.

Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/Makefile                   |  1 +
 arch/arm/boot/dts/imx6dl-phytec-pbab01.dts   | 19 ++++++++++++++
 arch/arm/boot/dts/imx6q-phytec-pbab01.dts    | 31 ++---------------------
 arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 38 ++++++++++++++++++++++++++++
 4 files changed, 60 insertions(+), 29 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6dl-phytec-pbab01.dts
 create mode 100644 arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
arch/arm/boot/dts/Makefile +0 -0
index 35c146f..1afa764 100644

arch/arm/boot/dts/Makefile dtb-$(CONFIG_ARCH_MXC) += \ · line 200

Quoted 4 lines
arch/arm/boot/dts/Makefile +1 -0
@@ -197,6 +197,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx6q-gw54xx.dtb \
 	imx6q-nitrogen6x.dtb \
 	imx6q-phytec-pbab01.dtb \
+	imx6dl-phytec-pbab01.dtb \

Forgot mentioning that it should be put alphabetically in there. I fixed it up when applying.

Shawn

Quoted 3 lines
arch/arm/boot/dts/Makefile +0 -0
 	imx6q-sabreauto.dtb \
 	imx6q-sabrelite.dtb \
 	imx6q-sabresd.dtb \
author
#3 lore raw

PATCH 3/10 ARM: dts: pfla02: Add GPIO LEDs

In reply to Philipp Zabel

This patch enables the red and green GPIO LEDs on Phytec phyFLEX i.MX6 modules.

Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +16 -0
index 8ab2c44..7138937 100644
@@ -40,6 +40,20 @@
 			gpio = <&gpio1 0 0>;
 		};
 	};
+
+	gpio_leds: leds {
+		compatible = "gpio-leds";
+
+		green {
+			label = "phyflex:green";
+			gpios = <&gpio1 30 0>;
+		};
+
+		red {
+			label = "phyflex:red";
+			gpios = <&gpio2 31 0>;
+		};
+	};
 };
 
 &ecspi3 {

@@ -156,6 +170,8 @@
 				MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
 				MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
 				MX6QDL_PAD_DI0_PIN15__GPIO4_IO17  0x80000000 /* PMIC interrupt */
+				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */
+				MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */
 			>;
 		};
Signature · 1 line
1.9.1
author
#4 lore raw

PATCH 4/10 ARM: dts: pfla02: PHY reset is active-low

In reply to Philipp Zabel

Note that the fec driver code currently hard-codes an active-low reset, regardless of the flags in the device tree.

Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +3 -1
index 7138937..6936177 100644
@@ -9,6 +9,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <dt-bindings/gpio/gpio.h>
+
 / {
 	model = "Phytec phyFLEX-i.MX6 Ouad";
 	compatible = "phytec,imx6q-pfla02", "fsl,imx6q";

@@ -289,7 +291,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rgmii";
-	phy-reset-gpios = <&gpio3 23 0>;
+	phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 	status = "disabled";
 };
Signature · 1 line
1.9.1
author
#5 lore raw

PATCH 5/10 ARM: dts: pbab01: Set linux,stdout-path to UART4

In reply to Philipp Zabel
Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi +6 -0
index cd2d4af..4e36aef 100644
@@ -9,6 +9,12 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+/ {
+	chosen {
+		linux,stdout-path = &uart4;
+	};
+};
+
 &fec {
 	status = "okay";
 };
Signature · 1 line
1.9.1
author
#6 lore raw

PATCH 6/10 ARM: dts: pbab01: Add I2C2 and I2C3

In reply to Philipp Zabel
Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 30 ++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi +30 -0
index 4e36aef..a449a580 100644
@@ -23,6 +23,20 @@
 	status = "okay";
 };
 
+&i2c2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	clock-frequency = <100000>;
+	status = "okay";
+};
+
+&i2c3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	clock-frequency = <100000>;
+	status = "okay";
+};
+
 &uart4 {
 	status = "okay";
 };

@@ -42,3 +56,19 @@
 &usdhc3 {
 	status = "okay";
 };
+
+&iomuxc {
+	pinctrl_i2c2: i2c2grp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
+			MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1
+		>;
+	};
+
+	pinctrl_i2c3: i2c3grp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
+			MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1
+		>;
+	};
+};
Signature · 1 line
1.9.1
author
#7 lore raw

PATCH 7/10 ARM: dts: pbab01: Add I2C devices

In reply to Philipp Zabel

This patch adds the TLV320, STMPE811, RTC8564, and MX1037 ICs to the I2C2 bus.

Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi +20 -0
index a449a580..c6ab762 100644
@@ -28,6 +28,26 @@
 	pinctrl-0 = <&pinctrl_i2c2>;
 	clock-frequency = <100000>;
 	status = "okay";
+
+	tlv320 at 18 {
+		compatible = "ti,tlv320aic3x";
+		reg = <0x18>;
+	};
+
+	stmpe at 41 {
+		compatible = "st,stmpe811";
+		reg = <0x41>;
+	};
+
+	rtc at 51 {
+		compatible = "nxp,rtc8564";
+		reg = <0x51>;
+	};
+
+	adc at 64 {
+		compatible = "maxim,max1037";
+		reg = <0x64>;
+	};
 };
 
 &i2c3 {
Signature · 1 line
1.9.1
author
#8 lore raw

PATCH 8/10 ARM: dts: pfla02: Add UART1 (uart3)

In reply to Philipp Zabel

The pins labeled UART1 on the module connector are wired to i.MX6 uart3.

Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +15 -0
index 6936177..faa3494 100644
@@ -235,6 +235,15 @@
 			>;
 		};
 
+		pinctrl_uart3: uart3grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
+				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
+				MX6QDL_PAD_EIM_D30__UART3_RTS_B		0x1b0b1
+				MX6QDL_PAD_EIM_D31__UART3_CTS_B		0x1b0b1
+			>;
+		};
+
 		pinctrl_uart4: uart4grp {
 			fsl,pins = <
 				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1

@@ -302,6 +311,12 @@
 	status = "disabled";
 };
 
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	status = "disabled";
+};
+
 &uart4 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart4>;
Signature · 1 line
1.9.1
author
#9 lore raw

PATCH 9/10 ARM: dts: pbab01: Enable UART1

In reply to Philipp Zabel

This patch enables UART1 on the phyFLEX connector (i.MX6 uart3).

Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi +4 -0
index c6ab762..323a647 100644
@@ -57,6 +57,10 @@
 	status = "okay";
 };
 
+&uart3 {
+	status = "okay";
+};
+
 &uart4 {
 	status = "okay";
 };
Signature · 1 line
1.9.1
author
#10 lore raw

PATCH 10/10 ARM: dts: pbab01: Enable DVI

In reply to Philipp Zabel
Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi +4 -0
index 323a647..5847212 100644
@@ -23,6 +23,10 @@
 	status = "okay";
 };
 
+&hdmi {
+	status = "okay";
+};
+
 &i2c2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c2>;
Signature · 1 line
1.9.1
#11 lore raw

PATCH 1/10 ARM: dts: Add Phytec pfla02 with i.MX6 DualLite/Solo

In reply to Philipp Zabel
Quoted 8 lines · Philipp Zabel
Signed-off-by Philipp Zabel <[email protected]>
---
 arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi  |  22 ++
 arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi   | 307 +------------------------
 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 323 +++++++++++++++++++++++++++
 3 files changed, 347 insertions(+), 305 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi
 create mode 100644 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi

All applied, thanks.