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reset: add driver for socfpga

PATCH New Steffen Trumtrar 2 participants 7 messages Apr 15, 2014 – Apr 16, 2014

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#0 lore raw

PATCH v3 1/4 reset: add driver for socfpga

Add a reset-controller driver for the socfpga platform.
The reset-controller has four banks with up to 32 entries all encapsulated in one module block.

---

Notes:
Changes since v2:
- remove superfluous ret in probe function
- add Acked-by

Changes since v1:
- use BITS_PER_LONG everywhere instead of MAX_BANK_WIDTH
- print pdev->dev.of_node->full_name on error
- use proper IS_ERR/PTR_ERR

 drivers/reset/Makefile        |   1 +
 drivers/reset/reset-socfpga.c | 146 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 147 insertions(+)
 create mode 100644 drivers/reset/reset-socfpga.c
drivers/reset/Makefile +1 -0
index cc29832..ab64077 100644
@@ -1,2 +1,3 @@
 obj-$(CONFIG_RESET_CONTROLLER) += core.o
 obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
+obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
drivers/reset/reset-socfpga.c new file +146 -0

146 lines not on this page · raw message

Signature · 1 line
1.9.1
#1 lore raw

PATCH v3 2/4 Documentation: dt: socfpga: add reset-cells property

To be able to use the reset-controller framework, the property
#reset-cells
is mandatory.

---
 Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt +2 -0
index ecdb57d..32c1c8b 100644
@@ -3,9 +3,11 @@ Altera SOCFPGA Reset Manager
 Required properties:
 - compatible : "altr,rst-mgr"
 - reg : Should contain 1 register ranges(address and length)
+- #reset-cells: 1
 
 Example:
 	 rstmgr at ffd05000 {
+		#reset-cells = <1>;
 		compatible = "altr,rst-mgr";
 		reg = <0xffd05000 0x1000>;
 	};
Signature · 1 line
1.9.1
#2 lore raw

PATCH v3 3/4 Documentation: dt: reset: move socfpga-reset

In reply to Steffen Trumtrar

Instead of having the documentation for the socfpga-reset controller in a vendor specific directory, move it to the reset folder to all the other reset drivers.

---
 Documentation/devicetree/bindings/{arm/altera => reset}/socfpga-reset.txt | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename Documentation/devicetree/bindings/{arm/altera => reset}/socfpga-reset.txt (100%)
Documentation/devicetree/bindings/reset/socfpga-reset.txt renamed from Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt +0 -0
similarity index 100%
rename from Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt
rename to Documentation/devicetree/bindings/reset/socfpga-reset.txt
Signature · 1 line
1.9.1
#3 lore raw

PATCH v3 4/4 ARM: socfpga: dts: add reset-controller

In reply to Steffen Trumtrar

Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified.

---
 arch/arm/boot/dts/socfpga.dtsi           |  8 ++-
 include/dt-bindings/reset/altr,rst-mgr.h | 90 ++++++++++++++++++++++++++++++++
 2 files changed, 97 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr.h
arch/arm/boot/dts/socfpga.dtsi +7 -1
index 1f71e96..027d2c6 100644
@@ -16,6 +16,7 @@
  */
 
 #include "skeleton.dtsi"
+#include <dt-bindings/reset/altr,rst-mgr.h>
 
 / {
 	#address-cells = <1>;
@@ -456,6 +457,8 @@
 			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
 			clocks = <&emac0_clk>;
 			clock-names = "stmmaceth";
+			resets = <&rst EMAC0_RESET>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 		};
 
@@ -467,6 +470,8 @@
 			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
 			clocks = <&emac1_clk>;
 			clock-names = "stmmaceth";
+			resets = <&rst EMAC1_RESET>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 		};
 
@@ -584,7 +589,8 @@
 			reg-io-width = <4>;
 		};
 
-		rstmgr at ffd05000 {
+		rst: rstmgr at ffd05000 {
+			#reset-cells = <1>;
 			compatible = "altr,rst-mgr";
 			reg = <0xffd05000 0x1000>;
 		};
include/dt-bindings/reset/altr,rst-mgr.h new file +90 -0

90 lines not on this page · raw message

Signature · 1 line
1.9.1
Applied
#4 lore raw

PATCH v3 1/4 reset: add driver for socfpga

In reply to Steffen Trumtrar
Quoted 13 lines · Steffen Trumtrar

Add a reset-controller driver for the socfpga platform.
The reset-controller has four banks with up to 32 entries all encapsulated in one module block.

---

Notes:
Changes since v2:
- remove superfluous ret in probe function
- add Acked-by

Quoted 5 lines

Changes since v1:
- use BITS_PER_LONG everywhere instead of MAX_BANK_WIDTH
- print pdev->dev.of_node->full_name on error
- use proper IS_ERR/PTR_ERR

I've applied this series to rocketboards linux-socfpga-next/drivers and linux-socfpga-next/next-dt.

Thanks,

Dinh

#5 lore raw

PATCH v3 1/4 reset: add driver for socfpga

Quoted 14 lines · Dinh Nguyen
Quoted 13 lines · Steffen Trumtrar

Add a reset-controller driver for the socfpga platform.
The reset-controller has four banks with up to 32 entries all encapsulated in one module block.

---

Notes:
Changes since v2:
- remove superfluous ret in probe function
- add Acked-by

Quoted 9 lines
Quoted 5 lines

Changes since v1:
- use BITS_PER_LONG everywhere instead of MAX_BANK_WIDTH
- print pdev->dev.of_node->full_name on error
- use proper IS_ERR/PTR_ERR

I've applied this series to rocketboards linux-socfpga-next/drivers and linux-socfpga-next/next-dt.

\o/

Thanks,
Steffen

Signature · 4 lines
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Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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Applied
#6 lore raw

PATCH v3 1/4 reset: add driver for socfpga

In reply to Steffen Trumtrar
Quoted 13 lines · Steffen Trumtrar

Add a reset-controller driver for the socfpga platform.
The reset-controller has four banks with up to 32 entries all encapsulated in one module block.

---

Notes:
Changes since v2:
- remove superfluous ret in probe function
- add Acked-by

Quoted 5 lines

Changes since v1:
- use BITS_PER_LONG everywhere instead of MAX_BANK_WIDTH
- print pdev->dev.of_node->full_name on error
- use proper IS_ERR/PTR_ERR

I've applied this series to rocketboards linux-socfpga-next/drivers and linux-socfpga-next/next-dt.

Thanks,

Dinh