ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock
Subsystems (3)
PATCH 1/1 ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock
Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite replaces the ecspi5 clock with the i2c4 clock.
Handle this difference using cpu_is_imx6dl().
--- arch/arm/mach-imx/clk-imx6q.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
arch/arm/mach-imx/clk-imx6q.c +7 -1
@@ -352,7 +352,13 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[ecspi2] =imx_clk_gate2 ("ecspi2" ,"ecspi_root" , base +0x6c ,2 ); clk[ecspi3] =imx_clk_gate2 ("ecspi3" ,"ecspi_root" , base +0x6c ,4 ); clk[ecspi4] =imx_clk_gate2 ("ecspi4" ,"ecspi_root" , base +0x6c ,6 ); - clk[ecspi5] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 ); +if (cpu_is_imx6dl ()) +/* +* ecspi5 is replaced with i2c4 on imx6dl & imx6s +*/ + clk[ecspi5] =imx_clk_gate2 ("i2c4" ,"ipg_per" , base +0x6c ,8 ); +else + clk[ecspi5] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 ); clk[enet] =imx_clk_gate2 ("enet" ,"ipg" , base +0x6c ,10 ); clk[esai] =imx_clk_gate2 ("esai" ,"esai_podf" , base +0x6c ,16 ); clk[gpt_ipg] =imx_clk_gate2 ("gpt_ipg" ,"ipg" , base +0x6c ,20 );
Signature · 1 line
1.8.5.1
PATCH 1/1 ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock
Quoted 15 lines · Iain Paton
Compared to i.MX6 Quad/Dual the
CCM_CCGR1register in the i.MX6 Solo/DualLite replaces the ecspi5 clock with the i2c4 clock.Handle this difference using
cpu_is_imx6dl().Signed-off-by Iain Paton <[email protected]>--- arch/arm/mach-imx/clk-imx6q.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)arch/arm/mach-imx/clk-imx6q.c +0
-0
arch/arm/mach-imx/clk-imx6q.c static void __init imx6q_clocks_init(struct device_node *ccm_node) · line 358
Quoted 8 lines
arch/arm/mach-imx/clk-imx6q.c +4
-1@@ -352,7 +352,13 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[ecspi2] =imx_clk_gate2 ("ecspi2" ,"ecspi_root" , base +0x6c ,2 ); clk[ecspi3] =imx_clk_gate2 ("ecspi3" ,"ecspi_root" , base +0x6c ,4 ); clk[ecspi4] =imx_clk_gate2 ("ecspi4" ,"ecspi_root" , base +0x6c ,6 ); - clk[ecspi5] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 ); +if (cpu_is_imx6dl ()) +/* +* ecspi5 is replaced with i2c4 on imx6dl & imx6s +*/
Single line comment should be like /* bla ... */.
I fixed it up and applied the patch. Thanks.
Shawn
Quoted 11 lines
arch/arm/mach-imx/clk-imx6q.c +3
-0+ clk[ecspi5] =imx_clk_gate2 ("i2c4" ,"ipg_per" , base +0x6c ,8 ); + else + clk[ecspi5] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 ); clk[enet] =imx_clk_gate2 ("enet" ,"ipg" , base +0x6c ,10 ); clk[esai] =imx_clk_gate2 ("esai" ,"esai_podf" , base +0x6c ,16 ); clk[gpt_ipg] =imx_clk_gate2 ("gpt_ipg" ,"ipg" , base +0x6c ,20 );Signature · 1 line
1.8.5.1
PATCH 1/1 ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock
In reply to Iain PatonQuoted 15 lines · Iain Paton
Compared to i.MX6 Quad/Dual the
CCM_CCGR1register in the i.MX6 Solo/DualLite replaces the ecspi5 clock with the i2c4 clock.Handle this difference using
cpu_is_imx6dl().Signed-off-by Iain Paton<[email protected]>--- arch/arm/mach-imx/clk-imx6q.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)arch/arm/mach-imx/clk-imx6q.c +0
-0
arch/arm/mach-imx/clk-imx6q.c static void __init imx6q_clocks_init(struct device_node *ccm_node) · line 359
Quoted 9 lines
arch/arm/mach-imx/clk-imx6q.c +5
-1@@ -352,7 +352,13 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[ecspi2] =imx_clk_gate2 ("ecspi2" ,"ecspi_root" , base +0x6c ,2 ); clk[ecspi3] =imx_clk_gate2 ("ecspi3" ,"ecspi_root" , base +0x6c ,4 ); clk[ecspi4] =imx_clk_gate2 ("ecspi4" ,"ecspi_root" , base +0x6c ,6 ); - clk[ecspi5] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 ); +if (cpu_is_imx6dl ()) +/* +* ecspi5 is replaced with i2c4 on imx6dl& imx6s +*/ + clk[ecspi5] =imx_clk_gate2 ("i2c4" ,"ipg_per" , base +0x6c ,8 );
Is it good enough to reuse ecspi5 enum value here or may it be better to introduce a new one i2c4 equal to ecspi5?
arch/arm/mach-imx/clk-imx6q.c static void __init imx6q_clocks_init(struct device_node *ccm_node) · line 364
Quoted 5 lines
arch/arm/mach-imx/clk-imx6q.c +2
-0+else + clk[ecspi5] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 ); clk[enet] =imx_clk_gate2 ("enet" ,"ipg" , base +0x6c ,10 ); clk[esai] =imx_clk_gate2 ("esai" ,"esai_podf" , base +0x6c ,16 ); clk[gpt_ipg] =imx_clk_gate2 ("gpt_ipg" ,"ipg" , base +0x6c ,20 );
With best wishes,
Vladimir
PATCH 1/1 ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock
Quoted 20 lines · Vladimir Zapolskiy
Quoted 19 lines · Iain Paton
Compared to i.MX6 Quad/Dual the
CCM_CCGR1register in the i.MX6 Solo/DualLite replaces the ecspi5 clock with the i2c4 clock.Handle this difference using
cpu_is_imx6dl().Signed-off-by Iain Paton<[email protected]>--- arch/arm/mach-imx/clk-imx6q.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)arch/arm/mach-imx/clk-imx6q.c +0
-1@@ -352,7 +352,13 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[ecspi2] =imx_clk_gate2 ("ecspi2" ,"ecspi_root" , base +0x6c ,2 ); clk[ecspi3] =imx_clk_gate2 ("ecspi3" ,"ecspi_root" , base +0x6c ,4 ); clk[ecspi4] =imx_clk_gate2 ("ecspi4" ,"ecspi_root" , base +0x6c ,6 ); - clk[ecspi5] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 );
Quoted 8 lines
arch/arm/mach-imx/clk-imx6q.c static void __init imx6q_clocks_init(struct device_node *ccm_node) · line 359
Quoted 5 lines
arch/arm/mach-imx/clk-imx6q.c +5
-0+if (cpu_is_imx6dl ()) +/* +* ecspi5 is replaced with i2c4 on imx6dl& imx6s +*/ + clk[ecspi5] =imx_clk_gate2 ("i2c4" ,"ipg_per" , base +0x6c ,8 );Is it good enough to reuse ecspi5 enum value here or may it be better to introduce a new one i2c4 equal to ecspi5?
With the comment in there, it's just fine to reuse the enum, I think.
Shawn
Quoted 11 lines
arch/arm/mach-imx/clk-imx6q.c static void __init imx6q_clocks_init(struct device_node *ccm_node) · line 364
Quoted 6 lines
arch/arm/mach-imx/clk-imx6q.c +2
-0+else + clk[ecspi5] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 ); clk[enet] =imx_clk_gate2 ("enet" ,"ipg" , base +0x6c ,10 ); clk[esai] =imx_clk_gate2 ("esai" ,"esai_podf" , base +0x6c ,16 ); clk[gpt_ipg] =imx_clk_gate2 ("gpt_ipg" ,"ipg" , base +0x6c ,20 );With best wishes,
Vladimir
PATCH 1/1 ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock
Quoted 12 lines · Shawn Guo
Quoted 10 lines · Vladimir Zapolskiy
arch/arm/mach-imx/clk-imx6q.c static void __init imx6q_clocks_init(struct device_node *ccm_node) · line 359
Quoted 6 lines · Iain Paton
arch/arm/mach-imx/clk-imx6q.c +5
-1- clk[ecspi5] =imx_clk_gate2 ("ecspi5" ,"ecspi_root" , base +0x6c ,8 ); +if (cpu_is_imx6dl ()) +/* +* ecspi5 is replaced with i2c4 on imx6dl& imx6s +*/ + clk[ecspi5] =imx_clk_gate2 ("i2c4" ,"ipg_per" , base +0x6c ,8 );Is it good enough to reuse ecspi5 enum value here or may it be better to introduce a new one i2c4 equal to ecspi5?
Quoted 1 line
With the comment in there, it's just fine to reuse the enum, I think.
I wasn't sure about that, but couldn't find anywhere else the enum was used. In the dts the clock is simply referenced as <&clks 116> so you have to work that back manually.
If you think it's worth it to add something to Documentation/devicetree/bindings/clock/imx6q-clock.txt so that the difference is documented I can send a patch for that.
Iain