ARM: DTS: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shift
PATCH 1/1 ARM: DTS: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shift
The correct bit is 24 for AHCLKX.
Signed-off-by Peter Ujfalusi <[email protected]>
--- arch/arm/boot/dts/dra7xx-clocks.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/dra7xx-clocks.dtsi +1 -1
@@ -1640,7 +1640,7 @@ #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>; - ti,bit-shift = <28>; + ti,bit-shift = <24>; reg = <0x1860>; };
Signature · 1 line
1.9.1
PATCH 1/1 ARM: DTS: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shift
Quoted 3 lines · Peter Ujfalusi
The correct bit is 24 for AHCLKX.
Signed-off-by Peter Ujfalusi <[email protected]>
Yes, thats a clear bug in the data.
Acked-by Tero Kristo <[email protected]>
Quoted 18 lines
--- arch/arm/boot/dts/dra7xx-clocks.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm/boot/dts/dra7xx-clocks.dtsi +1
-1@@ -1640,7 +1640,7 @@ #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>; - ti,bit-shift = <28>; + ti,bit-shift = <24>; reg = <0x1860>; };
PATCH 1/1 ARM: DTS: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shift
Quoted 8 lines · Tero Kristo
Quoted 3 lines · Peter Ujfalusi
The correct bit is 24 for AHCLKX.
Signed-off-by Peter Ujfalusi <[email protected]>Yes, thats a clear bug in the data.
Acked-by Tero Kristo <[email protected]>
Applying into omap-for-v3.15/fixes thanks.
Tony
Quoted 18 lines
Quoted 17 lines
arch/arm/boot/dts/dra7xx-clocks.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/arm/boot/dts/dra7xx-clocks.dtsi +1
-1@@ -1640,7 +1640,7 @@ #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>; - ti,bit-shift = <28>; + ti,bit-shift = <24>; reg = <0x1860>; };