ARM: dts: am437x-gp-evm: Do not reset gpio5
Subsystems (7)
PATCH 1/1 ARM: dts: am437x-gp-evm: Do not reset gpio5
From: Dave Gerlach <[email protected]>
Do not reset GPIO5 at boot-up because GPIO5_7 is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption.
---
This is applied on top of current linux-next.git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
arch/arm/boot/dts/am437x-gp-evm.dts | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/am437x-gp-evm.dts +5 -0
@@ -117,6 +117,11 @@ status = "okay"; }; +&gpio5 { + status = "okay"; + ti,no-reset-on-init; +}; + &mmc1 { status = "okay"; vmmc-supply = <&vmmcsd_fixed>;
Signature · 1 line
1.7.9.5
PATCH 1/1 ARM: dts: am437x-gp-evm: Do not reset gpio5
Quoted 11 lines · Lokesh Vutla
From: Dave Gerlach <[email protected]>
Do not reset GPIO5 at boot-up because
GPIO5_7is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption.Reported-by Nishanth Menon <[email protected]>Tested-by Nishanth Menon <[email protected]>Signed-off-by Dave Gerlach <[email protected]>Signed-off-by Lokesh Vutla <[email protected]>
every now and again we see a patch like this because yet another board is using a GPIO to toggle DDR regulators.
Instead of constantly patching things like this, how about we try something like below (build-tested only):
arch/arm/mach-omap2/omap_hwmod.c +4 -0
@@ -2610,6 +2610,10 @@ static int __init _setup_reset(struct omap_hwmod *oh)if (oh->flags &HWMOD_EXT_OPT_MAIN_CLK )return -EPERM ; +/* NEVER reset GPIO blocks */ +if (strncmp (oh->name,"gpio" ,4 ) ==0 ) +return 0 ; +if (oh->rst_lines_cnt ==0 ) { r =_enable (oh);if (r) {
drivers/gpio/gpio-omap.c +24 -25
73 lines not on this page · raw message
Then, we can even remove ti,no-reset flag from all GPIO DT nodes.
Signature · 8 lines
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PATCH 1/1 ARM: dts: am437x-gp-evm: Do not reset gpio5
Quoted 13 lines · Felipe Balbi
Quoted 11 lines · Lokesh Vutla
From: Dave Gerlach <[email protected]>
Do not reset GPIO5 at boot-up because
GPIO5_7is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption.Reported-by Nishanth Menon <[email protected]>Tested-by Nishanth Menon <[email protected]>Signed-off-by Dave Gerlach <[email protected]>Signed-off-by Lokesh Vutla <[email protected]>
Quoted 5 lines
every now and again we see a patch like this because yet another board is using a GPIO to toggle DDR regulators.
Instead of constantly patching things like this, how about we try something like below (build-tested only):
Why should we change all of them? Is it correct to leave every single GPIO at the mercy of the bootloader in every situation? The reason we see these patches only every now and again is because it's a special case that should be handled only for that situation. I also don't think it makes sense to make gpio's a unique case that never gets reset while every other IP does by default.
Regards,
Dave
Quoted 100 lines
arch/arm/mach-omap2/omap_hwmod.c +4
-0@@ -2610,6 +2610,10 @@ static int __init _setup_reset(struct omap_hwmod *oh)if (oh->flags &HWMOD_EXT_OPT_MAIN_CLK )return -EPERM ; +/* NEVER reset GPIO blocks */ +if (strncmp (oh->name,"gpio" ,4 ) ==0 ) +return 0 ; +if (oh->rst_lines_cnt ==0 ) { r =_enable (oh);if (r) {drivers/gpio/gpio-omap.c +24
-25@@ -1130,6 +1130,29 @@ static void omap_gpio_chip_init(struct gpio_bank *bank)static const struct of_device_id omap_gpio_match[]; +static void omap_gpio_init_context (struct gpio_bank *p) +{ +struct omap_gpio_reg_offs *regs = p->regs; +void __iomem *base = p->base; + + p->context.ctrl =readl_relaxed (base + regs->ctrl); + p->context.oe =readl_relaxed (base + regs->direction); + p->context.wake_en =readl_relaxed (base + regs->wkup_en); + p->context.leveldetect0 =readl_relaxed (base + regs->leveldetect0); + p->context.leveldetect1 =readl_relaxed (base + regs->leveldetect1); + p->context.risingdetect =readl_relaxed (base + regs->risingdetect); + p->context.fallingdetect =readl_relaxed (base + regs->fallingdetect); + p->context.irqenable1 =readl_relaxed (base + regs->irqenable); + p->context.irqenable2 =readl_relaxed (base + regs->irqenable2); + +if (regs->set_dataout && p->regs->clr_dataout) + p->context.dataout =readl_relaxed (base + regs->set_dataout); +else + p->context.dataout =readl_relaxed (base + regs->dataout); + + p->context_valid = true; +} +static int omap_gpio_probe (struct platform_device *pdev) {struct device *dev = &pdev->dev;@@ -1246,6 +1269,7 @@ static int omap_gpio_probe(struct platform_device *pdev)omap_gpio_mod_init (bank);omap_gpio_chip_init (bank);omap_gpio_show_rev (bank); +omap_gpio_init_context (bank);pm_runtime_put (bank->dev);@@ -1325,8 +1349,6 @@ update_gpio_context_count:return 0 ; } -static void omap_gpio_init_context (struct gpio_bank *p); -static int omap_gpio_runtime_resume (struct device *dev) {struct platform_device *pdev =to_platform_device (dev);@@ -1466,29 +1488,6 @@ void omap2_gpio_resume_after_idle(void) }#if defined(CONFIG_PM_RUNTIME ) -static void omap_gpio_init_context (struct gpio_bank *p) -{ -struct omap_gpio_reg_offs *regs = p->regs; -void __iomem *base = p->base; - - p->context.ctrl =readl_relaxed (base + regs->ctrl); - p->context.oe =readl_relaxed (base + regs->direction); - p->context.wake_en =readl_relaxed (base + regs->wkup_en); - p->context.leveldetect0 =readl_relaxed (base + regs->leveldetect0); - p->context.leveldetect1 =readl_relaxed (base + regs->leveldetect1); - p->context.risingdetect =readl_relaxed (base + regs->risingdetect); - p->context.fallingdetect =readl_relaxed (base + regs->fallingdetect); - p->context.irqenable1 =readl_relaxed (base + regs->irqenable); - p->context.irqenable2 =readl_relaxed (base + regs->irqenable2); - -if (regs->set_dataout && p->regs->clr_dataout) - p->context.dataout =readl_relaxed (base + regs->set_dataout); -else - p->context.dataout =readl_relaxed (base + regs->dataout); - - p->context_valid = true; -} -static void omap_gpio_restore_context (struct gpio_bank *bank) { writel_relaxed(bank->context.wake_en,Then, we can even remove ti,no-reset flag from all GPIO DT nodes.
PATCH 1/1 ARM: dts: am437x-gp-evm: Do not reset gpio5
Hi,
Quoted 14 lines · Dave Gerlach
Quoted 13 lines · Felipe Balbi
Quoted 11 lines · Lokesh Vutla
From: Dave Gerlach <[email protected]>
Do not reset GPIO5 at boot-up because
GPIO5_7is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption.Reported-by Nishanth Menon <[email protected]>Tested-by Nishanth Menon <[email protected]>Signed-off-by Dave Gerlach <[email protected]>Signed-off-by Lokesh Vutla <[email protected]>
Quoted 8 lines
Quoted 5 lines
every now and again we see a patch like this because yet another board is using a GPIO to toggle DDR regulators.
Instead of constantly patching things like this, how about we try something like below (build-tested only):
Why should we change all of them? Is it correct to leave every single GPIO at the mercy of the bootloader in every situation? The reason we see these
it's not leaving anything at the mercy of the bootloader. It's simply looking at the HW itself and asking "what's the current state of this GPIO ?"
Quoted 1 line
patches only every now and again is because it's a special case that should
I wouldn't call it "special". A GPIO block is pretty dumb, its registers only give you current pin state, there's virtually no state machine involved whatsoever.
Quoted 3 lines
be handled only for that situation. I also don't think it makes sense to make gpio's a unique case that never gets reset while every other IP does by default.
Well, if it doesn't need to be reset, why would you spend that time resetting it ? In the GPIO case, you gain nothing by resetting the IP, nothing at all, other than "now I'm sure the IP is in no-standby/no-idle" but that can be easily read back from SYS[SC] registers anyway.
The point is that we have two choices here:
a) every time a new board comes around using GPIO as an enable signal for DDR, we spend a few days debugging why it's not booting.
b) make sure no GPIO block is ever reset, so we never go through the debugging cycle again.
Signature · 8 lines
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PATCH 1/1 ARM: dts: am437x-gp-evm: Do not reset gpio5
Quoted 23 lines · Felipe Balbi
Hi,
Quoted 20 lines · Dave Gerlach
Quoted 18 lines · Felipe Balbi
Quoted 11 lines · Lokesh Vutla
From: Dave Gerlach <[email protected]>
Do not reset GPIO5 at boot-up because
GPIO5_7is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption.Reported-by Nishanth Menon <[email protected]>Tested-by Nishanth Menon <[email protected]>Signed-off-by Dave Gerlach <[email protected]>Signed-off-by Lokesh Vutla <[email protected]>every now and again we see a patch like this because yet another board is using a GPIO to toggle DDR regulators.
Instead of constantly patching things like this, how about we try something like below (build-tested only):
Quoted 6 lines
Quoted 2 lines
Why should we change all of them? Is it correct to leave every single GPIO at the mercy of the bootloader in every situation? The reason we see these
it's not leaving anything at the mercy of the bootloader. It's simply looking at the HW itself and asking "what's the current state of this GPIO ?"
And you assume here that every GPIO pin left in what ever state by bootloader is the correct state for kernel to function in? that is not exactly a good idea from even power consumption perspective - example GPIOs used by bootloader to detect board revision is not used in kernel, leaving such GPIOs active is not optimal, certain other GPIOs used by external peripherals might even be wrongly configured by bootloader issues -> the idea of ti,no-reset-on-init is to ensure that we *know* which instances "need special handling" and we depend on bootloader configuration.
Taking it a step further, why is "not doing IP module kernel reset" just a constraint for GPIO then? Why not leave every IP module in what ever state bootloader left it at?
Quoted 10 lines
Quoted 1 line
patches only every now and again is because it's a special case that should
I wouldn't call it "special". A GPIO block is pretty dumb, its registers only give you current pin state, there's virtually no state machine involved whatsoever.
Quoted 3 lines
be handled only for that situation. I also don't think it makes sense to make gpio's a unique case that never gets reset while every other IP does by default.
Quoted 5 lines
Well, if it doesn't need to be reset, why would you spend that time resetting it ? In the GPIO case, you gain nothing by resetting the IP, nothing at all, other than "now I'm sure the IP is in no-standby/no-idle" but that can be easily read back from SYS[SC] registers anyway.
because, you do not know how else the system might be used. instead of assuming the bootloader or host OS (in a virtualized environment) will always be doing the right thing, kernel takes responsibility of peripherals and exceptions are clearly marked (such as with ti,no-reset-on-init;).
Quoted 5 lines
The point is that we have two choices here:
a) every time a new board comes around using GPIO as an enable signal for DDR, we spend a few days debugging why it's not booting.
yeah - read the darned schematics - this is valid for anyone doing board/platform bringup - this is the right way to do it.
Quoted 4 lines
b) make sure no GPIO block is ever reset, so we never go through the debugging cycle again.
the holy grail of new bugs! Sigh!
Signature · 2 lines
Regards, Nishanth Menon
PATCH 1/1 ARM: dts: am437x-gp-evm: Do not reset gpio5
Hi,
Quoted 27 lines · Nishanth Menon
Quoted 26 lines · Felipe Balbi
Hi,
Quoted 22 lines · Dave Gerlach
Quoted 13 lines · Felipe Balbi
Quoted 11 lines · Lokesh Vutla
From: Dave Gerlach <[email protected]>
Do not reset GPIO5 at boot-up because
GPIO5_7is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption.Reported-by Nishanth Menon <[email protected]>Tested-by Nishanth Menon <[email protected]>Signed-off-by Dave Gerlach <[email protected]>Signed-off-by Lokesh Vutla <[email protected]>Quoted 5 lines
every now and again we see a patch like this because yet another board is using a GPIO to toggle DDR regulators.
Instead of constantly patching things like this, how about we try something like below (build-tested only):
Why should we change all of them? Is it correct to leave every single GPIO at the mercy of the bootloader in every situation? The reason we see these
Quoted 7 lines
Quoted 3 lines
it's not leaving anything at the mercy of the bootloader. It's simply looking at the HW itself and asking "what's the current state of this GPIO ?"
And you assume here that every GPIO pin left in what ever state by bootloader is the correct state for kernel to function in? that is not exactly a good idea from even power consumption perspective - example
right, it's a much better idea to reset the IP which, well, enables the f-ing DDR. Congrats!
Quoted 6 lines
GPIOs used by bootloader to detect board revision is not used in kernel, leaving such GPIOs active is not optimal, certain other GPIOs used by external peripherals might even be wrongly configured by bootloader issues -> the idea of ti,no-reset-on-init is to ensure that we *know* which instances "need special handling" and we depend on bootloader configuration.
or you can just make your driver smarter and for GPIOs which are not used by the kernel, you ignore context save-restore.
The problem is that our GPIO driver is so fucked up that nobody really cares about fixing it. If you really wanted to fix it, it wouldn't be really difficult to make use of pm_runtime's (and clock API's) usage counters to avoid keeping certain blocks up when not necessary.
Quoted 3 lines
Taking it a step further, why is "not doing IP module kernel reset" just a constraint for GPIO then? Why not leave every IP module in what ever state bootloader left it at?
yeah, that's exactly what I suggested. Thanks for clarifying what *I* *SAID*.
Quoted 16 lines
Quoted 10 lines
Quoted 1 line
patches only every now and again is because it's a special case that should
I wouldn't call it "special". A GPIO block is pretty dumb, its registers only give you current pin state, there's virtually no state machine involved whatsoever.
Quoted 3 lines
be handled only for that situation. I also don't think it makes sense to make gpio's a unique case that never gets reset while every other IP does by default.
Quoted 5 lines
Well, if it doesn't need to be reset, why would you spend that time resetting it ? In the GPIO case, you gain nothing by resetting the IP, nothing at all, other than "now I'm sure the IP is in no-standby/no-idle" but that can be easily read back from SYS[SC] registers anyway.
Quoted 5 lines
because, you do not know how else the system might be used. instead of assuming the bootloader or host OS (in a virtualized environment) will always be doing the right thing, kernel takes responsibility of peripherals and exceptions are clearly marked (such as with ti,no-reset-on-init;).
yada, yada, yada...
Quoted 7 lines
Quoted 4 lines
The point is that we have two choices here:
a) every time a new board comes around using GPIO as an enable signal for DDR, we spend a few days debugging why it's not booting.
yeah - read the darned schematics - this is valid for anyone doing board/platform bringup - this is the right way to do it.
sure, I'll let you handle that next time, be my guest.
Quoted 4 lines
Quoted 3 lines
b) make sure no GPIO block is ever reset, so we never go through the debugging cycle again.
the holy grail of new bugs! Sigh!
right, our code so god-damned perfect, ain't it ? We better not touch it anymore. Fair enough, I withdraw my comments, do as you wish.
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PATCH 1/1 ARM: dts: am437x-gp-evm: Do not reset gpio5
In reply to Lokesh VutlaQuoted 25 lines · Lokesh Vutla
From: Dave Gerlach <[email protected]>
Do not reset GPIO5 at boot-up because
GPIO5_7is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption.Reported-by Nishanth Menon <[email protected]>Tested-by Nishanth Menon <[email protected]>Signed-off-by Dave Gerlach <[email protected]>Signed-off-by Lokesh Vutla <[email protected]>---
This is applied on top of current linux-next.git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.gitmasterarch/arm/boot/dts/am437x-gp-evm.dts | 5 +++++ 1 file changed, 5 insertions(+)arch/arm/boot/dts/am437x-gp-evm.dts +0
-0@@ -117,6 +117,11 @@ status = "okay";
arch/arm/boot/dts/am437x-gp-evm.dts line 127
Quoted 10 lines
arch/arm/boot/dts/am437x-gp-evm.dts +5
-0}; +&gpio5 { + status = "okay"; + ti,no-reset-on-init; +}; + &mmc1 { status = "okay"; vmmc-supply = <&vmmcsd_fixed>;
Tony,
any chance of having this in 3.15 cycle?
as of today's linux-next tag, the only platform I have that does not boot is due to the lack of this patch.
next-20140325-omap2plus_defconfig
1: am335x-evm: Boot PASS: http://slexy.org/raw/s20o6CfGL8 2: am335x-sk: Boot PASS: http://slexy.org/raw/s2Ogu1zPtD 3: am3517-evm: Boot PASS: http://slexy.org/raw/s2m2WhHYO8 4: am37x-evm: Boot PASS: http://slexy.org/raw/s2jOybaVno 5: am43xx-epos: Boot PASS: http://slexy.org/raw/s21tt52N4b 6: am43xx-gpevm: Boot FAIL: http://slexy.org/raw/s21eDQmFWJ 7: beagleboard: Boot PASS: http://slexy.org/raw/s2q7vzrZHb 8: beaglebone-black: Boot PASS: http://slexy.org/raw/s2HCAJVz0H 9: beaglebone: Boot PASS: http://slexy.org/raw/s2NioACYsM 10: craneboard: Boot PASS: http://slexy.org/raw/s2s7jyo52c 11: dra7: Boot PASS: http://slexy.org/raw/s2OQ1BMerx 12: ldp: Boot PASS: http://slexy.org/raw/s2cWgQrdjb 13: pandaboard-es: Boot PASS: http://slexy.org/raw/s2lOaznVLO 14: sdp2430: Boot PASS: http://slexy.org/raw/s21RCJlUDU 15: sdp3430: Boot PASS: http://slexy.org/raw/s2181J9eWO 16: sdp4430: Boot PASS: http://slexy.org/raw/s20UumAiXK
17: OMAP5432uEVM: Boot PASS: http://slexy.org/raw/s21ypXvTNc
TOTAL = 17 boards, Booted Boards = 16, No Boot boards = 1
Signature · 2 lines
Regards, Nishanth Menon
Tony Lindgren
maintainerPATCH 1/1 ARM: dts: am437x-gp-evm: Do not reset gpio5
Quoted 7 lines · Nishanth Menon
Quoted 6 lines · Lokesh Vutla
From: Dave Gerlach <[email protected]>
Do not reset GPIO5 at boot-up because
GPIO5_7is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption.
How funny :)
Ideally we would be able to specify which GPIO pins should maintain their state during the boot.
AFAIK, this patch currently means that the kernel has no idea what state the whole GPIO bank is in. At minimum we should parse the GPIO bank state so the kernel knows it and then it should be safe to set the no reset flag.
So for the workaround, can you guys please try to see test if the old mux trick in the bootloader works to mux the pin into something PIN_INPUT_PULLUP | MUX_MODE7? Or a PULLDOWN depending on the direction naturally. That would allow leaving out the GPIO completely from this.
Regards,
Tony
Quoted 60 lines
Quoted 18 lines
Reported-by Nishanth Menon <[email protected]>Tested-by Nishanth Menon <[email protected]>Signed-off-by Dave Gerlach <[email protected]>Signed-off-by Lokesh Vutla <[email protected]>---
This is applied on top of current linux-next.git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.gitmasterarch/arm/boot/dts/am437x-gp-evm.dts | 5 +++++ 1 file changed, 5 insertions(+)arch/arm/boot/dts/am437x-gp-evm.dts +0
-0@@ -117,6 +117,11 @@ status = "okay";arch/arm/boot/dts/am437x-gp-evm.dts line 127
Quoted 10 lines
arch/arm/boot/dts/am437x-gp-evm.dts +5
-0}; +&gpio5 { + status = "okay"; + ti,no-reset-on-init; +}; + &mmc1 { status = "okay"; vmmc-supply = <&vmmcsd_fixed>;Tony,
any chance of having this in 3.15 cycle?as of today's linux-next tag, the only platform I have that does not boot is due to the lack of this patch.
next-20140325-omap2plus_defconfig
1: am335x-evm: Boot PASS: http://slexy.org/raw/s20o6CfGL8 2: am335x-sk: Boot PASS: http://slexy.org/raw/s2Ogu1zPtD 3: am3517-evm: Boot PASS: http://slexy.org/raw/s2m2WhHYO8 4: am37x-evm: Boot PASS: http://slexy.org/raw/s2jOybaVno 5: am43xx-epos: Boot PASS: http://slexy.org/raw/s21tt52N4b 6: am43xx-gpevm: Boot FAIL: http://slexy.org/raw/s21eDQmFWJ 7: beagleboard: Boot PASS: http://slexy.org/raw/s2q7vzrZHb 8: beaglebone-black: Boot PASS: http://slexy.org/raw/s2HCAJVz0H 9: beaglebone: Boot PASS: http://slexy.org/raw/s2NioACYsM 10: craneboard: Boot PASS: http://slexy.org/raw/s2s7jyo52c 11: dra7: Boot PASS: http://slexy.org/raw/s2OQ1BMerx 12: ldp: Boot PASS: http://slexy.org/raw/s2cWgQrdjb 13: pandaboard-es: Boot PASS: http://slexy.org/raw/s2lOaznVLO 14: sdp2430: Boot PASS: http://slexy.org/raw/s21RCJlUDU 15: sdp3430: Boot PASS: http://slexy.org/raw/s2181J9eWO 16: sdp4430: Boot PASS: http://slexy.org/raw/s20UumAiXK17: OMAP5432uEVM: Boot PASS: http://slexy.org/raw/s21ypXvTNc
TOTAL = 17 boards, Booted Boards = 16, No Boot boards = 1Signature · 2 lines
Regards, Nishanth Menon
Tony Lindgren
maintainerPATCH 1/1 ARM: dts: am437x-gp-evm: Do not reset gpio5
Quoted 19 lines · Tony Lindgren
Quoted 7 lines · Nishanth Menon
Quoted 6 lines · Lokesh Vutla
From: Dave Gerlach <[email protected]>
Do not reset GPIO5 at boot-up because
GPIO5_7is used on AM437x GP-EVM to control VTT regulators on DDR3. Without this some GP-EVM boards will fail to boot because of DDR3 corruption.How funny :)
Ideally we would be able to specify which GPIO pins should maintain their state during the boot.
AFAIK, this patch currently means that the kernel has no idea what state the whole GPIO bank is in. At minimum we should parse the GPIO bank state so the kernel knows it and then it should be safe to set the no reset flag.
Quoted 5 lines
So for the workaround, can you guys please try to see test if the old mux trick in the bootloader works to mux the pin into something
PIN_INPUT_PULLUP|MUX_MODE7? Or a PULLDOWN depending on the direction naturally. That would allow leaving out the GPIO completely from this.
OK so no safe mode as MUX_MODE7 on am335x. So based on the tests done by Dave on various GPIO banks without the reset, this seems OK to do. So applying into omap-for-v3.15/fixes-v2 to get the board booting properly.
Naturally this is not a reason to stop further work on making sure the GPIO driver actually knows what state the bank is as suggested by Felipe.
Tony