clk: qcom: Add basic support for APQ8064 global clock controller clocks
PATCH 1/1 clk: qcom: Add basic support for APQ8064 global clock controller clocks
The APQ8064 and MSM8960 share a significant amount of clock data and code between the two SoCs. Rather than duplicating the data we just add support for a unqiue APQ8064 clock table into the MSM8960 code.
For now add just enough clocks to get a basic serial port going on an APQ8064 device.
---
This patch is based on Stephen's qcom common clk init conslidation patch
.../devicetree/bindings/clock/qcom,gcc.txt | 1 + drivers/clk/qcom/Kconfig | 4 +-- drivers/clk/qcom/gcc-msm8960.c | 30 +++++++++++++++++++--- 3 files changed, 30 insertions(+), 5 deletions(-)
Documentation/devicetree/bindings/clock/qcom,gcc.txt +1 -0
@@ -4,6 +4,7 @@ Qualcomm Global Clock & Reset Controller Binding Required properties : - compatible : shall contain only one of the following: + "qcom,gcc-apq8064" "qcom,gcc-ipq8064" "qcom,gcc-msm8660" "qcom,gcc-msm8960"
drivers/clk/qcom/Kconfig +2 -2
@@ -21,10 +21,10 @@ config MSM_GCC_8660 i2c, USB, SD/eMMC, etc. config MSM_GCC_8960 - tristate "MSM8960 Global Clock Controller" + tristate "APQ8064/MSM8960 Global Clock Controller" depends on COMMON_CLK_QCOM help - Support for the global clock controller on msm8960 devices. + Support for the global clock controller on apq8064/msm8960 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, SATA, PCIe, etc.
drivers/clk/qcom/gcc-msm8960.c +27 -3
@@ -1,5 +1,5 @@/* -* Copyright (c) 2013, The Linux Foundation. All rights reserved. +* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and
@@ -2868,6 +2868,16 @@ static const struct qcom_reset_map gcc_msm8960_resets[] = { [RIVA_RESET] = { 0x35e0 }, }; +static struct clk_regmap *gcc_apq8064_clks[] = { + [PLL8 ] = &pll8.clkr, + [PLL8_VOTE ] = &pll8_vote, + [GSBI7_UART_SRC ] = &gsbi7_uart_src.clkr, + [GSBI7_UART_CLK ] = &gsbi7_uart_clk.clkr, + [GSBI7_QUP_SRC ] = &gsbi7_qup_src.clkr, + [GSBI7_QUP_CLK ] = &gsbi7_qup_clk.clkr, + [GSBI7_H_CLK ] = &gsbi7_h_clk.clkr, +}; +static const struct regmap_config gcc_msm8960_regmap_config = { .reg_bits =32 , .reg_stride =4 ,
@@ -2884,8 +2894,17 @@ static const struct qcom_cc_desc gcc_msm8960_desc = { .num_resets = ARRAY_SIZE(gcc_msm8960_resets), }; +static const struct qcom_cc_desc gcc_apq8064_desc = { + .config = &gcc_msm8960_regmap_config, + .clks = gcc_apq8064_clks, + .num_clks =ARRAY_SIZE (gcc_apq8064_clks), + .resets = gcc_msm8960_resets, + .num_resets =ARRAY_SIZE (gcc_msm8960_resets), +}; +static const struct of_device_id gcc_msm8960_match_table[] = { - { .compatible ="qcom,gcc-msm8960" }, + { .compatible ="qcom,gcc-msm8960" , .data = &gcc_msm8960_desc }, + { .compatible ="qcom,gcc-apq8064" , .data = &gcc_apq8064_desc }, { } };MODULE_DEVICE_TABLE (of, gcc_msm8960_match_table);
@@ -2894,6 +2913,11 @@ static int gcc_msm8960_probe(struct platform_device *pdev) {struct clk *clk;struct device *dev = &pdev->dev; +const struct of_device_id *match; + + match =of_match_device (gcc_msm8960_match_table, &pdev->dev); +if (!match) +return -EINVAL ;/* Temporary until RPM clocks supported */ clk =clk_register_fixed_rate (dev,"cxo" ,NULL ,CLK_IS_ROOT ,19200000 );
@@ -2904,7 +2928,7 @@ static int gcc_msm8960_probe(struct platform_device *pdev)if (IS_ERR (clk))return PTR_ERR (clk); -return qcom_cc_probe (pdev, &gcc_msm8960_desc); +return qcom_cc_probe (pdev, match->data); }static int gcc_msm8960_remove (struct platform_device *pdev)
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
Quoted 9 lines · Kumar Gala
The APQ8064 and MSM8960 share a significant amount of clock data and code between the two SoCs. Rather than duplicating the data we just add support for a unqiue APQ8064 clock table into the MSM8960 code.
For now add just enough clocks to get a basic serial port going on an APQ8064 device.
Signed-off-by Kumar Gala <[email protected]>
Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
PATCH 1/1 clk: qcom: Add basic support for APQ8064 global clock controller clocks
In reply to Kumar GalaQuoting Kumar Gala (2014-04-04 09:31:29)
Quoted 8 lines
The APQ8064 and MSM8960 share a significant amount of clock data and code between the two SoCs. Rather than duplicating the data we just add support for a unqiue APQ8064 clock table into the MSM8960 code.
For now add just enough clocks to get a basic serial port going on an APQ8064 device.
Signed-off-by Kumar Gala <[email protected]>
Taken into clk-next. I don't have ipq8064 support in my tree so there was a trivial conflict in the first stanza of the patch.
Regards,
Mike
Quoted 110 lines
---
This patch is based on Stephen's qcom common clk init conslidation patch
.../devicetree/bindings/clock/qcom,gcc.txt | 1 + drivers/clk/qcom/Kconfig | 4 +-- drivers/clk/qcom/gcc-msm8960.c | 30 +++++++++++++++++++--- 3 files changed, 30 insertions(+), 5 deletions(-)Documentation/devicetree/bindings/clock/qcom,gcc.txt +1
-0@@ -4,6 +4,7 @@ Qualcomm Global Clock & Reset Controller Binding Required properties : - compatible : shall contain only one of the following: + "qcom,gcc-apq8064" "qcom,gcc-ipq8064" "qcom,gcc-msm8660" "qcom,gcc-msm8960"drivers/clk/qcom/Kconfig +2
-2@@ -21,10 +21,10 @@ config MSM_GCC_8660 i2c, USB, SD/eMMC, etc. config MSM_GCC_8960 - tristate "MSM8960 Global Clock Controller" + tristate "APQ8064/MSM8960 Global Clock Controller" depends on COMMON_CLK_QCOM help - Support for the global clock controller on msm8960 devices. + Support for the global clock controller on apq8064/msm8960 devices. Say Y if you want to use peripheral devices such as UART, SPI, i2c, USB, SD/eMMC, SATA, PCIe, etc.drivers/clk/qcom/gcc-msm8960.c +27
-3@@ -1,5 +1,5 @@/* -* Copyright (c) 2013, The Linux Foundation. All rights reserved. +* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -2868,6 +2868,16 @@ static const struct qcom_reset_map gcc_msm8960_resets[] = { [RIVA_RESET] = { 0x35e0 }, }; +static struct clk_regmap *gcc_apq8064_clks[] = { + [PLL8 ] = &pll8.clkr, + [PLL8_VOTE ] = &pll8_vote, + [GSBI7_UART_SRC ] = &gsbi7_uart_src.clkr, + [GSBI7_UART_CLK ] = &gsbi7_uart_clk.clkr, + [GSBI7_QUP_SRC ] = &gsbi7_qup_src.clkr, + [GSBI7_QUP_CLK ] = &gsbi7_qup_clk.clkr, + [GSBI7_H_CLK ] = &gsbi7_h_clk.clkr, +}; +static const struct regmap_config gcc_msm8960_regmap_config = { .reg_bits =32 , .reg_stride =4 ,@@ -2884,8 +2894,17 @@ static const struct qcom_cc_desc gcc_msm8960_desc = { .num_resets = ARRAY_SIZE(gcc_msm8960_resets), }; +static const struct qcom_cc_desc gcc_apq8064_desc = { + .config = &gcc_msm8960_regmap_config, + .clks = gcc_apq8064_clks, + .num_clks =ARRAY_SIZE (gcc_apq8064_clks), + .resets = gcc_msm8960_resets, + .num_resets =ARRAY_SIZE (gcc_msm8960_resets), +}; +static const struct of_device_id gcc_msm8960_match_table[] = { - { .compatible ="qcom,gcc-msm8960" }, + { .compatible ="qcom,gcc-msm8960" , .data = &gcc_msm8960_desc }, + { .compatible ="qcom,gcc-apq8064" , .data = &gcc_apq8064_desc }, { } };MODULE_DEVICE_TABLE (of, gcc_msm8960_match_table);@@ -2894,6 +2913,11 @@ static int gcc_msm8960_probe(struct platform_device *pdev) {struct clk *clk;struct device *dev = &pdev->dev; +const struct of_device_id *match; + + match =of_match_device (gcc_msm8960_match_table, &pdev->dev); +if (!match) +return -EINVAL ;/* Temporary until RPM clocks supported */ clk =clk_register_fixed_rate (dev,"cxo" ,NULL ,CLK_IS_ROOT ,19200000 );@@ -2904,7 +2928,7 @@ static int gcc_msm8960_probe(struct platform_device *pdev)if (IS_ERR (clk))return PTR_ERR (clk); -return qcom_cc_probe (pdev, &gcc_msm8960_desc); +return qcom_cc_probe (pdev, match->data); }static int gcc_msm8960_remove (struct platform_device *pdev)Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation