sunxi: initial upstreamining effort

This is my fourth cut at an upstreamable series based upon the
https://github.com/linux-sunxi/u-boot-sunxi.git#sunxi tree. The intention is to present a minimal starting point for upstreaming to which support for other processors, peripherals, boards etc can be added in the future. Therefore this has been stripped right back and currently supports only sun7i processors (AKA Allwinner A20) and the cubietruck board. Supported peripherals are UART, MMC and Ethernet.

The code here is from u-boot-sunxi.git#sunxi[0] changeset based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts." and applies to u-boot v2014.04.

Changes in v4:
- Resynced with u-boot-sunxi.git d9fe0a1e061e which pulled lots of
fixes
for Marek's review comments.

Global changes in v3:
- Rebased onto v2014.04 and resynced with u-boot-sunxi.git c89867dca2e9
- Improved commit messages
- Updated lists of contributors
- Added some CCs
- Lots of cleanup based on review comments.

Global changes in v2:
- Use SPDX-License-Identifier
- Resync with u-boot-sunxi.git
- Lot of updates to the individual patches, see the individual commit messages (checkpatch.pl fixes, magic number removal etc).
- Pulled the Ethernet stuff before the MMC and non-FEL boot stuff. The MMC stuff (which non-FEL boot needs) still needs some more cleanup, but the reordering means that the initial part of the series could in principal go in.

This series can also be found at:

git://gitorious.org/ijc/u-boot.git sunxi-mainlining-v4

There is no SMP here, since that relies on the PSCI support from Marc Zyngier which has yet to land in mainline. Marc has recently rebased and a version based on this series can be found at:

git://gitorious.org/ijc/u-boot.git sunxi-mainlining-v4-smp

I've tried to give corect credit and S-o-b based upon:
git log --pretty='%aN' linux-sunxi/sunxi -- [PATHS] | sort -u git log linux-sunxi/sunxi -- [PATHS] | grep -i signed.off.by | sort
-u
Manual inspection

This will tend to over credit, since it will include folks who contributed code which has since been removed as well as those who contributed code which is not included in this patch set, but I think it is better to be conservative and include too many rather than incorrectly exclude people. Doing better than this would be IMHO too hard to be worth it (e.g. git blame would prefer a recent whitespace cleanup to the actual author of the code and prefer someone did code motion over the original author, so it would be a massive & manual process).

[0] https://github.com/linux-sunxi/u-boot-sunxi.git

This patch adds the basic clocks and timer support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable.

Some of the code here is common to multiple sunxi subarchtectures, hence files are named sun4i which is the earliest similar variant.

---
v4: "Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."

v3: Based on c89867dca2e9 "sunxi: clocks: clock_get_pll5 prototype and coding style".

v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c "sunxi: mmc:
checkpatch whitespace fixes" with v2014.04-rc2 merged in:
- define magic numbers
- simplify get_tbclk
- correct clock_set_pll1 prototype
- add CONFIG_SUN7I to simplify future SUN?I support.
- defines for MMC AHB clocks

v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in ldscripts" vs v2014.01.

---
 arch/arm/cpu/armv7/sunxi/Makefile             |  12 ++
 arch/arm/cpu/armv7/sunxi/clock.c              |  25 +++
 arch/arm/cpu/armv7/sunxi/clock_sun4i.c        | 186 +++++++++++++++++++
 arch/arm/cpu/armv7/sunxi/timer.c              | 113 ++++++++++++
 arch/arm/include/asm/arch-sunxi/clock.h       |  29 +++
 arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 256 ++++++++++++++++++++++++++
 arch/arm/include/asm/arch-sunxi/sys_proto.h   |  16 ++
 arch/arm/include/asm/arch-sunxi/timer.h       |  88 +++++++++
 8 files changed, 725 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/sunxi/Makefile
 create mode 100644 arch/arm/cpu/armv7/sunxi/clock.c
 create mode 100644 arch/arm/cpu/armv7/sunxi/clock_sun4i.c
 create mode 100644 arch/arm/cpu/armv7/sunxi/timer.c
 create mode 100644 arch/arm/include/asm/arch-sunxi/clock.h
 create mode 100644 arch/arm/include/asm/arch-sunxi/clock_sun4i.h
 create mode 100644 arch/arm/include/asm/arch-sunxi/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-sunxi/timer.h

new file mode 100644
index 0000000..440d266
@@ -0,0 +1,12 @@
+#
+# (C) Copyright 2012 Henrik Nordstrom <[email protected]>
+#
+# Based on some other Makefile
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+obj-y	+= timer.o
+obj-y	+= clock.o
+obj-$(CONFIG_SUN7I)	+= clock_sun4i.o

new file mode 100644
index 0000000..47fb70f
@@ -0,0 +1,25 @@
+/*
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ * Tom Cubie <[email protected]>
+ *
+ * (C) Copyright 2013 Luke Kenneth Casson Leighton <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/sys_proto.h>
+
+int clock_init(void)
+{
+#ifdef CONFIG_SPL_BUILD
+	clock_init_safe();
+#endif
+	clock_init_uart();
+
+	return 0;
+}

new file mode 100644
index 0000000..5d1b6a6
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ * Tom Cubie <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _SUNXI_CLOCK_H
+#define _SUNXI_CLOCK_H
+
+#include <linux/types.h>
+
+#define CLK_GATE_OPEN			0x1
+#define CLK_GATE_CLOSE			0x0
+
+/* clock control module regs definition */
+#include <asm/arch/clock_sun4i.h>
+
+#ifndef __ASSEMBLY__
+int clock_init(void);
+int clock_twi_onoff(int port, int state);
+void clock_set_pll1(int hz);
+unsigned int clock_get_pll6(void);
+void clock_init_safe(void);
+void clock_init_uart(void);
+#endif
+
+#endif /* _SUNXI_CLOCK_H */

new file mode 100644
index 0000000..c3e636e
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ * Tom Cubie <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _SYS_PROTO_H_
+#define _SYS_PROTO_H_
+
+#include <linux/types.h>
+
+void sdelay(unsigned long);
+
+#endif

1.9.0

I have no idea what this changelog entry tells me, I will have to review this entire patch anew.

[...]

This was mainly for my benefit, so I could track which u-boot-sunxi.git version each commit was most recently sync'd with.

This particular patch needed no changes for the rebasing. I'm going to go through the rest now and reply with a proper v3..v4 changelog. If I don't reply to a particular patch it means nothing much changed.

it's not unbounded, the array has a sentinal value.

Ack.

Ian.

Correction, in this one:

- clock_get_pll6 moved to clock_sun4i.c.
- fixed coding style of comment in read_timer.

Ian.

FYI there were changes to patches marked here with a *

* sunxi: add sun7i clocks and timer support.
sunxi: add sun7i pinmux and gpio support
* sunxi: add sun7i dram setup support
sunxi: add sun7i cpu, board and start of day support
sunxi: add support for Cubietruck booting in FEL mode
* sunxi: add gmac Ethernet support
* sunxi: mmc support
* sunxi: non-FEL SPL boot support for sun7i

and as noted in the replies you should ignore:
net/designware: Reduce DMA burst length
in favour of v4.1:
net/designware: Make DMA burst length configurable and reduce by default

Ian.

This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable.

---
v4: Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."

v3: Based on c89867dca2e9 "sunxi: clocks: clock_get_pll5 prototype and coding style".

v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c "sunxi: mmc:
checkpatch whitespace fixes" with v2014.04-rc2 merged in:
- Additional pin definitions

v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in ldscripts" vs v2014.01.

---
 arch/arm/cpu/armv7/sunxi/Makefile      |   1 +
 arch/arm/cpu/armv7/sunxi/pinmux.c      |  61 ++++++++++++++
 arch/arm/include/asm/arch-sunxi/gpio.h | 147 +++++++++++++++++++++++++++++++++
 3 files changed, 209 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/sunxi/pinmux.c
 create mode 100644 arch/arm/include/asm/arch-sunxi/gpio.h

index 440d266..529e7ec 100644
@@ -9,4 +9,5 @@
 #
 obj-y	+= timer.o
 obj-y	+= clock.o
+obj-y	+= pinmux.o
 obj-$(CONFIG_SUN7I)	+= clock_sun4i.o

1.9.0

- clock_get_pll6 moved to clock_sun4i.c.
- fixed coding style of comment in read_timer.

Sigh, This is actually for patch 1/9. let me try that again...

Ian.

This patch was unchanged in v4.

This patch adds DRAM initialisation support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable.

---
v4: Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."

v3: Based on c89867dca2e9 "sunxi: clocks: clock_get_pll5 prototype and coding style".

v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c "sunxi: mmc:
checkpatch whitespace fixes" with v2014.04-rc2 merged in:
- remove redundant braces in mctl_ddr3_reset
- remove incorrect call to mctl_ddr3_reset.
- add CONFIG_SUN7I to simplify future SUN?I support.
- add a comment about the magic numbers from the a/w code dumps
- fix a bunch of checkpatch.pl issues

v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in ldscripts" vs v2014.01.

---
 arch/arm/cpu/armv7/sunxi/Makefile      |   1 +
 arch/arm/cpu/armv7/sunxi/dram.c        | 593 +++++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-sunxi/dram.h | 179 ++++++++++
 3 files changed, 773 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/sunxi/dram.c
 create mode 100644 arch/arm/include/asm/arch-sunxi/dram.h

index 529e7ec..d81d26c 100644
@@ -11,3 +11,4 @@ obj-y	+= timer.o
 obj-y	+= clock.o
 obj-y	+= pinmux.o
 obj-$(CONFIG_SUN7I)	+= clock_sun4i.o
+obj-$(CONFIG_SUN7I)	+= dram.o

1.9.0

- removed unbounded loops
- support more dram clock speeds.

Best regards,
Marek Vasut

This patch adds generic board, start of day and basic build system support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable.

---
v4: Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."

v3: Based on c89867dca2e9 "sunxi: clocks: clock_get_pll5 prototype and coding style".

v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c "sunxi: mmc:
checkpatch whitespace fixes" with v2014.04-rc2 merged in:
- just init dram once
- remove clock ramping until power control is implemented
- add CONFIG_SUN7I to simplify future SUN?I support.
- fix a typo

v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in ldscripts" vs v2014.01.

---
 arch/arm/cpu/armv7/Makefile                 |   2 +-
 arch/arm/cpu/armv7/sunxi/Makefile           |  11 +++
 arch/arm/cpu/armv7/sunxi/board.c            |  88 +++++++++++++++++
 arch/arm/cpu/armv7/sunxi/cpu_info.c         |  19 ++++
 arch/arm/cpu/armv7/sunxi/start.c            |   1 +
 arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds |  77 +++++++++++++++
 arch/arm/include/asm/arch-sunxi/cpu.h       | 122 ++++++++++++++++++++++++
 arch/arm/include/asm/arch-sunxi/spl.h       |  20 ++++
 board/sunxi/Makefile                        |  11 +++
 board/sunxi/board.c                         |  57 +++++++++++
 include/configs/sun7i.h                     |  24 +++++
 include/configs/sunxi-common.h              | 141 ++++++++++++++++++++++++++++
 12 files changed, 572 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv7/sunxi/board.c
 create mode 100644 arch/arm/cpu/armv7/sunxi/cpu_info.c
 create mode 100644 arch/arm/cpu/armv7/sunxi/start.c
 create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
 create mode 100644 arch/arm/include/asm/arch-sunxi/cpu.h
 create mode 100644 arch/arm/include/asm/arch-sunxi/spl.h
 create mode 100644 board/sunxi/Makefile
 create mode 100644 board/sunxi/board.c
 create mode 100644 include/configs/sun7i.h
 create mode 100644 include/configs/sunxi-common.h

index 119ebb3..ddf00f3 100644
@@ -12,7 +12,7 @@ obj-y	+= cache_v7.o
 obj-y	+= cpu.o
 obj-y	+= syslib.o
 
-ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY),)
+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI),)
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y	+= lowlevel_init.o
 endif

index d81d26c..a64bfa1 100644
@@ -8,7 +8,18 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 obj-y	+= timer.o
+obj-y	+= board.o
 obj-y	+= clock.o
 obj-y	+= pinmux.o
 obj-$(CONFIG_SUN7I)	+= clock_sun4i.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y	+= cpu_info.o
+endif
+
+ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SUN7I)	+= dram.o
+ifdef CONFIG_SPL_FEL
+obj-y	+= start.o
+endif
+endif

new file mode 100644
index 0000000..b4c3d5c
@@ -0,0 +1,19 @@
+/*
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ * Tom Cubie <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/cpu.h>
+
+#ifdef CONFIG_DISPLAY_CPUINFO
+int print_cpuinfo(void)
+{
+	puts("CPU:   Allwinner A20 (SUN7I)\n");
+	return 0;
+}
+#endif

new file mode 100644
index 0000000..6b392fa
@@ -0,0 +1 @@
+/* Intentionally empty. Only needed to get FEL SPL link line right */

new file mode 100644
index 0000000..ff871bc
@@ -0,0 +1,20 @@
+/*
+ * This is a copy of omap3/spl.h:
+ *
+ * (C) Copyright 2012
+ * Texas Instruments, <www.ti.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef	_ASM_ARCH_SPL_H_
+#define	_ASM_SPL_H_
+
+#define BOOT_DEVICE_NONE	0
+#define BOOT_DEVICE_XIP		1
+#define BOOT_DEVICE_NAND	2
+#define BOOT_DEVICE_ONE_NAND	3
+#define BOOT_DEVICE_MMC2	5 /*emmc*/
+#define BOOT_DEVICE_MMC1	6
+#define BOOT_DEVICE_XIPWAIT	7
+#define BOOT_DEVICE_MMC2_2      0xff
+#endif

new file mode 100644
index 0000000..559112e
@@ -0,0 +1,11 @@
+#
+# (C) Copyright 2012 Henrik Nordstrom <[email protected]>
+#
+# Based on some other board Makefile
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+obj-y	+= board.o

new file mode 100644
index 0000000..9b693f7
@@ -0,0 +1,24 @@
+/*
+ * (C) Copyright 2012-2013 Henrik Nordstrom <[email protected]>
+ * (C) Copyright 2013 Luke Kenneth Casson Leighton <[email protected]>
+ *
+ * Configuration settings for the Allwinner A20 (sun7i) CPU
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * A20 specific configuration
+ */
+#define CONFIG_SUN7I		/* sun7i SoC generation */
+
+#define CONFIG_SYS_PROMPT		"sun7i# "
+
+/*
+ * Include common sunxi configuration where most the settings are
+ */
+#include <configs/sunxi-common.h>
+
+#endif /* __CONFIG_H */

1.9.0

Sorry, I give up here. The changelog is useless and I don't want to review the patches anew again. Please fix the changelogs and repost the patches.

Thanks

Best regards,
Marek Vasut

Best regards,
Marek Vasut

Hi Ian,

[...]

         M.

Who you jivin' with that Cosmik Debris?

Yes. Well, actually what I will do is repost it for application to u-boot-sunxi.git and then resync, but the affect is the same.

Ian.

Sure. Whatever is the most convenient for everyone.

Thanks,

         M.

Who you jivin' with that Cosmik Debris?

---
v4: Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."

v3: Based on c89867dca2e9 "sunxi: clocks: clock_get_pll5 prototype and coding style".

v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c "sunxi: mmc:
checkpatch whitespace fixes" with v2014.04-rc2 merged in.

v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in ldscripts" vs v2014.01.

---
 board/sunxi/Makefile          |  1 +
 board/sunxi/dram_cubietruck.c | 31 +++++++++++++++++++++++++++++++
 boards.cfg                    |  1 +
 3 files changed, 33 insertions(+)
 create mode 100644 board/sunxi/dram_cubietruck.c

index 559112e..18b1e11 100644
@@ -9,3 +9,4 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 obj-y	+= board.o
+obj-$(CONFIG_CUBIETRUCK)	+= dram_cubietruck.o

new file mode 100644
index 0000000..fbcd687
@@ -0,0 +1,31 @@
+/* this file is generated, don't edit it yourself */
+
+#include <common.h>
+#include <asm/arch/dram.h>
+
+static struct dram_para dram_para = {
+	.clock = 432,
+	.type = 3,
+	.rank_num = 1,
+	.density = 4096,
+	.io_width = 8,
+	.bus_width = 32,
+	.cas = 9,
+	.zq = 0x7f,
+	.odt_en = 0,
+	.size = 2048,
+	.tpr0 = 0x42d899b7,
+	.tpr1 = 0xa090,
+	.tpr2 = 0x22a00,
+	.tpr3 = 0x0,
+	.tpr4 = 0x1,
+	.tpr5 = 0x0,
+	.emr1 = 0x4,
+	.emr2 = 0x10,
+	.emr3 = 0x0,
+};
+
+unsigned long sunxi_dram_init(void)
+{
+	return dramc_init(&dram_para);
+}

index b4203f1..31b02df 100644
@@ -371,6 +371,7 @@ Active  arm         armv7          rmobile     renesas         lager
 Active  arm         armv7          s5pc1xx     samsung         goni                s5p_goni                             -                                                                                                                                 Mateusz Zalega <[email protected]>
 Active  arm         armv7          s5pc1xx     samsung         smdkc100            smdkc100                             -                                                                                                                                 Minkyu Kang <[email protected]>
 Active  arm         armv7          socfpga     altera          socfpga             socfpga_cyclone5                     -                                                                                                                                 -
+Active  arm         armv7          sunxi       -               sunxi               Cubietruck_FEL                       sun7i:CUBIETRUCK,SPL_FEL                                                                                                          -
 Active  arm         armv7          u8500       st-ericsson     snowball            snowball                             -                                                                                                                                 Mathieu Poirier <[email protected]>
 Active  arm         armv7          u8500       st-ericsson     u8500               u8500_href                           -                                                                                                                                 -
 Active  arm         armv7          vf610       freescale       vf610twr            vf610twr                             vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg                                                                         Alison Wang <[email protected]>

1.9.0

Best regards,
Marek Vasut

Add support for the GMAC Ethernet controller on Allwinner A20 (sun7i) processors. Enable for the Cubietruck.

---
v4: Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."

v3: Based on c89867dca2e9 "sunxi: clocks: clock_get_pll5 prototype and coding style".

v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c "sunxi: mmc:
checkpatch whitespace fixes" with v2014.04-rc2 merged in:
- drop accidentally doubled hunk
- use gpio setup functions
- moved before mmc patches

v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in ldscripts" vs v2014.01.

---
 arch/arm/cpu/armv7/sunxi/board.c | 23 +++++++++++++++++++++++
 board/sunxi/Makefile             |  1 +
 board/sunxi/gmac.c               | 32 ++++++++++++++++++++++++++++++++
 boards.cfg                       |  2 +-
 include/configs/sunxi-common.h   | 17 +++++++++++++++++
 include/netdev.h                 |  1 +
 6 files changed, 75 insertions(+), 1 deletion(-)
 create mode 100644 board/sunxi/gmac.c

index b5c0cb7..49c9448 100644
@@ -11,6 +11,8 @@
  */
 
 #include <common.h>
+#include <netdev.h>
+#include <miiphy.h>
 #include <serial.h>
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>

@@ -86,3 +88,24 @@ void enable_caches(void)
 	dcache_enable();
 }
 #endif
+
+#ifdef CONFIG_CMD_NET
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+	int rc;
+
+#ifdef CONFIG_SUNXI_GMAC
+	rc = sunxi_gmac_initialize(bis);
+	if (rc < 0) {
+		printf("sunxi: failed to initialize gmac\n");
+		return rc;
+	}
+#endif
+
+	return 0;
+}
+#endif

index 18b1e11..cbf8f08 100644
@@ -9,4 +9,5 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 obj-y	+= board.o
+obj-$(CONFIG_SUNXI_GMAC)	+= gmac.o
 obj-$(CONFIG_CUBIETRUCK)	+= dram_cubietruck.o

new file mode 100644
index 0000000..e48328d
@@ -0,0 +1,32 @@
+#include <common.h>
+#include <netdev.h>
+#include <miiphy.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/gpio.h>
+
+int sunxi_gmac_initialize(bd_t *bis)
+{
+	int pin;
+	struct sunxi_ccm_reg *const ccm =
+		(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+	/* Set up clock gating */
+	setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
+
+	/* Set MII clock */
+	setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
+		CCM_GMAC_CTRL_GPIT_RGMII);
+
+	/* Configure pin mux settings for GMAC */
+	for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) {
+		/* skip unused pins in RGMII mode */
+		if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
+			continue;
+		sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC);
+		sunxi_gpio_set_drv(pin, 3);
+	}
+
+	return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
+}

index 31b02df..b74f8c8 100644
@@ -371,7 +371,7 @@ Active  arm         armv7          rmobile     renesas         lager
 Active  arm         armv7          s5pc1xx     samsung         goni                s5p_goni                             -                                                                                                                                 Mateusz Zalega <[email protected]>
 Active  arm         armv7          s5pc1xx     samsung         smdkc100            smdkc100                             -                                                                                                                                 Minkyu Kang <[email protected]>
 Active  arm         armv7          socfpga     altera          socfpga             socfpga_cyclone5                     -                                                                                                                                 -
-Active  arm         armv7          sunxi       -               sunxi               Cubietruck_FEL                       sun7i:CUBIETRUCK,SPL_FEL                                                                                                          -
+Active  arm         armv7          sunxi       -               sunxi               Cubietruck_FEL                       sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII                                                                                         -
 Active  arm         armv7          u8500       st-ericsson     snowball            snowball                             -                                                                                                                                 Mathieu Poirier <[email protected]>
 Active  arm         armv7          u8500       st-ericsson     u8500               u8500_href                           -                                                                                                                                 -
 Active  arm         armv7          vf610       freescale       vf610twr            vf610twr                             vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg                                                                         Alison Wang <[email protected]>

index 3f7e314..e844110 100644
@@ -127,6 +127,23 @@
 
 #define CONFIG_CONS_INDEX              1       /* UART0 */
 
+#ifdef CONFIG_SUNXI_GMAC
+#define CONFIG_DESIGNWARE_ETH		/* GMAC can use designware driver */
+#define CONFIG_DW_AUTONEG
+#define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
+#define CONFIG_PHY_ADDR		1
+#define CONFIG_MII			/* MII PHY management		*/
+#define CONFIG_PHYLIB
+#endif
+
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_DNS
+#define CONFIG_NETCONSOLE
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#endif
+
 #if !defined CONFIG_ENV_IS_IN_MMC && \
     !defined CONFIG_ENV_IS_IN_NAND && \
     !defined CONFIG_ENV_IS_IN_FAT && \

index 32b5073..fc4a2f8 100644
@@ -79,6 +79,7 @@ int sh_eth_initialize(bd_t *bis);
 int skge_initialize(bd_t *bis);
 int smc91111_initialize(u8 dev_num, int base_addr);
 int smc911x_initialize(u8 dev_num, int base_addr);
+int sunxi_gmac_initialize(bd_t *bis);
 int sunxi_wemac_initialize(bd_t *bis);
 int tsi108_eth_initialize(bd_t *bis);
 int uec_standard_init(bd_t *bis);

1.9.0

- Use correct ifdef's in and around cpu_eth_init
- Log and propagate errors from sunxi_gmac_initialize
- Move glue from drivers/net/sunxi_gmac.c to board/sunxi/gmac.c
- Remove SNTP and useless BOOTP config options.

Ian.

Best regards,
Marek Vasut

This adds support for the MMC controller on the Allwinner A20 (sun7i) processor.

---
v4: Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."

v3: Based on c89867dca2e9 "sunxi: clocks: clock_get_pll5 prototype and coding style".

v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c "sunxi: mmc:
checkpatch whitespace fixes" with v2014.04-rc2 merged in:
- use proper gpio interfaces, removing awkward casts and some magic numbers.
- remove magic numbers
- other cleanups

v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in ldscripts" vs v2014.01.

mmc: drop debug

---
 arch/arm/include/asm/arch-sunxi/mmc.h | 124 +++++++++
 board/sunxi/board.c                   |  72 +++++
 drivers/mmc/Makefile                  |   1 +
 drivers/mmc/sunxi_mmc.c               | 503 ++++++++++++++++++++++++++++++++++
 include/configs/sunxi-common.h        |  11 +
 5 files changed, 711 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-sunxi/mmc.h
 create mode 100644 drivers/mmc/sunxi_mmc.c

new file mode 100644
index 0000000..53196e3
@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ * Aaron <[email protected]>
+ *
+ * MMC register definition for allwinner sunxi platform.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _SUNXI_MMC_H
+#define _SUNXI_MMC_H
+
+#include <linux/types.h>
+
+struct sunxi_mmc {
+	u32 gctrl;		/* 0x00 global control */
+	u32 clkcr;		/* 0x04 clock control */
+	u32 timeout;		/* 0x08 time out */
+	u32 width;		/* 0x0c bus width */
+	u32 blksz;		/* 0x10 block size */
+	u32 bytecnt;		/* 0x14 byte count */
+	u32 cmd;		/* 0x18 command */
+	u32 arg;		/* 0x1c argument */
+	u32 resp0;		/* 0x20 response 0 */
+	u32 resp1;		/* 0x24 response 1 */
+	u32 resp2;		/* 0x28 response 2 */
+	u32 resp3;		/* 0x2c response 3 */
+	u32 imask;		/* 0x30 interrupt mask */
+	u32 mint;		/* 0x34 masked interrupt status */
+	u32 rint;		/* 0x38 raw interrupt status */
+	u32 status;		/* 0x3c status */
+	u32 ftrglevel;		/* 0x40 FIFO threshold watermark*/
+	u32 funcsel;		/* 0x44 function select */
+	u32 cbcr;		/* 0x48 CIU byte count */
+	u32 bbcr;		/* 0x4c BIU byte count */
+	u32 dbgc;		/* 0x50 debug enable */
+	u32 res0[11];
+	u32 dmac;		/* 0x80 internal DMA control */
+	u32 dlba;		/* 0x84 internal DMA descr list base address */
+	u32 idst;		/* 0x88 internal DMA status */
+	u32 idie;		/* 0x8c internal DMA interrupt enable */
+	u32 chda;		/* 0x90 */
+	u32 cbda;		/* 0x94 */
+	u32 res1[26];
+	u32 fifo;		/* 0x100 FIFO access address */
+};
+
+#define SUNXI_MMC_CLK_POWERSAVE		(0x1 << 17)
+#define SUNXI_MMC_CLK_ENABLE		(0x1 << 16)
+#define SUNXI_MMC_CLK_DIVIDER_MASK	(0xff)
+
+#define SUNXI_MMC_GCTRL_SOFT_RESET	(0x1 << 0)
+#define SUNXI_MMC_GCTRL_FIFO_RESET	(0x1 << 1)
+#define SUNXI_MMC_GCTRL_DMA_RESET	(0x1 << 2)
+#define SUNXI_MMC_GCTRL_RESET		(SUNXI_MMC_GCTRL_SOFT_RESET|\
+					 SUNXI_MMC_GCTRL_FIFO_RESET|\
+					 SUNXI_MMC_GCTRL_DMA_RESET)
+#define SUNXI_MMC_GCTRL_DMA_ENABLE	(0x1 << 5)
+#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB   (0x1 << 31)
+
+#define SUNXI_MMC_CMD_RESP_EXPIRE	(0x1 << 6)
+#define SUNXI_MMC_CMD_LONG_RESPONSE	(0x1 << 7)
+#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC	(0x1 << 8)
+#define SUNXI_MMC_CMD_DATA_EXPIRE	(0x1 << 9)
+#define SUNXI_MMC_CMD_WRITE		(0x1 << 10)
+#define SUNXI_MMC_CMD_AUTO_STOP		(0x1 << 12)
+#define SUNXI_MMC_CMD_WAIT_PRE_OVER	(0x1 << 13)
+#define SUNXI_MMC_CMD_SEND_INIT_SEQ	(0x1 << 15)
+#define SUNXI_MMC_CMD_UPCLK_ONLY	(0x1 << 21)
+#define SUNXI_MMC_CMD_START		(0x1 << 31)
+
+#define SUNXI_MMC_RINT_RESP_ERROR		(0x1 << 1)
+#define SUNXI_MMC_RINT_COMMAND_DONE		(0x1 << 2)
+#define SUNXI_MMC_RINT_DATA_OVER		(0x1 << 3)
+#define SUNXI_MMC_RINT_TX_DATA_REQUEST		(0x1 << 4)
+#define SUNXI_MMC_RINT_RX_DATA_REQUEST		(0x1 << 5)
+#define SUNXI_MMC_RINT_RESP_CRC_ERROR		(0x1 << 6)
+#define SUNXI_MMC_RINT_DATA_CRC_ERROR		(0x1 << 7)
+#define SUNXI_MMC_RINT_RESP_TIMEOUT		(0x1 << 8)
+#define SUNXI_MMC_RINT_DATA_TIMEOUT		(0x1 << 9)
+#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE	(0x1 << 10)
+#define SUNXI_MMC_RINT_FIFO_RUN_ERROR		(0x1 << 11)
+#define SUNXI_MMC_RINT_HARD_WARE_LOCKED		(0x1 << 12)
+#define SUNXI_MMC_RINT_START_BIT_ERROR		(0x1 << 13)
+#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE	(0x1 << 14)
+#define SUNXI_MMC_RINT_END_BIT_ERROR		(0x1 << 15)
+#define SUNXI_MMC_RINT_SDIO_INTERRUPT		(0x1 << 16)
+#define SUNXI_MMC_RINT_CARD_INSERT		(0x1 << 30)
+#define SUNXI_MMC_RINT_CARD_REMOVE		(0x1 << 31)
+#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT      \
+	(SUNXI_MMC_RINT_RESP_ERROR |		\
+	 SUNXI_MMC_RINT_RESP_CRC_ERROR |	\
+	 SUNXI_MMC_RINT_DATA_CRC_ERROR |	\
+	 SUNXI_MMC_RINT_RESP_TIMEOUT |		\
+	 SUNXI_MMC_RINT_DATA_TIMEOUT |		\
+	 SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE |	\
+	 SUNXI_MMC_RINT_FIFO_RUN_ERROR |	\
+	 SUNXI_MMC_RINT_HARD_WARE_LOCKED |	\
+	 SUNXI_MMC_RINT_START_BIT_ERROR |	\
+	 SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */
+#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT	\
+	(SUNXI_MMC_RINT_AUTO_COMMAND_DONE |	\
+	 SUNXI_MMC_RINT_DATA_OVER |		\
+	 SUNXI_MMC_RINT_COMMAND_DONE |		\
+	 SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE)
+
+#define SUNXI_MMC_STATUS_RXWL_FLAG		(0x1 << 0)
+#define SUNXI_MMC_STATUS_TXWL_FLAG		(0x1 << 1)
+#define SUNXI_MMC_STATUS_FIFO_EMPTY		(0x1 << 2)
+#define SUNXI_MMC_STATUS_FIFO_FULL		(0x1 << 3)
+#define SUNXI_MMC_STATUS_CARD_PRESENT		(0x1 << 8)
+#define SUNXI_MMC_STATUS_CARD_DATA_BUSY		(0x1 << 9)
+#define SUNXI_MMC_STATUS_DATA_FSM_BUSY		(0x1 << 10)
+
+#define SUNXI_MMC_IDMAC_RESET		(0x1 << 0)
+#define SUNXI_MMC_IDMAC_FIXBURST	(0x1 << 1)
+#define SUNXI_MMC_IDMAC_ENABLE		(0x1 << 7)
+
+#define SUNXI_MMC_IDIE_TXIRQ		(0x1 << 0)
+#define SUNXI_MMC_IDIE_RXIRQ		(0x1 << 1)
+
+int sunxi_mmc_init(int sdc_no);
+#endif /* _SUNXI_MMC_H */

index 931922b..5e67098 100644
@@ -28,6 +28,7 @@ obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
 obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
 obj-$(CONFIG_DWMMC) += dw_mmc.o
 obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
+obj-$(CONFIG_MMC_SUNXI) += sunxi_mmc.o
 obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
 obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o
 ifdef CONFIG_SPL_BUILD

index e844110..4253452 100644
@@ -59,6 +59,16 @@
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_INITRD_TAG
 
+/* mmc config */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_MMC_SUNXI
+#define CONFIG_MMC_SUNXI_SLOT		0
+#define CONFIG_MMC_SUNXI_USE_DMA
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
+
 /* 4MB of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))
 

@@ -94,6 +104,7 @@
 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)	/* 512 KiB */
 #define CONFIG_IDENT_STRING		" Allwinner Technology"
 
+#define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

1.9.0

- Moved pinmux setup from drivers/mmc/sunxi_mmc.c to board/sunxi/board.c
- Use setbits_le32 to manipulate the ahb0 gate.

Best regards,
Marek Vasut

Add support for booting from an MMC card.

---
v4: Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."

v3: Based on c89867dca2e9 "sunxi: clocks: clock_get_pll5 prototype and coding style".

v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c "sunxi: mmc:
checkpatch whitespace fixes" with v2014.04-rc2 merged in:
- mksunxiboot cleanups
- rebase on Kbuild stuff

v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in ldscripts" vs v2014.01.

---
 Makefile                                |  10 +++
 arch/arm/cpu/armv7/sunxi/config.mk      |   8 ++
 arch/arm/cpu/armv7/sunxi/u-boot-spl.lds |  52 ++++++++++++
 boards.cfg                              |   1 +
 include/configs/sunxi-common.h          |  26 ++++++
 spl/Makefile                            |  13 +++
 tools/.gitignore                        |   1 +
 tools/Makefile                          |   2 +
 tools/mksunxiboot.c                     | 142 ++++++++++++++++++++++++++++++++
 9 files changed, 255 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/sunxi/config.mk
 create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
 create mode 100644 tools/mksunxiboot.c

index c91c10e..379731c 100644
@@ -870,6 +870,13 @@ OBJCOPYFLAGS_u-boot.spr = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \
 u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE
 	$(call if_changed,pad_cat)
 
+ifneq ($(CONFIG_SUNXI),)
+OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
+				   --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE
+	$(call if_changed,pad_cat)
+endif
+
 ifneq ($(CONFIG_TEGRA),)
 OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE)
 u-boot-nodtb-tegra.bin: spl/u-boot-spl u-boot.bin FORCE

@@ -1081,6 +1088,9 @@ spl/u-boot-spl.bin: spl/u-boot-spl
 spl/u-boot-spl: tools prepare
 	$(Q)$(MAKE) obj=spl -f $(srctree)/spl/Makefile all
 
+spl/sunxi-spl.bin: spl/u-boot-spl
+	@:
+
 tpl/u-boot-tpl.bin: tools prepare
 	$(Q)$(MAKE) obj=tpl -f $(srctree)/spl/Makefile all CONFIG_TPL_BUILD=y
 

new file mode 100644
index 0000000..00f5ffc
@@ -0,0 +1,8 @@
+# Build a combined spl + u-boot image
+ifdef CONFIG_SPL
+ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_SPL_FEL
+ALL-y += u-boot-sunxi-with-spl.bin
+endif
+endif
+endif

index b74f8c8..b6e20ae 100644
@@ -371,6 +371,7 @@ Active  arm         armv7          rmobile     renesas         lager
 Active  arm         armv7          s5pc1xx     samsung         goni                s5p_goni                             -                                                                                                                                 Mateusz Zalega <[email protected]>
 Active  arm         armv7          s5pc1xx     samsung         smdkc100            smdkc100                             -                                                                                                                                 Minkyu Kang <[email protected]>
 Active  arm         armv7          socfpga     altera          socfpga             socfpga_cyclone5                     -                                                                                                                                 -
+Active  arm         armv7          sunxi       -               sunxi               Cubietruck                           sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII                                                                                             -
 Active  arm         armv7          sunxi       -               sunxi               Cubietruck_FEL                       sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII                                                                                         -
 Active  arm         armv7          u8500       st-ericsson     snowball            snowball                             -                                                                                                                                 Mathieu Poirier <[email protected]>
 Active  arm         armv7          u8500       st-ericsson     u8500               u8500_href                           -                                                                                                                                 -

index 4253452..5d72d62 100644
@@ -17,6 +17,11 @@
  * High Level Configuration Options
  */
 #define CONFIG_SUNXI		/* sunxi family */
+#ifdef CONFIG_SPL_BUILD
+#ifndef CONFIG_SPL_FEL
+#define CONFIG_SYS_THUMB_BUILD	/* Thumbs mode to save space in SPL */
+#endif
+#endif
 
 #include <asm/arch/cpu.h>	/* get chip and board defs */
 

@@ -121,11 +126,32 @@
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 
+#ifdef CONFIG_SPL_FEL
+
 #define CONFIG_SPL
 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
 #define CONFIG_SPL_TEXT_BASE		0x2000
 #define CONFIG_SPL_MAX_SIZE		0x4000		/* 16 KiB */
+
+#else /* CONFIG_SPL */
+
+#define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KiB */
+
+#define CONFIG_SPL_TEXT_BASE		0x20		/* sram start+header */
+#define CONFIG_SPL_MAX_SIZE		0x5fe0		/* 24KB on sun4i/sun7i */
+
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+
+#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	80	/* 40KiB */
+#define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
+
+#endif /* CONFIG_SPL */
+
 /* end of 32 KiB in sram */
 #define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK

index 6fec252..e7c7a95 100644
@@ -188,6 +188,12 @@ ifdef CONFIG_SAMSUNG
 ALL-y	+= $(obj)/$(BOARD)-spl.bin
 endif
 
+ifdef CONFIG_SUNXI
+ifndef CONFIG_SPL_FEL
+ALL-y	+= $(obj)/sunxi-spl.bin
+endif
+endif
+
 all:	$(ALL-y)
 
 ifdef CONFIG_SAMSUNG

@@ -215,6 +221,13 @@ ifneq ($(CONFIG_SPL_TEXT_BASE),)
 LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE)
 endif
 
+ifdef CONFIG_SUNXI
+quiet_cmd_mksunxiboot = MKSUNXI $@
+cmd_mksunxiboot = $(objtree)/tools/mksunxiboot $< $@
+$(obj)/sunxi-spl.bin: $(obj)/$(SPL_BIN).bin
+	$(call if_changed,mksunxiboot)
+endif
+
 quiet_cmd_u-boot-spl = LD      $@
       cmd_u-boot-spl = cd $(obj) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) \
 		       $(patsubst $(obj)/%,%,$(u-boot-spl-init)) --start-group \

index 2a90dfe..3ad5db3 100644
@@ -9,6 +9,7 @@
 /mkexynosspl
 /mpc86x_clk
 /mxsboot
+/mksunxiboot
 /ncb
 /proftool
 /relocate-rela

index 097cc1d..062a404 100644
@@ -120,6 +120,8 @@ hostprogs-$(CONFIG_MX23) += mxsboot$(SFX)
 hostprogs-$(CONFIG_MX28) += mxsboot$(SFX)
 HOSTCFLAGS_mxsboot$(SFX).o := -pedantic
 
+hostprogs-$(CONFIG_SUNXI) += mksunxiboot$(SFX)
+
 hostprogs-$(CONFIG_NETCONSOLE) += ncb$(SFX)
 hostprogs-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
 

1.9.0

- fixed in mksunxiboot.c
- use stdint.h types
- drop unused code
- fix the types to avoid casting and potential misalignments

Best regards,
Marek Vasut

From: Jens Kuske <[email protected]>

The GMAC module in Allwinner sunxi SoCs seems to have problems with burst lengths > 8.

---
v4: Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."

v3: New. cherry-picked from u-boot-sunxi.git tree.

---
 drivers/net/designware.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

index c45593b..6ece479 100644
@@ -249,7 +249,7 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
 	rx_descs_init(dev);
 	tx_descs_init(dev);
 
-	writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode);
+	writel(FIXEDBURST | PRIORXTX_41 | BURST_8, &dma_p->busmode);
 
 	writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD,
 	       &dma_p->opmode);

1.9.0

Please ignore this last patch, I plan to rework as Alexey suggests in
http://article.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/9468

Ian.

The correct value for this setting can vary across SoCs and boards, so make it configurable.

Also reduce the default value to 8, which is the same default as used in the Linux driver.

---
v4.1: Replaces "neat/designware: Reduce DMA burst length" from sunxi mainlining series.

---
 drivers/net/designware.c |  2 +-
 drivers/net/designware.h | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

index fa816bf..7186e3b 100644
@@ -249,7 +249,7 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
 	rx_descs_init(dev);
 	tx_descs_init(dev);
 
-	writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode);
+	writel(FIXEDBURST | PRIORXTX_41 | DMA_PBL, &dma_p->busmode);
 
 	writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD,
 	       &dma_p->opmode);

index 6d94b3a..759085c 100644
@@ -77,18 +77,18 @@ struct eth_dma_regs {
 
 #define DW_DMA_BASE_OFFSET	(0x1000)
 
+/* Default DMA Burst length */
+#ifndef CONFIG_DW_GMAC_DEFAULT_DMA_PBL
+#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL 8
+#endif
+
 /* Bus mode register definitions */
 #define FIXEDBURST		(1 << 16)
 #define PRIORXTX_41		(3 << 14)
 #define PRIORXTX_31		(2 << 14)
 #define PRIORXTX_21		(1 << 14)
 #define PRIORXTX_11		(0 << 14)
-#define BURST_1			(1 << 8)
-#define BURST_2			(2 << 8)
-#define BURST_4			(4 << 8)
-#define BURST_8			(8 << 8)
-#define BURST_16		(16 << 8)
-#define BURST_32		(32 << 8)
+#define DMA_PBL			(CONFIG_DW_GMAC_DEFAULT_DMA_PBL<<8)
 #define RXHIGHPRIO		(1 << 1)
 #define DMAMAC_SRST		(1 << 0)
 

1.9.0

It would be really nice if you could list the changes instead of pointing to some random object in some random git repository at to me unknown address.

Best regards,
Marek Vasut

The address was further down this introductory mail, in the footnote referenced by [0] above: https://github.com/linux-sunxi/u-boot-sunxi.git

Log log from v3 to v4 is below. You can ignore the A23 and sun6i changes since they don't affect this initial upstreaming series.

Ian.

commit d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:19:02 2014 +0100

sunxi: mksunxiboot: remove unnecessary casts.

In particular this removes the possibility that boot_buf is misaligned in gen_check_sum by making the type explicit.

commit c81ab9443997bd8ed63f576a2420a77cc5f7d0e7

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:19:01 2014 +0100

sunxi: mksunxiboot: remove dead code.

Requested by Marek during upstream review.

commit ded94b565973d6ffa6625196af7b7f69fc1ca909

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:19:00 2014 +0100

sunxi: mksunxiboot: use stdint.h types

Requested by Marek during upstream review.

commit 1c814095b5fedbd44310290cfdbb7eb9ec4a96c0

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:18:59 2014 +0100

sunxi: mmc: move pinmux configuration to board setup.

Requested by Marek as part of upstream review.

commit 402c300dcb082794a481cce4caebb0d4cb315ee9

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:18:58 2014 +0100

sunxi: remove unnecessary network config items

CONFIG_CMD_SNTP doesn't do anything useful withou CONFIG_CMD_DATE (which sunxi doesn't set, nor does it provide the required rtc_set() function).

Also drop some of the more obscure BOOTP options which there doesn't seem to be any need for.

Highlighted by Marek during upstream review.

commit 543fd1c8d959f2ce35f6c245ba4751bfe14331ee

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:18:57 2014 +0100

sunxi: move gmac glue under board/sunxi

The other existing designware glue files are under board/*.

Marek requested that it move out of drivers/net as part of upstream review. His suggestion was to move to arch/arm/.../sunxi but I found all the others under board/*

commit 4bad0496d51f98e8691dbfe792201cc6830f5a39

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:18:56 2014 +0100

sunxi: log failure of sunxi_?mac_initialize.

Also propagate errors.

Requested by Marek as part of upstream review.

commit baab9f178f72239beccdaed013a809ba1f67f32a

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:18:55 2014 +0100

sunxi: correct cpu_eth_init ifdeffery

The cpu_eth_init function should be ifdef CONFIG_CMD_NET and the individual driver init functions should use the corresponding CONFIG_FOO.

Requested by Marek during upstream review.

commit c224b4d19831ddfc4de002b75bc923dda855502c

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:18:54 2014 +0100

sunxi: remove unbounded loops from DRAM setup.

Introduce a helper function which waits for up to 1s for the necesary bits to clear and then panic()s.

Requested by Marek during upstream review.

commit ea9bc8075a5c730ac2f35cf43048f723be9498ac

Author: Ian Campbell <[email protected]>
Date:   Mon Apr 28 20:18:53 2014 +0100

sunxi: timer: conform to coding style.

Raised by Marek during upstreaming.

commit 06ad4bb62b69e8867087a9ecdffe2cc97817d453

Author: Chen-Yu Tsai <[email protected]>
Date:   Fri Apr 25 00:39:06 2014 +0800

ARM: sunxi: Add A23 based tablet Ippo-q8h

The Ippo-q8h is the first A23 based device spotted in the wild. This was used to bring basic support to u-boot. Add build options for it

commit b8bf16c38f1cb4adfcb104ed6cef0ccdbab025c6

Author: Chen-Yu Tsai <[email protected]>
Date:   Fri Apr 25 00:39:05 2014 +0800

ARM: sunxi: Add support for using R_UART as console

The R_UART is the only uart other than UART0 on port F which has usable pads for attaching a console. Support it so we can still have a console when using MMC on port F.

commit 34027df43a51711f2e508f0efa37ea57d45b2334

Author: Chen-Yu Tsai <[email protected]>
Date:   Fri Apr 25 00:39:04 2014 +0800

ARM: sunxi: Add basic A23 support

The basic blocks of the A23 are similar to the A31 (sun6i). Re-use sun6i code for initial clock, gpio, and uart setup.

commit 5aea7698de5a33b65782a3d3210eb0dbfc56728a

Author: Chen-Yu Tsai <[email protected]>
Date:   Fri Apr 25 00:39:03 2014 +0800

ARM: sunxi: Allow specifying module in prcm apb0 init function

The prcm apb0 controls multiple modules. Allow specifying which modules to enable clocks and de-assert resets so the function can be reused.

commit 61de1e6d9fe5ee233d2a0d30bbc98453b1a9a1df

Author: Chen-Yu Tsai <[email protected]>
Date:   Fri Apr 25 00:39:02 2014 +0800

ARM: sunxi: Correct comment for MBUS1 register in sun6i clock definitions

commit 37f669b9dbbd3869a880173a294aadd6ca8c68ea

Author: Chen-Yu Tsai <[email protected]>
Date:   Fri Apr 25 00:39:01 2014 +0800

ARM: sunxi: Fix macro names for mmc and uart reset offsets

Also rewrite sunxi_mmc clock gate/reset enabling code using setbits_le32.

commit 501ab1e401c314773f659a3a4b4aae27b162608e

Author: Hans de Goede <[email protected]>
Date:   Sat Apr 26 19:50:59 2014 +0200

ARM: sunxi: Fix sun6i PLL6 settings

On sun6i the N factor is 1-32, not the 0-31 it is with sun4i / sun5i / sun7i.

commit e304b6496e8abce2320774b9bdf7b458201042e5

Author: Siarhei Siamashka <[email protected]>
Date:   Mon Apr 21 05:32:31 2014 +0300

sunxi: dram: Fix dram_tpr3 handling for sun4i

This ifdef wrapped code apparently was introduced as a unification of sun4i/sun5i and sun7i codebases and assumed that the non-sun7i part of it was correct. However experiments show that this 4-bit bitfield behaves in the same way at least on sun4i and sun7i.

Also see the definition in 'include/synopsys/dwcddr21mctl.h':
#define DWCDDR21MCTL_DLLCR_PHASE(x) (((x) & 0xf) << 14)

commit 5ba2257d4fd768c37bcb6d38636d2ed186a58062

Author: Siarhei Siamashka <[email protected]>
Date:   Mon Apr 21 05:32:30 2014 +0300

sunxi: dram: Support more DRAM clock speeds (396, 468, 496, 512, 540)

These are some additional interesting DRAM clock frequencies. And they can be supported, while keeping the PLL5P clock speed at least not higher than the DRAM clock speed. PLL5P output is used to clock a lot of peripherals, so we need to be careful not to break them (or more like some buggy code in the sunxi-3.4 kernel, which just sets hardcoded divisors in some places).

Having 396MHz is nice. It can be used with the tight DDR3-800 timings (CL-tRCD-tRP-tRAS). For comparison, moving to 408MHz requires extra cycles for many of these timing parameters, which results in a latency increase.

Having 512MHz and 540MHz is also useful, because they provide better granularity of the DRAM clock frequency selection around DDR3-1066 speed. And this is an interesting DRAM overclocking target.

The extra five branches add ~120 bytes of code if compiled for ARM and ~90 bytes of code if compiled for Thumb2.