ARM: dts: OMAP5: add pmu node
PATCH v2 1/1 ARM: dts: OMAP5: add pmu node
Expose the PMU on OMAP5.
Tested with perf on OMAP5 uEVM.
Signed-off-by Nathan Lynch <[email protected]>
---
Changes since v1:
- Use symbolic constants.
arch/arm/boot/dts/omap5.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
arch/arm/boot/dts/omap5.dtsi +6 -0
@@ -76,6 +76,12 @@ <GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>; }; + pmu { + compatible = "arm,cortex-a15-pmu"; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; + }; + gic: interrupt-controller at 48211000 { compatible = "arm,cortex-a15-gic"; interrupt-controller;
Signature · 1 line
1.8.3.1
PATCH v2 1/1 ARM: dts: OMAP5: add pmu node
Quoted 5 lines · Nathan Lynch
Expose the PMU on OMAP5.
Tested with perf on OMAP5 uEVM.
Signed-off-by Nathan Lynch <[email protected]>
Applying into omap-for-v3.16/dt thanks.
Tony
Quoted 33 lines
---
Changes since v1:
- Use symbolic constants.arch/arm/boot/dts/omap5.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)arch/arm/boot/dts/omap5.dtsi +6
-0@@ -76,6 +76,12 @@ <GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>; }; + pmu { + compatible = "arm,cortex-a15-pmu"; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; + }; + gic: interrupt-controller at 48211000 { compatible = "arm,cortex-a15-gic"; interrupt-controller;Signature · 6 lines
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