Renesas ARM Based SoC DT Updates for v3.16

---
 arch/arm/boot/dts/r8a7791.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

arch/arm/boot/dts/r8a7791.dtsi +2 -2

index 4618170..23ae96e 100644
@@ -37,14 +37,14 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <0>;
-			clock-frequency = <1300000000>;
+			clock-frequency = <1500000000>;
 		};
 
 		cpu1: cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <1>;
-			clock-frequency = <1300000000>;
+			clock-frequency = <1500000000>;
 		};
 	};

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #2 lore raw

PATCH 2/33 ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add spi0 alias

From: Geert Uytterhoeven <[email protected]>

Prepare for the advent of MSIOF SPI, which will be spi1 to spi4.

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7790-lager.dts | 4 ++--
 arch/arm/boot/dts/r8a7790.dtsi      | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

arch/arm/boot/dts/r8a7790-lager.dts +2 -2

index 6e99eb2..86dbdc1 100644
@@ -155,7 +155,7 @@
 		renesas,function = "mmc1";
 	};
 
-	qspi_pins: spi {
+	qspi_pins: spi0 {
 		renesas,groups = "qspi_ctrl", "qspi_data4";
 		renesas,function = "qspi";
 	};

@@ -190,7 +190,7 @@
 	status = "okay";
 };
 
-&spi {
+&qspi {
 	pinctrl-0 = <&qspi_pins>;
 	pinctrl-names = "default";

arch/arm/boot/dts/r8a7790.dtsi +2 -1

index 618e5b5..9383b84 100644
@@ -24,6 +24,7 @@
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
+		spi0 = &qspi;
 	};
 
 	cpus {

@@ -765,7 +766,7 @@
 		};
 	};
 
-	spi: spi at e6b10000 {
+	qspi: spi at e6b10000 {
 		compatible = "renesas,qspi-r8a7790", "renesas,qspi";
 		reg = <0 0xe6b10000 0 0x2c>;
 		interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #3 lore raw

PATCH 3/33 ARM: shmobile: r8a7791/koelsch dts: Rename label spi to qspi, add spi0 alias

From: Geert Uytterhoeven <[email protected]>

Prepare for the advent of MSIOF SPI, which will be spi1 to spi3.

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++--
 arch/arm/boot/dts/r8a7791.dtsi        | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

arch/arm/boot/dts/r8a7791-koelsch.dts +2 -2

index bdd73e6..bf9555b 100644
@@ -244,7 +244,7 @@
 		renesas,function = "sdhi2";
 	};
 
-	qspi_pins: spi {
+	qspi_pins: spi0 {
 		renesas,groups = "qspi_ctrl", "qspi_data4";
 		renesas,function = "qspi";
 	};

@@ -301,7 +301,7 @@
 	status = "okay";
 };
 
-&spi {
+&qspi {
 	pinctrl-0 = <&qspi_pins>;
 	pinctrl-names = "default";

arch/arm/boot/dts/r8a7791.dtsi +2 -1

index 23ae96e..6cda188 100644
@@ -27,6 +27,7 @@
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
+		spi0 = &qspi;
 	};
 
 	cpus {

@@ -789,7 +790,7 @@
 		};
 	};
 
-	spi: spi at e6b10000 {
+	qspi: spi at e6b10000 {
 		compatible = "renesas,qspi-r8a7791", "renesas,qspi";
 		reg = <0 0xe6b10000 0 0x2c>;
 		interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #4 lore raw

PATCH 4/33 ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases

From: Geert Uytterhoeven <[email protected]>

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7790.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

arch/arm/boot/dts/r8a7790.dtsi +44 -0

index 9383b84..da69afc 100644
@@ -25,6 +25,10 @@
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
 		spi0 = &qspi;
+		spi1 = &msiof0;
+		spi2 = &msiof1;
+		spi3 = &msiof2;
+		spi4 = &msiof3;
 	};
 
 	cpus {

@@ -776,4 +780,44 @@
 		#size-cells = <0>;
 		status = "disabled";
 	};
+
+	msiof0: spi at e6e20000 {
+		compatible = "renesas,msiof-r8a7790";
+		reg = <0 0xe6e20000 0 0x0064>;
+		interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	msiof1: spi at e6e10000 {
+		compatible = "renesas,msiof-r8a7790";
+		reg = <0 0xe6e10000 0 0x0064>;
+		interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	msiof2: spi at e6e00000 {
+		compatible = "renesas,msiof-r8a7790";
+		reg = <0 0xe6e00000 0 0x0064>;
+		interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	msiof3: spi at e6c90000 {
+		compatible = "renesas,msiof-r8a7790";
+		reg = <0 0xe6c90000 0 0x0064>;
+		interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
 };

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #5 lore raw

PATCH 5/33 ARM: shmobile: r8a7791 dtsi: Add MSIOF nodes and aliases

From: Geert Uytterhoeven <[email protected]>

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7791.dtsi | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

arch/arm/boot/dts/r8a7791.dtsi +33 -0

index 6cda188..a70fb80 100644
@@ -28,6 +28,9 @@
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
 		spi0 = &qspi;
+		spi1 = &msiof0;
+		spi2 = &msiof1;
+		spi3 = &msiof2;
 	};
 
 	cpus {

@@ -800,4 +803,34 @@
 		#size-cells = <0>;
 		status = "disabled";
 	};
+
+	msiof0: spi at e6e20000 {
+		compatible = "renesas,msiof-r8a7791";
+		reg = <0 0xe6e20000 0 0x0064>;
+		interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	msiof1: spi at e6e10000 {
+		compatible = "renesas,msiof-r8a7791";
+		reg = <0 0xe6e10000 0 0x0064>;
+		interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	msiof2: spi at e6e00000 {
+		compatible = "renesas,msiof-r8a7791";
+		reg = <0 0xe6e00000 0 0x0064>;
+		interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
 };

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #6 lore raw

PATCH 6/33 ARM: shmobile: lager dts: Add MSIOF nodes

From: Geert Uytterhoeven <[email protected]>

Add pinctrl and SPI device for MSIOF on Lager.
On this board, only MSIOF1 is in use. Its bus contains a single device (a Renesas R2A11302FT PMIC), for which no bindings are defined yet.

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7790-lager.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

arch/arm/boot/dts/r8a7790-lager.dts +22 -0

index 86dbdc1..cdec1af 100644
@@ -159,6 +159,12 @@
 		renesas,groups = "qspi_ctrl", "qspi_data4";
 		renesas,function = "qspi";
 	};
+
+	msiof1_pins: spi2 {
+		renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
+				 "msiof1_tx";
+		renesas,function = "msiof1";
+	};
 };
 
 &ether {

@@ -221,6 +227,22 @@
 	};
 };
 
+&msiof1 {
+	pinctrl-0 = <&msiof1_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+
+	pmic: pmic at 0 {
+		compatible = "renesas,r2a11302ft";
+		reg = <0>;
+		spi-max-frequency = <6000000>;
+		spi-cpol;
+		spi-cpha;
+	};
+
+};
+
 &sdhi0 {
 	pinctrl-0 = <&sdhi0_pins>;
 	pinctrl-names = "default";

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #7 lore raw

PATCH 7/33 ARM: shmobile: koelsch dts: Add MSIOF nodes

From: Geert Uytterhoeven <[email protected]>

Add pinctrl and SPI device for MSIOF on Koelsch.
On this board, only MSIOF0 is in use. Its bus contains a single device (a Renesas R2A11302FT PMIC), for which no bindings are defined yet.

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

arch/arm/boot/dts/r8a7791-koelsch.dts +21 -0

index bf9555b..e24fed9 100644
@@ -248,6 +248,12 @@
 		renesas,groups = "qspi_ctrl", "qspi_data4";
 		renesas,function = "qspi";
 	};
+
+	msiof0_pins: spi1 {
+		renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
+				 "msiof0_tx";
+		renesas,function = "msiof0";
+	};
 };
 
 &ether {

@@ -331,3 +337,18 @@
 		};
 	};
 };
+
+&msiof0 {
+	pinctrl-0 = <&msiof0_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+
+	pmic: pmic at 0 {
+		compatible = "renesas,r2a11302ft";
+		reg = <0>;
+		spi-max-frequency = <6000000>;
+		spi-cpol;
+		spi-cpha;
+	};
+};

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #8 lore raw

PATCH 8/33 ARM: shmobile: r8a7778 dtsi: Improve and correct HSPI nodes

From: Geert Uytterhoeven <[email protected]>

- Add "renesas,hspi-r8a7778" compatible value,
- Correct reference to parent interrupt controller
(use "interrupt-parent" instead of "interrupt-controller"),
- Add missing "#address-cells" and "#size-cells" properties, which are needed when populating the SPI buses.

Signed-off-by Geert Uytterhoeven <[email protected]>

Tested-by Kuninori Morimoto <[email protected]>

---
 arch/arm/boot/dts/r8a7778.dtsi | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

arch/arm/boot/dts/r8a7778.dtsi +12 -6

index 85c5b3b..3c6fab5 100644
@@ -204,26 +204,32 @@
 	};
 
 	hspi0: spi at fffc7000 {
-		compatible = "renesas,hspi";
+		compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 		reg = <0xfffc7000 0x18>;
-		interrupt-controller = <&gic>;
+		interrupt-parent = <&gic>;
 		interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
 		status = "disabled";
 	};
 
 	hspi1: spi at fffc8000 {
-		compatible = "renesas,hspi";
+		compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 		reg = <0xfffc8000 0x18>;
-		interrupt-controller = <&gic>;
+		interrupt-parent = <&gic>;
 		interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
 		status = "disabled";
 	};
 
 	hspi2: spi at fffc6000 {
-		compatible = "renesas,hspi";
+		compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 		reg = <0xfffc6000 0x18>;
-		interrupt-controller = <&gic>;
+		interrupt-parent = <&gic>;
 		interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
 		status = "disabled";
 	};
 };

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #9 lore raw

PATCH 9/33 ARM: shmobile: r8a7779 dtsi: Improve and correct HSPI nodes

From: Geert Uytterhoeven <[email protected]>

- Add "renesas,hspi-r8a7779" compatible value,
- Correct reference to parent interrupt controller
(use "interrupt-parent" instead of "interrupt-controller"),
- Add missing "#address-cells" and "#size-cells" properties, which are needed when populating the SPI buses.

Signed-off-by Geert Uytterhoeven <[email protected]>

Tested-by Kuninori Morimoto <[email protected]>

---
 arch/arm/boot/dts/r8a7779.dtsi | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

arch/arm/boot/dts/r8a7779.dtsi +12 -6

index d0561d4..8b1a336 100644
@@ -256,26 +256,32 @@
 	};
 
 	hspi0: spi at fffc7000 {
-		compatible = "renesas,hspi";
+		compatible = "renesas,hspi-r8a7779", "renesas,hspi";
 		reg = <0xfffc7000 0x18>;
-		interrupt-controller = <&gic>;
+		interrupt-parent = <&gic>;
 		interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
 		status = "disabled";
 	};
 
 	hspi1: spi at fffc8000 {
-		compatible = "renesas,hspi";
+		compatible = "renesas,hspi-r8a7779", "renesas,hspi";
 		reg = <0xfffc8000 0x18>;
-		interrupt-controller = <&gic>;
+		interrupt-parent = <&gic>;
 		interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
 		status = "disabled";
 	};
 
 	hspi2: spi at fffc6000 {
-		compatible = "renesas,hspi";
+		compatible = "renesas,hspi-r8a7779", "renesas,hspi";
 		reg = <0xfffc6000 0x18>;
-		interrupt-controller = <&gic>;
+		interrupt-parent = <&gic>;
 		interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
 		status = "disabled";
 	};
 };

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #10 lore raw

PATCH 10/33 ARM: shmobile: bockw reference dts: Add SPI FLASH

From: Geert Uytterhoeven <[email protected]>

Add Spansion s25fl008k SPI FLASH and MTD partition, based on bockw legacy board code.

Signed-off-by Geert Uytterhoeven <[email protected]>

Tested-by Kuninori Morimoto <[email protected]>

---
 arch/arm/boot/dts/r8a7778-bockw-reference.dts | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

arch/arm/boot/dts/r8a7778-bockw-reference.dts +14 -0

index 06cda19..f76f6ec 100644
@@ -109,4 +109,18 @@
 	pinctrl-0 = <&hspi0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
+
+	flash: flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,s25fl008k";
+		reg = <0>;
+		spi-max-frequency = <104000000>;
+		m25p,fast-read;
+
+		partition at 0 {
+			label = "data(spi)";
+			reg = <0x00000000 0x00100000>;
+		};
+	};
 };

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #11 lore raw

PATCH 11/33 ARM: shmobile: Add DTS gpio-keys support for SW2 on Lager

From: Magnus Damm <[email protected]>

Add DTS gpio-keys support for SW2 on the Lager board. This makes the DT code match the legacy board code.

Signed-off-by Magnus Damm <[email protected]>

---
 arch/arm/boot/dts/r8a7790-lager.dts | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

arch/arm/boot/dts/r8a7790-lager.dts +34 -0

index cdec1af..c3d8b17 100644
@@ -12,6 +12,7 @@
 /dts-v1/;
 #include "r8a7790.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Lager";

@@ -36,6 +37,39 @@
 		#size-cells = <1>;
 	};
 
+	gpio_keys {
+		compatible = "gpio-keys";
+
+		button at 1 {
+			linux,code = <KEY_1>;
+			label = "SW2-1";
+			gpio-key,wakeup;
+			debounce-interval = <20>;
+			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+		};
+		button at 2 {
+			linux,code = <KEY_2>;
+			label = "SW2-2";
+			gpio-key,wakeup;
+			debounce-interval = <20>;
+			gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
+		};
+		button at 3 {
+			linux,code = <KEY_3>;
+			label = "SW2-3";
+			gpio-key,wakeup;
+			debounce-interval = <20>;
+			gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
+		};
+		button at 4 {
+			linux,code = <KEY_4>;
+			label = "SW2-4";
+			gpio-key,wakeup;
+			debounce-interval = <20>;
+			gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		led6 {

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #12 lore raw

PATCH 12/33 ARM: shmobile: Add DTS gpio-keys support for SW2 on Koelsch

From: Magnus Damm <[email protected]>

Add DTS gpio-keys support for SW2 on the Koelsch board. This makes the DT code match the legacy board code. Also update the existing gpio-keys nodes to make use of KEY_n.

Signed-off-by Magnus Damm <[email protected]>

Acked-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 43 +++++++++++++++++++++++++++++------
 1 file changed, 36 insertions(+), 7 deletions(-)

arch/arm/boot/dts/r8a7791-koelsch.dts +36 -7

index e24fed9..fd1d6ee 100644
@@ -13,6 +13,7 @@
 /dts-v1/;
 #include "r8a7791.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Koelsch";

@@ -40,51 +41,79 @@
 	gpio-keys {
 		compatible = "gpio-keys";
 
+		key-1 {
+			gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_1>;
+			label = "SW2-1";
+			gpio-key,wakeup;
+			debounce-interval = <20>;
+		};
+		key-2 {
+			gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_2>;
+			label = "SW2-2";
+			gpio-key,wakeup;
+			debounce-interval = <20>;
+		};
+		key-3 {
+			gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_3>;
+			label = "SW2-3";
+			gpio-key,wakeup;
+			debounce-interval = <20>;
+		};
+		key-4 {
+			gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_4>;
+			label = "SW2-4";
+			gpio-key,wakeup;
+			debounce-interval = <20>;
+		};
 		key-a {
 			gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
-			linux,code = <30>;
+			linux,code = <KEY_A>;
 			label = "SW30";
 			gpio-key,wakeup;
 			debounce-interval = <20>;
 		};
 		key-b {
 			gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
-			linux,code = <48>;
+			linux,code = <KEY_B>;
 			label = "SW31";
 			gpio-key,wakeup;
 			debounce-interval = <20>;
 		};
 		key-c {
 			gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
-			linux,code = <46>;
+			linux,code = <KEY_C>;
 			label = "SW32";
 			gpio-key,wakeup;
 			debounce-interval = <20>;
 		};
 		key-d {
 			gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
-			linux,code = <32>;
+			linux,code = <KEY_D>;
 			label = "SW33";
 			gpio-key,wakeup;
 			debounce-interval = <20>;
 		};
 		key-e {
 			gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
-			linux,code = <18>;
+			linux,code = <KEY_E>;
 			label = "SW34";
 			gpio-key,wakeup;
 			debounce-interval = <20>;
 		};
 		key-f {
 			gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
-			linux,code = <33>;
+			linux,code = <KEY_F>;
 			label = "SW35";
 			gpio-key,wakeup;
 			debounce-interval = <20>;
 		};
 		key-g {
 			gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
-			linux,code = <34>;
+			linux,code = <KEY_G>;
 			label = "SW36";
 			gpio-key,wakeup;
 			debounce-interval = <20>;

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #13 lore raw

PATCH 13/33 ARM: shmobile: lager: Set ethernet PHY LED mode

From: Laurent Pinchart <[email protected]>

The Lager board uses the ethernet PHY LED0 as a link signal connected to the ethernet controller. Specify the corresponding LED mode for the PHY.

---
 arch/arm/boot/dts/r8a7790-lager.dts | 1 +
 1 file changed, 1 insertion(+)

arch/arm/boot/dts/r8a7790-lager.dts +1 -0

index c3d8b17..a55c5f8 100644
@@ -213,6 +213,7 @@
 		reg = <1>;
 		interrupt-parent = <&irqc0>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		led-mode = <1>;
 	};
 };

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #14 lore raw

PATCH 14/33 ARM: shmobile: koelsch: Set ethernet PHY LED mode

From: Laurent Pinchart <[email protected]>

The Koelsch board uses the ethernet PHY LED0 as a link signal connected to the ethernet controller. Specify the corresponding LED mode for the PHY.

---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 1 +
 1 file changed, 1 insertion(+)

arch/arm/boot/dts/r8a7791-koelsch.dts +1 -0

index fd1d6ee..ee23b7b 100644
@@ -297,6 +297,7 @@
 		reg = <1>;
 		interrupt-parent = <&irqc0>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		micrel,led-mode = <1>;
 	};
 };

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #15 lore raw

PATCH 15/33 ARM: shmobile: armadillo-reference dts: Use KEY_* macros for gpio-keys

From: Geert Uytterhoeven <[email protected]>

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts +5 -4

index 95a849b..97342a4 100644
@@ -11,6 +11,7 @@
 /dts-v1/;
 #include "r8a7740.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pwm/pwm.h>

@@ -77,26 +78,26 @@
 
 		power-key {
 			gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
-			linux,code = <116>;
+			linux,code = <KEY_POWER>;
 			label = "SW3";
 			gpio-key,wakeup;
 		};
 
 		back-key {
 			gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
-			linux,code = <158>;
+			linux,code = <KEY_BACK>;
 			label = "SW4";
 		};
 
 		menu-key {
 			gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
-			linux,code = <139>;
+			linux,code = <KEY_MENU>;
 			label = "SW5";
 		};
 
 		home-key {
 			gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
-			linux,code = <102>;
+			linux,code = <KEY_HOME>;
 			label = "SW6";
 		};
 	};

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #16 lore raw

PATCH 16/33 ARM: shmobile: kzm9g-reference dts: Use KEY_* macros for gpio-keys

From: Geert Uytterhoeven <[email protected]>

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +8 -7

index eb8886b..a99171c 100644
@@ -14,6 +14,7 @@
 /dts-v1/;
 #include "sh73a0.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {

@@ -112,43 +113,43 @@
 
 		back-key {
 			gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>;
-			linux,code = <158>;
+			linux,code = <KEY_BACK>;
 			label = "SW3";
 		};
 
 		right-key {
 			gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>;
-			linux,code = <106>;
+			linux,code = <KEY_RIGHT>;
 			label = "SW2-R";
 		};
 
 		left-key {
 			gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>;
-			linux,code = <105>;
+			linux,code = <KEY_LEFT>;
 			label = "SW2-L";
 		};
 
 		enter-key {
 			gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>;
-			linux,code = <28>;
+			linux,code = <KEY_ENTER>;
 			label = "SW2-P";
 		};
 
 		up-key {
 			gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>;
-			linux,code = <103>;
+			linux,code = <KEY_UP>;
 			label = "SW2-U";
 		};
 
 		down-key {
 			gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>;
-			linux,code = <108>;
+			linux,code = <KEY_DOWN>;
 			label = "SW2-D";
 		};
 
 		home-key {
 			gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
-			linux,code = <102>;
+			linux,code = <KEY_HOME>;
 			label = "SW1";
 		};
 	};

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #17 lore raw

PATCH 17/33 ARM: shmobile: r8a7791: add IIC0/1 clock macros

From: Wolfram Sang <[email protected]>

---
 include/dt-bindings/clock/r8a7791-clock.h | 2 ++
 1 file changed, 2 insertions(+)

include/dt-bindings/clock/r8a7791-clock.h +2 -0

index 30f82f2..2df1a11f 100644
@@ -51,6 +51,8 @@
 #define R8A7791_CLK_SDHI1		12
 #define R8A7791_CLK_SDHI0		14
 #define R8A7791_CLK_MMCIF0		15
+#define R8A7791_CLK_IIC0		18
+#define R8A7791_CLK_IIC1		23
 #define R8A7791_CLK_SSUSB		28
 #define R8A7791_CLK_CMT1		29
 #define R8A7791_CLK_USBDMAC0		30

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #18 lore raw

PATCH 18/33 ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r8a7791.dtsi | 25 +++++++++++++------------
 1 file changed, 13 insertions(+), 12 deletions(-)

arch/arm/boot/dts/r8a7791.dtsi +13 ~~-12~~

index a70fb80..dd45e01 100644
@@ -716,15 +716,16 @@
 		mstp3_clks: mstp3_clks at e615013c {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-			clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>,
-				<&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>;
+			clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
+				 <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1
-				R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1
+				R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
+				R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_IIC1 R8A7791_CLK_CMT1
 			>;
 			clock-output-names =
-				"tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1";
+				"tpu0", "sdhi2", "sdhi1", "sdhi0",
+				"mmcif0", "i2c7", "i2c8", "cmt1";
 		};
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";

@@ -768,17 +769,17 @@
 		mstp9_clks: mstp9_clks at e6150994 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>,
-				 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
-				 <&p_clk>;
+			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&p_clk>,
+				 <&cp_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+				 <&p_clk>, <&p_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD
-				R8A7791_CLK_I2C5 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3
-				R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
+				R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
+				R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
+				R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
 			>;
 			clock-output-names =
-				"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
+				"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3",
 				"i2c2", "i2c1", "i2c0";
 		};
 		mstp11_clks: mstp11_clks at e615099c {

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #19 lore raw

PATCH 19/33 ARM: shmobile: r8a7791: add IIC(B) cores to dtsi

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r8a7791.dtsi | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

arch/arm/boot/dts/r8a7791.dtsi +36 -0

index dd45e01..1004355 100644
@@ -27,6 +27,9 @@
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+		i2c7 = &i2c7;
+		i2c8 = &i2c8;
 		spi0 = &qspi;
 		spi1 = &msiof0;
 		spi2 = &msiof1;

@@ -184,6 +187,7 @@
 			     <0 17 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	/* The memory map in the User's Manual maps the cores to bus numbers */
 	i2c0: i2c at e6508000 {
 		#address-cells = <1>;
 		#size-cells = <0>;

@@ -235,6 +239,7 @@
 	};
 
 	i2c5: i2c at e6528000 {
+		/* doesn't need pinmux */
 		#address-cells = <1>;
 		#size-cells = <0>;
 		compatible = "renesas,i2c-r8a7791";

@@ -244,6 +249,37 @@
 		status = "disabled";
 	};
 
+	i2c6: i2c at e60b0000 {
+		/* doesn't need pinmux */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+		reg = <0 0xe60b0000 0 0x425>;
+		interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
+		status = "disabled";
+	};
+
+	i2c7: i2c at e6500000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+		reg = <0 0xe6500000 0 0x425>;
+		interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
+		status = "disabled";
+	};
+
+	i2c8: i2c at e6510000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+		reg = <0 0xe6510000 0 0x425>;
+		interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
+		status = "disabled";
+	};
+
 	pfc: pfc at e6060000 {
 		compatible = "renesas,pfc-r8a7791";
 		reg = <0 0xe6060000 0 0x250>;

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #20 lore raw

PATCH 20/33 ARM: shmobile: koelsch: make i2c2-pfc node unique

From: Wolfram Sang <[email protected]>

This node should have a unique name so it can be distinguished when other i2c busses are added later.

---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/r8a7791-koelsch.dts +1 -1

index ee23b7b..fc6c94a 100644
@@ -228,7 +228,7 @@
 	pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
 	pinctrl-names = "default";
 
-	i2c2_pins: i2c {
+	i2c2_pins: i2c2 {
 		renesas,groups = "i2c2";
 		renesas,function = "i2c2";
 	};

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #21 lore raw

PATCH 21/33 ARM: shmobile: koelsch: activate i2c6 bus

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 5 +++++
 1 file changed, 5 insertions(+)

arch/arm/boot/dts/r8a7791-koelsch.dts +5 -0

index fc6c94a..2a0569d 100644
@@ -224,6 +224,11 @@
 	};
 };
 
+&i2c6 {
+	status = "okay";
+	clock-frequency = <100000>;
+};
+
 &pfc {
 	pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
 	pinctrl-names = "default";

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #22 lore raw

PATCH 22/33 ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings

From: Ulrich Hecht <[email protected]>

Add "renesas,*-r8a7740" to the compatible strings for consistency with other devices.

Signed-off-by Ulrich Hecht <[email protected]>

Acked-by Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r8a7740.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

arch/arm/boot/dts/r8a7740.dtsi +4 -4

index 8280884..9f65986 100644
@@ -126,7 +126,7 @@
 	i2c0: i2c at fff20000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		compatible = "renesas,rmobile-iic";
+		compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
 		reg = <0xfff20000 0x425>;
 		interrupt-parent = <&gic>;
 		interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH

@@ -139,7 +139,7 @@
 	i2c1: i2c@e6c20000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		compatible = "renesas,rmobile-iic";
+		compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
 		reg = <0xe6c20000 0x425>;
 		interrupt-parent = <&gic>;
 		interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH

@@ -174,7 +174,7 @@
 	};
 
 	mmcif0: mmc@e6bd0000 {
-		compatible = "renesas,sh-mmcif";
+		compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
 		reg = <0xe6bd0000 0x100>;
 		interrupt-parent = <&gic>;
 		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH

@@ -220,7 +220,7 @@
 
 	sh_fsi2: sound@fe1f0000 {
 		#sound-dai-cells = <1>;
-		compatible = "renesas,sh_fsi2";
+		compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
 		reg = <0xfe1f0000 0x400>;
 		interrupt-parent = <&gic>;
 		interrupts = <0 9 0x4>;

Signature · 1 line

1.8.5.2

Geert Uytterhoeven

2014-04-23 07:09 UTC #23 lore raw

PATCH 22/33 ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings

arch/arm/boot/dts/r8a7740.dtsi line 127

Quoted 13 lines · Simon Horman

From: Ulrich Hecht <[email protected]>
Add "renesas,*-r8a7740" to the compatible strings for consistency with other devices.
arch/arm/boot/dts/r8a7740.dtsi +1 -1
index 8280884..9f65986 100644
@@ -126,7 +126,7 @@
 
-               compatible = "renesas,rmobile-iic";
+               compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";

I see an opportunity for improvement here: this driver doesn't seem to have any bindings documented under Documentation/devicetree/bindings/?

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Wolfram Sang

2014-04-23 07:18 UTC #24 lore raw

PATCH 22/33 ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings

Quoted 13 lines · Geert Uytterhoeven

Quoted 10 lines · Simon Horman
From: Ulrich Hecht <[email protected]>
Add "renesas,*-r8a7740" to the compatible strings for consistency with other devices.
arch/arm/boot/dts/r8a7740.dtsi +0 -0
index 8280884..9f65986 100644
@@ -126,7 +126,7 @@

Quoted 5 lines

arch/arm/boot/dts/r8a7740.dtsi line 126
Quoted 2 lines
arch/arm/boot/dts/r8a7740.dtsi +1 -1
-               compatible = "renesas,rmobile-iic";
+               compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
I see an opportunity for improvement here: this driver doesn't seem to have any bindings documented under Documentation/devicetree/bindings/?

I am brushing up this driver currently, so consider it done. Just waiting for a minor email issue to be solved before I can send out patches.

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140423/e74139b3/attachment.sig>

Geert Uytterhoeven

2014-04-23 07:26 UTC #25 lore raw

PATCH 22/33 ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings

Hi Wolfram,

Quoted 7 lines · Wolfram Sang

Quoted 5 lines
Review
Quoted 2 lines
(quoted diff) +1 -1
-               compatible = "renesas,rmobile-iic";
+               compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
I see an opportunity for improvement here: this driver doesn't seem to have any bindings documented under Documentation/devicetree/bindings/?
I am brushing up this driver currently, so consider it done. Just

That's great to hear, thanks!

Quoted 2 lines

waiting for a minor email issue to be solved before I can send out patches.

Good luck!

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Rob Herring

2014-04-23 13:12 UTC #26 lore raw

PATCH 22/33 ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings

Quoted 4 lines · Simon Horman

From: Ulrich Hecht <[email protected]>
Add "renesas,*-r8a7740" to the compatible strings for consistency with other devices.

Generally, it is <vendor>,<chip>-<device> as the preferred ordering which is also consistent with your more generic name.

Rob

Simon Horman

2014-04-24 01:00 UTC #27 lore raw

PATCH 22/33 ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings

Quoted 9 lines · Rob Herring

Quoted 4 lines · Simon Horman
From: Ulrich Hecht <[email protected]>
Add "renesas,*-r8a7740" to the compatible strings for consistency with other devices.
Generally, it is <vendor>,<chip>-<device> as the preferred ordering which is also consistent with your more generic name.

I believe that the naming used by this patch is consistent with the naming used by other shmobile-related bindings.

In particular, the scheme that has been adopted for hardware where we do not have documented version (numbers) is:

Where the SoC name as a version.

My understanding is that Olof is comfortable with this as per our discussion of this topic last August: "[GIT 00/19 v2] Renesas ARM based SoC pinmux"

Simon Horman

author

2014-04-23 01:25 UTC #28 lore raw

PATCH 23/33 ARM: shmobile: r8a7791: Add EHCI MSTP clock

From: Magnus Damm <[email protected]>

Add support for EHCI clock gating via the MSTP703 bit on r8a7791.

Signed-off-by Magnus Damm <[email protected]>

---
 arch/arm/boot/dts/r8a7791.dtsi            | 6 +++---
 include/dt-bindings/clock/r8a7791-clock.h | 1 +
 2 files changed, 4 insertions(+), 3 deletions(-)

arch/arm/boot/dts/r8a7791.dtsi +3 -3

index 1004355..3b28c8f 100644
@@ -774,19 +774,19 @@
 		mstp7_clks: mstp7_clks at e615014c {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
-			clocks = <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
+			clocks = <&mp_clk>,  <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
 				 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
 				 <&zx_clk>, <&zx_clk>, <&zx_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
+				R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
 				R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
 				R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
 				R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
 				R8A7791_CLK_LVDS0
 			>;
 			clock-output-names =
-				"hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
+				"ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
 				"scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
 		};
 		mstp8_clks: mstp8_clks at e6150990 {

include/dt-bindings/clock/r8a7791-clock.h +1 -0

index 2df1a11f..6023543 100644
@@ -63,6 +63,7 @@
 #define R8A7791_CLK_PWM			23
 
 /* MSTP7 */
+#define R8A7791_CLK_EHCI		3
 #define R8A7791_CLK_HSUSB		4
 #define R8A7791_CLK_HSCIF2		13
 #define R8A7791_CLK_SCIF5		14

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #29 lore raw

PATCH 24/33 ARM: shmobile: armadillo-reference dts: enable RTC

From: Ulrich Hecht <[email protected]>

This enables the Seiko real-time clock that is attached to a couple of GPIO pins.

Signed-off-by Ulrich Hecht <[email protected]>

---
 .../arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts +18 -0

index 97342a4..0cb235a 100644
@@ -118,6 +118,16 @@
 		};
 	};
 
+	i2c2: i2c at 2 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "i2c-gpio";
+		gpios = <&pfc 208 GPIO_ACTIVE_HIGH /* sda */
+			 &pfc 91 GPIO_ACTIVE_HIGH /* scl */
+			>;
+		i2c-gpio,delay-us = <5>;
+	};
+
 	backlight {
 		compatible = "pwm-backlight";
 		pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>;

@@ -167,6 +177,14 @@
 	};
 };
 
+&i2c2 {
+	status = "okay";
+	rtc at 30 {
+		compatible = "seiko,s35390a";
+		reg = <0x30>;
+	};
+};
+
 &pfc {
 	pinctrl-0 = <&scifa1_pins>;
 	pinctrl-names = "default";

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #30 lore raw

PATCH 25/33 ARM: shmobile: lager: Correct setting of ethernet PHY LED mode

The correct binding is "micrel,led-mode", not "led-mode".

This corrects an error which was introduced when setting of ethernet PHY LED mode was added by 82e62182d59bd1d0 ("ARM: shmobile: lager: Set ethernet PHY LED mode").

This makes the lager code consistent with the koelsch code which was added by ae00d12a032490b3 ("ARM: shmobile: koelsch: Set ethernet PHY LED mode").

---
 arch/arm/boot/dts/r8a7790-lager.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/r8a7790-lager.dts +1 -1

index a55c5f8..265cba1 100644
@@ -213,7 +213,7 @@
 		reg = <1>;
 		interrupt-parent = <&irqc0>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-		led-mode = <1>;
+		micrel,led-mode = <1>;
 	};
 };

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #31 lore raw

PATCH 26/33 ARM: shmobile: r8a7790: Fix the I2C clocks parents in DT

From: Laurent Pinchart <[email protected]>

All I2C clocks derive from the HP clock, not from the P clock. Fix them.

Acked-by Geert Uytterhoeven <[email protected]>

Reviewed-by Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r8a7790.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/r8a7790.dtsi +1 -1

index da69afc..c4b9ff7 100644
@@ -758,7 +758,7 @@
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
 			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
-				 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
+				 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
 				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #32 lore raw

PATCH 27/33 ARM: shmobile: r8a7791: Fix the I2C clocks parents in DT

From: Laurent Pinchart <[email protected]>

All I2C clocks derive from the HP clock, not from the P clock. Fix them.

Acked-by Geert Uytterhoeven <[email protected]>

Reviewed-by Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r8a7791.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

arch/arm/boot/dts/r8a7791.dtsi +3 -3

index 3b28c8f..98baff4 100644
@@ -805,9 +805,9 @@
 		mstp9_clks: mstp9_clks at e6150994 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&p_clk>,
-				 <&cp_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
-				 <&p_clk>, <&p_clk>;
+			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
+				 <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
+				 <&hp_clk>, <&hp_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
 				R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #33 lore raw

PATCH 28/33 ARM: shmobile: r8a7790: add IIC0-2 clock macros

From: Wolfram Sang <[email protected]>

---
 include/dt-bindings/clock/r8a7790-clock.h | 3 +++
 1 file changed, 3 insertions(+)

include/dt-bindings/clock/r8a7790-clock.h +3 -0

index 6548a5f..4d3e935 100644
@@ -50,6 +50,7 @@
 #define R8A7790_CLK_SYS_DMAC0		19
 
 /* MSTP3 */
+#define R8A7790_CLK_IIC2		0
 #define R8A7790_CLK_TPU0		4
 #define R8A7790_CLK_MMCIF1		5
 #define R8A7790_CLK_SDHI3		11

@@ -57,6 +58,8 @@
 #define R8A7790_CLK_SDHI1		13
 #define R8A7790_CLK_SDHI0		14
 #define R8A7790_CLK_MMCIF0		15
+#define R8A7790_CLK_IIC0		18
+#define R8A7790_CLK_IIC1		23
 #define R8A7790_CLK_SSUSB		28
 #define R8A7790_CLK_CMT1		29
 #define R8A7790_CLK_USBDMAC0		30

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #34 lore raw

PATCH 29/33 ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi

From: Wolfram Sang <[email protected]>

[horms+renesas at verge.net.au resolved conflicts]

[horms+renesas at verge.net.au consistently use space as separator]

---
 arch/arm/boot/dts/r8a7790.dtsi | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

arch/arm/boot/dts/r8a7790.dtsi +14 ~~-13~~

index c4b9ff7..79855e3 100644
@@ -702,18 +702,19 @@
 		mstp3_clks: mstp3_clks at e615013c {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-			clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
-				 <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
-				 <&mmc0_clk>, <&rclk_clk>;
+			clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
+				 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
+				 <&hp_clk>, <&hp_clk>, <&rclk_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
-				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
-				R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
+				R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
+				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
+				R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
 			>;
 			clock-output-names =
-				"tpu0", "mmcif1", "sdhi3", "sdhi2",
-				"sdhi1", "sdhi0", "mmcif0", "cmt1";
+				"iic2", "tpu0", "mmcif1", "sdhi3",
+				"sdhi2", "sdhi1", "sdhi0", "mmcif0",
+				"iic0", "iic1", "cmt1";
 		};
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";

@@ -757,16 +758,16 @@
 		mstp9_clks: mstp9_clks at e6150994 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
+			clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
 				 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
-				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
-				R8A7790_CLK_I2C0
+				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
+				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
 			>;
 			clock-output-names =
-				"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
+				"rcan1", "rcan0", "qspi_mod", "iic3",
+				"i2c3", "i2c2", "i2c1", "i2c0";
 		};
 	};

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #35 lore raw

PATCH 30/33 ARM: shmobile: r8a7790: add IIC(B) cores to dtsi

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r8a7790.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

arch/arm/boot/dts/r8a7790.dtsi +44 -0

index 79855e3..bf2db38 100644
@@ -24,6 +24,10 @@
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
+		i2c4 = &iic0;
+		i2c5 = &iic1;
+		i2c6 = &iic2;
+		i2c7 = &iic3;
 		spi0 = &qspi;
 		spi1 = &msiof0;
 		spi2 = &msiof1;

@@ -236,6 +240,46 @@
 		status = "disabled";
 	};
 
+	iic0: i2c at e6500000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+		reg = <0 0xe6500000 0 0x425>;
+		interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
+		status = "disabled";
+	};
+
+	iic1: i2c at e6510000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+		reg = <0 0xe6510000 0 0x425>;
+		interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
+		status = "disabled";
+	};
+
+	iic2: i2c at e6520000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+		reg = <0 0xe6520000 0 0x425>;
+		interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
+		status = "disabled";
+	};
+
+	iic3: i2c at e60b0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+		reg = <0 0xe60b0000 0 0x425>;
+		interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
+		status = "disabled";
+	};
+
 	mmcif0: mmcif at ee200000 {
 		compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
 		reg = <0 0xee200000 0 0x80>;

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:25 UTC #36 lore raw

PATCH 31/33 ARM: shmobile: koelsch dts: Enable Quad SPI transfers for the SPI FLASH

From: Geert Uytterhoeven <[email protected]>

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 2 ++
 1 file changed, 2 insertions(+)

arch/arm/boot/dts/r8a7791-koelsch.dts +2 -0

index 2a0569d..22edf3e 100644
@@ -354,6 +354,8 @@
 		compatible = "spansion,s25fl512s";
 		reg = <0>;
 		spi-max-frequency = <30000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
 		m25p,fast-read;
 
 		partition at 0 {

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:26 UTC #37 lore raw

PATCH 32/33 ARM: shmobile: lager dts: Enable Quad SPI transfers for the SPI FLASH

From: Geert Uytterhoeven <[email protected]>

Signed-off-by Geert Uytterhoeven <[email protected]>

---
 arch/arm/boot/dts/r8a7790-lager.dts | 2 ++
 1 file changed, 2 insertions(+)

arch/arm/boot/dts/r8a7790-lager.dts +2 -0

index 265cba1..d350d7c 100644
@@ -243,6 +243,8 @@
 		compatible = "spansion,s25fl512s";
 		reg = <0>;
 		spi-max-frequency = <30000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
 		m25p,fast-read;
 
 		partition at 0 {

Signature · 1 line

1.8.5.2

Simon Horman

author

2014-04-23 01:26 UTC #38 lore raw

PATCH 33/33 ARM: shmobile: armadillo-reference dts: Seiko Instruments, Inc is "sii"

From: Geert Uytterhoeven <[email protected]>

Use "sii,s35390a" instead of "seiko,s35390a", cfr. Documentation/devicetree/bindings/i2c/trivial-devices.txt and Documentation/devicetree/bindings/vendor-prefixes.txt.

Signed-off-by Geert Uytterhoeven <[email protected]>

Acked-by Ulrich Hecht <[email protected]>

---
 arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts +1 -1

index 0cb235a..10344e6 100644
@@ -180,7 +180,7 @@
 &i2c2 {
 	status = "okay";
 	rtc at 30 {
-		compatible = "seiko,s35390a";
+		compatible = "sii,s35390a";
 		reg = <0x30>;
 	};
 };

Signature · 1 line

1.8.5.2

Olof Johansson

Applied

2014-05-05 21:34 UTC #39 lore raw