ARM: dts: imx51-eukrea-mbimxsd51-baseboard: Add CAN support
PATCH v3 1/2 ARM: dts: imx51-eukrea-mbimxsd51-baseboard: Add CAN support
Add support for CAN based on a MPC2515 connected to ECSPI1.
---
Changes since v2:
- None
Changes since v1:
- Use active low for spi chipselect
- Remove unused GPIOs for CAN
.../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+)
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +28 -0
@@ -86,6 +86,23 @@ status = "okay"; }; +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + can0: can at 0 { + compatible = "microchip,mcp2515"; + reg = <0>; + clocks = <&clks IMX5_CLK_OSC>; + spi-max-frequency = <1000000>; + interrupt-parent = <&gpio1>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + }; +}; + &i2c1 { tlv320aic23: codec at 1a { compatible = "ti,tlv320aic23";
@@ -104,6 +121,17 @@ >; }; + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 + MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 + MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 + MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */ + MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */ + MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */ + >; + }; + pinctrl_esdhc1: esdhc1grp { fsl,pins = < MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
Signature · 1 line
1.8.3.2
PATCH v3 2/2 ARM: dts: mx51: Remove mach-cpuimx51sd board file
From: Fabio Estevam <[email protected]>
eukrea_mbimxsd51-baseboard.c and mach-cpuimx51sd.c can be replaced with their devicetree equivalents: imx51-eukrea-mbimxsd51-baseboard.dts and imx51-eukrea-cpuimx51.dtsi respectively, so remove the board files.
This allows the conversion of mx51 to a devicetree-only platform.
---
Changes since v2:
- Fix typo in From field
Changes since v1:
- None
arch/arm/configs/imx_v6_v7_defconfig | 1 - arch/arm/mach-imx/Kconfig | 46 +--- arch/arm/mach-imx/Makefile | 4 - arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c | 231 ---------------- arch/arm/mach-imx/mach-cpuimx51sd.c | 364 ------------------------- 5 files changed, 6 insertions(+), 640 deletions(-) delete mode 100644 arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c delete mode 100644 arch/arm/mach-imx/mach-cpuimx51sd.c
arch/arm/configs/imx_v6_v7_defconfig +0 -1
@@ -32,7 +32,6 @@ CONFIG_MACH_PCM043=y CONFIG_MACH_MX35_3DS=y CONFIG_MACH_VPR200=y CONFIG_MACH_IMX51_DT=y -CONFIG_MACH_EUKREA_CPUIMX51SD=y CONFIG_SOC_IMX50=y CONFIG_SOC_IMX53=y CONFIG_SOC_IMX6Q=y
arch/arm/mach-imx/Kconfig +6 -40
58 lines not on this page · raw message
arch/arm/mach-imx/Makefile +0 -4
@@ -108,10 +108,6 @@ obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o endif obj-$(CONFIG_SOC_IMX6) += pm-imx6.o -# i.MX5 based machines -obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o -obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o - obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o obj-$(CONFIG_SOC_IMX50) += mach-imx50.o obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c deleted +0 -231
231 lines not on this page · raw message
arch/arm/mach-imx/mach-cpuimx51sd.c deleted +0 -364
364 lines not on this page · raw message
Signature · 1 line
1.8.3.2
Tue, 6 May 2014 09:56:37 -0300 ?? Fabio Estevam <[email protected]>:
Quoted 22 lines
Add support for CAN based on a MPC2515 connected to ECSPI1.
Signed-off-by Fabio Estevam <[email protected]>---
Changes since v2:
- None
Changes since v1:
- Use active low for spi chipselect
- Remove unused GPIOs for CAN.../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+)arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +1
-0@@ -86,6 +86,23 @@ status = "okay"; }; +&ecspi1 {
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts line 99
Quoted 10 lines
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +10
-0+ pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + can0: can at 0 { + compatible = "microchip,mcp2515"; + reg = <0>; + clocks = <&clks IMX5_CLK_OSC>;
I would recommend using a separate fixed clock for this, if not actually OSC frequency is used. Eric?
Quoted 12 lines
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +6
-0+ spi-max-frequency = <1000000>; + interrupt-parent = <&gpio1>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + }; +}; + &i2c1 { tlv320aic23: codec at 1a { compatible = "ti,tlv320aic23";@@ -104,6 +121,17 @@ >; };
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts line 132
Quoted 10 lines
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +9
-0+ pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 + MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 + MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 + MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */ + MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */ + MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */ + >;
eCSPI should be a separate group, ie without nReset and IRQ.
nReset is means nothing here. You should add a fixed regulator for this pin and use it as "vdd-supply" for CAN chip. (Active high).
---
PATCH v3 1/2 ARM: dts: imx51-eukrea-mbimxsd51-baseboard: Add CAN support
Hi,
Le Tue, 06 May 2014 17:54:26 +0400,
Alexander Shiyan <[email protected]> a ?crit :
Quoted 16 lines
Tue, 6 May 2014 09:56:37 -0300 ?? Fabio Estevam <[email protected]>:
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts line 99
Quoted 11 lines
+&ecspi1 {
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +10
-0+ pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + can0: can at 0 { + compatible = "microchip,mcp2515"; + reg = <0>; + clocks = <&clks IMX5_CLK_OSC>;I would recommend using a separate fixed clock for this, if not actually OSC frequency is used. Eric?
true, the MCP is using its own 24MHz crystal and not the i.MX51's one.
Eric