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ARM: dts: imx51-eukrea-mbimxsd51-baseboard: Add CAN support

PATCH In review Fabio Estevam 4 participants 5 messages May 6, 2014

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#0 lore raw

PATCH v4 1/2 ARM: dts: imx51-eukrea-mbimxsd51-baseboard: Add CAN support

Add support for CAN based on a MCP2515 connected to ECSPI1.

---
Changes since v3:
- Provide a fixed-clock for CAN
- Separate escpi from CAN control pin groups
- Use vdd-supply for mcp2515
- Fix typo on commit log

Changes since v2:
- None
Changes since v1:
- Use active low for spi chipselect
- Remove unused GPIOs for CAN

 .../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts  | 62 ++++++++++++++++++++++
 1 file changed, 62 insertions(+)
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +62 -0
index 8b1098e..c1f32f9 100644
@@ -24,6 +24,14 @@
 	model = "Eukrea CPUIMX51";
 	compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
 
+	clocks {
+		clk24M: can_clock {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24000000>;
+		};
+	};
+
 	gpio_keys {
 		compatible = "gpio-keys";
 		pinctrl-names = "default";
@@ -50,6 +58,23 @@
 		};
 	};
 
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reg_can: regulator at 0 {
+			compatible = "regulator-fixed";
+			reg = <0>;
+			regulator-name = "3V3";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+			startup-delay-us = <20000>;
+			enable-active-high;
+		};
+	};
+
 	sound {
 		compatible = "eukrea,asoc-tlv320";
 		eukrea,model = "imx51-eukrea-tlv320aic23";
@@ -86,6 +111,26 @@
 	status = "okay";
 };
 
+&ecspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1>;
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
+	status = "okay";
+
+	can0: can at 0 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_can>;
+		compatible = "microchip,mcp2515";
+		reg = <0>;
+		clocks = <&clk24M>;
+		spi-max-frequency = <1000000>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+		vdd-supply = <&reg_can>;
+	};
+};
+
 &i2c1 {
 	tlv320aic23: codec at 1a {
 		compatible = "ti,tlv320aic23";
@@ -104,6 +149,23 @@
 			>;
 		};
 
+
+		pinctrl_can: cangrp {
+			fsl,pins = <
+				MX51_PAD_CSI2_PIXCLK__GPIO4_15		0x80000000	/* nReset */
+				MX51_PAD_GPIO1_1__GPIO1_1		0x80000000	/* IRQ */
+			>;
+		};
+
+		pinctrl_ecspi1: ecspi1grp {
+			fsl,pins = <
+				MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185
+				MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185
+				MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185
+				MX51_PAD_CSPI1_SS0__GPIO4_24		0x80000000 	/* CS0 */
+			>;
+		};
+
 		pinctrl_esdhc1: esdhc1grp {
 			fsl,pins = <
 				MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5
Signature · 1 line
1.8.3.2
#1 lore raw

Tue, 6 May 2014 16:21:52 -0300 ?? Fabio Estevam <[email protected]>:

Quoted 69 lines

Add support for CAN based on a MCP2515 connected to ECSPI1.

---
Changes since v3:
- Provide a fixed-clock for CAN
- Separate escpi from CAN control pin groups
- Use vdd-supply for mcp2515
- Fix typo on commit log

Changes since v2:
- None
Changes since v1:
- Use active low for spi chipselect
- Remove unused GPIOs for CAN

 .../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts  | 62 ++++++++++++++++++++++
 1 file changed, 62 insertions(+)
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +29 -0
index 8b1098e..c1f32f9 100644
@@ -24,6 +24,14 @@
 	model = "Eukrea CPUIMX51";
 	compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
 
+	clocks {
+		clk24M: can_clock {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24000000>;
+		};
+	};
+
 	gpio_keys {
 		compatible = "gpio-keys";
 		pinctrl-names = "default";
@@ -50,6 +58,23 @@
 		};
 	};
 
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reg_can: regulator at 0 {
+			compatible = "regulator-fixed";
+			reg = <0>;
+			regulator-name = "3V3";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+			startup-delay-us = <20000>;
+			enable-active-high;
+		};
+	};
+
 	sound {
 		compatible = "eukrea,asoc-tlv320";
 		eukrea,model = "imx51-eukrea-tlv320aic23";
@@ -86,6 +111,26 @@
 	status = "okay";
 };
 
+&ecspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1>;
+	fsl,spi-num-chipselects = <1>;

arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts line 127

Quoted 10 lines
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +10 -0
+	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
+	status = "okay";
+
+	can0: can at 0 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_can>;
+		compatible = "microchip,mcp2515";
+		reg = <0>;
+		clocks = <&clk24M>;
+		spi-max-frequency = <1000000>;

This should be of course 10000000, or removed completely since driver already applies such limitation to the SPI bus. I think Shawn can fix this during commit.

---

reviewer
#2 lore raw

PATCH v4 1/2 ARM: dts: imx51-eukrea-mbimxsd51-baseboard: Add CAN support

Quoted 11 lines · Alexander Shiyan

arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts line 127

Quoted 7 lines
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +7 -0
+     can0: can at 0 {
+             pinctrl-names = "default";
+             pinctrl-0 = <&pinctrl_can>;
+             compatible = "microchip,mcp2515";
+             reg = <0>;
+             clocks = <&clk24M>;
+             spi-max-frequency = <1000000>;

This should be of course 10000000, or removed completely since driver already applies such limitation to the SPI bus. I think Shawn can fix this during commit.

Yes, this should be 10MHz.

Thanks for the review.

Eric,

I forgot to Cc you on v4. Besides the 10MHz error above, does it look good?

#3 lore raw

Tue, 6 May 2014 17:04:44 -0300 ?? Fabio Estevam <[email protected]>:

Quoted 13 lines · Alexander Shiyan
Quoted 11 lines

arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts line 127

Quoted 7 lines
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +7 -0
+     can0: can at 0 {
+             pinctrl-names = "default";
+             pinctrl-0 = <&pinctrl_can>;
+             compatible = "microchip,mcp2515";
+             reg = <0>;
+             clocks = <&clk24M>;
+             spi-max-frequency = <1000000>;

This should be of course 10000000, or removed completely since driver already applies such limitation to the SPI bus. I think Shawn can fix this during commit.

Quoted 7 lines

Yes, this should be 10MHz.

Thanks for the review.

Eric,

I forgot to Cc you on v4. Besides the 10MHz error above, does it look good?

Yes.
In fact, I would have changed the regulator name to the "CAN_RST" to match the functionality, but this is nit-picking.

---

#4 lore raw

PATCH v4 1/2 ARM: dts: imx51-eukrea-mbimxsd51-baseboard: Add CAN support

In reply to Fabio Estevam

Hi Fabio,

Le Tue, 6 May 2014 17:04:44 -0300,
Fabio Estevam <[email protected]> a ?crit :

Quoted 14 lines · Alexander Shiyan
Quoted 11 lines

arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts line 127

Quoted 7 lines
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +7 -0
+     can0: can at 0 {
+             pinctrl-names = "default";
+             pinctrl-0 = <&pinctrl_can>;
+             compatible = "microchip,mcp2515";
+             reg = <0>;
+             clocks = <&clk24M>;
+             spi-max-frequency = <1000000>;

This should be of course 10000000, or removed completely since driver already applies such limitation to the SPI bus. I think Shawn can fix this during commit.

Quoted 7 lines

Yes, this should be 10MHz.

Thanks for the review.

Eric,

I forgot to Cc you on v4. Besides the 10MHz error above, does it look good?

seems fine. We will test asap.

Thanks,

Eric