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ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs

PATCH Superseded Hans de Goede 2 participants 9 messages May 10, 2014

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v11 of 13 Superseded Latest is v13 →

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#0 lore raw

v11 cover ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs

Hi All,

Here is v11 of the sunxi-mmc patch-set David Lanzend?rfer and I have been working on, this makes various changes to the mmc driver itself as a result of the review of v10.

All the dts and clk patches in the previous series have been accepted for upstream inclusion in 3.16, so they are no longer included.

The first patch in this series is the patch adding the actual mmc driver and should go in through the mmc tree.

All the other patches are devicetree patches adding fixed regulator nodes for mmc0 to all sunxi board files, and should go upstream through Maxime's sunxi-dts tree.

Changes since v1:
-Using mmc_of_parse instead of diy dt parsing -Adding nodes for all mmc controller to the dtsi files,
including sofar unused controllers
-Using generic GPIO slot library for WP/CD -Adding additional MMC device nodes into DTSI files

Changes since v2:
-Add missing Signed-off-by tags
-Stop using __raw_readl / __raw_writel so that barriers are properly used -Adding missing new lines
-Adding missing patch for automatic reparenting of clocks

Changes since v3:
-Move clk_enable / disable into host_init / exit (Hans) -Fix hang on boot caused by irq storm (Hans)

Changes since v4:
-moving sunxi-mci.{c/h} to sunxi-mmc.{c/h} -removing camel cases from the defines in sunxi-mmc.h -moving defines out of the struct definition
since this is bad coding style
-adding documentation for the device tree binding Changes since v5:
-adding host initialization for when the sdio irq is enabled
(just to make sure having a defined state at all time)
-add mmc support fixup: set pullup on cd pins -fixup: Don't set MMC_CAP_NEEDS_POLL / MMC_CAP_4_BIT_DATA

Changes since v6:
-fixing copyright info in sunxi-mmc.*
-s/__SUNXI_MCI_H__/__SUNXI_MMC_H__/g
-s/SDXC_RESPONSE_/SDXC_RESP_/g
-s/define/definitions <- Comment from Priit Laes

Changes since v7:
-Merge sunxi-mmc.h into sunxi-mmc.c
-Various style fixes / cleanups based on Maxime's review
-sun6i support
-Fix a race condition in interrupt / tasklet interaction
-Split the dts patches into 3 per platform:
1) Add mmc nodes to the dtsi
2) Add mmc pinmux to the dtsi
3) Add mmc nodes to the various board files
-Moved setting of bus-width and cd gpio polarity from .dtsi to the board-files -Added sun6i dts patches

Changes since v8:
-Don't claim MMC_CAP_SDIO_IRQ by default, sdio-irq support appears to not
always be reliable. Can be re-added to the caps on a per board basis through dts
-Added EXPORT_SYMBOL(clk_sunxi_mmc_phase_control)
-Moved bus-width and cd-inverted dts attributes for sun6i from dtsi to dts -Squashed patches adding sun6i-a31-m9.dts and mmc support for m9 together -Added a patch enabling the sdio wifi on the cubietruck in dts

Changes since v9:
-Drop the sun5i and sun6i dts pinmux patches as those have already been
accepted
-Rename the mmc clock for the controller from "mod" to "mmc" so as
to not confuse it with a regular mod0 clock
-Rename pinmux for the reference design card-detect pin from cd_pin_a to
cd_pin_reference_design

Changes since v10:
-Dropped all dts and clk patches, as they are all accepted now -Cleanup some somewhat weird names (leftovers from the android code):
s/mci_readl/mmc_readl/
s/mci_writel/mmc_write/
s/smc_host/host/
-Switched to mmc_regulator_get_supply API and added fixed regulator nodes to
all board files (introducing new dts patches)
-Got rid of duplicate ios info
-Stop checking card-detect before each request
-Drop usleep after changing the clock rate
-Drop incomplete / wrong voltage switching support
-Drop the large comment with values copy/pasted from the spec -Move enable/disable clk + reset + irq calls from power up / down to
probe / remove
-Make sunxi_mmc_clk_set_rate / sunxi_mmc_oclk_onoff return an error -Use a threaded interrupt handler for sending an explicit stop on data errors -Fix sunxi_mmc_send_manual_stop to properly stop ongoing SD_IO_RW_EXTENDED cmds

Regards,

Hans

#1 lore raw

PATCH v11 1/6 ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs

From: David Lanzend??rfer <[email protected]>

The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices.

HdG: Various cleanups and fixes.

---
 .../devicetree/bindings/mmc/sunxi-mmc.txt          |   43 +
 drivers/mmc/host/Kconfig                           |    7 +
 drivers/mmc/host/Makefile                          |    2 +
 drivers/mmc/host/sunxi-mmc.c                       | 1050 ++++++++++++++++++++
 4 files changed, 1102 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mmc/sunxi-mmc.txt
 create mode 100644 drivers/mmc/host/sunxi-mmc.c
Documentation/devicetree/bindings/mmc/sunxi-mmc.txt new file +43 -0
new file mode 100644
index 0000000..91b3a34
@@ -0,0 +1,43 @@
+* Allwinner sunxi MMC controller
+
+The highspeed MMC host controller on Allwinner SoCs provides an interface
+for MMC, SD and SDIO types of memory cards.
+
+Supported maximum speeds are the ones of the eMMC standard 4.5 as well
+as the speed of SD standard 3.0.
+Absolute maximum transfer rate is 200MB/s
+
+Required properties:
+ - compatible : "allwinner,sun4i-a10-mmc" or "allwinner,sun5i-a13-mmc"
+ - reg : mmc controller base registers
+ - clocks : a list with 2 phandle + clock specifier pairs
+ - clock-names : must contain "ahb" and "mmc"
+ - interrupts : mmc controller interrupt
+
+Optional properties:
+ - resets : phandle + reset specifier pair
+ - reset-names : must contain "ahb"
+ - for cd, bus-width and additional generic mmc parameters
+   please refer to mmc.txt within this directory
+
+Examples:
+	- Within .dtsi:
+	mmc0: mmc at 01c0f000 {
+		compatible = "allwinner,sun5i-a13-mmc";
+		reg = <0x01c0f000 0x1000>;
+		clocks = <&ahb_gates 8>, <&mmc0_clk>;
+		clock-names = "ahb", "mod";
+		interrupts = <0 32 4>;
+		status = "disabled";
+	};
+
+	- Within dts:
+	mmc0: mmc at 01c0f000 {
+		pinctrl-names = "default", "default";
+		pinctrl-0 = <&mmc0_pins_a>;
+		pinctrl-1 = <&mmc0_cd_pin_reference_design>;
+		bus-width = <4>;
+		cd-gpios = <&pio 7 1 0>; /* PH1 */
+		cd-inverted;
+		status = "okay";
+	};
drivers/mmc/host/Kconfig +7 -0
index 8aaf8c1..d50ac1c 100644
@@ -694,3 +694,10 @@ config MMC_REALTEK_PCI
 	help
 	  Say Y here to include driver code to support SD/MMC card interface
 	  of Realtek PCI-E card reader
+
+config MMC_SUNXI
+	tristate "Allwinner sunxi SD/MMC Host Controller support"
+	depends on ARCH_SUNXI
+	help
+	  This selects support for the SD/MMC Host Controller on
+	  Allwinner sunxi SoCs.
drivers/mmc/host/Makefile +2 -0
index 0c8aa5e..c706c0f 100644
@@ -53,6 +53,8 @@ obj-$(CONFIG_MMC_WMT)		+= wmt-sdmmc.o
 
 obj-$(CONFIG_MMC_REALTEK_PCI)	+= rtsx_pci_sdmmc.o
 
+obj-$(CONFIG_MMC_SUNXI)		+= sunxi-mmc.o
+
 obj-$(CONFIG_MMC_SDHCI_PLTFM)		+= sdhci-pltfm.o
 obj-$(CONFIG_MMC_SDHCI_CNS3XXX)		+= sdhci-cns3xxx.o
 obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)	+= sdhci-esdhc-imx.o
drivers/mmc/host/sunxi-mmc.c new file +1050 -0

1,050 lines not on this page · raw message

Signature · 1 line
1.9.0
#2 lore raw

PATCH v11 1/6 ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs

Quoted 8 lines · Hans de Goede

From: David Lanzend?rfer <[email protected]>

The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices.

Quoted 4 lines

HdG: Various cleanups and fixes.

Chris, I don't think we ever got a review from you on this? Do you have any comments on this patch? It would be great if we could merge it for 3.16.

Thanks,
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#3 lore raw

PATCH v11 2/6 ARM: dts: sunxi: Add reg_vmmc0 supply to sunxi-common-regulators.dtsi

In reply to Hans de Goede
---
 arch/arm/boot/dts/sunxi-common-regulators.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/sunxi-common-regulators.dtsi +8 -0
index 18eeac0..ebbba39 100644
@@ -72,4 +72,12 @@
 		gpio = <&pio 7 3 0>;
 		status = "disabled";
 	};
+
+	reg_vmmc0: vmmc0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmc0";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		status = "disabled";
+	};
 };
Signature · 1 line
1.9.0
#4 lore raw

PATCH v11 2/6 ARM: dts: sunxi: Add reg_vmmc0 supply to sunxi-common-regulators.dtsi

Hi Hans,

Thanks for your follow up on this.

Quoted 11 lines · Hans de Goede
---
 arch/arm/boot/dts/sunxi-common-regulators.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/sunxi-common-regulators.dtsi +0 -0
index 18eeac0..ebbba39 100644
@@ -72,4 +72,12 @@
 		gpio = <&pio 7 3 0>;

arch/arm/boot/dts/sunxi-common-regulators.dtsi line 82

Quoted 10 lines
arch/arm/boot/dts/sunxi-common-regulators.dtsi +8 -0
 		status = "disabled";
 	};
+
+	reg_vmmc0: vmmc0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmc0";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		status = "disabled";
+	};

I think you can rather define this as vcc-3.3v or something alike, that would always be enabled. That would allow to reuse this in some other nodes as well, you won't need to enable it on every board, and this is actually more accurate.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#5 lore raw

PATCH v11 3/6 ARM: dts: sun4i: Add reg_vmmc0 to sun4i boards

In reply to Hans de Goede
---
 arch/arm/boot/dts/sun4i-a10-a1000.dts          | 5 +++++
 arch/arm/boot/dts/sun4i-a10-cubieboard.dts     | 5 +++++
 arch/arm/boot/dts/sun4i-a10-hackberry.dts      | 5 +++++
 arch/arm/boot/dts/sun4i-a10-inet97fv2.dts      | 5 +++++
 arch/arm/boot/dts/sun4i-a10-mini-xplus.dts     | 5 +++++
 arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 5 +++++
 arch/arm/boot/dts/sun4i-a10-pcduino.dts        | 5 +++++
 7 files changed, 35 insertions(+)
arch/arm/boot/dts/sun4i-a10-a1000.dts +5 -0
index 93af306..ec0c98b 100644
@@ -39,6 +39,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -127,6 +128,10 @@
 		gpio = <&pio 7 15 0>;
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		status = "okay";
 	};
arch/arm/boot/dts/sun4i-a10-cubieboard.dts +5 -0
index 8581385..f5e2235 100644
@@ -37,6 +37,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -119,6 +120,10 @@
 		status = "okay";
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		status = "okay";
 	};
arch/arm/boot/dts/sun4i-a10-hackberry.dts +5 -0
index 9dc7b1c..d5741a4 100644
@@ -39,6 +39,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -102,6 +103,10 @@
 		gpio = <&pio 7 19 0>;
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		status = "okay";
 	};
arch/arm/boot/dts/sun4i-a10-inet97fv2.dts +5 -0
index 297b8f6..3529545 100644
@@ -27,6 +27,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -68,6 +69,10 @@
 		};
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		status = "okay";
 	};
arch/arm/boot/dts/sun4i-a10-mini-xplus.dts +5 -0
index b7a4218..2c44ddc 100644
@@ -23,6 +23,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -58,6 +59,10 @@
 		};
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		status = "okay";
 	};
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts +5 -0
index 4b7fd04..afb0d5a 100644
@@ -36,6 +36,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -110,6 +111,10 @@
 		status = "okay";
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		status = "okay";
 	};
arch/arm/boot/dts/sun4i-a10-pcduino.dts +5 -0
index 4d9c3cd..1c1261e 100644
@@ -37,6 +37,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -78,6 +79,10 @@
 		};
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		status = "okay";
 	};
Signature · 1 line
1.9.0
#6 lore raw

PATCH v11 4/6 ARM: dts: sun5i: Add reg_vmmc0 to sun5i boards

In reply to Hans de Goede
---
 arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 5 +++++
 arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts  | 5 +++++
 arch/arm/boot/dts/sun5i-a13-olinuxino.dts        | 5 +++++
 3 files changed, 15 insertions(+)
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +5 -0
index de91308..cde617a 100644
@@ -38,6 +38,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino_micro>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 6 1 0>; /* PG1 */
 			cd-inverted;
@@ -152,6 +153,10 @@
 		};
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		pinctrl-0 = <&usb1_vbus_pin_olinuxino_m>;
 		gpio = <&pio 1 10 0>;
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts +5 -0
index 8515f19..3fdfb60 100644
@@ -24,6 +24,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxinom>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 6 0 0>; /* PG0 */
 			cd-inverted;
@@ -103,6 +104,10 @@
 		};
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		pinctrl-0 = <&usb1_vbus_pin_olinuxinom>;
 		gpio = <&pio 6 11 0>;
arch/arm/boot/dts/sun5i-a13-olinuxino.dts +5 -0
index 51a9438..a4e22b9 100644
@@ -23,6 +23,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 6 0 0>; /* PG0 */
 			cd-inverted;
@@ -101,6 +102,10 @@
 		};
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		pinctrl-0 = <&usb1_vbus_pin_olinuxino>;
 		gpio = <&pio 6 11 0>;
Signature · 1 line
1.9.0
#7 lore raw

PATCH v11 5/6 ARM: dts: sun6i: Add reg_vmmc0 to sun6i boards

In reply to Hans de Goede
---
 arch/arm/boot/dts/sun6i-a31-m9.dts | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/boot/dts/sun6i-a31-m9.dts +6 -0
index 22eacf8..6dc00c3 100644
@@ -11,6 +11,7 @@
 
 /dts-v1/;
 /include/ "sun6i-a31.dtsi"
+/include/ "sunxi-common-regulators.dtsi"
 
 / {
 	model = "Mele M9 / A1000G Quad top set box";
@@ -24,6 +25,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 22 0>; /* PH22 */
 			cd-inverted;
@@ -45,4 +47,8 @@
 			status = "okay";
 		};
 	};
+
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
 };
Signature · 1 line
1.9.0
#8 lore raw

PATCH v11 6/6 ARM: dts: sun7i: Add reg_vmmc0 to sun7i boards

In reply to Hans de Goede
---
 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts     | 5 +++++
 arch/arm/boot/dts/sun7i-a20-cubietruck.dts      | 5 +++++
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 5 +++++
 3 files changed, 15 insertions(+)
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +5 -0
index 3918e2f..d8f8565 100644
@@ -23,6 +23,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -116,6 +117,10 @@
 		status = "okay";
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		status = "okay";
 	};
arch/arm/boot/dts/sun7i-a20-cubietruck.dts +5 -0
index 9dbb763c..1320078 100644
@@ -23,6 +23,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -175,6 +176,10 @@
 		status = "okay";
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_vmmc3: vmmc3 {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +5 -0
index 1bfef12..f735348 100644
@@ -34,6 +34,7 @@
 		mmc0: mmc at 01c0f000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+			vmmc-supply = <&reg_vmmc0>;
 			bus-width = <4>;
 			cd-gpios = <&pio 7 1 0>; /* PH1 */
 			cd-inverted;
@@ -163,6 +164,10 @@
 		status = "okay";
 	};
 
+	reg_vmmc0: vmmc0 {
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		status = "okay";
 	};
Signature · 1 line
1.9.0