Add platform support for LSI AXM55xx
Subsystems (7)
v3 cover Add platform support for LSI AXM55xx
Hi,
This is version 3 of this series to introduces basic platform support for the LSI AXM5516 SoC.
No major changes since v2. Ready to be applied to the arm-soc tree?
Changes:
v3:
* Sorted Kconfig entries alphabetically
v2:
* Rebased to arm-soc/for-next
* Removed redundant HAVE_SMP and ARCH_WANT_OPTIONAL_GPIOLIB from Kconfig
* Use CPU_METHOD_OF_DECLARE to register smp_operations
* Rework smp operations to avoid holding pen and custom headsmp.S
* Clean up board file
* Corrected clock properties for arm,sp804 dts node.
* Changed machine compatible strings to include full model number.
* Break out clk-axxia driver as separate patch
* Removed Makefile.boot
Anders Berg (6):
ARM: Add platform support for LSI AXM55xx SoC
clk: Add clock driver for AXM55xx SoC
ARM: dts: Device tree for AXM55xx.
ARM: axxia: Adding defconfig for AXM55xx
power: reset: Add Axxia system reset driver
ARM: dts: axxia: Add reset controller
Documentation/devicetree/bindings/arm/axxia.txt | 12 + .../devicetree/bindings/clock/clk-axxia.txt | 88 ++++++ .../bindings/power_supply/axxia-reset.txt | 20 ++ arch/arm/Kconfig | 2 + arch/arm/Makefile | 2 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/axm5516-amarillo.dts | 51 ++++ arch/arm/boot/dts/axm5516-cpus.dtsi | 204 ++++++++++++++ arch/arm/boot/dts/axm55xx.dtsi | 311 +++++++++++++++++++++ arch/arm/configs/axm55xx_defconfig | 248 ++++++++++++++++ arch/arm/mach-axxia/Kconfig | 16 ++ arch/arm/mach-axxia/Makefile | 2 + arch/arm/mach-axxia/axxia.c | 28 ++ arch/arm/mach-axxia/platsmp.c | 89 ++++++ drivers/clk/Makefile | 1 + drivers/clk/clk-axxia.c | 281 +++++++++++++++++++ drivers/power/reset/Kconfig | 8 + drivers/power/reset/Makefile | 1 + drivers/power/reset/axxia-reset.c | 97 +++++++ 19 files changed, 1462 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/axxia.txt create mode 100644 Documentation/devicetree/bindings/clock/clk-axxia.txt create mode 100644 Documentation/devicetree/bindings/power_supply/axxia-reset.txt create mode 100644 arch/arm/boot/dts/axm5516-amarillo.dts create mode 100644 arch/arm/boot/dts/axm5516-cpus.dtsi create mode 100644 arch/arm/boot/dts/axm55xx.dtsi create mode 100644 arch/arm/configs/axm55xx_defconfig create mode 100644 arch/arm/mach-axxia/Kconfig create mode 100644 arch/arm/mach-axxia/Makefile create mode 100644 arch/arm/mach-axxia/axxia.c create mode 100644 arch/arm/mach-axxia/platsmp.c create mode 100644 drivers/clk/clk-axxia.c create mode 100644 drivers/power/reset/axxia-reset.c
Signature · 1 line
1.8.3.2
PATCH v3 1/6 ARM: Add platform support for LSI AXM55xx SoC
From: Anders Berg <[email protected]>
The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15 cores (in a 4x4 cluster configuration). The cores within each cluster share an L2 cache, and the clusters are connected to each other via a CCN-504 cache coherent interconnect.
This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located above 4GB in the memory map.
--- Documentation/devicetree/bindings/arm/axxia.txt | 12 ++++ arch/arm/Kconfig | 2 + arch/arm/Makefile | 2 + arch/arm/mach-axxia/Kconfig | 16 +++++ arch/arm/mach-axxia/Makefile | 2 + arch/arm/mach-axxia/axxia.c | 28 ++++++++ arch/arm/mach-axxia/platsmp.c | 89 +++++++++++++++++++++++++ 7 files changed, 151 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/axxia.txt create mode 100644 arch/arm/mach-axxia/Kconfig create mode 100644 arch/arm/mach-axxia/Makefile create mode 100644 arch/arm/mach-axxia/axxia.c create mode 100644 arch/arm/mach-axxia/platsmp.c
Documentation/devicetree/bindings/arm/axxia.txt new file +12 -0
@@ -0,0 +1,12 @@ +Axxia AXM55xx device tree bindings + +Boards using the AXM55xx SoC need to have the following properties: + +Required root node property: + + - compatible = "lsi,axm5516" + +Boards: + + LSI AXM5516 Validation board (Amarillo) + compatible = "lsi,axm5516-amarillo", "lsi,axm5516"
arch/arm/Kconfig +2 -0
@@ -951,6 +951,8 @@ source "arch/arm/mach-mvebu/Kconfig" source "arch/arm/mach-at91/Kconfig" +source "arch/arm/mach-axxia/Kconfig" + source "arch/arm/mach-bcm/Kconfig" source "arch/arm/mach-berlin/Kconfig"
arch/arm/Makefile +2 -0
@@ -138,10 +138,12 @@ endif textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 +textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 +machine-$(CONFIG_ARCH_AXXIA) += axxia machine-$(CONFIG_ARCH_BCM) += bcm machine-$(CONFIG_ARCH_BERLIN) += berlin machine-$(CONFIG_ARCH_CLPS711X) += clps711x
arch/arm/mach-axxia/Kconfig new file +16 -0
@@ -0,0 +1,16 @@ +config ARCH_AXXIA + bool "LSI Axxia platforms" if (ARCH_MULTI_V7 && ARM_LPAE) + select ARCH_DMA_ADDR_T_64BIT + select ARM_AMBA + select ARM_GIC + select ARM_TIMER_SP804 + select HAVE_ARM_ARCH_TIMER + select MFD_SYSCON + select MIGHT_HAVE_PCI + select PCI_DOMAINS if PCI + select ZONE_DMA + help + This enables support for the LSI Axxia devices. + + The LSI Axxia platforms require a Flattened Device Tree to be passed + to the kernel.
arch/arm/mach-axxia/Makefile new file +2 -0
@@ -0,0 +1,2 @@ +obj-y += axxia.o +obj-$(CONFIG_SMP) += platsmp.o
arch/arm/mach-axxia/axxia.c new file +28 -0
@@ -0,0 +1,28 @@ +/* +* Support for the LSI Axxia SoC devices based on ARM cores. +* +* Copyright (C) 2012 LSI +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ +#include <linux/init.h> +#include <asm/mach/arch.h> + +static const char *axxia_dt_match[]__initconst = { +"lsi,axm5516" , +"lsi,axm5516-sim" , +"lsi,axm5516-emu" , +NULL +}; + +DT_MACHINE_START (AXXIA_DT ,"LSI Axxia AXM55XX" ) + .dt_compat = axxia_dt_match, +MACHINE_END
arch/arm/mach-axxia/platsmp.c new file +89 -0
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Signature · 1 line
1.8.3.2
PATCH v3 2/6 clk: Add clock driver for AXM55xx SoC
In reply to Anders BergFrom: Anders Berg <[email protected]>
Add clk driver to support clock blocks found on the AXM55xx devices. The driver provides clock implementations for three different types of clock devices on the AXM55xx device: PLL clock, a clock divider and a clock mux.
--- .../devicetree/bindings/clock/clk-axxia.txt | 88 +++++++ drivers/clk/Makefile | 1 + drivers/clk/clk-axxia.c | 281 +++++++++++++++++++++ 3 files changed, 370 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/clk-axxia.txt create mode 100644 drivers/clk/clk-axxia.c
Documentation/devicetree/bindings/clock/clk-axxia.txt new file +88 -0
@@ -0,0 +1,88 @@ +* Axxia clock driver bindings + +This document contains bindings for the Axxia PLL, clock divider and mux. The +binding uses the common clock binding found in: + + Documentation/devicetree/bindings/clock/clock-bindings.txt + +* Axxia PLL + +Required properties: +- #clock-cells : shall be set to 0. +- compatible : shall be "lsi,axxia-pll-clock" +- clocks : parent clock phandle +- reg - specifies PLL control registers + +Optional properties: +- clock-output-names : From common clock binding. + +Example: + + clk_ref0: clk_ref0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + clk_cpu_pll: clk_cpu_pll at 2010022000 { + compatible = "lsi,axxia-pll-clock"; + #clock-cells = <0>; + clocks = <&clk_ref0>; + clock-output-names = "clk_cpu_pll"; + reg = <0x20 0x10022000 0 0x2c>; + }; + + +* Axxia clock divider + +Required properties: +- #clock-cells : shall be set to 0. +- compatible : shall be "lsi,axxia-div-clock" +- clocks : parent clock phandle +- reg - clock divider control register +- lsi,bit-shift : bit position of the divider control field. +- lsi,bit-mask : width of the divider control field. + +Optional properties: +- clock-output-names : From common clock binding. + +Example: + + clk_cpu_div: cpu { + compatible = "lsi,axxia-div-clock"; + #clock-cells = <0>; + clocks = <&clk_cpu_pll>; + clock-output-names = "clk_cpu_div"; + reg = <0x20 0x10030008 0 0x4>; + lsi,bit-shift = <0>; + lsi,bit-width = <4>; + }; + + +* Axxia clock mux + +Required properties: +- #clock-cells : shall be set to 0. +- compatible : shall be "lsi,axxia-mux-clock" +- clocks : phandle of parent clocks (max 4) +- reg - clock divider control register +- lsi,bit-shift : bit position of the divider control field. +- lsi,bit-mask : width of the divider control field. + +Optional properties: +- clock-output-names : From common clock binding. + +Example: + + clk_cpu: clk_cpu0 at 2010030000 { + compatible = "lsi,axxia-mux-clock"; + #clock-cells = <0>; + clocks = <&clk_ref0>, + <&clk_cpu_pll>, + <&clk_cpu_div>, + <&clk_cpu_div>; + clock-output-names = "clk_cpu"; + reg = <0x20 0x10030000 0 0x4>; + lsi,bit-shift = <0>; + lsi,bit-width = <2>; + };
drivers/clk/Makefile +1 -0
@@ -12,6 +12,7 @@ obj-$(CONFIG_COMMON_CLK) += clk-composite.o # hardware specific clock types # please keep this section sorted lexicographically by file/directory path name obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o +obj-$(CONFIG_ARCH_AXXIA) += clk-axxia.o obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
drivers/clk/clk-axxia.c new file +281 -0
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1.8.3.2
Re: [PATCH v3 2/6] clk: Add clock driver for AXM55xx SoC
Quoting Anders Berg (2014-05-14 11:37:57)
Documentation/devicetree/bindings/clock/clk-axxia.txt line 25
Quoted 7 lines
Documentation/devicetree/bindings/clock/clk-axxia.txt new file +7
-0+Example: + + clk_ref0: clk_ref0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + };
Hi Anders,
The driver looks good. As for the DT binding, I am starting to request that bindings for new hardware move away from the one-clock-per-node method. I am not forcing anyone with stable bindings to migrate that way, but it tends to make maintenance easier in the long run (e.g. setting per-clock flags, etc).
Your clk_ref0 example looks good, assuming that it is an off-chip clock that feeds into the rest of the clock generator.
Documentation/devicetree/bindings/clock/clk-axxia.txt line 33
Quoted 8 lines
Documentation/devicetree/bindings/clock/clk-axxia.txt new file +8
-0+ + clk_cpu_pll: clk_cpu_pll at 2010022000 { + compatible = "lsi,axxia-pll-clock"; + #clock-cells = <0>; + clocks = <&clk_ref0>; + clock-output-names = "clk_cpu_pll"; + reg = <0x20 0x10022000 0 0x2c>; + };
I assume the rest of your clocks are part of a clock generator IP block inside of your chip. Have you looked at the QCOM binding? It is my favorite binding these days. Here are some highlights:
See Documentation/devicetree/bindings/clock/qcom,gcc.txt.
Quoted 1 line
From
arch/arm/boot/dts/qcom-msm8974.dtsi:
gcc: clock-controller at fc400000 {
compatible = "qcom,gcc-msm8974";
#clock-cells = <1>;
#reset-cells = <1>;
reg = <0xfc400000 0x4000>;
};...
serial at f991e000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xf991e000 0x1000>;
interrupts = <0 108 0x0>;
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
};Quoted 1 line
From
drivers/clk/qcom/gcc-msm8974.c:
static struct clk_branch gcc_blsp1_uart2_apps_clk = {
.halt_reg = 0x0704,
.clkr = {
.enable_reg = 0x0704,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_uart2_apps_clk",
.parent_names = (const char *[]){
"blsp1_uart2_apps_clk_src",
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_branch2_ops,
},
},
};Quoted 1 line
From
include/dt-bindings/clock/qcom,gcc-msm8974.h:
#define GCC_BLSP1_UART2_APPS_CLK 103
Using this type of binding you only need to declare your clock generator IP node in dts, and then define a mapping in the DT include chroot. Then you can define your per-clock data inside of your clock driver instead of putting all of the details inside of DT.
If you have a strong reason to do it the way that you originally posted then let me know.
Regards,
Mike
Re: [PATCH v3 2/6] clk: Add clock driver for AXM55xx SoC
Quoted 33 lines · Mike Turquette
Quoting Anders Berg (2014-05-14 11:37:57)
Documentation/devicetree/bindings/clock/clk-axxia.txt line 25
Quoted 7 lines
Documentation/devicetree/bindings/clock/clk-axxia.txt new file +7
-0+Example: + + clk_ref0: clk_ref0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + };Hi Anders,
The driver looks good. As for the DT binding, I am starting to request that bindings for new hardware move away from the one-clock-per-node method. I am not forcing anyone with stable bindings to migrate that way, but it tends to make maintenance easier in the long run (e.g. setting per-clock flags, etc).
Your
clk_ref0example looks good, assuming that it is an off-chip clock that feeds into the rest of the clock generator.Documentation/devicetree/bindings/clock/clk-axxia.txt line 33
Quoted 8 lines
Documentation/devicetree/bindings/clock/clk-axxia.txt new file +8
-0+ + clk_cpu_pll: clk_cpu_pll at 2010022000 { + compatible = "lsi,axxia-pll-clock"; + #clock-cells = <0>; + clocks = <&clk_ref0>; + clock-output-names = "clk_cpu_pll"; + reg = <0x20 0x10022000 0 0x2c>; + };I assume the rest of your clocks are part of a clock generator IP block inside of your chip. Have you looked at the QCOM binding? It is my favorite binding these days. Here are some highlights:
[...]
Quoted 9 lines
Using this type of binding you only need to declare your clock generator IP node in dts, and then define a mapping in the DT include chroot. Then you can define your per-clock data inside of your clock driver instead of putting all of the details inside of DT.
If you have a strong reason to do it the way that you originally posted then let me know.
No strong reason... I just happened to pick the keystone-clocks.dtsi as an example when I wrote this. But I can rework this according to your suggestions. I'll post it as a separate patch (thus dropping the clk patch from this series). Ok?
Thanks,
Anders
PATCH v3 2/6 clk: Add clock driver for AXM55xx SoC
Quoting Anders Berg (2014-05-14 15:22:16)
Quoted 41 lines · Mike Turquette
Quoted 33 lines
Quoting Anders Berg (2014-05-14 11:37:57)
Documentation/devicetree/bindings/clock/clk-axxia.txt line 25
Quoted 7 lines
Documentation/devicetree/bindings/clock/clk-axxia.txt new file +7
-0+Example: + + clk_ref0: clk_ref0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + };Hi Anders,
The driver looks good. As for the DT binding, I am starting to request that bindings for new hardware move away from the one-clock-per-node method. I am not forcing anyone with stable bindings to migrate that way, but it tends to make maintenance easier in the long run (e.g. setting per-clock flags, etc).
Your
clk_ref0example looks good, assuming that it is an off-chip clock that feeds into the rest of the clock generator.Documentation/devicetree/bindings/clock/clk-axxia.txt line 33
Quoted 8 lines
Documentation/devicetree/bindings/clock/clk-axxia.txt new file +8
-0+ + clk_cpu_pll: clk_cpu_pll at 2010022000 { + compatible = "lsi,axxia-pll-clock"; + #clock-cells = <0>; + clocks = <&clk_ref0>; + clock-output-names = "clk_cpu_pll"; + reg = <0x20 0x10022000 0 0x2c>; + };I assume the rest of your clocks are part of a clock generator IP block inside of your chip. Have you looked at the QCOM binding? It is my favorite binding these days. Here are some highlights:
[...]
Quoted 6 lines
Using this type of binding you only need to declare your clock generator IP node in dts, and then define a mapping in the DT include chroot. Then you can define your per-clock data inside of your clock driver instead of putting all of the details inside of DT.
Quoted 8 lines
Quoted 3 lines
If you have a strong reason to do it the way that you originally posted then let me know.
No strong reason... I just happened to pick the
keystone-clocks.dtsias an example when I wrote this. But I can rework this according to your suggestions. I'll post it as a separate patch (thus dropping the clk patch from this series). Ok?
Sounds great. Thanks for reworking it.
Regards,
Mike
Quoted 3 lines
Thanks,
Anders
PATCH v3 3/6 ARM: dts: Device tree for AXM55xx.
In reply to Anders BergFrom: Anders Berg <[email protected]>
Add device tree for the Amarillo validation board with an AXM5516 SoC.
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/axm5516-amarillo.dts | 51 ++++++ arch/arm/boot/dts/axm5516-cpus.dtsi | 204 ++++++++++++++++++++++ arch/arm/boot/dts/axm55xx.dtsi | 306 +++++++++++++++++++++++++++++++++ 4 files changed, 562 insertions(+) create mode 100644 arch/arm/boot/dts/axm5516-amarillo.dts create mode 100644 arch/arm/boot/dts/axm5516-cpus.dtsi create mode 100644 arch/arm/boot/dts/axm55xx.dtsi
arch/arm/boot/dts/Makefile +1 -0
@@ -50,6 +50,7 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb +dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
arch/arm/boot/dts/axm5516-amarillo.dts new file +51 -0
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arch/arm/boot/dts/axm5516-cpus.dtsi new file +204 -0
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arch/arm/boot/dts/axm55xx.dtsi new file +306 -0
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Signature · 1 line
1.8.3.2
PATCH v3 4/6 ARM: axxia: Adding defconfig for AXM55xx
In reply to Anders BergFrom: Anders Berg <[email protected]>
Add a defconfig file for the LSI Axxia family of devices (CONFIG_ARCH_AXXIA).
--- arch/arm/configs/axm55xx_defconfig | 248 +++++++++++++++++++++++++++++++++++++ 1 file changed, 248 insertions(+) create mode 100644 arch/arm/configs/axm55xx_defconfig
arch/arm/configs/axm55xx_defconfig new file +248 -0
@@ -0,0 +1,248 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_FHANDLE=y +CONFIG_AUDIT=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_NET_NS is not set +CONFIG_SCHED_AUTOGROUP=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_EMBEDDED=y +# CONFIG_COMPAT_BRK is not set +CONFIG_PROFILING=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_ARCH_AXXIA=y +CONFIG_GPIO_PCA953X=y +CONFIG_ARM_LPAE=y +CONFIG_ARM_THUMBEE=y +CONFIG_ARM_ERRATA_430973=y +CONFIG_ARM_ERRATA_643719=y +CONFIG_ARM_ERRATA_720789=y +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_754327=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_ARM_ERRATA_798181=y +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCIE_AXXIA=y +CONFIG_SMP=y +CONFIG_NR_CPUS=16 +CONFIG_HOTPLUG_CPU=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_HIGHMEM=y +CONFIG_KSM=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_MISC=y +# CONFIG_SUSPEND is not set +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_SUB_POLICY=y +CONFIG_XFRM_MIGRATE=y +CONFIG_XFRM_STATISTICS=y +CONFIG_NET_KEY=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +# CONFIG_IPV6 is not set +CONFIG_NETWORK_PHY_TIMESTAMPING=y +CONFIG_BRIDGE=y +# CONFIG_WIRELESS is not set +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_AFS_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_M25P80=y +CONFIG_PROC_DEVICETREE=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_SG=y +CONFIG_ATA=y +CONFIG_PATA_PLATFORM=y +CONFIG_PATA_OF_PLATFORM=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_UEVENT=y +CONFIG_NETDEVICES=y +CONFIG_TUN=y +CONFIG_VETH=y +CONFIG_VIRTIO_NET=y +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_BROADCOM_PHY=y +# CONFIG_WLAN is not set +# CONFIG_MOUSE_PS2_ALPS is not set +# CONFIG_MOUSE_PS2_LOGIPS2PP is not set +# CONFIG_MOUSE_PS2_SYNAPTICS is not set +# CONFIG_MOUSE_PS2_TRACKPOINT is not set +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_VIRTIO_CONSOLE=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_AXXIA=y +CONFIG_SPI=y +CONFIG_SPI_PL022=y +CONFIG_DP83640_PHY=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_PL061=y +CONFIG_POWER_SUPPLY=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_AXXIA=y +CONFIG_SENSORS_ADT7475=y +CONFIG_SENSORS_JC42=y +CONFIG_SENSORS_LM75=y +CONFIG_PMBUS=y +CONFIG_SENSORS_LTC2978=y +CONFIG_WATCHDOG=y +CONFIG_ARM_SP805_WATCHDOG=y +CONFIG_FB=y +CONFIG_FB_ARMCLCD=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_HID_A4TECH=y +CONFIG_HID_APPLE=y +CONFIG_HID_BELKIN=y +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +CONFIG_HID_CYPRESS=y +CONFIG_HID_DRAGONRISE=y +CONFIG_HID_EZKEY=y +CONFIG_HID_KYE=y +CONFIG_HID_GYRATION=y +CONFIG_HID_TWINHAN=y +CONFIG_HID_KENSINGTON=y +CONFIG_HID_LOGITECH=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +CONFIG_HID_NTRIG=y +CONFIG_HID_ORTEK=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_PETALYNX=y +CONFIG_HID_SAMSUNG=y +CONFIG_HID_SUNPLUS=y +CONFIG_HID_GREENASIA=y +CONFIG_HID_SMARTJOYPLUS=y +CONFIG_HID_TOPSEED=y +CONFIG_HID_THRUSTMASTER=y +CONFIG_HID_ZEROPLUS=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +CONFIG_USB_EHCI_HCD_AXXIA=y +CONFIG_USB_STORAGE=y +CONFIG_MMC=y +CONFIG_MMC_ARMMMCI=y +CONFIG_DMADEVICES=y +CONFIG_PL330_DMA=y +CONFIG_VIRT_DRIVERS=y +CONFIG_VIRTIO_MMIO=y +CONFIG_MAILBOX=y +CONFIG_PL320_MBOX=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT4_FS=y +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_CUSE=y +CONFIG_FSCACHE=y +CONFIG_FSCACHE_STATS=y +CONFIG_FSCACHE_HISTOGRAM=y +CONFIG_FSCACHE_DEBUG=y +CONFIG_FSCACHE_OBJECT_LIST=y +CONFIG_CACHEFILES=y +CONFIG_CACHEFILES_HISTOGRAM=y +CONFIG_ISO9660_FS=y +CONFIG_UDF_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NFS_FSCACHE=y +CONFIG_SUNRPC_DEBUG=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_FTRACE is not set +CONFIG_DEBUG_USER=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_SHA256=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=y
Signature · 1 line
1.8.3.2
PATCH v3 5/6 power: reset: Add Axxia system reset driver
In reply to Anders BergFrom: Anders Berg <[email protected]>
Add Axxia (AXM55xx) SoC system reset driver. This driver handles only system reboot (and not power-off).
--- .../bindings/power_supply/axxia-reset.txt | 20 +++++ drivers/power/reset/Kconfig | 8 ++ drivers/power/reset/Makefile | 1 + drivers/power/reset/axxia-reset.c | 97 ++++++++++++++++++++++ 4 files changed, 126 insertions(+) create mode 100644 Documentation/devicetree/bindings/power_supply/axxia-reset.txt create mode 100644 drivers/power/reset/axxia-reset.c
Documentation/devicetree/bindings/power_supply/axxia-reset.txt new file +20 -0
@@ -0,0 +1,20 @@ +Axxia Restart Driver + +This driver can do reset of the Axxia SoC. It uses the registers in the syscon +block to initiate a chip reset. + +Required Properties: + -compatible: "lsi,axm55xx-reset" + -syscon: phandle to the syscon node. + +Example: + + syscon: syscon at 2010030000 { + compatible = "lsi,axxia-syscon", "syscon"; + reg = <0x20 0x10030000 0 0x2000>; + }; + + reset: reset at 2010031000 { + compatible = "lsi,axm55xx-reset"; + syscon = <&syscon>; + };
drivers/power/reset/Kconfig +8 -0
@@ -12,6 +12,14 @@ config POWER_RESET_AS3722 help This driver supports turning off board via a ams AS3722 power-off. +config POWER_RESET_AXXIA + bool "LSI Axxia reset driver" + depends on POWER_RESET && ARCH_AXXIA + help + This driver supports restart for Axxia SoC. + + Say Y if you have an Axxia family SoC. + config POWER_RESET_GPIO bool "GPIO power-off driver" depends on OF_GPIO && POWER_RESET
drivers/power/reset/Makefile +1 -0
@@ -1,4 +1,5 @@ obj-$(CONFIG_POWER_RESET_AS3722) += as3722-poweroff.o +obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
drivers/power/reset/axxia-reset.c new file +97 -0
97 lines not on this page · raw message
Signature · 1 line
1.8.3.2
PATCH v3 6/6 ARM: dts: axxia: Add reset controller
In reply to Anders BergFrom: Anders Berg <[email protected]>
Add the reset controller to the AXM5xx device tree.
--- arch/arm/boot/dts/axm55xx.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/axm55xx.dtsi +5 -0
@@ -208,6 +208,11 @@ reg = <0x20 0x10030000 0 0x2000>; }; + reset: reset at 2010031000 { + compatible = "lsi,axm55xx-reset"; + syscon = <&syscon>; + }; + amba { compatible = "arm,amba-bus"; #address-cells = <2>;
Signature · 1 line
1.8.3.2
Arnd Bergmann
maintainerQuoted 5 lines · On Wednesday 14 May 2014 20:37:55 Anders Berg wrote:
This is version 3 of this series to introduces basic platform support for the LSI AXM5516 SoC.
No major changes since v2. Ready to be applied to the arm-soc tree?
I think it's good, but I'm not sure if we should put them all into arm-soc. There are no dependencies between the drivers that I can see, so why not merge the clock and reset drivers through the individual subsystem maintainers?
We can take patches 1/3/4/6, and the others if there is a good reason not to have the regular maintainers pick them up.
The hip04 platform series is also adding a multi_v7_lpae_defconfig file. it would be good to add axxia to that config and also to the regular multi_v7_defconfig, but that can be an add-on patch once we have merged hip04.
Arnd
Quoted 5 lines · Arnd Bergmann
Quoted 4 lines · On Wednesday 14 May 2014 20:37:55 Anders Berg wrote:
This is version 3 of this series to introduces basic platform support for the LSI AXM5516 SoC.
Quoted 8 lines
Quoted 1 line
No major changes since v2. Ready to be applied to the arm-soc tree?
I think it's good, but I'm not sure if we should put them all into arm-soc. There are no dependencies between the drivers that I can see, so why not merge the clock and reset drivers through the individual subsystem maintainers?
We can take patches 1/3/4/6, and the others if there is a good reason not to have the regular maintainers pick them up.
Sure, that'll work to take 1,3,4,6.
Quoted 5 lines
The hip04 platform series is also adding a
multi_v7_lpae_defconfigfile. it would be good to add axxia to that config and also to the regularmulti_v7_defconfig, but that can be an add-on patch once we have merged hip04.
Ok.
Thanks,
Anders
Quoted 11 lines · Arnd Bergmann
Quoted 5 lines · On Wednesday 14 May 2014 20:37:55 Anders Berg wrote:
This is version 3 of this series to introduces basic platform support for the LSI AXM5516 SoC.
No major changes since v2. Ready to be applied to the arm-soc tree?
I think it's good, but I'm not sure if we should put them all into arm-soc. There are no dependencies between the drivers that I can see, so why not merge the clock and reset drivers through the individual subsystem maintainers?
After suggestions from Mike on the clk driver (and it's dts binding) I've done an updated clock driver patch - and a dependency surfaced... The file <dt-bindings/clock/lsi,axm5516-clks.h>. Which way should this take, arm-soc or Mikes clk tree? Perhaps this is a reason to take it all through arm-soc?
/Anders
Arnd Bergmann
maintainerQuoted 13 lines · On Thursday 15 May 2014 14:37:26 Anders Berg wrote:
Quoted 11 lines · Arnd Bergmann
Quoted 5 lines · On Wednesday 14 May 2014 20:37:55 Anders Berg wrote:
This is version 3 of this series to introduces basic platform support for the LSI AXM5516 SoC.
No major changes since v2. Ready to be applied to the arm-soc tree?
I think it's good, but I'm not sure if we should put them all into arm-soc. There are no dependencies between the drivers that I can see, so why not merge the clock and reset drivers through the individual subsystem maintainers?
Quoted 5 lines
After suggestions from Mike on the clk driver (and it's dts binding) I've done an updated clock driver patch - and a dependency surfaced... The file <
dt-bindings/clock/lsi,axm5516-clks.h>. Which way should this take, arm-soc or Mikes clk tree? Perhaps this is a reason to take it all through arm-soc?
I don't see the dependency: The clock driver is built only when CONFIG_ARCH_AXXIA is set, and that only gets introduced in the platform patches. As long as the header files come with the platform, it should be fine.
Arnd
Quoted 3 lines · Arnd Bergmann
I don't see the dependency: The clock driver is built only when
CONFIG_ARCH_AXXIAis set, and that only gets introduced in the platform patches. As long as the header files come with the platform, it should be fine.
You're right of course. I didn't think that all the way though...
I'll send a v4 of the series (minus the clk patch) when I get an OK on the binding of the clk driver.
/Anders