ARM: socfpga: dts: add watchdog0+1
PATCH v2 1/1 ARM: socfpga: dts: add watchdog0+1
The SoCFPGA has two watchdog timers. Add them to the dtsi.
--- arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
arch/arm/boot/dts/socfpga.dtsi +16 -0
@@ -549,6 +549,22 @@ reg = <0xffd05000 0x1000>; }; + watchdog0: watchdog at ffd02000 { + compatible = "snps,dw-wdt"; + reg = <0xffd02000 0x1000>; + interrupts = <0 171 0>; + clocks = <&osc1>; + status = "disabled"; + }; + + watchdog1: watchdog at ffd03000 { + compatible = "snps,dw-wdt"; + reg = <0xffd03000 0x1000>; + interrupts = <0 172 0>; + clocks = <&osc1>; + status = "disabled"; + }; + sysmgr: sysmgr at ffd08000 { compatible = "altr,sys-mgr", "syscon"; reg = <0xffd08000 0x4000>;
Signature · 1 line
2.0.0.rc0
PATCH v2 1/1 ARM: socfpga: dts: add watchdog0+1
Hi Steffen,
Quoted 12 lines · Steffen Trumtrar
The SoCFPGA has two watchdog timers. Add them to the dtsi.
Signed-off-by Steffen Trumtrar <[email protected]>--- arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)arch/arm/boot/dts/socfpga.dtsi +0
-0
arch/arm/boot/dts/socfpga.dtsi line 555
Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi +4
-0@@ -549,6 +549,22 @@ reg = <0xffd05000 0x1000>; }; + watchdog0: watchdog at ffd02000 { + compatible = "snps,dw-wdt"; + reg = <0xffd02000 0x1000>; + interrupts = <0 171 0>;
This should be IRQ_TYPE_LEVEL_HIGH.
arch/arm/boot/dts/socfpga.dtsi line 563
Quoted 8 lines
arch/arm/boot/dts/socfpga.dtsi +8
-0+ clocks = <&osc1>; + status = "disabled"; + }; + + watchdog1: watchdog at ffd03000 { + compatible = "snps,dw-wdt"; + reg = <0xffd03000 0x1000>; + interrupts = <0 172 0>;
Same here..
arch/arm/boot/dts/socfpga.dtsi line 570
Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi +4
-0+ clocks = <&osc1>; + status = "disabled"; + }; + sysmgr: sysmgr at ffd08000 { compatible = "altr,sys-mgr", "syscon"; reg = <0xffd08000 0x4000>;
No need to resend a patch, I'll apply with those changes.
Dinh
PATCH v2 1/1 ARM: socfpga: dts: add watchdog0+1
Hi Dinh!
Quoted 32 lines · Dinh Nguyen
Hi Steffen,
Quoted 12 lines · Steffen Trumtrar
The SoCFPGA has two watchdog timers. Add them to the dtsi.
Signed-off-by Steffen Trumtrar <[email protected]>--- arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)arch/arm/boot/dts/socfpga.dtsi +0
-0arch/arm/boot/dts/socfpga.dtsi line 555
Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi +4
-0@@ -549,6 +549,22 @@ reg = <0xffd05000 0x1000>; }; + watchdog0: watchdog at ffd02000 { + compatible = "snps,dw-wdt"; + reg = <0xffd02000 0x1000>; + interrupts = <0 171 0>;This should be
IRQ_TYPE_LEVEL_HIGH.arch/arm/boot/dts/socfpga.dtsi line 563
Quoted 8 lines
arch/arm/boot/dts/socfpga.dtsi +8
-0+ clocks = <&osc1>; + status = "disabled"; + }; + + watchdog1: watchdog at ffd03000 { + compatible = "snps,dw-wdt"; + reg = <0xffd03000 0x1000>; + interrupts = <0 172 0>;Same here..
Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi line 570
Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi +4
-0+ clocks = <&osc1>; + status = "disabled"; + }; + sysmgr: sysmgr at ffd08000 { compatible = "altr,sys-mgr", "syscon"; reg = <0xffd08000 0x4000>;
I wasn't aware that we started using the IRQ defines, but...
Quoted 2 lines
No need to resend a patch, I'll apply with those changes.
...great. Thanks.
Steffen
Signature · 4 lines
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PATCH v2 1/1 ARM: socfpga: dts: add watchdog0+1
Quoted 35 lines · Steffen Trumtrar
Hi Dinh!
Quoted 32 lines · Dinh Nguyen
Hi Steffen,
Quoted 12 lines · Steffen Trumtrar
The SoCFPGA has two watchdog timers. Add them to the dtsi.
Signed-off-by Steffen Trumtrar <[email protected]>--- arch/arm/boot/dts/socfpga.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)arch/arm/boot/dts/socfpga.dtsi +0
-0arch/arm/boot/dts/socfpga.dtsi line 555
Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi +4
-0@@ -549,6 +549,22 @@ reg = <0xffd05000 0x1000>; }; + watchdog0: watchdog at ffd02000 { + compatible = "snps,dw-wdt"; + reg = <0xffd02000 0x1000>; + interrupts = <0 171 0>;This should be
IRQ_TYPE_LEVEL_HIGH.arch/arm/boot/dts/socfpga.dtsi line 563
Quoted 8 lines
arch/arm/boot/dts/socfpga.dtsi +8
-0+ clocks = <&osc1>; + status = "disabled"; + }; + + watchdog1: watchdog at ffd03000 { + compatible = "snps,dw-wdt"; + reg = <0xffd03000 0x1000>; + interrupts = <0 172 0>;Same here..
Quoted 8 lines
Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi line 570
Quoted 7 lines
arch/arm/boot/dts/socfpga.dtsi +4
-0+ clocks = <&osc1>; + status = "disabled"; + }; + sysmgr: sysmgr at ffd08000 { compatible = "altr,sys-mgr", "syscon"; reg = <0xffd08000 0x4000>;I wasn't aware that we started using the IRQ defines, but...
You added the support to be able to do that ;). But what I really meant was you had the IRQ type set to 0(IRQ_TYPE_NONE), but it should be 4.
Dinh
Quoted 7 lines
Quoted 3 lines
No need to resend a patch, I'll apply with those changes.
...great. Thanks.
Steffen