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ARM: dts: qcom: Update msm8960 device trees

PATCH In review Kumar Gala 2 participants 3 messages May 28, 2014

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Kumar Gala

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#0 lore raw

PATCH 1/1 ARM: dts: qcom: Update msm8960 device trees

* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-msm8960-cdp.dts)
* Cleanup cpu node to match binding spec, enable-method and compatible should be per cpu, not part of the container
* Drop interrupts property from l2-cache node as its not part of the binding spec

Signed-off-by Kumar Gala <[email protected]>
---
 arch/arm/boot/dts/qcom-msm8960-cdp.dts |   6 ++
 arch/arm/boot/dts/qcom-msm8960.dtsi    | 165 +++++++++++++++++----------------
 2 files changed, 93 insertions(+), 78 deletions(-)
arch/arm/boot/dts/qcom-msm8960-cdp.dts +6 -0
index a58fb88..8e77ed7 100644
@@ -3,4 +3,10 @@
 / {
 	model = "Qualcomm MSM8960 CDP";
 	compatible = "qcom,msm8960-cdp", "qcom,msm8960";
+
+	soc {
+		serial at 16440000 {
+			status = "ok";
+		};
+	};
 };
arch/arm/boot/dts/qcom-msm8960.dtsi +87 -78

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#1 lore raw
Quoted 18 lines · Kumar Gala

* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-msm8960-cdp.dts)
* Cleanup cpu node to match binding spec, enable-method and compatible should be per cpu, not part of the container
* Drop interrupts property from l2-cache node as its not part of the binding spec

Signed-off-by Kumar Gala <[email protected]>
---
 arch/arm/boot/dts/qcom-msm8960-cdp.dts |   6 ++
 arch/arm/boot/dts/qcom-msm8960.dtsi    | 165 +++++++++++++++++----------------
 2 files changed, 93 insertions(+), 78 deletions(-)
arch/arm/boot/dts/qcom-msm8960-cdp.dts +0 -0
index a58fb88..8e77ed7 100644

arch/arm/boot/dts/qcom-msm8960-cdp.dts line 12

Quoted 10 lines
arch/arm/boot/dts/qcom-msm8960-cdp.dts +6 -0
@@ -3,4 +3,10 @@
 / {
 	model = "Qualcomm MSM8960 CDP";
 	compatible = "qcom,msm8960-cdp", "qcom,msm8960";
+
+	soc {
+		serial at 16440000 {
+			status = "ok";
+		};
+	};
 };

Is now the time put these serial nodes under a GSBI parent node?

Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
author
#2 lore raw
Quoted 23 lines · Josh Cartwright
Quoted 22 lines · Kumar Gala

* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-msm8960-cdp.dts)
* Cleanup cpu node to match binding spec, enable-method and compatible should be per cpu, not part of the container
* Drop interrupts property from l2-cache node as its not part of the binding spec

Signed-off-by Kumar Gala <[email protected]>

---
arch/arm/boot/dts/qcom-msm8960-cdp.dts | 6 ++
arch/arm/boot/dts/qcom-msm8960.dtsi | 165 +++++++++++++++++----------------

2 files changed, 93 insertions(+), 78 deletions(-)
arch/arm/boot/dts/qcom-msm8960-cdp.dts +1 -0
index a58fb88..8e77ed7 100644
@@ -3,4 +3,10 @@
 / {
 	model = "Qualcomm MSM8960 CDP";
 	compatible = "qcom,msm8960-cdp", "qcom,msm8960";
+
Quoted 8 lines

arch/arm/boot/dts/qcom-msm8960-cdp.dts line 12

Quoted 6 lines
arch/arm/boot/dts/qcom-msm8960-cdp.dts +5 -0
+	soc {
+		serial at 16440000 {
+			status = "ok";
+		};
+	};
 };

Is now the time put these serial nodes under a GSBI parent node?

Yeah, I?ll make the change to the 8960 & 8660 dts

- k

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Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation