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ARM: i.MX: avic: Use irqchip_init() for IRQ initialization in DT case

PATCH New Alexander Shiyan 2 participants 11 messages May 31, 2014 – Jun 2, 2014

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Arm (32-bit) Arm sub-architectures Arm i.MX and Layerscape
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Alexander Shiyan

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#0 lore raw

PATCH 1/3 ARM: i.MX: avic: Use irqchip_init() for IRQ initialization in DT case

Use generic irqchip_init() DT call to initialize IRQs, so after this patch, the mxc-avic driver is quite prepared to move to drivers/irqchip. As a temporary solution to do it, we use OF_DECLARE_2()
instead of IRQCHIP_DECLARE().

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/mach-imx/avic.c     | 29 ++++++++++++++++++++++-------
 arch/arm/mach-imx/imx25-dt.c |  1 -
 arch/arm/mach-imx/imx27-dt.c |  1 -
 arch/arm/mach-imx/imx31-dt.c |  1 -
 arch/arm/mach-imx/imx35-dt.c |  3 ++-
 5 files changed, 24 insertions(+), 11 deletions(-)
arch/arm/mach-imx/avic.c +22 -7
index 24b103c..9adcad2 100644
@@ -22,6 +22,7 @@
 #include <linux/irqdomain.h>
 #include <linux/io.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
 

@@ -153,13 +154,10 @@ static void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
  * interrupts. It registers the interrupt enable and disable functions
  * to the kernel for each interrupt source.
  */
-void __init mxc_init_irq(void __iomem *irqbase)
+static void __init _avic_init_irq(struct device_node *np)
 {
-	struct device_node *np;
 	int irq_base;
-	int i;
-
-	avic_base = irqbase;
+	unsigned i;
 
 	/* put the AVIC into the reset value with
 	 * all interrupts disabled

@@ -178,7 +176,6 @@ void __init mxc_init_irq(void __iomem *irqbase)
 	irq_base = irq_alloc_descs(-1, 0, AVIC_NUM_IRQS, numa_node_id());
 	WARN_ON(irq_base < 0);
 
-	np = of_find_compatible_node(NULL, NULL, "fsl,avic");
 	domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0,
 				       &irq_domain_simple_ops, NULL);
 	WARN_ON(!domain);

@@ -196,6 +193,24 @@ void __init mxc_init_irq(void __iomem *irqbase)
 	/* Initialize FIQ */
 	init_FIQ(FIQ_START);
 #endif
+}
+
+void __init mxc_init_irq(void __iomem *irqbase)
+{
+	avic_base = irqbase;
+
+	_avic_init_irq(NULL);
+}
 
-	printk(KERN_INFO "MXC IRQ initialized\n");
+static int __init avic_init_irq_dt(struct device_node *np,
+				   struct device_node *parent)
+{
+	avic_base = of_iomap(np, 0);
+	if (!avic_base)
+		return -ENOMEM;
+
+	_avic_init_irq(np);
+
+	return 0;
 }
+OF_DECLARE_2(irqchip, mxc_avic, "fsl,avic", avic_init_irq_dt);
arch/arm/mach-imx/imx25-dt.c +0 -1
index 42a65e0..2f97743 100644
@@ -37,7 +37,6 @@ static void __init imx25_timer_init(void)
 DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
 	.map_io		= mx25_map_io,
 	.init_early	= imx25_init_early,
-	.init_irq	= mx25_init_irq,
 	.init_time	= imx25_timer_init,
 	.init_machine	= imx25_dt_init,
 	.dt_compat	= imx25_dt_board_compat,
arch/arm/mach-imx/imx27-dt.c +0 -1
index 17bd405..09c577c 100644
@@ -42,7 +42,6 @@ static void __init imx27_timer_init(void)
 DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
 	.map_io		= mx27_map_io,
 	.init_early	= imx27_init_early,
-	.init_irq	= mx27_init_irq,
 	.init_time	= imx27_timer_init,
 	.init_machine	= imx27_dt_init,
 	.dt_compat	= imx27_dt_board_compat,
arch/arm/mach-imx/imx31-dt.c +0 -1
index 581f4d6..6e7a4c2 100644
@@ -38,7 +38,6 @@ static void __init imx31_dt_timer_init(void)
 DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
 	.map_io		= mx31_map_io,
 	.init_early	= imx31_init_early,
-	.init_irq	= mx31_init_irq,
 	.init_time	= imx31_dt_timer_init,
 	.init_machine	= imx31_dt_init,
 	.dt_compat	= imx31_dt_board_compat,
arch/arm/mach-imx/imx35-dt.c +2 -1
index a62854c..6b74123 100644
@@ -9,6 +9,7 @@
  */
 
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>

@@ -31,7 +32,7 @@ static void __init imx35_dt_init(void)
 static void __init imx35_irq_init(void)
 {
 	imx_init_l2cache();
-	mx35_init_irq();
+	irqchip_init();
 }
 
 static const char *imx35_dt_board_compat[] __initconst = {
Signature · 1 line
1.8.5.5
author
#1 lore raw

PATCH 1/3 ARM: i.MX: tzic: Use irqchip_init() for IRQ initialization in DT case

Use generic irqchip_init() DT call to initialize IRQs, so after this patch, the mxc-tzic driver is quite prepared to move to drivers/irqchip. As a temporary solution to do it, we use OF_DECLARE_2()
instead of IRQCHIP_DECLARE().

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/mach-imx/common.h     |  1 -
 arch/arm/mach-imx/mach-imx50.c |  1 -
 arch/arm/mach-imx/mach-imx51.c |  1 -
 arch/arm/mach-imx/mach-imx53.c |  1 -
 arch/arm/mach-imx/tzic.c       | 19 +++++++++++--------
 5 files changed, 11 insertions(+), 12 deletions(-)
arch/arm/mach-imx/common.h +0 -1
index 5aaea2b..9586187 100644
@@ -33,7 +33,6 @@ void imx27_init_early(void);
 void imx31_init_early(void);
 void imx35_init_early(void);
 void mxc_init_irq(void __iomem *);
-void tzic_init_irq(void);
 void mx1_init_irq(void);
 void mx21_init_irq(void);
 void mx25_init_irq(void);
arch/arm/mach-imx/mach-imx50.c +0 -1
index 62a4d45..f8d0030 100644
@@ -29,7 +29,6 @@ static const char *imx50_dt_board_compat[] __initconst = {
 };
 
 DT_MACHINE_START(IMX50_DT, "Freescale i.MX50 (Device Tree Support)")
-	.init_irq	= tzic_init_irq,
 	.init_machine	= imx50_dt_init,
 	.dt_compat	= imx50_dt_board_compat,
 	.restart	= mxc_restart,
arch/arm/mach-imx/mach-imx51.c +0 -1
index b6f42f8..bd4e9eb 100644
@@ -74,7 +74,6 @@ static const char *imx51_dt_board_compat[] __initconst = {
 
 DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
 	.init_early	= imx51_init_early,
-	.init_irq	= tzic_init_irq,
 	.init_machine	= imx51_dt_init,
 	.init_late	= imx51_init_late,
 	.dt_compat	= imx51_dt_board_compat,
arch/arm/mach-imx/mach-imx53.c +0 -1
index d8c3c08..37650b0 100644
@@ -48,7 +48,6 @@ static const char *imx53_dt_board_compat[] __initconst = {
 
 DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
 	.init_early	= imx53_init_early,
-	.init_irq	= tzic_init_irq,
 	.init_machine	= imx53_dt_init,
 	.init_late	= imx53_init_late,
 	.dt_compat	= imx53_dt_board_compat,
arch/arm/mach-imx/tzic.c +11 -8
index 1d4f384..b5fc0c7 100644
@@ -109,7 +109,7 @@ static __init void tzic_init_gc(int idx, unsigned int irq_start)
 	struct irq_chip_generic *gc;
 	struct irq_chip_type *ct;
 
-	gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base,
+	gc = irq_alloc_generic_chip("mxc-tzic", 1, irq_start, tzic_base,
 				    handle_level_irq);
 	gc->private = &tzic_extra_irq;
 	gc->wake_enabled = IRQ_MSK(32);

@@ -154,15 +154,15 @@ static void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
  * interrupts. It registers the interrupt enable and disable functions
  * to the kernel for each interrupt source.
  */
-void __init tzic_init_irq(void)
+static int __init tzic_init_irq(struct device_node *np,
+				struct device_node *parent)
 {
-	struct device_node *np;
 	int irq_base;
 	int i;
 
-	np = of_find_compatible_node(NULL, NULL, "fsl,tzic");
 	tzic_base = of_iomap(np, 0);
-	WARN_ON(!tzic_base);
+	if (!tzic_base)
+		return -ENOMEM;
 
 	/* put the TZIC into the reset value with
 	 * all interrupts disabled

@@ -183,11 +183,13 @@ void __init tzic_init_irq(void)
 	/* all IRQ no FIQ Warning :: No selection */
 
 	irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id());
-	WARN_ON(irq_base < 0);
+	if (irq_base < 0)
+		return -ENOMEM;
 
 	domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0,
 				       &irq_domain_simple_ops, NULL);
-	WARN_ON(!domain);
+	if (!domain)
+		return -ENOMEM;
 
 	for (i = 0; i < 4; i++, irq_base += 32)
 		tzic_init_gc(i, irq_base);

@@ -199,8 +201,9 @@ void __init tzic_init_irq(void)
 	init_FIQ(FIQ_START);
 #endif
 
-	pr_info("TrustZone Interrupt Controller (TZIC) initialized\n");
+	return 0;
 }
+OF_DECLARE_2(irqchip, mxc_tzic, "fsl,tzic", tzic_init_irq);
 
 /**
  * tzic_enable_wake() - enable wakeup interrupt
Signature · 1 line
1.8.5.5
author
#2 lore raw

PATCH 2/3 ARM: i.MX: avic: Remove #ifdef CONFIG_PM

In reply to Alexander Shiyan

Suspend/Resume functions are not called by generic irqchip if PM is not enabled. This patch removes excess #ifdef CONFIG_PM from i.MX AVIC driver, so these functions will always be compiled in, that increase compile coverage of this driver.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/mach-imx/avic.c | 6 ------
 1 file changed, 6 deletions(-)
arch/arm/mach-imx/avic.c +0 -6
index 9adcad2..374be0c 100644
@@ -86,7 +86,6 @@ static struct mxc_extra_irq avic_extra_irq = {
 #endif
 };
 
-#ifdef CONFIG_PM
 static u32 avic_saved_mask_reg[2];
 
 static void avic_irq_suspend(struct irq_data *d)

@@ -108,11 +107,6 @@ static void avic_irq_resume(struct irq_data *d)
 	__raw_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask);
 }
 
-#else
-#define avic_irq_suspend NULL
-#define avic_irq_resume NULL
-#endif
-
 static __init void avic_init_gc(int idx, unsigned int irq_start)
 {
 	struct irq_chip_generic *gc;
Signature · 1 line
1.8.5.5
author
#3 lore raw

PATCH 2/3 ARM: i.MX: tzic: Remove #ifdef CONFIG_PM

In reply to Alexander Shiyan

Suspend/Resume functions are not called by generic irqchip if PM is not enabled. This patch removes excess #ifdef CONFIG_PM from i.MX TZIC driver, so these functions will always be compiled in, that increase compile coverage of this driver.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/mach-imx/tzic.c | 6 ------
 1 file changed, 6 deletions(-)
arch/arm/mach-imx/tzic.c +0 -6
index b5fc0c7..534431e 100644
@@ -76,7 +76,6 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type)
 #define tzic_set_irq_fiq NULL
 #endif
 
-#ifdef CONFIG_PM
 static void tzic_irq_suspend(struct irq_data *d)
 {
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);

@@ -93,11 +92,6 @@ static void tzic_irq_resume(struct irq_data *d)
 		     tzic_base + TZIC_WAKEUP0(idx));
 }
 
-#else
-#define tzic_irq_suspend NULL
-#define tzic_irq_resume NULL
-#endif
-
 static struct mxc_extra_irq tzic_extra_irq = {
 #ifdef CONFIG_FIQ
 	.set_irq_fiq = tzic_set_irq_fiq,
Signature · 1 line
1.8.5.5
author
#4 lore raw

PATCH 3/3 ARM: i.MX: avic: Cleanup driver

In reply to Alexander Shiyan

This patch reduce license text and removes unused #include. No functional changes.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/mach-imx/avic.c | 11 -----------
 1 file changed, 11 deletions(-)
arch/arm/mach-imx/avic.c +0 -11
index 374be0c..d020531 100644
@@ -6,18 +6,8 @@
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version 2
  * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA  02110-1301, USA.
  */
 
-#include <linux/module.h>
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
 #include <linux/io.h>

@@ -27,7 +17,6 @@
 #include <asm/exception.h>
 
 #include "common.h"
-#include "hardware.h"
 #include "irq-common.h"
 
 #define AVIC_INTCNTL		0x00	/* int control reg */
Signature · 1 line
1.8.5.5
author
#5 lore raw

PATCH 3/3 ARM: i.MX: tzic: Cleanup driver

In reply to Alexander Shiyan

This patch removes unused #include.
No functional changes.

Signed-off-by Alexander Shiyan <[email protected]>
---
 arch/arm/mach-imx/tzic.c | 8 --------
 1 file changed, 8 deletions(-)
arch/arm/mach-imx/tzic.c +0 -8
index 534431e..6eb4afb 100644
@@ -9,10 +9,6 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/device.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/irqdomain.h>

@@ -22,8 +18,6 @@
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
 
-#include "common.h"
-#include "hardware.h"
 #include "irq-common.h"
 
 /*

@@ -72,8 +66,6 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type)
 
 	return 0;
 }
-#else
-#define tzic_set_irq_fiq NULL
 #endif
 
 static void tzic_irq_suspend(struct irq_data *d)
Signature · 1 line
1.8.5.5
#6 lore raw

PATCH 1/3 ARM: i.MX: avic: Use irqchip_init() for IRQ initialization in DT case

In reply to Alexander Shiyan
Quoted 2 lines · Alexander Shiyan

Use generic irqchip_init() DT call to initialize IRQs, so after this patch, the mxc-avic driver is quite prepared to move to drivers/irqchip.

What's the whole plan of the moving? IOW, what's left after this patch and what's the plan for those?

Quoted 1 line

As a temporary solution to do it, we use OF_DECLARE_2()

I do not see OF_DECLARE_2() is defined anywhere?

Quoted 3 lines

instead of IRQCHIP_DECLARE().

Signed-off-by Alexander Shiyan <[email protected]>

The patch number in the subject is confusing. There are 6 patches in the series rather than 3.

Shawn

Quoted 130 lines
---
 arch/arm/mach-imx/avic.c     | 29 ++++++++++++++++++++++-------
 arch/arm/mach-imx/imx25-dt.c |  1 -
 arch/arm/mach-imx/imx27-dt.c |  1 -
 arch/arm/mach-imx/imx31-dt.c |  1 -
 arch/arm/mach-imx/imx35-dt.c |  3 ++-
 5 files changed, 24 insertions(+), 11 deletions(-)
arch/arm/mach-imx/avic.c +22 -7
index 24b103c..9adcad2 100644
@@ -22,6 +22,7 @@
 #include <linux/irqdomain.h>
 #include <linux/io.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
 

@@ -153,13 +154,10 @@ static void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
  * interrupts. It registers the interrupt enable and disable functions
  * to the kernel for each interrupt source.
  */
-void __init mxc_init_irq(void __iomem *irqbase)
+static void __init _avic_init_irq(struct device_node *np)
 {
-	struct device_node *np;
 	int irq_base;
-	int i;
-
-	avic_base = irqbase;
+	unsigned i;
 
 	/* put the AVIC into the reset value with
 	 * all interrupts disabled

@@ -178,7 +176,6 @@ void __init mxc_init_irq(void __iomem *irqbase)
 	irq_base = irq_alloc_descs(-1, 0, AVIC_NUM_IRQS, numa_node_id());
 	WARN_ON(irq_base < 0);
 
-	np = of_find_compatible_node(NULL, NULL, "fsl,avic");
 	domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0,
 				       &irq_domain_simple_ops, NULL);
 	WARN_ON(!domain);

@@ -196,6 +193,24 @@ void __init mxc_init_irq(void __iomem *irqbase)
 	/* Initialize FIQ */
 	init_FIQ(FIQ_START);
 #endif
+}
+
+void __init mxc_init_irq(void __iomem *irqbase)
+{
+	avic_base = irqbase;
+
+	_avic_init_irq(NULL);
+}
 
-	printk(KERN_INFO "MXC IRQ initialized\n");
+static int __init avic_init_irq_dt(struct device_node *np,
+				   struct device_node *parent)
+{
+	avic_base = of_iomap(np, 0);
+	if (!avic_base)
+		return -ENOMEM;
+
+	_avic_init_irq(np);
+
+	return 0;
 }
+OF_DECLARE_2(irqchip, mxc_avic, "fsl,avic", avic_init_irq_dt);
arch/arm/mach-imx/imx25-dt.c +0 -1
index 42a65e0..2f97743 100644
@@ -37,7 +37,6 @@ static void __init imx25_timer_init(void)
 DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
 	.map_io		= mx25_map_io,
 	.init_early	= imx25_init_early,
-	.init_irq	= mx25_init_irq,
 	.init_time	= imx25_timer_init,
 	.init_machine	= imx25_dt_init,
 	.dt_compat	= imx25_dt_board_compat,
arch/arm/mach-imx/imx27-dt.c +0 -1
index 17bd405..09c577c 100644
@@ -42,7 +42,6 @@ static void __init imx27_timer_init(void)
 DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
 	.map_io		= mx27_map_io,
 	.init_early	= imx27_init_early,
-	.init_irq	= mx27_init_irq,
 	.init_time	= imx27_timer_init,
 	.init_machine	= imx27_dt_init,
 	.dt_compat	= imx27_dt_board_compat,
arch/arm/mach-imx/imx31-dt.c +0 -1
index 581f4d6..6e7a4c2 100644
@@ -38,7 +38,6 @@ static void __init imx31_dt_timer_init(void)
 DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
 	.map_io		= mx31_map_io,
 	.init_early	= imx31_init_early,
-	.init_irq	= mx31_init_irq,
 	.init_time	= imx31_dt_timer_init,
 	.init_machine	= imx31_dt_init,
 	.dt_compat	= imx31_dt_board_compat,
arch/arm/mach-imx/imx35-dt.c +2 -1
index a62854c..6b74123 100644
@@ -9,6 +9,7 @@
  */
 
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>

@@ -31,7 +32,7 @@ static void __init imx35_dt_init(void)
 static void __init imx35_irq_init(void)
 {
 	imx_init_l2cache();
-	mx35_init_irq();
+	irqchip_init();
 }
 
 static const char *imx35_dt_board_compat[] __initconst = {
Signature · 1 line
1.8.5.5
author
#7 lore raw

Mon, 2 Jun 2014 10:21:21 +0800 ?? Shawn Guo <[email protected]>:

Quoted 6 lines · Alexander Shiyan
Quoted 2 lines

Use generic irqchip_init() DT call to initialize IRQs, so after this patch, the mxc-avic driver is quite prepared to move to drivers/irqchip.

What's the whole plan of the moving? IOW, what's left after this patch and what's the plan for those?

For the full movement of these drivers into drivers/irqchip, we need to find a solution for i.MX specific functions, such as mxc_set_irq_fiq() and tzic_enable_wake(). I haven't found a good solution yet...

Quoted 3 lines
Quoted 1 line

As a temporary solution to do it, we use OF_DECLARE_2()

I do not see OF_DECLARE_2() is defined anywhere?

<include/linux/of.h>

---

#8 lore raw

PATCH 1/3 ARM: i.MX: avic: Use irqchip_init() for IRQ initialization in DT case

Quoted 12 lines · Alexander Shiyan

Mon, 2 Jun 2014 10:21:21 +0800 ?? Shawn Guo <[email protected]>:

Quoted 6 lines · Alexander Shiyan
Quoted 2 lines

Use generic irqchip_init() DT call to initialize IRQs, so after this patch, the mxc-avic driver is quite prepared to move to drivers/irqchip.

What's the whole plan of the moving? IOW, what's left after this patch and what's the plan for those?

For the full movement of these drivers into drivers/irqchip, we need to find a solution for i.MX specific functions, such as mxc_set_irq_fiq() and tzic_enable_wake(). I haven't found a good solution yet...

Quoted 5 lines
Quoted 3 lines
Quoted 1 line

As a temporary solution to do it, we use OF_DECLARE_2()

I do not see OF_DECLARE_2() is defined anywhere?

<include/linux/of.h>

The <include/linux/of.h> on my tree doesn't have it yet. So I cannot apply it for now anyway.

Shawn

author
#9 lore raw
In reply to Shawn Guo

Mon, 2 Jun 2014 10:21:21 +0800 ?? Shawn Guo <[email protected]>:

Quoted 3 lines · Alexander Shiyan
Quoted 2 lines

Use generic irqchip_init() DT call to initialize IRQs, so after this patch, the mxc-avic driver is quite prepared to move to drivers/irqchip.

...

Quoted 2 lines

The patch number in the subject is confusing. There are 6 patches in the series rather than 3.

This is a separate series of three patches for AVIC and similar series for TZIC. You want me to combine them into one?

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#10 lore raw

PATCH 1/3 ARM: i.MX: avic: Use irqchip_init() for IRQ initialization in DT case

Quoted 11 lines · Alexander Shiyan

Mon, 2 Jun 2014 10:21:21 +0800 ?? Shawn Guo <[email protected]>:

Quoted 3 lines · Alexander Shiyan
Quoted 2 lines

Use generic irqchip_init() DT call to initialize IRQs, so after this patch, the mxc-avic driver is quite prepared to move to drivers/irqchip.

...

Quoted 2 lines

The patch number in the subject is confusing. There are 6 patches in the series rather than 3.

This is a separate series of three patches for AVIC and similar series for TZIC. You want me to combine them into one?

As all other 5 patches are in reply to the first one [1], I thought they are just one series.

Shawn

[1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/330129