clk: clps711x: Add DT bindings documentation
Subsystems (2)
PATCH 2/2 clk: clps711x: Add DT bindings documentation
This patch adds DT binding documentation for the Cirrus Logic CLPS711X-based CPUs clock subsystem.
--- .../devicetree/bindings/clock/clps711x-clock.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/clps711x-clock.txt
Documentation/devicetree/bindings/clock/clps711x-clock.txt new file +19 -0
@@ -0,0 +1,19 @@ +* Clock bindings for the Cirrus Logic CLPS711X CPUs + +Required properties: +- compatible : Shall contain "cirrus,clps711x-clk". +- reg : Address of the internal register set. +- cpufreq : Factory set default frequency in HZ. +- #clock-cells: Should be <1>. + +The clock consumer should specify the desired clock by having the clock +ID in its "clocks" phandle cell. See include/dt-bindings/clock/clps711x-clock.h +for the full list of CLPS711X clock IDs. + +Example: + clks: clks at 80000000 { + #clock-cells = <1>; + compatible = "cirrus,ep7312-clk", "cirrus,clps711x-clk"; + reg = <0x80000000 0xc000>; + cpufreq = <73728000>; + };
Signature · 1 line
1.8.5.5
PATCH 2/2 clk: clps711x: Add DT bindings documentation
Quoted 15 lines · Alexander Shiyan
This patch adds DT binding documentation for the Cirrus Logic CLPS711X-based CPUs clock subsystem.
Signed-off-by Alexander Shiyan <[email protected]>--- .../devicetree/bindings/clock/clps711x-clock.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/clps711x-clock.txtDocumentation/devicetree/bindings/clock/clps711x-clock.txt new file +0
-0
Documentation/devicetree/bindings/clock/clps711x-clock.txt line 6
Quoted 6 lines
Documentation/devicetree/bindings/clock/clps711x-clock.txt new file +6
-0@@ -0,0 +1,19 @@ +* Clock bindings for the Cirrus Logic CLPS711X CPUs + +Required properties: +- compatible : Shall contain "cirrus,clps711x-clk". +- reg : Address of the internal register set. +- cpufreq : Factory set default frequency in HZ.
Huh? Why is this called "cpufreq" what is this the frequency of, exactly?
Is this an input or an output?
Cheers,
Mark.
Quoted 21 lines
Documentation/devicetree/bindings/clock/clps711x-clock.txt new file +13
-0+- #clock-cells: Should be <1>. + +The clock consumer should specify the desired clock by having the clock +ID in its "clocks" phandle cell. See include/dt-bindings/clock/clps711x-clock.h +for the full list of CLPS711X clock IDs. + +Example: + clks: clks at 80000000 { + #clock-cells = <1>; + compatible = "cirrus,ep7312-clk", "cirrus,clps711x-clk"; + reg = <0x80000000 0xc000>; + cpufreq = <73728000>; + };Signature · 6 lines
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Mon, 2 Jun 2014 09:56:51 +0100 ?? Mark Rutland <[email protected]>:
Quoted 26 lines · Alexander Shiyan
Quoted 15 lines
This patch adds DT binding documentation for the Cirrus Logic CLPS711X-based CPUs clock subsystem.
Signed-off-by Alexander Shiyan <[email protected]>--- .../devicetree/bindings/clock/clps711x-clock.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/clps711x-clock.txtDocumentation/devicetree/bindings/clock/clps711x-clock.txt new file +0
-0Documentation/devicetree/bindings/clock/clps711x-clock.txt line 6
Quoted 6 lines
Documentation/devicetree/bindings/clock/clps711x-clock.txt new file +6
-0@@ -0,0 +1,19 @@ +* Clock bindings for the Cirrus Logic CLPS711X CPUs + +Required properties: +- compatible : Shall contain "cirrus,clps711x-clk". +- reg : Address of the internal register set. +- cpufreq : Factory set default frequency in HZ.Huh? Why is this called "cpufreq" what is this the frequency of, exactly?
Quoted 1 line
Is this an input or an output?
Modern CLPS711X CPUs support PLL reprogramming, while for older processors, this procedure is not possible and the CPU clock is set to a fixed value. Thus if the value of the PLL multiplier is not correct (missing), we use a fixed CPU frequency of the processor, described in DT, which allows us to use the driver for the new and old versions of this CPU.
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PATCH 2/2 clk: clps711x: Add DT bindings documentation
Quoted 27 lines · Alexander Shiyan
Mon, 2 Jun 2014 09:56:51 +0100 ?? Mark Rutland <[email protected]>:
Quoted 26 lines · Alexander Shiyan
Quoted 15 lines
This patch adds DT binding documentation for the Cirrus Logic CLPS711X-based CPUs clock subsystem.
Signed-off-by Alexander Shiyan <[email protected]>--- .../devicetree/bindings/clock/clps711x-clock.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/clps711x-clock.txtDocumentation/devicetree/bindings/clock/clps711x-clock.txt new file +0
-0Documentation/devicetree/bindings/clock/clps711x-clock.txt line 6
Quoted 6 lines
Documentation/devicetree/bindings/clock/clps711x-clock.txt new file +6
-0@@ -0,0 +1,19 @@ +* Clock bindings for the Cirrus Logic CLPS711X CPUs + +Required properties: +- compatible : Shall contain "cirrus,clps711x-clk". +- reg : Address of the internal register set. +- cpufreq : Factory set default frequency in HZ.Huh? Why is this called "cpufreq" what is this the frequency of, exactly?
Quoted 7 lines
Quoted 1 line
Is this an input or an output?
Modern CLPS711X CPUs support PLL reprogramming, while for older processors, this procedure is not possible and the CPU clock is set to a fixed value. Thus if the value of the PLL multiplier is not correct (missing), we use a fixed CPU frequency of the processor, described in DT, which allows us to use the driver for the new and old versions of this CPU.
Ok. So this is the frequency of a (non-programmable) PLL which feeds the clock IP block?
Or is this internal to the IP block?
Typically we'd use "clock-frequency" as the name for such an input, or just model it as a normal clock input and feed it a fixed-rate-clock for the non-programmable case.
Cheers,
Mark.
Mon, 2 Jun 2014 11:42:22 +0100 ?? Mark Rutland <[email protected]>:
Quoted 36 lines · Alexander Shiyan
Quoted 27 lines
Mon, 2 Jun 2014 09:56:51 +0100 ?? Mark Rutland <[email protected]>:
Quoted 26 lines · Alexander Shiyan
Quoted 15 lines
This patch adds DT binding documentation for the Cirrus Logic CLPS711X-based CPUs clock subsystem.
Signed-off-by Alexander Shiyan <[email protected]>--- .../devicetree/bindings/clock/clps711x-clock.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/clps711x-clock.txtDocumentation/devicetree/bindings/clock/clps711x-clock.txt new file +0
-0Documentation/devicetree/bindings/clock/clps711x-clock.txt line 6
Quoted 6 lines
Documentation/devicetree/bindings/clock/clps711x-clock.txt new file +6
-0@@ -0,0 +1,19 @@ +* Clock bindings for the Cirrus Logic CLPS711X CPUs + +Required properties: +- compatible : Shall contain "cirrus,clps711x-clk". +- reg : Address of the internal register set. +- cpufreq : Factory set default frequency in HZ.Huh? Why is this called "cpufreq" what is this the frequency of, exactly?
Quoted 7 lines
Quoted 1 line
Is this an input or an output?
Modern CLPS711X CPUs support PLL reprogramming, while for older processors, this procedure is not possible and the CPU clock is set to a fixed value. Thus if the value of the PLL multiplier is not correct (missing), we use a fixed CPU frequency of the processor, described in DT, which allows us to use the driver for the new and old versions of this CPU.
Quoted 4 lines
Ok. So this is the frequency of a (non-programmable) PLL which feeds the clock IP block?
Or is this internal to the IP block?
To be precise, it is the frequency at the CPU startup. After starting the bootloader can change the value of PLL (of course, if this is supported) and processor speed will changed. For CPUs that do not support changing the PLL, this value is the only one possible.
Quoted 3 lines
Typically we'd use "clock-frequency" as the name for such an input, or just model it as a normal clock input and feed it a fixed-rate-clock for the non-programmable case.
I would prefer to use the name "startup-frequency" or so.
"clock-frequency" means that we use this frequency exactly, but it's not as if the PLL has to be reprogrammed by the bootloader.
The use of "fixed-rate-clock" here for me is not correct, because the real generator used by the processor (old and new), uses the frequency 3.6864M and simply multiply it by the PLL value.
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